AP65450 4A, 18V, 650kHz ADAPTIVE COT STEP-DOWN CONVERTER Description Pin Assignments The AP65450 is an adaptive constant on-time mode synchronous buck converter providing high efficiency, excellent transient response and high DC output accuracy for low-voltage regulation in digital TV and monitor. ( Top View ) The constant-on-time control scheme handles wide input/output voltage ratios and provides low external component count. The internal proprietary circuit enables the device to adopt both low equivalent series resistance (ESR) output capacitors, such as SP-CAP or POSCAP and ultra-low ESR ceramic capacitors. EN 1 8 VIN FB 2 7 BS VREG5 3 6 SW SS 4 5 GND SO-8EP The adaptive on-time control supports seamless transition between continuous conduction mode (CCM) at higher load conditions and discontinuous conduction mode (DCM) at lighter load conditions. DCM allows AP65450 to maintain high efficiency at light load conditions. The AP65450 also features programmable soft-start, UVLO, OTP and OCP to protect the circuit. This IC is available in SO-8EP package. Features Fixed Frequency Emulated Constant On-time Control Good Stability Independent of the Output Capacitor ESR Fast Load Transient Response Synchronous Rectification: 65mΩ Internal High-side Switch and 36mΩ Internal Low-side Switch Wide Input Voltage Range: 4.5V to 18V Output Voltage Range: 0.76V to 6V 4A Continuous Output Current 650kHz Switching Frequency Built-in Over Current Limit Built-in Thermal Shutdown Protection Programmable Soft-start Pre-biased Start-up Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. “Green” Device (Note 3) Notes: Applications Gaming Consoles Flat Screen TV Sets and Monitors Set-Top Boxes Distributed power systems Home Audio Consumer Electronics Network Systems FPGA, DSP and ASIC Supplies Green Electronics 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. Typical Applications Circuit INPUT VIN 12V 7 BST 8 IN ON OFF 1 EN 6 SW L1 C5 0.1µF 1.5μH AP65450 R1 8.25kΩ R2 22.1kΩ 2 FB C1 20μF C4 8.2nF 4 SS 5 GND 3 VREG5 OUTPUT VOUT 1.05V C2 44μF C3 1µF Figure 1 Typical Application Circuit AP65450 Document number: DS37135 Rev. 2-2 1 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 Pin Descriptions Pin Name Pin Number EN 1 Enable input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator, drive it low to turn off. Pull up with 100kΩ resistor for automatic startup. FB 2 Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive voltage divider connected to it from the output voltage. VREG5 3 Internal power supply output pin to connect an additional capacitor. Connect a 1μF (typical) capacitor as close as possible to the VREG5 and GND. This pin is not active when EN is low. SS 4 Soft-start control input pin. SS controls the soft start period. Connect a capacitor from SS to GND to set the soft-start period. GND 5 Ground pin is the main power ground for the switching circuit. SW 6 Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load. Note that a capacitor is required from SW to BS to power the high-side switch. BS 7 Bootstrap pin. A bootstrap capacitor is connected between the BS pin and SW pin. The voltage across the bootstrap capacitor drives the internal high-side NMOS switch. A 0.1μF (typical) capacitor is required for proper operation VIN 8 Supply input pin. A capacitor should be connected between the VIN pin and GND pin to keep the DC input voltage constant. EP Function SO-8EP Connect the exposed thermal pad to GND on the PCB. Functional Block Diagram Figure 2 Functional Block Diagram AP65450 Document number: DS37135 Rev. 2-2 2 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 Absolute Maximum Ratings (Note 4) (@TA = +25°C, unless otherwise specified.) Symbol Parameter VIN Supply Voltage VREG5 VREG5 Pin Voltage VSW Switch Node Voltage VBS Bootstrap Voltage VFB Feedback Voltage VEN Enable/UVLO Voltage VSS Soft-start PIN VGND GND Pin Voltage TST Storage Temperature TJ Junction Temperature TL Lead Temperature ESD Susceptibility (Note 5) HBM Human Body Model MM Machine Model Notes: Rating -0.3 to 20 -0.3V to +6.0 -1.0 to VIN +0.3 -0.3 to VSW +6.0 -0.3V to +6.0 -0.3V to +6.0 -0.3V to +6.0 -0.3 to 0.3 -65 to +150 +160 +260 Unit V V V V V V V V °C °C °C 2 200 kV V 4. Stresses greater than the 'Absolute Maximum Ratings' specified above may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time. 5. Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. Thermal Resistance (Note 6) Note: Symbol Parameter θJA Junction to Ambient SO-8EP Rating 70 °C/W Unit θJC Junction to Case SO-8EP 30 °C/W 6. Test condition: SO-8: Device mounted on 1"x1" FR-4 substrate PCB, 2oz copper, with minimum recommended pad layout. Recommended Operating Conditions (Note 7) (@TA = +25°C, unless otherwise specified.) Symbol Note: Min Max Unit VIN Supply Voltage Parameter 4.5 18.0 V TJ Operating Junction Temperature Range -40 +125 °C TA Operating Ambient Temperature Range -40 +85 °C 7. The device function is not guaranteed outside of the recommended operating conditions. AP65450 Document number: DS37135 Rev. 2-2 3 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 Electrical Characteristics (@TA = +25°C, VIN = 12V, unless otherwise specified.) Parameter Symbol Conditions Min Typ Max Unit 18 SUPPLY VOLTAGE (VIN PIN) Input Voltage Quiescent Current Shutdown Supply Current VIN IQ ISHDN 4.5 0.9 3.6 10 V mA μA 3.45 3.75 4.05 V 0.19 0.32 0.45 V 0.6 V V VFB=0.85V VEN=0V UNDER VOLTAGE LOCKOUT UVLO Threshold VUVLO UVLO Hysteresis VHYS VIN Rising Test VREG5 Voltage VIN Falling Test VREG5 Voltage ENABLE (EN PIN) EN High-level Input Voltage EN Low-level Input Voltage VENH VENL 1.9 VOLTAGE REFERENCE (FB PIN) Feedback Voltage Feedback Bias Current VFB IFB VOUT=1.05V VFB=0.8V 0.753 -0.1 0.765 0 0.777 0.1 V μA 4.7 5.1 5.5 V 60 mA mV 20 mV VREG5 OUTPUT VREG5 Output Voltage VVREG5 Source Current Capability Load Regulation Line Regulation 6.0V<VIN<18V 0<IVREG5<5mA VIN=6V, VVREG5=4V 0<IVREG5<5mA 6.0V<VIN<18V IVREG5=5mA 110 MOSFET High-side Switch On-resistance Low-side Switch On-resistance RDSONH RDSONL Ω Ω 0.075 0.036 CURRENT LIMIT High Level Current Limit ILIM-H L=1.5μH 4.6 5.6 6.9 A 150 260 310 ns ns ON-TIME TIMER On Time Minimum Off Time tON tOFF-MIN VIN=12V, VOUT=1.05V VFB=0.7V THERMAL SHUTDOWN Thermal Shutdown Thermal Shutdown Hysteresis TOTSD THYS 160 30 ºC ºC SOFT START (SS PIN) Soft-start Source Current Soft-start Discharge Current AP65450 Document number: DS37135 Rev. 2-2 ISS-SOURCE ISS-DISCHARGE VSS=1.2V VSS=0.5V 4 of 14 www.diodes.com 4.2 0.1 6.0 0.2 7.8 μA mA November 2014 © Diodes Incorporated AP65450 Typical Performance Characteristics (@TA = +25°C, VIN = 12V, VOUT = 3.3V, unless otherwise specified.) 85˚C 25˚C -40˚C 85˚C 25˚C -40˚C VIN=18V IO=10mA VIN=12V VIN=4.5V AP65450 Document number: DS37135 Rev. 2-2 IO=1A 5 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 Typical Performance Characteristics (cont.) (@TA = +25°C, VIN = 12V, VOUT = 1.05V, unless otherwise specified.) VO=3.3V VO=1.05V VO=5V VO=1.8V VO=3.3V VO=2.5V VO=1.8V VO=1.5V VO=1.05V VO=1.2V VO=5V VO=2.5V VO=3.3V VO=5V VO=3.3V VO=2.5V VO=1.05V VO=1.8V VO=1.5V VO=1.2V VO=1.05V VO=1.2V VO=1.5V VO=1.8V AP65450 Document number: DS37135 Rev. 2-2 6 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 Typical Performance Characteristics (cont.) (@TA = +25°C, VIN = 12V, VOUT = 1.05V, L = 1.5µH, C1 = 20µF, C2 = 44µF, unless otherwise specified.) Steady State Test 4A Startup Through VIN No Load Startup Through VIN 4A Load VIN_AC (500mV/DIV) VIN (12V/DIV) VIN (12V/DIV) VOUT (1V/DIV) VOUT (1V/DIV) IOUT (1A/DIV) IOUT (4A/DIV) SW (10V/DIV) SW (10V/DIV) VOUT_AC (50mV/DIV) IOUT (4A/DIV) SW (5V/DIV) Time-1µs/div Time-500µs/div Time-500µs/div Startup with VREG5 No Load Shutdown Through VIN No load Shutdown Through VIN 4A Load VIN (12V/DIV) VIN (12V/DIV) VOUT (1V/DIV) VOUT (1V/DIV) IOUT (1A/DIV) IOUT (4A/DIV) EN (3V/DIV) VREG5 (5V/DIV) VOUT (500mV/DIV) SW (10V/DIV) SW (10V/DIV) Time-1ms/div Time-50ms/div Time-200µs/div Startup Through VEN No Load Startup Through VEN 4A Load Short Circuit Test VEN (3V/DIV) VEN (3V/DIV) VOUT (1V/DIV) VOUT (1V/DIV) IOUT (1A/DIV) IOUT (4A/DIV) SW (10V/DIV) SW (10V/DIV) VOUT (500mV/DIV) IOUT (2A/DIV) Time-2ms/div Time-2ms/div Time-100µs/div Shutdown Through VEN No load Shutdown Through VEN 4A Load Short Circuit Recovery VEN (3V/DIV) VEN (3V/DIV) VOUT (500mV/DIV) VOUT (1V/DIV) IOUT (1A/DIV) VOUT (1V/DIV) IOUT (4A/DIV) SW (10V/DIV) IOUT (2A/DIV) SW (10V/DIV) Time-20ms/div Time-20ms/div Time-1ms/div DCM Voltage Ripple (IO=30mA) Voltage Ripple at Output (IO=4A) Voltage Ripple at Input (IO=4A) VIN_AC (100mV/DIV) VOUT_AC (50mV/DIV) VOUT_AC (20mV/DIV) SW (5V/DIV) SW (5V/DIV) SW (5V/DIV) Time-1µs/div AP65450 Document number: DS37135 Rev. 2-2 Time-400ns/div 7 of 14 www.diodes.com Time-400ns/div November 2014 © Diodes Incorporated AP65450 Application Information Figure 3 Typical Application of AP65450 AP65450 Document number: DS37135 Rev. 2-2 8 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 Application Information (cont.) Power Save Mode The AP65450 is designed with Power Save Mode (PSM) at light load conditions for high efficiency. The AP65450 automatically reduces the switching frequency and change the Ton time to Tmin-on time during a light load condition to get high efficiency and low output ripple. As the output current decreases form heavy load condition, the inductor current decreases as well, eventually comes close to zero current, which is the boundary between CCM and DCM. The low side MOSFET is turned off when the inductor current reaches zero level. The load is provided only by output capacitor, when FB voltage is lower than 0.76V, the next cycle ON cycle is beginning. The on-time is the minimum on time that benefit for decreasing VOUT ripple at light load condition. When the output current increases from light to heavy load, the switching frequency increases to keep output voltage. The transition point to light load operation can be calculated using the following equation: V VOUT ILOAD IN TON 2L TON is on-time Enable Above the ‘EN high-level input voltage’, the internal regulator is turned on and the quiescent current can be measured above this threshold. The enable (EN) input allows the user to control turning on or off the regulator. To enable the AP65450, EN must be pulled above the ‘EN high-level input voltage’ and to disable the AP65450, EN must be pulled below ‘EN low-level input voltage’. In Figure 3, EN has a positive voltage through a 100KΩ pull-up to VIN. No supply input is required for EN. Soft-start The soft-start time of the AP65450 is programmable by selecting different CSS value. When the EN pin becomes high, the CSS is charged by a 6μA current source, generating a ramp signal fed into non-inverting input of the error comparator. Reference voltage VREF or the internal soft-start voltage SS whichever is smaller dominates the behavior of the non-inverting inputs of the error amplifier. Accordingly, the output voltage will follow the SS signal and ramp up smoothly to its target level. The capacitor value required for a given soft-start ramp time can be expressed as: C VFB t SS SS ISS Where CSS is the required capacitor between SS pin and GND, tSS is the desired soft-start time and VFB is the feedback voltage. Over Current Protection (OCP) Figure 4 shows the over current protection (OCP) scheme of AP65450. In each switching cycle, the inductor current is sensed by monitoring the low-side MOSFET in the OFF period. When the voltage between GND pin and SW pin is smaller than the over current trip level, the OCP will be triggered and the controller keeps the OFF state. A new switching cycle will begging when the measured voltage is larger than limit voltage. The internal counter is incremented when OCP is triggered. After 16 sequential cycles, the internal OCL (Over Current Logic) threshold is set to a lower level, reducing the available output current. When a switching cycle occurs where the switch current is below the lower OCL threshold, the counter is reset and OCL limit is returned to higher value. Because the RDS(ON) of MOSFET increases with temperature, VLimit has xppm/°C temperature coefficient to compensate this temperature dependency of RDS(ON). R S Q1 Q -266mV OC COMPARATOR Q2 Figure 4 Over Current Protection Scheme Under Voltage Lockout The AP65450 provides an under voltage lockout circuit to prevent it from undefined status when startup. The UVLO circuit shuts down the device when VIN drops below 3.45V. The UVLO circuit has 320mV hysteresis, which means the device starts up again when V REG rise to 3.75V (nonlatch). Thermal shutdown If the junction temperature of the device reaches the thermal shutdown limit of 160°C, the AP65450 shuts itself off, and both HMOS and LMOS will be turned off. The output is discharge with the internal transistor. When the junction cools to the required level (130°C nominal), the device initiates soft-start as during a normal power-up cycle. AP65450 Document number: DS37135 Rev. 2-2 9 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 Application Information (cont.) Setting the Output Voltage The output voltage can be adjusted from 1.000 to 5V using an external resistor divider. Table 1 shows a list of resistor selection for common output voltages. Resistor R1 is selected based on a design tradeoff between efficiency and output voltage accuracy. For high values of R1 there is less current consumption in the feedback network. However the trade-off is output voltage accuracy due to the bias current in the error amplifier. R1 can be determined by the following equation: V R1 R 2 OUT 1 0.765 Output Voltage (V) 1 1.05 1.2 1.5 1.8 2.5 3.3 5 R1 (kΩ) 6.81 8.25 12.7 21.5 30.1 49.9 73.2 124 R2 (kΩ) 22.1 22.1 22.1 22.1 22.1 22.1 22.1 22.1 Table 1 Resistor Selection for Common Output Figure 5. Feedback Divider Network Inductor Calculating the inductor value is a critical factor in designing a buck converter. For most designs, the following equation can be used to calculate the inductor value; L VOUT (VIN VOUT ) VIN ΔIL fSW Where ΔIL is the inductor ripple current, and fSW is the buck converter switching frequency. Choose the inductor ripple current to be 30% of the maximum load current. The maximum inductor peak current is calculated from: IL(MAX) ILOAD ΔIL 2 Peak current determines the required saturation current rating, which influences the size of the inductor. Saturating the inductor decreases the converter efficiency while increasing the temperatures of the inductor and the internal MOSFETs. Hence choosing an inductor with appropriate saturation current rating is important. A 1µH to 3.3µH inductor with a DC current rating of at least 25% percent higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor’s DC resistance should be less than 100mΩ. Use a larger inductance for improved efficiency under light load conditions. The phase boost can be achieved by adding an additional feed forward capacitor (C7) in parallel with R1. Output Voltage (V) 1 1.05 1.2 1.5 1.8 2.5 3.3 5 C7(pF) 5-22 5-22 5-22 5-22 L1(µH) 1.0-1.5 1.0-1.5 1.0-1.5 1.5 1.5 2.2 2.2 3.3 C8+C9(µF) 22-68 22-68 22-68 22-68 22-68 22-68 22-68 22-68 Table 2 Recommended Component Selection AP65450 Document number: DS37135 Rev. 2-2 10 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 Application Information (cont.) Input Capacitor The input capacitor reduces the surge current drawn from the input supply and the switching noise from the device. The input capacitor has to sustain the ripple current produced during the on time on the upper MOSFET. It must have a low ESR to minimize the losses. The RMS current rating of the input capacitor is a critical parameter that must be higher than the RMS input current. As a rule of thumb, select an input capacitor which has an RMs rating that is greater than half of the maximum load current. Due to large dI/dt through the input capacitors, electrolytic or ceramics should be used. If a tantalum must be used, it must be surge protected. Otherwise, capacitor failure could occur. For most applications, greater than 10µF ceramic capacitor is sufficient. Output Capacitor The output capacitor keeps the output voltage ripple small, ensures feedback loop stability and reduces the overshoot of the output voltage. The output capacitor is a basic component for the fast response of the power supply. In fact, during load transient, for the first few microseconds it supplies the current to the load. The converter recognizes the load transient and sets the duty cycle to maximum, but the current slope is limited by the inductor value. Maximum capacitance required can be calculated from the following equation: ESR of the output capacitor dominates the output voltage ripple. The amount of ripple can be calculated from the equation below: Vout capacitor ΔIinductor * ESR An output capacitor with ample capacitance and low ESR is the best option. For most applications, a 22µF to 68µF ceramic capacitor will be sufficient. ΔIinductor 2 ) 2 Co 2 (Δ V Vout ) 2 Vout L(I out Where ΔV is the maximum output voltage overshoot. Bootstrap Capacitor To ensure the proper operation, a ceramic capacitor must be connected between the VBST and SW pin. A 0.1µF ceramic capacitor is sufficient. VREG5 Capacitor To ensure the proper operation, a ceramic capacitor must be connected between the VREG5 and GND pin. A 1µF ceramic capacitor is sufficient. . PC Board Layout 1. 2. 3. 4. 5. 6. 7. The AP65450 works at 4A load current, heat dissipation is a major concern in layout the PCB. A 2oz Copper in both top and bottom layer is recommended. Provide sufficient vias in the thermal exposed pad for heat dissipate to the bottom layer. Provide sufficient vias in the Output capacitor GND side to dissipate heat to the bottom layer. Make the bottom layer under the device as GND layer for heat dissipation. The GND layer should be as large as possible to provide better thermal effect. Make the Vin capacitors as close to the device as possible. Make the VREG5 capacitor as close to the device as possible. The thermal pad of the device should be soldered directly to the PCB exposed copper plane to work as a heatsink. The thermal vias in the exposed copper plane increase the heat transfer to the bottom layer. AP65450 Document number: DS37135 Rev. 2-2 11 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 Figure 6 PC Board Layout Ordering Information AP65450 XX - 13 Package Packing SP : SO-8EP 13 : Tape & Reel Part Number Package Code Part Marking AP65450SP-13 SP SO-8EP Quantity Tape and Reel Part Number Suffix 2500 -13 Marking Information (1) SO-8EP ( Top View ) 5 8 Logo YY : Year : 08, 09,10~ WW : Week : 01~52; 52 represents 52 and 53 week E : SO-8EP Blank SO-8 G : Green X : Internal Code AP65450 YY WW X X E Part No 1 4 Package Outline Dimensions (All dimensions in mm.) Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version. (1) SO-8EP Exposed Pad 8 5 E1 1 H 4 F b Bottom View E 9° (All sides) N 7° A e A1 D AP65450 Document number: DS37135 Rev. 2-2 45° Q C 4° ± 3° Gauge Plane Seating Plane E0 SO-8EP (SOP-8L-EP) Dim Min Max Typ A 1.40 1.50 1.45 A1 0.00 0.13 b 0.30 0.50 0.40 C 0.15 0.25 0.20 D 4.85 4.95 4.90 E 3.80 3.90 3.85 E0 3.85 3.95 3.90 E1 5.90 6.10 6.00 e 1.27 F 2.75 3.35 3.05 H 2.11 2.71 2.41 L 0.62 0.82 0.72 N 0.35 Q 0.60 0.70 0.65 All Dimensions in mm L 12 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 Suggested Pad Layout Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version. (1) SO-8EP X2 Dimensions C X X1 X2 Y Y1 Y2 Y1 Y2 X1 Value (in mm) 1.270 0.802 3.502 4.612 1.505 2.613 6.500 Y C AP65450 Document number: DS37135 Rev. 2-2 X 13 of 14 www.diodes.com November 2014 © Diodes Incorporated AP65450 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. 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Copyright © 2014, Diodes Incorporated www.diodes.com AP65450 Document number: DS37135 Rev. 2-2 14 of 14 www.diodes.com November 2014 © Diodes Incorporated