MCP1406/07 6A High-Speed Power MOSFET Drivers Features General Description • High Peak Output Current: 6.0A (typical) • Low Shoot-Through/Cross-Conduction Current in Output Stage • Wide Input Supply Voltage Operating Range: - 4.5V to 18V • High Capacitive Load Drive Capability: - 2500 pF in 20 ns - 6800 pF in 40 ns • Short Delay Times: 40 ns (typical) • Matched Rise/Fall Times • Low Supply Current: - With Logic ‘1’ Input – 130 µA (typical) - With Logic ‘0’ Input – 35 µA (typical) • Latch-Up Protected: Will Withstand 1.5A Reverse Current • Logic Input Will Withstand Negative Swing up to 5V • Pin compatible with the TC4420/TC4429 devices • Space-saving 8-Pin SOIC, PDIP and 8-Pin 6 x 5 mm DFN Packages The MCP1406/07 devices are a family of buffers/MOSFET drivers that feature a single-output with 6A peak drive current capability, low shoot-through current, matched rise/fall times and propagation delay times. These devices are pin-compatible and are improved versions of the TC4420/TC4429 MOSFET drivers. Applications • • • • Switch Mode Power Supplies Pulse Transformer Drive Line Drivers Motor and Solenoid Drive 2006-2016 Microchip Technology Inc. The MCP1406/07 MOSFET drivers can easily charge and discharge 2500 pF gate capacitance in under 20 ns, provide low enough impedances (in both the ON and OFF states) to ensure that intended state of the MOSFETs will not be affected, even by large transients. The input to the MCP1406/07 may be driven directly from either TTL or CMOS (3V to 18V). These devices are highly latch-up resistant under any conditions that fall within their power and voltage ratings. They are not subject to damage when up to 5V of noise spiking (of either polarity) occurs on the ground pin. All terminals are fully protected against electrostatic discharge (ESD), up to 2.0 kV (HBM) and 400V (MM). The MCP1406/07 single-output 6A MOSFET driver family is offered in both surface-mount and pin-through-hole packages with a -40°C to +125°C temperature rating, making it useful in any wide temperature range application. DS20002019C-page 1 MCP1406/07 Package Types 8-Pin PDIP/SOIC MCP1406 MCP1407 VDD 1 8 VDD VDD 1 INPUT 2 7 OUT INPUT 2 NC 3 6 OUT NC 3 GND 4 5 GND GND 4 8 VDD 7 OUT 6 OUT 5 GND 8-Pin 6x5 DFN-S(2) MCP1407 MCP1406 VDD 1 INPUT 2 NC 3 GND 4 EP 9 8 VDD VDD 1 7 OUT INPUT 2 6 OUT 5 GND NC 3 GND 4 8 VDD 7 OUT EP 9 6 OUT 5 GND 5-Pin TO-220 MCP1406 MCP1407 Tab is common to VDD GND OUT 1 2 3 4 5 INPUT GND VDD GND OUT INPUT GND VDD 1 2 3 4 5 Note 1: Duplicate pins must both be connected for proper operation. 2: Exposed pad of the DFN package is electrically isolated; see Table 3-1. DS20002019C-page 2 2006-2016 Microchip Technology Inc. MCP1406/07 Functional Block Diagram(1) VDD Inverting 130 µA 300 mV Output Output Non-Inverting Input Effective Input C = 25 pF 4.7V MCP1406 Inverting MCP1407 Non-Inverting GND Note 1: Unused inputs should be grounded. 2006-2016 Microchip Technology Inc. DS20002019C-page 3 MCP1406/07 1.0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings † Supply Voltage ................................................................+20V Input Voltage ..................................(VDD +0.3V) to (GND -5V) Input Current (VIN > VDD) ..............................................50 mA Package Power Dissipation (TA <= +70°C) DFN-S .......................................................................2.5W PDIP..........................................................................1.2W SOIC .......................................................................0.83W TO-220 ......................................................................3.9W ESD Protection on all Pins ................2 kV (HBM), 400V (MM) DC CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, TA = +25°C, with 4.5VVDD18V. Parameters Sym. Min. Typ. Max. Units Conditions Logic ‘1’, High Input Voltage VIH 2.4 1.8 — V Logic ‘0’, Low Input Voltage VIL — 1.3 0.8 V Input Current IIN –10 — 10 µA Input Voltage VIN -5 — VDD + 0.3 V High Output Voltage VOH VDD – 0.025 — — V DC Test Low Output Voltage VOL — — 0.025 V DC Test Output Resistance, High ROH — 2.1 2.8 IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL — 1.5 2.5 IOUT = 10 mA, VDD = 18V Peak Output Current IPK — 6 — A VDD 18V (Note 1) Continuous Output Current IDC 1.3 A Note 1, Note 2 Latch-Up Protection Withstand Reverse Current IREV — 1.5 — A Duty cycle2%, t 300 µs Rise Time tR — 20 30 ns Figure 4-1, Figure 4-2 CL = 2500 pF Fall Time tF — 20 30 ns Figure 4-1, Figure 4-2 CL = 2500 pF Delay Time tD1 — 40 55 ns Figure 4-1, Figure 4-2 Delay Time tD2 — 40 55 ns Figure 4-1, Figure 4-2 VDD 4.5 — 18.0 V IS — 130 250 µA VIN = 3V IS — 35 100 µA VIN = 0V Input 0VVINVDD Output Switching Time (Note 3) Power Supply Supply Voltage Power Supply Current Note 1: 2: 3: Tested during characterization, not production tested. Valid for AT (TO-220) and MF (DFN-S) packages only. TA = +25°C Switching times ensured by design. DS20002019C-page 4 2006-2016 Microchip Technology Inc. MCP1406/07 DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE) Electrical Specifications: Unless otherwise indicated, operating temperature range with 4.5V VDD18V. Parameters Sym. Min. Typ. Max. Units Conditions Logic ‘1’, High Input Voltage VIH 2.4 — — V Logic ‘0’, Low Input Voltage VIL — — 0.8 V Input Current IIN -10 — +10 µA Input Voltage VIN -5 — VDD+0.3 V High Output Voltage VOH VDD – 0.025 — — V DC TEST Low Output Voltage VOL — — 0.025 V DC TEST Output Resistance, High ROH — 3.0 5.0 IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL — 2.3 5.0 IOUT = 10 mA, VDD = 18V Rise Time tR — 25 40 ns Figure 4-1, Figure 4-2 CL = 2500 pF Fall Time tF — 25 40 ns Figure 4-1, Figure 4-2 CL = 2500 pF Delay Time tD1 — 50 65 ns Figure 4-1, Figure 4-2 Delay Time tD2 — 50 65 ns Figure 4-1, Figure 4-2 VDD 4.5 — 18.0 V IS — 200 500 µA — 50 150 Input 0VVINVDD Output Switching Time (Note 1) Power Supply Supply Voltage Power Supply Current Note 1: VIN = 3V VIN = 0V Switching times ensured by design. 2006-2016 Microchip Technology Inc. DS20002019C-page 5 MCP1406/07 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V. Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Specified Temperature Range TA -40 — +125 °C Maximum Junction Temperature TJ — — +150 °C Storage Temperature Range TA -65 — +150 °C Junction-to-Ambient Thermal Resistance, 8-L 6x5 DFN JA — 31.8 — °C/W Note 1 Junction-to-Ambient Thermal Resistance, 8-L PDIP JA — 65.2 — °C/W Note 1 Junction-to-Ambient Thermal Resistance, 8-L SOIC JA — 96.3 — °C/W Note 1 Junction-to-Ambient Thermal Resistance, 5-L TO-220 JA — 20.1 — °C/W Note 1 JC(BOT) 3.2 — °C/W Note 2 Junction-to-Top Characterization Parameter, 8-L 6x5 DFN JT 0.2 — °C/W Note 1 Junction-to-Top Characterization Parameter, 8-L PDIP JT 8.8 — °C/W Note 1 Junction-to-Top Characterization Parameter, 8-L SOIC JT 3.2 — °C/W Note 1 Junction-to-Top Characterization Parameter, 5-L TO-220 JT 3.6 — °C/W Note 1 Junction-to-Board Characterization Parameter, 8-L 6x5 DFN JB 15.5 — °C/W Note 1 Junction-to-Board Characterization Parameter, 8-L PDIP JB 36.1 — °C/W Note 1 Junction-to-Board Characterization Parameter, 8-L SOIC JB 60.7 — °C/W Note 1 Junction-to-Board Characterization Parameter, 5-L TO-220 JB 4.0 — °C/W Note 1 Package Thermal Resistances Junction-to-Case (Bottom) Thermal Resistance, 5-L TO-220 Note 1: 2: Parameter is determined using a High 2S2P 4-layer board, as described in JESD 51-7, as well as in JESD 51-5, for packages with exposed pads. Parameter is determined using a 1S0P 2-layer board with a cold plate attached to indicated location. DS20002019C-page 6 2006-2016 Microchip Technology Inc. MCP1406/07 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V. 80 120 10,000 pF 8,200 pF 4,700 pF 2,500 pF 80 1,000 pF 6,800 pF 60 40 20 60 2,500 pF 50 6 8 FIGURE 2-1: Voltage. 10 12 14 16 30 20 18 100 pF 4 6 8 FIGURE 2-4: Voltage. Rise Time vs. Supply 80 70 70 60 60 10V 50 40 15V 30 5V 20 10 12 14 16 18 Supply Voltage (V) Fall Time (ns) Rise Time (ns) 6,800 pF 40 Supply Voltage (V) Fall Time vs. Supply 5V 50 10V 40 30 20 15V 10 10 0 100 1000 0 100 10000 1000 Capacitive Load (pF) FIGURE 2-2: Load. 10000 Capacitive Load (pF) Rise Time vs. Capacitive FIGURE 2-5: Load. Fall Time vs. Capacitive 85 VDD = 18V tRISE 25 20 tFALL 15 10 5 0 Propagation Delay (ns) Rise and Fall Time (ns) 4,700 pF 0 4 30 8,200 pF 1,000 pF 10 100 pF 0 10,000 pF 70 Fall Time (ns) Rise Time (ns) 100 VIN = 5V tD1 75 65 tD2 55 45 35 -40 -25 -10 5 20 35 50 65 80 95 110 125 4 6 Rise and Fall Times vs. 2006-2016 Microchip Technology Inc. 10 12 14 16 18 Supply Voltage (V) o Temperature ( C) FIGURE 2-3: Temperature. 8 FIGURE 2-6: Supply Voltage. Propagation Delay vs. DS20002019C-page 7 MCP1406/07 Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V. 250 VDD = 12V 175 Quiescent Current (µA) Propagation Delay (ns) 200 150 tD1 125 100 75 50 tD2 Input = High 150 100 Input = Low 50 0 25 2 VDD = 18V 200 3 4 5 6 7 8 9 -40 -25 -10 10 5 o Input Amplitude (V) FIGURE 2-7: Input Amplitude. Propagation Delay Time vs. VDD = 18V VIN = 5V 50 45 tD2 40 tD1 35 FIGURE 2-10: Temperature. Input Threshold (V) Propagation Delay (ns) 55 30 -40 -25 -10 5 Quiescent Current vs. 2 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1 20 35 50 65 80 95 110 125 VHI VLO 4 6 8 o Propagation Delay Time vs. FIGURE 2-11: Voltage. 160 140 INPUT = 1 Input Threshold (V) Quiescent Current (µA) 180 120 100 80 60 40 INPUT = 0 20 0 4 6 8 10 12 14 16 18 2 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1 DS20002019C-page 8 12 14 16 18 Quiescent Current vs. Input Threshold vs. Supply VDD = 12V VHI VLO -40 -25 -10 Supply Voltage (V) FIGURE 2-9: Supply Voltage. 10 Supply Voltage (V) Temperature ( C) FIGURE 2-8: Temperature. 20 35 50 65 80 95 110 125 Temperature ( C) 5 20 35 50 65 80 95 110 125 Temperature (oC) FIGURE 2-12: Temperature. Input Threshold vs. 2006-2016 Microchip Technology Inc. MCP1406/07 Note: Unless otherwise indicated, TA = +25°C with 4.5VVDD 18V. 150 120 1 MHz 100 50 kHz 75 50 Supply Current (mA) Supply Current (mA) VDD = 18V 125 100 kHz 500 kHz 200 kHz 25 0 100 VDD = 18V 6,800 pF 80 1,000 pF 60 2,500 pF 40 4,700 pF 20 100 pF 0 1000 10 10000 FIGURE 2-16: Frequency. Supply Current vs. 80 VDD = 12V 2 MHz 125 100 1 MHz 50 kHz 100 kHz 75 50 200 kHz 500 kHz 25 0 100 Supply Current (mA) Supply Current (mA) 150 70 10,000 pF 6,800 pF 60 1,000 pF 50 40 4,700 pF 30 20 2,500 pF 10 100 pF 1000 10 10000 100 1000 Frequency (kHz) FIGURE 2-17: Frequency. Supply Current vs. 40 2 MHz 100 kHz 35 1 MHz 50 kHz 200 kHz Supply Current vs. VDD = 6V 10,000 pF 6,800 pF 30 25 4,700 pF 20 1,000 pF 15 10 2,500 pF 5 100 pF 0 1000 10000 10 Supply Current vs. 2006-2016 Microchip Technology Inc. 100 1000 Frequency (kHz) Capacitive Load (pF) FIGURE 2-15: Capacitive Load. Supply Current vs. 0 Supply Current (mA) Supply Current (mA) 100 VDD = 6V 90 80 70 60 50 40 30 500 kHz 20 10 0 100 1000 VDD = 12V Capacitive Load (pF) FIGURE 2-14: Capacitive Load. 100 Frequency (kHz) Capacitive Load (pF) FIGURE 2-13: Capacitive Load. 10,000 pF 100 FIGURE 2-18: Frequency. Supply Current vs. DS20002019C-page 9 MCP1406/07 Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V. 7 ROUT-HI (:) VIN = 2.5V (MCP1407) VIN = 0V (MCP1406) TJ = +125oC 6 5 4 3 TJ = +25oC 2 1 4 6 8 10 12 14 16 18 Supply Voltage (V) FIGURE 2-19: Output Resistance (Output High) vs. Supply Voltage. 7 VIN = 0V (MCP1407) VIN = 2.5V (MCP1406) ROUT-LO (:) 6 5 TJ = +125oC 4 3 2 TJ = +25oC 1 4 6 8 10 12 14 16 18 16 18 Supply Voltage (V) FIGURE 2-20: Output Resistance (Output Low) vs. Supply Voltage. Crossover Energy (nA ∗ sec) 100.00 10.00 1.00 4 6 FIGURE 2-21: Supply Voltage. DS20002019C-page 10 8 10 12 14 Supply Voltage (V) Crossover Energy vs. 2006-2016 Microchip Technology Inc. MCP1406/07 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE(1) 5-Pin TO-220 8-Pin 6x5 DFN 8-Pin PDIP, SOIC Symbol — 1 1 VDD Supply Input 1 2 2 INPUT Control Input — 3 3 NC 2 4 4 GND Ground 4 5 5 GND Ground 5 6 6 OUTPUT CMOS Push-Pull Output — 7 7 OUTPUT CMOS Push-Pull Output 3 8 8 VDD Supply Input — 9 — EP Exposed Metal Pad TAB — — VDD Metal Tab at VDD Potential Note 1: 3.1 Description No Connection Duplicate pins must be connected for proper operation. Supply Input (VDD) 3.5 Exposed Metal Pad (6x5 DFN only) VDD is the bias supply input for the MOSFET driver and has a voltage range of 4.5V to 18V. This input must be decoupled to ground with local capacitors. The bypass capacitors provide a localized low-impedance path for the peak currents that are to be provided to the load. The exposed metal pad of the DFN package is not internally connected to any potential. Therefore, this pad can be connected to a ground plane or other copper plane on a printed circuit board to aid in heat removal from the package. 3.2 3.6 Control Input (INPUT) The MOSFET driver input is a high-impedance, TTL/CMOS-compatible input. The input also has hysteresis between the high and low input levels, allowing them to be driven from slow rising and falling signals, and to provide noise immunity. 3.3 TO-220 Metal Tab The metal tab on the TO-220 package is at VDD potential. This metal tab is not intended to be the VDD connection to MCP1406/07. VDD should be supplied using the Supply Input pin of the TO-220. Ground (GND) Ground is the device return pin. The ground pin should have a low impedance connection to the bias supply source return. High peak currents will flow out the ground pin when the capacitive load is being discharged. 3.4 CMOS Push-Pull Output (OUTPUT) The output is a CMOS push-pull output that is capable of sourcing peak currents of 6A (VDD = 18V). The low output impedance ensures the gate of the external MOSFET will stay in the intended state even during large transients. The output pins also have reverse current latch-up ratings of 1.5A. 2006-2016 Microchip Technology Inc. DS20002019C-page 11 MCP1406/07 4.0 APPLICATION INFORMATION 4.1 General Information VDD = 18V MOSFET drivers are high-speed, high current devices which are intended to provide high peak currents to charge the gate capacitance of external MOSFETs or IGBTs. In high frequency switching power supplies, the PWM controller may not have the drive capability to directly drive the power MOSFET. A MOSFET driver like the MCP1406/07 family can be used to provide additional drive current capability. 1 µF Input 0.1 µF Ceramic Output CL = 2500 pF MCP1407 4.2 MOSFET Driver Timing The ability of a MOSFET driver to transition from a fully-OFF state to a fully-ON state are characterized by the drivers’ rise time (tR), fall time (tF) and propagation delays (tD1 and tD2). The MCP1406/07 family of devices is able to make this transition very quickly. Figure 4-1 and Figure 4-2 show the test circuits and timing waveforms used to verify the MCP1406/07 timing. +5V 90% Input 0V 10% 18V tD1 90% Output 1 µF Input 0.1 µF Ceramic FIGURE 4-2: Waveform. MCP1406 4.3 90% 10% 18V tD1 tF tD2 tR 90% 90% Output 10% 0V 10% Input Signal: tRISE = tFALL = 10ns, 100 Hz, 0-5V Square Wave FIGURE 4-1: Waveform. DS20002019C-page 12 10% Non-Inverting Driver Timing Decoupling Capacitors Careful layout and decoupling capacitors are highly recommended when using MOSFET drivers. Large currents are required to charge and discharge capacitive loads quickly. For example, 2.25A are needed to charge a 2500 pF load with 18V in 20 ns. Input 0V tF Input Signal: tRISE = tFALL = 10ns, 100 Hz, 0-5V Square Wave Output CL = 2500 pF +5V 90% tD2 10% 0V VDD = 18V tR To operate the MOSFET driver over a wide frequency range with low supply impedance, a ceramic and a low ESR film capacitor are recommended to be placed in parallel between the driver VDD and the GND. A 1.0 µF low ESR film capacitor and a 0.1 µF ceramic capacitor placed between pins 1, 8 and 4, 5 should be used. These capacitors should be placed close to the driver to minimize circuit board parasitics and provide a local source for the required current. Inverting Driver Timing 2006-2016 Microchip Technology Inc. MCP1406/07 4.4 PCB Layout Considerations Proper PCB layout is important in a high current, fast switching circuit to provide proper device operation and robustness of design. PCB trace loop area and inductance should be minimized by the use of a ground plane or ground trace located under the MOSFET gate drive signals, separate analog and power grounds, and local driver decoupling. The MCP1406/07 devices have two pins each for VDD, OUTPUT and GND. Both pins must be used for proper operation. This also lowers path inductance which will, along with proper decoupling, help minimize ringing in the circuit. Placing a ground plane beneath the MCP1406/07 will help as a radiated noise shield as well as providing some heat sinking for power dissipated within the device. 4.5 Power Dissipation 4.5.2 QUIESCENT POWER DISSIPATION The power dissipation associated with the quiescent current draw depends on the state of the input pin. The MCP1406/07 devices have a quiescent current draw when the input is high of 0.13 mA (typ) and 0.035 mA (typ) when the input is low. The quiescent power dissipation can be determined by using this equation: EQUATION 4-3: P Q = I QH D + I QL 1 – D V DD Where: IQH = D = Duty cycle IQL = Quiescent current in the low state VDD = MOSFET driver supply voltage 4.5.3 The total internal power dissipation in a MOSFET driver is the summation of three separate power dissipation elements, which can be calculated by using the following equation: EQUATION 4-1: P T = P L + P Q + P CC OPERATING POWER DISSIPATION The operating power dissipation occurs each time the MOSFET driver output transitions; this is because, for a very short period of time, both MOSFETs in the output stage are ON simultaneously. This cross-conduction current leads to a power dissipation, as described by the following equation: EQUATION 4-4: Where: P CC = CC f V DD PT = Total power dissipation PL = Load power dissipation PQ = Quiescent power dissipation PCC = Operating power dissipation 4.5.1 Quiescent current in the high state Where: CC = Cross-conduction constant (A sec.) f = Switching frequency VDD = MOSFET driver supply voltage CAPACITIVE LOAD DISSIPATION The power dissipation caused by a capacitive load is a direct function of frequency, total capacitive load and supply voltage. The power lost in the MOSFET driver for a complete charging and discharging cycle of a MOSFET can be determined by means of this equation: EQUATION 4-2: P L = f C T V DD 2 Where: f CT VDD = Switching frequency = Total load capacitance = MOSFET driver supply voltage 2006-2016 Microchip Technology Inc. DS20002019C-page 13 MCP1406/07 5.0 PACKAGING INFORMATION 5.1 Package Marking Information (Not to Scale) 8-Lead SOIC (3.90 mm) MCP1406E e3 SN ^^1510 256 NNN 5-Lead TO-220 Example MCP1406 e3 EAT ^^ 15102562 XXXXXXXXX XXXXXXXXX YYWWNNN 8-Lead DFN-S (6x5x0.9 mm) NNN PIN 1 e3 * DS20002019C-page 14 Example MCP1406 e3 E/MF ^^ 1510 256 PIN 1 Legend: XX...X Y YY WW NNN Note: Example Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2006-2016 Microchip Technology Inc. MCP1406/07 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW Legend: XX...X Y YY WW NNN e3 * Note: Example MCP1407 e3 E/P ^^256 1510 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2006-2016 Microchip Technology Inc. DS20002019C-page 15 MCP1406/07 /# #$# 0!. 1 # 20 %##!# ## ,33... 3 0 A E φP CHAMFER OPTIONAL A1 Q H1 D D1 L 1 N 2 3 e b e1 c A2 4# 7# 5$:%2 5+6" 5 5 58 9 ' 2# *+ 8-22# ;*+ 8-6# < 8-=!# " >; < 8-7# ' < ' !!207# >> < >'' :7# 6 < > :0 < '' $#6+# ? < $#6# 2 > < ' 7 ; < ' ; < ' < ' 7!7# * #*##%7! 7!0 7!=!# : ' !"!#$!!% #$ !% #$ #&!'( ! !# ")' *+, * #&#-$ ..#$## . +>* DS20002019C-page 16 2006-2016 Microchip Technology Inc. MCP1406/07 !"#$ %&'(()* + /# #$# 0!. 1 # 20 %##!# ## ,33... 3 0 e D L b N N K E2 E EXPOSED PAD NOTE 1 1 2 2 NOTE 1 1 D2 BOTTOM VIEW TOP VIEW A A3 A1 NOTE 2 4# 7# 5$:%2 77"" 5 5 58 9 ; 2# 8-6# ; *+ ;' #!%% ' +##0 > "/ 8-7# '*+ 8-=!# " "& !2!7# > "& !2!=!# " > +##=!# : >' ; +##7# 7 ' ' *+ +###"& !2! @ < 2- $!&%#$-1:$#$ #:#!.###! 20-& !#: #! > 20 . $#! !# ")' *+, * #&#-$ ..#$## "/, % 1$ $.#$##1%%# $ < . +* 2006-2016 Microchip Technology Inc. DS20002019C-page 17 MCP1406/07 /# #$# 0!. 1 # 20 %##!# ## ,33... 3 0 DS20002019C-page 18 2006-2016 Microchip Technology Inc. MCP1406/07 8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A N B E1 NOTE 1 1 2 TOP VIEW E C A2 A PLANE L A1 e c eB 8X b1 8X b .010 C SIDE VIEW END VIEW Microchip Technology Drawing No. C04-018D Sheet 1 of 2 2006-2016 Microchip Technology Inc. DS20002019C-page 19 MCP1406/07 8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging ALTERNATE LEAD DESIGN (VENDOR DEPENDENT) DATUM A DATUM A b b e 2 e 2 e Units Dimension Limits Number of Pins N e Pitch Top to Seating Plane A Molded Package Thickness A2 Base to Seating Plane A1 Shoulder to Shoulder Width E Molded Package Width E1 Overall Length D Tip to Seating Plane L c Lead Thickness Upper Lead Width b1 b Lower Lead Width Overall Row Spacing eB § e MIN .115 .015 .290 .240 .348 .115 .008 .040 .014 - INCHES NOM 8 .100 BSC .130 .310 .250 .365 .130 .010 .060 .018 - MAX .210 .195 .325 .280 .400 .150 .015 .070 .022 .430 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. § Significant Characteristic 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. 4. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing No. C04-018D Sheet 2 of 2 DS20002019C-page 20 2006-2016 Microchip Technology Inc. MCP1406/07 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2006-2016 Microchip Technology Inc. DS20002019C-page 21 MCP1406/07 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20002019C-page 22 2006-2016 Microchip Technology Inc. MCP1406/07 +( +%,!-./(()*+01 /# #$# 0!. 1 # 20 %##!# ## ,33... 3 0 2006-2016 Microchip Technology Inc. DS20002019C-page 23 MCP1406/07 NOTES: DS20002019C-page 24 2006-2016 Microchip Technology Inc. MCP1406/07 APPENDIX A: REVISION HISTORY Revision C (April 2016) The following is the list of modifications: • Updated the Package Thermal Resistances section of Temperature Characteristics table with the latest information. • Updated Figure 2-21 in Section 2.0 “Typical Performance Curves”. Revision B (May 2012) The following is the list of modifications: Removed the information referring to the Electrostatic Discharge from the General Description section. Revision A (December 2006) Original release of this document. 2006-2016 Microchip Technology Inc. DS20002019C-page 25 MCP1406/07 NOTES: DS20002019C-page 26 2006-2016 Microchip Technology Inc. MCP1406/07 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range XX XXX Package Tape & Reel Examples: a) b) Device: MCP1406: 6A High-Speed MOSFET Driver, Inverting MCP1406T: 6A High-Speed MOSFET Driver, Inverting, Tape and Reel MCP1407: 6A High-Speed MOSFET Driver, Non-Inverting MCP1407T: 6A High-Speed MOSFET Driver, Non-Inverting, Tape and Reel Temperature Range: E = Package: * AT MF = Plastic Transistor Outline, 5-Lead (TO-220) = Plastic Dual Flat - 6x5 mm Body, 8-Lead (DFN-S) = Plastic Dual In-Line - 300 mil Body, 8-Lead (PDIP) = Plastic Small Outline - Narrow, 3.90 mm Body, 8-Lead (SOIC) P SN -40°C to +125°C * All package offerings are Pb Free (Lead Free) c) d) e) f) a) b) c) d) e) f) 2006-2016 Microchip Technology Inc. MCP1406-E/MF: 6A High-Speed MOSFET Driver, Inverting, 8LD DFN Package MCP1406-E/AT: 6A High-Speed MOSFET Driver, Inverting, 5LD TO-220 Package MCP1406-E/SN: 6A High-Speed MOSFET Driver, Inverting, 8LD SOIC Package MCP1406-E/P: 6A High-Speed MOSFET Driver, Inverting, 8LD PDIP Package MCP1406T-E/MF: Tape and Reel, 6A High-Speed MOSFET Driver, Inverting, 8LD DFN Package MCP1406T-E/SN: Tape and Reel, 6A High-Speed MOSFET Driver, Inverting, 8LD SOIC Package MCP1407-E/MF: 6A High-Speed MOSFET Driver, Non-Inverting, 8LD DFN Package MCP1407-E/AT: 6A High-Speed MOSFET Driver, Non-Inverting, 5LD TO-220 Package MCP1407-E/SN: 6A High-Speed MOSFET Driver, Non-Inverting, 8LD SOIC Package MCP1407-E/P: 6A High-Speed MOSFET Driver, Non-Inverting, 8LD PDIP Package MCP1407T-E/MF: Tape and Reel, 6A High-Speed MOSFET Driver, Non-Inverting, 8LD DFN Package MCP1407T-E/SN: Tape and Reel, 6A High-Speed MOSFET Driver, Non-Inverting, 8LD SOIC Package DS20002019C-page 27 MCP1406/07 NOTES: DS20002019C-page 28 2006-2016 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITYMANAGEMENTSYSTEM CERTIFIEDBYDNV == ISO/TS16949== 2006-2016 Microchip Technology Inc. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2006-2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. 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