AP7362 1.5A, LOW QUIESCENT CURREENT, FAST TRANSIENT ULTRA-LOW DROPOUT LINEAR REGULATOR Description Pin Assignments The AP7362 is a 1.5A adjustable output voltage linear regulator with ultra-low dropout. The device includes pass element, error amplifier, band-gap, current limit and thermal shutdown circuitry. The integrated Enable block allows the part to be turned on and off via a logic signal. A logic high level on EN turns the device on and a logic low turns the part off. (Top (Top View) View) ADJ/ NC OUT OUT OUT The low dropout voltage characteristics and fast transient response to step changes in load make it suitable for low voltage microprocessor applications. The typical quiescent current is approximately 0.5mA and changes little with load current. The built-in current-limit and thermal-shutdown functions prevent damage to the IC in fault conditions. 8 7 6 5 1 2 3 4 GND EN IN IN U-DFN2030-8 U-DFN2030-8 (Top View) This device is available in U-DFN2030-8 and SO-8EP packages. GND 1 8 ADJ/NC EN 2 7 OUT IN 3 6 OUT IN 4 5 OUT Features 1.5A Ultra-Low Dropout Linear Regulator with EN Ultra-Low Dropout: 190mV at 1.5A Stable with 10µF Input/Output Capacitor, any Type Wide Input Voltage Range: 2.2V to 5.5V Adjustable Output Voltage: 0.6V to 5.0V Fixed Output Options: 1V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V Low Ground Pin Current 25nA Quiescent Current in Shutdown Mode VADJ Accuracy of ±1.5% @ +25°C VADJ Accuracy of ±3% Over Line, Load and Temperature Excellent Load/Line Transient Response Current Limit and Thermal Shutdown Protection Ambient Temperature Range: -40°C to +85°C U-DFN2030-8, SO-8EP Packages Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. “Green” Device (Note 3) Notes: SO-8EP Applications ASIC Power Supplies in Printers, Graphics Cards, DVD Players, STBs, Routers, etc. FPGA and DSP Core or I/O Power Supplies SMPS Regulator Conversion from 3.3V or 5V Rail 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. Typical Application Circuit VIN VOUT IN VOUT VIN OUT IN AP7362 10µF Enable OUT AP7362 10µF EN GND 10µF Enable 10µF ADJ EN GND Fixed Output R1 R2 Adjustable Output R1 VOUT VREF 1 where R 2 10 kΩ R2 AP7362 Document number: DS35058 Rev. 7 - 2 1 of 15 www.diodes.com May 2016 © Diodes Incorporated AP7362 Pin Descriptions Pin Number Pin Name 1 GND Function Ground. 2 EN Enable input, active high. 3, 4 IN Voltage input pin. 5, 6, 7 OUT 8 ADJ/NC – EP Voltage output pin. Output feedback pin for adjustable version only – a resistor divider from this pin to the OUT pin and ground sets the output voltage. / No connection for fixed output version. The exposed pad (EP) is used to remove heat from the package and it is recommended that it is connected to a copper area. The die is electrically connected to the exposed pad. It is recommended to connect it externally to GND, but should not be the only ground connection. Functional Block Diagram IN OUT Gate Driver EN Current Limit and Thermal Shutdown IN EN R OUT Gate Driver Current Limit and Thermal Shutdown ADJ 0.605V 0.605V R GND GND Adjustable Version Fixed Version Absolute Maximum Ratings (Note 4) (@TA = +25°C, unless otherwise specified.) Symbol ESD HBM ESD MM VIN VOUT, VEN Parameter Human Body Model ESD Protection Machine Model ESD Protection Input Voltage OUT, EN Voltage IOUT Continuous Load Current TST Storage Temperature Range TJ Maximum Junction Temperature Note: Ratings 2000 200 Unit V V -0.3 to 6.0 V -0.3V to 6.0 V Internal Limited A -65 to +150 °C +150 °C 4. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress Ratings only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-maximum rated conditions for extended periods may affect device reliability. AP7362 Document number: DS35058 Rev. 7 - 2 2 of 15 www.diodes.com May 2016 © Diodes Incorporated AP7362 Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.) Symbol Parameter VIN Input Voltage IOUT Output Current Min Max Unit 2.2 5.5 V 0 1.5 A TA Operating Ambient Temperature -40 +85 C TJ Operating Junction Temperature (Note 5) -40 +125 C Note: 5. Operating junction temperature must be evaluated and derated as needed, based on ambient temperature (T A), power dissipation (PD), maximum allowable operating junction temperature (TJ-MAX), and package thermal resistance (θJA). Electrical Characteristics (@TA = +25°C, VIN = 3.3V, VOUT =1.8V, IOUT = 10mA, VEN = VIN, CIN = 10μF, COUT = 10μF, VEN = 2V, unless otherwise stated.) Minimum and maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TA = +25°C, and are provided for reference purposes only. Symbol Parameter Min Typ Max ADJ Pin Voltage VIN = VIN-MIN to VIN-MAX, IOUT = 10mA to 1.5A TA = +25°C 0.584 0.605 0.626 Over temp 0.575 – 0.635 ADJ Pin Voltage (A Grade) VIN = VIN-MIN to VIN-MAX, IOUT = 10mA to 1.5A TA = +25°C 0.596 0.605 0.614 Over temp 0.587 – 0.623 ADJ Pin Bias Current VIN = VIN-MIN to VIN-MAX TA = +25°C – 50 – Over temp – – 750 Dropout Voltage (Note 6) IOUT = 1.5A, VOUT = 2.5V TA = +25°C – 190 240 Over temp – – 280 TA = +25°C – 0.04 – Over temp – 0.05 – TA = +25°C – 0.18 – Over temp – 0.33 – TA = +25°C – 1 1.2 Over temp – – 1.3 TA = +25°C – 0.025 0.125 Over temp – – 15 VADJ IADJ VDROPOUT Test Conditions VOUT/VIN Line Regulation (Note 7) VIN = VIN-MIN to VIN-MAX VOUT/IOUT Load Regulation (Note 7) IOUT = 10mA to 1.5A IGND Ground Pin Current in Normal Operation IOUT = 10mA to 1.5A Mode ISHDN Ground Pin Current VEN < VIL IOUT-PK Peak Output Current VOUT VOUT-NOM -5% – 3.6 – TA = +25°C – 3.7 – Over temp 2 – – Unit V V nA mV %/V %/A mA μA A ISC Short Circuit Current OUT Grounded VIH Enable Logic High VIN = VIN-MIN to VIN-MAX Over temp 1.4 – – VIL Enable Logic Low VIN = VIN-MIN to VIN-MAX Over temp – – 0.65 IIH Enable Pin High Current VEN = VIN – 1 – IIL Enable Pin Low Current VEN = 0V – 0.1 – tD(OFF) Turn-Off Delay From VEN < VIL to VOUT = OFF, IOUT = 1.5A – 25 – μs tD(ON) Turn-On Delay From VEN > VIH to VOUT = ON, IOUT = 1.5A – 25 – μs Notes: A V nA 6. Dropout voltage is the minimum voltage difference between the input and the output at which the output voltage drops 2% below its nominal value. For any output voltage less than 2.5V, the minimum VIN operating voltage is the limiting factor. 7. The line and load regulation specification contains only the typical number. However, the limits for line and load regulation are included in the adjust voltage tolerance specification. AP7362 Document number: DS35058 Rev. 7 - 2 3 of 15 www.diodes.com May 2016 © Diodes Incorporated AP7362 Electrical Characteristics (Cont.) (@TA = +25°C, VIN = 3.3V, VOUT =1.8V, IOUT = 10mA, VEN = VIN, CIN = 10μF, COUT = 10μF, VEN = 2V, unless otherwise stated.) Minimum and maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at TA = +25°C, and are provided for reference purposes only. Min Typ Max VIN = 3.0V, IOUT = 1.5A, f = 120Hz – 65 – VIN = 3.0V, IOUT = 1.5A, f = 1kHz – 61 – Output Noise Density f = 120Hz, COUT = 10μF ceramic – 1.0 – μV/ Output Noise Voltage BW = 100Hz – 100kHz, COUT = 10μF ceramic – 90 – μV(rms) TSHDN Thermal Shutdown Threshold TJ Rising – +170 – THYS Thermal Shutdown Hysteresis TJ Falling from TSHDN – +10 – U-DFN2030-8 (Note 8) SO-8EP (Note 8) U-DFN2030-8 (Note 8) SO-8EP (Note 8) – – – – 85.0 52.8 17.0 10.0 – – – – Symbol PSRR n(l/f) en Parameter Ripple Rejection θJA Thermal Resistance Junction-to-Ambient θJC Thermal Resistance Junction-to-Case Note: Test Conditions Unit dB C °C/W °C/W 8. Device mounted on 2” x 2” FR-4 substrate PCB, 2oz copper with minimum recommended pad layout. AP7362 Document number: DS35058 Rev. 7 - 2 4 of 15 www.diodes.com May 2016 © Diodes Incorporated AP7362 Typical Performance Characteristics (@TA = +25°C, VIN = 2.7V, VEN = VIN, CIN = 10μF, COUT = 10μF, IOUT = 10mA, VOUT = 1.8V, unless otherwise stated.) 10k 10k COUT = 10µF CER NOISE (nV/ ) NOISE (nV/ ) NOISE (nV/Hz) )z 1k H /V n ( E S IO N 100 10 100 1000 10k FREQUENCY (Hz) Noise Density 1k 100 10 100 100k 3 1000 10k FREQUENCY (Hz) Noise Density 100k 1k VEN = 0.65V 2.5 100 )A n (D IGND (nA) IGND (mA) 2 1.5 I 1 N G 10 0.5 0 0 0.5 1 0 -50 1.5 ILOAD (A) IGND vs. Load Current AP7362 Document number: DS35058 Rev. 7 - 2 5 of 15 www.diodes.com -25 0 25 50 75 TEMPERATURE (°C) IGND vs. Temperature 100 125 May 2016 © Diodes Incorporated AP7362 Typical Performance Characteristics (Cont.) (@TA = +25°C, VIN = 2.7V, VEN = VIN, CIN = 10μF, COUT = 10μF, IOUT = 10mA, VOUT = 1.8V, unless otherwise stated.) 0.615 0.3 0.610 DROPOUT VOLTAGE (V) 0.605 ) V (J VADJ (V) ) V ( E G A T L O V T U O P O R D D A V 0.600 125°C 0.2 25°C -40°C 0.1 0.595 0.590 -50 -25 0 25 50 75 TEMPERATURE (°C) VADJ vs. Temperature 100 0 125 0 1.3 0.5 1 LOAD CURRENT (A) Dropout Voltage vs. Load Current 1.5 2 IL = 0A 1.2 1.1 )V ( VOUT (V) VADJ (V) ) V ( T U O N E V 1 V 1 25°C 125°C 0.9 0.8 -50 -40°C 0 -25 0 25 50 75 TEMPERATURE (°C) VADJ vs. Temperature AP7362 Document number: DS35058 Rev. 7 - 2 100 0 125 6 of 15 www.diodes.com 1 2 VIN (V) Turn-On Characteristics 3 May 2016 © Diodes Incorporated AP7362 Typical Performance Characteristics (Cont.) (@TA = +25°C, VIN = 2.7V, VEN = VIN, CIN = 10μF, COUT = 10μF, IOUT = 10mA, VOUT = 1.8V, unless otherwise stated.) Turn-On Time Turn-On Time VOUT = 1.2V (500mV/div) IL = 0A, COUT = 10μF CER VOUT = 1.2V (500mV/div) IL = 1.5A, COUT = 10μF CER VIN = 3.0V (2V/div) VIN = 3.0V (2V/div) Time (10μs/div) Time (10μs/div) Load Transient Response 90 VIN = VEN = 3.3V COUT = 10μF CER 80 REJECTION RATIO (dB) VOUT =1.8V (50mV/div) )B d ( O I T A R N O I T C E JE R 70 60 50 40 30 20 10 ILOAD = 100mA to 1.5A (1A/div) 0 0.1 VIN = 3.3V VOUT = 1.8V IOUT = 1A CIN = 1µF CER COUT = 1µF CER 1 10 100 FREQUENCY (kHz) PSRR 1000 Time (40μs/div) AP7362 Document number: DS35058 Rev. 7 - 2 7 of 15 www.diodes.com May 2016 © Diodes Incorporated AP7362 Application Information Input Capacitor A minimum 2.2μF ceramic capacitor is recommended between IN and GND pins to decouple input power supply glitch and noise. The amount of the capacitance may be increased without limit. Larger input capacitor like 10μF will provide better load transient response. This input capacitor must be located as close as possible to the device to assure input stability and reduce noise. For PCB layout, a wide copper trace is required for both IN and GND pins. A lower ESR capacitor type allows the use of less capacitance, while higher ESR type requires more capacitance. Output Capacitor The output capacitor is required to stabilize and help the transient response of the LDO. The AP7362 is stable with any type of capacitor, with no limitations on minimum or maximum ESR. The device is designed to have excellent transient response for most applications with a small amount of output capacitance. The device is also stable with multiple capacitors in parallel, which can be of any type of value. Additional capacitance helps to reduce undershoot and overshoot during transient loads. This capacitor should be placed as close as possible to OUT and GND pins for optimum performance. Adjustable Operation The AP7362 provides output voltage from 0.6V to 5.0V through external resistor divider as shown below. VOUT VIN IN OUT AP7362 10µF Enable R1 10µF ADJ EN GND R2 Adjustable Output The output voltage is calculated by: R1 V V 1 OUT REF R2 Where VREF = 0.6V (the internal reference voltage) Rearranging the equation will give the following that is used for adjusting the output to a particular voltage: V R1 R 2 OUT 1 V REF To maintain the stability of the internal reference voltage, R2 need to be kept smaller than 10k. No Load Stability Other than external resistor divider, no minimum load is required to keep the device stable. The device will remain stable and regulated in no load condition. AP7362 Document number: DS35058 Rev. 7 - 2 8 of 15 www.diodes.com May 2016 © Diodes Incorporated AP7362 Application Information (Cont.) Stability and Phase Margin Any regulator which operates using a feedback loop must be compensated in such a way as to ensure adequate phase margin, which is defined as the difference between the phase shift and -180 degrees at the frequency where the loop gain crosses unity (0dB). For most LDO regulators, the ESR of the output capacitor is required to create a zero to add enough phase lead to ensure stable operation. The AP7362 has an internal compensation circuit which maintains phase margin regardless of the ESR of the output capacitor, any type of capacitor can be used. Below two charts show the gain/phase plot of the AP7362 with an output of 1.2V, 10μF ceramic output capacitor, delivering 1.5A load current and no load. It can be seen the phase margin is about 90°(which is very stable). 140 120 PHASE 120 80 60 80 )° ( N IG 40 R A 20 M E S 0 A H -20 P LOOP GAIN (dB) )B d 40 ( N 20 IA G 0 P O -20 O L -40 100 GAIN -60 -80 -100 60 V IN = 2.7V V OUT = 1.2V IL = 1.5A COUT = 10µF CER -120 100 1k PHASE MARGIN () 100 -40 -60 10k 100k -80 1M FREQUENCY(Hz) Gain-Bandwidth Plot for 1.5A Load 120 140 100 120 PHASE 100 60 LOOP GAIN (dB) )B d 40 ( N 20 IA G 0 P O -20 O L -40 -60 -80 -100 -120 100 80 )° ( N IG 40 R A 20 M E S 0 A H -20 P GAIN 60 VIN = 2.7V VOUT = 1.2V IL = 0A COUT = 10µF CER 1k PHASE MARGIN () 80 -40 -60 10k 100k -80 1M FREQUENCY(Hz) Gain-Bandwidth Plot for no Load ON/OFF Input Operation The AP7362 is turned on by setting the EN pin high, and is turned off by pulling it low. If this feature is not used, the EN pin should be tied to IN pin to keep the regulator output on at all time. To ensure proper operation, the signal source used to drive the EN pin must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH. AP7362 Document number: DS35058 Rev. 7 - 2 9 of 15 www.diodes.com May 2016 © Diodes Incorporated AP7362 Application Information (Cont.) Short Circuit Protection When output current at OUT pin is higher than current limit threshold, the current limit protection will be triggered and clamp the output current to prevent over-current and to protect the regulator from damage due to overheating. Thermal Shutdown Protection Thermal protection disables the output when the junction temperature rises to approximately +170°C, allowing the device to cool down. When the junction temperature reduces to approximately +160°C the output circuitry is enabled again. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the heat dissipation of the regulator, protecting it from damage due to overheating. Low Quiescent Current The AP7362, consumes only around 0.5mA for all input voltage range and load currents, this provides great power saving in portable and low power applications. Output Noise This is the integrated value of the output noise over a specified frequency range. Input voltage and output load current are kept constant during the measurement. Results are expressed in μVrms or μV . The AP7362 is a low noise regulator and needs no external noise reduction capacitor. Output voltage noise is typically 100μVrms overall noise level between 100Hz and 100kHz. Noise is specified in two ways: Output noise density is the RMS sum of all noise sources, measured at the regulator output, at a specific frequency (measured with a 1Hz bandwidth). This type of noise is usually plotted on a curve as a function of frequency. Output noise voltage is the RMS sum of spot noise over a specified bandwidth. Spot noise is measured in units μV/ or nV/ and total output noise is measured in μV(RMS). The primary source of noise in low-dropout regulators is the internal reference. Power Dissipation The device power dissipation and proper sizing of the thermal plane that is connected to the thermal pad is critical to avoid thermal shutdown and ensure reliable operation. Power dissipation of the device depends on input voltage and load conditions and can be calculated by: PD = (VIN - VOUT) X IOUT The maximum power dissipation, handled by the device, depends on the junction to ambient thermal resistance, and maximum ambient temperature, which can be calculated by the equation in the following: PD _ MAX AP7362 Document number: DS35058 Rev. 7 - 2 ( 150C - TA ) RJA 10 of 15 www.diodes.com May 2016 © Diodes Incorporated AP7362 Ordering Information AP7362X- XX XX- XX VADJ Tolerance Output Package Packing BLANK : ± 3.5 % A : ± 1.5 % BLANK : ADJ 10 : 1.0V 12 : 1.2V 15 : 1.5V 18 : 1.8V 25 : 2.5V 33 : 3.3V HA : U-DFN2030-8 SP : SO-8EP 7/13 : Tape & Reel Part Number Package Code Packaging AP7362-XXHA-7 AP7362A-XXHA-7 AP7362-XXSP-13 AP7362A-XXSP-13 HA HA SP SP U-DFN2030-8 U-DFN2030-8 SO-8EP SO-8EP AP7362 Document number: DS35058 Rev. 7 - 2 11 of 15 www.diodes.com Quantity 7”/13” Tape and Reel Part Number Suffix 3000/Tape & Reel 3000/Tape & Reel 2500/Tape & Reel 2500/Tape & Reel -7 -7 -13 -13 May 2016 © Diodes Incorporated AP7362 Marking Information (1) U-DFN2030-8 (Top View) XX : Identification Code Y : Year : 0~9 W : Week : A~Z : 1~26 week; a~z : 27~52 week; z represents 52 and 53 week X : A~Z : Internal code XX Y WX (2) Device Package Identification Code AP7362 (ADJ) AP7362-10 AP7362-12 AP7362-15 AP7362-18 AP7362-25 AP7362-33 AP7362A (ADJ) AP7362A-10 AP7362A-12 AP7362A-15 AP7362A-18 AP7362A-25 AP7362A-33 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 U-DFN2030-8 RA RB RC RD RE RF RG QA QB QC QD QE QF QG SO-8EP (Top View) 8 5 Logo Part Number X: VADJ Tolerance: Blank= +/-3.5% A= +/-1.5% AP7362X for ADJ AP7362X-10 for 1.0V AP7362X-12 for 1.2V AP7362X-15 for 1.5V AP7362X-18 for 1.8V AP7362X-25 for 2.5V AP7362X-33 for 3.3V AP7362 Document number: DS35058 Rev. 7 - 2 AP7362X-VV YY WW X X E YY : Year : 08, 09,10~ WW : Week : 01~52; 52 represents 52 and 53 week X X : Internal code SO-8EP 1 4 12 of 15 www.diodes.com May 2016 © Diodes Incorporated AP7362 Package Outline Dimensions Please see http://www.diodes.com/package-outlines.html for the latest version. (1) U-DFN2030-8 A A1 A3 U-DFN2030-8 Dim Min Max Typ A 0.57 0.63 0.60 A1 0 0.05 0.02 A3 0.15 b 0.20 0.30 0.25 D 1.95 2.05 2.00 D2 1.40 1.60 1.50 e 0.50 E 2.95 3.05 3.00 E2 1.50 1.70 1.60 L 0.35 0.45 0.40 Z 0.125 All Dimensions in mm Seating Plane D L e (Pin #1 ID) C'0.25*45° E E2 D2 Z (2) b SO-8EP EXPOSED PAD H E1 F 1 b E 45° 7° N C side) Q 9° ( All 4° ± 3° A Gauge Plane Seating Plane e A1 R 1 0. D AP7362 Document number: DS35058 Rev. 7 - 2 L E0 13 of 15 www.diodes.com SO-8EP Dim Min Max Typ A 1.40 1.50 1.45 A1 0.00 0.13 b 0.30 0.50 0.40 C 0.15 0.25 0.20 D 4.85 4.95 4.90 E 3.80 3.90 3.85 E0 3.85 3.95 3.90 E1 5.90 6.10 6.00 e 1.27 F 2.75 3.35 3.05 H 2.11 2.71 2.41 L 0.62 0.82 0.72 N 0.35 Q 0.60 0.70 0.65 All Dimensions in mm May 2016 © Diodes Incorporated AP7362 Suggested Pad Layout Please see http://www.diodes.com/package-outlines.html for the latest version. (1) U-DFN2030-8 X2 Y C Y2 Dimensions C G X X1 X2 Y Y1 Y2 Y1 X1 Value (in mm) 0.500 0.250 0.350 1.500 1.850 0.600 1.600 3.300 G Pin1 (2) X SO-8EP X2 Dimensions C X X1 X2 Y Y1 Y2 Y1 Y2 X1 Value (in mm) 1.270 0.802 3.502 4.612 1.505 2.613 6.500 Y C AP7362 Document number: DS35058 Rev. 7 - 2 X 14 of 15 www.diodes.com May 2016 © Diodes Incorporated AP7362 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. 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LIFE SUPPORT Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright © 2016, Diodes Incorporated www.diodes.com AP7362 Document number: DS35058 Rev. 7 - 2 15 of 15 www.diodes.com May 2016 © Diodes Incorporated