LT3575 Isolated Flyback Converter without an Opto-Coupler FEATURES DESCRIPTION n The LT®3575 is a monolithic switching regulator specifically designed for the isolated flyback topology. No third winding or optoisolator is required for regulation. The part senses the isolated output voltage directly from the primary side flyback waveform. A 2.5A, 60V NPN power switch is integrated along with all control logic into a 16-lead TSSOP package. n n n n n n n n n 3V to 40V Input Voltage Range 2.5A, 60V Integrated NPN Power Switch Boundary Mode Operation No Transformer Third Winding or Optoisolator Required for Regulation Improved Primary-Side Winding Feedback Load Regulation VOUT Set with Two External Resistors BIAS Pin for Internal Bias Supply and Power NPN Driver Programmable Soft-Start Programmable Power Switch Current Limit Thermally Enhanced 16-Lead TSSOP The LT3575 operates with input supply voltages from 3V to 40V, and can deliver output power up to 14W with no external power switch.The LT3575 utilizes boundary mode operation to provide a small magnetic solution with improved load regulation. The output voltage is easily set with two external resistors and the transformer turns ratio. Off the shelf transformers are available for many applications. APPLICATIONS n Industrial, Automotive and Medical Isolated Power Supplies L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks and No RSENSE and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 5V Isolated Flyback Converter Load Regulation VIN 12V TO 24V 357k 0.22μF 1k + VOUT 5V, 1.4A VIN SHDN/UVLO 24μH 51.1k RFB RREF TC 6.04k RILIM SS 10k GND TEST BIAS VIN = 12V –1 –2 0 11.5k 10nF 0 SW VC 28.7k 47μF VOUT– 80.6k LT3575 2.6μH VIN = 24V OUTPUT VOLTAGE ERROR (%) 10μF 1 3:1 4.7μF 4.7nF 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 IOUT (A) 3575 TA01b 3575 TA01 3575f 1 LT3575 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION SW ............................................................................60V VIN , SHDN/UVLO, RFB, BIAS .....................................40V SS, VC , TC, RREF , RILIM ..............................................5V Maximum Junction Temperature .......................... 125°C Operating Junction Temperature Range (Note 2) LT3575E, LT3575I .............................. –40°C to 125°C Storage Temperature Range .................. –65°C to 150°C TOP VIEW NC 1 16 NC VIN 2 15 NC SW 3 SW 4 BIAS 5 SHDN/UVLO 6 11 RREF SS 7 10 RFB RILIM 8 9 14 GND 17 GND 13 TEST 12 TC VC FE PACKAGE 16-LEAD PLASTIC TSSOP TJMAX = 125°C, θJA = 38°C/W, θJC = 10°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE CONNECTED TO GND ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3575EFE#PBF LT3575EFE#TRPBF 3575FE 16-Lead Plastic TSSOP –40°C to 125°C LT3575IFE#PBF LT3575IFE#TRPBF 3575FE 16-Lead Plastic TSSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, unless otherwise noted. PARAMETER CONDITIONS l Input Voltage Range Quiescent Current MIN 3 SS = 0V VSHDN/UVLO = 0V Soft-Start Current SS = 0.4V SHDN/UVLO Pin Threshold UVLO Pin Voltage Rising SHDN/UVLO Pin Hysteresis Current VUVLO = 1V TYP 4.5 0 MAX 40 V 1 mA μA 7 l 1.15 2.2 Soft-Start Threshold μA 1.22 1.32 V 2.8 3.2 μA 0.7 Maximum Switching Frequency V 1000 Switch Current Limit RILIM = 10k Minimum Current Limit VC = 0V Switch VCESAT ISW = 0.5A RREF Voltage VIN = 3V RREF Voltage Line Regulation 3V < VIN < 40V RREF Pin Bias Current (Note 3) 2.8 3.5 kHz 4.2 400 l l 1.21 1.20 UNITS A mA 75 125 mV 1.23 1.25 1.26 V 0.01 0.03 %/ V 100 600 nA 3575f 2 LT3575 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, unless otherwise noted. PARAMETER CONDITIONS IREF Reference Current Measured at RFB Pin with RREF = 6.49k MIN 190 μA Error Amplifier Voltage Gain VIN = 3V 150 V/V Error Amplifier Transconductance ΔI = 10μA, VIN = 3V 150 μmhos Minimum Switching Frequency VC = 0.35V 40 kHz TC Current into RREF RTC = 20.1k BIAS Pin Voltage IBIAS = 30mA 5.10 6 5.05 5 5.00 4.95 3 4.90 2 4.85 1 4.80 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 3575 G01 VIN = 40V WITH BIAS = 20V 0 –50 V VIN = 40V 3.0 VIN = 5V WITH BIAS = 5V 4 μA 3.1 Bias Pin Voltage 3.2 BIAS VOLTAGE (V) 7 IQ (mA) VOUT (V) 5.15 3 TA = 25°C, unless otherwise noted. Quiescent Current 8 UNITS to 125°C operating junction temperature range are assured by design characterization and correlation with statistical process controls. The LT3575I is guaranteed over the full –40°C to 125°C operating junction temperature range. Note 3: Current flows out of the RREF pin. TYPICAL PERFORMANCE CHARACTERISTICS Output Voltage MAX 27.5 2.9 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3575E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C 5.20 TYP VIN = 12V 2.8 2.6 2.4 2.2 –25 50 25 0 75 TEMPERATURE (°C) 100 125 3575 G02 2.0 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 3575 G03 3575f 3 LT3575 TYPICAL PERFORMANCE CHARACTERISTICS Switch Current Limit 4.5 450 4 400 3.5 25°C 350 125°C 300 250 –50°C 200 150 2.0 1.5 50 0.5 500 1000 1500 2000 2500 SWITCH CURRENT (mA) 0 –50 3000 3.5 2.5 1 0 MAX ILIM 3 100 0 Switch Current Limit vs RILIM 4 SWITCH CURRENT LIMIT (A) 500 CURRENT LIMIT (A) SWITCH VCESAT VOLTAGE (mV) Switch Saturation Voltage MIN ILIM –25 0 25 50 75 100 125 TEMPERATURE (°C) 2.5 2 1.5 1 0 0 10 20 30 40 50 60 RILIM RESISTANCE (kΩ) 3575 G05 SHDN/UVLO Falling Threshold 3575 G06 SS Pin Current 1.28 12 10 1.26 SS PIN CURRENT (μA) SHDN/UVLO VOLTAGE (V) 3 0.5 3575 G04 1.24 1.22 1.20 1.18 –50 TA = 25°C, unless otherwise noted. 8 6 4 2 –25 0 25 50 75 100 125 TEMPERATURE (°C) 3575 G07 0 –60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 3575 G08 3575f 4 LT3575 PIN FUNCTIONS NC (Pins 1, 15, 16): No Connect Pins. Can be left open or connected to any ground plane. VIN (Pin 2): Input Voltage. This pin supplies current to the internal start-up circuitry and as a reference voltage for the DCM comparator and feedback circuitry. This pin must be locally bypassed with a capacitor. SW (Pins 3, 4): Collector Node of the Output Switch. This pin has large currents flowing through it. Keep the traces to the switching components as short as possible to minimize electromagnetic radiation and voltage spikes. BIAS (Pin 5): Bias Voltage. This pin supplies current to the switch driver and internal circuitry of the LT3575. This pin must be locally bypassed with a capacitor. This pin may also be connected to VIN if a third winding is not used and if VIN ≤ 15V. If a third winding is used, the BIAS voltage should be lower than the input voltage for proper operation. SHDN/UVLO (Pin 6): Shutdown/Undervoltage Lockout. A resistor divider connected to VIN is tied to this pin to program the minimum input voltage at which the LT3575 will operate. At a voltage below ~0.7V, the part draws no quiescent current. When below 1.22V and above ~0.7V, the part will draw 7μA of current, but internal circuitry will remain off. Above 1.22V, the internal circuitry will start and a 7μA current will be fed into the SS pin. When this pin falls below 1.22V, 2.8μA will be pulled from the pin to provide programmable hysteresis for UVLO. SS (Pin 7): Soft-Start Pin. Place a soft-start capacitor here to limit start-up inrush current and output voltage ramp rate. Switching starts when the voltage at this pin reaches ~0.7V. RILIM (Pin 8): Maximum Current Limit Adjust Pin. A resistor should be tied to this pin to ground to set the current limit. Use a 10k resistor for the full current capabilities of the switch. VC (Pin 9): Compensation Pin for Internal Error Amplifier. Connect a series RC from this pin to ground to compensate the switching regulator. A 100pF capacitor in parallel helps eliminate noise. RFB (Pin 10): Input Pin for External Feedback Resistor. This pin is connected to the transformer primary (VSW). The ratio of this resistor to the RREF resistor, times the internal bandgap reference, determines the output voltage (plus the effect of any non-unity transformer turns ratio). The average current through this resistor during the flyback period should be approximately 200μA. For nonisolated applications, this pin should be connected to VIN . RREF (Pin 11): Input Pin for External Ground-Referred Reference Resistor. This resistor should be in the range of 6k, but for convenience, need not be precisely this value. For nonisolated applications, a traditional resistor voltage divider may be connected to this pin. TC (Pin 12): Output Voltage Temperature Compensation. Connect a resistor to ground to produce a current proportional to absolute temperature to be sourced into the RREF node. ITC = 0.55V/RTC . TEST (Pin 13): This pin is used for testing purposes only and must be connected to ground for the part to operate properly. GND (Pin 14, Exposed Pad Pin 17): Ground. The exposed pad of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. The exposed pad must be soldered to the circuit board for proper operation and should be well connected with many vias to an internal ground plane. 3575f 5 LT3575 BLOCK DIAGRAM D1 T1 VIN C1 L1A VOUT + L1B C2 R3 VOUT – N:1 RFB VIN TC CURRENT Q3 TC R6 SW FLYBACK ERROR AMP Q2 I2 20μA 1.23V –g m + – + ONE SHOT CURRENT COMPARATOR A2 – A1 + S DRIVER BIAS R Q1 Q S BIAS MASTER LATCH C5 1.22V R1 – VIN RREF R4 + V1 120mV SHDN/UVLO R2 + A5 – 2.8μA INTERNAL REFERENCE AND REGULATORS I1 7μA + – A4 RSENSE 0.01Ω GND OSCILLATOR VC Q4 R7 SS RILIM C3 C4 3573 BD R5 3575f 6 LT3575 OPERATION The LT3575 is a current mode switching regulator IC designed specifically for the isolated flyback topology. The special problem normally encountered in such circuits is that information relating to the output voltage on the isolated secondary side of the transformer must be communicated to the primary side in order to maintain regulation. Historically, this has been done with optoisolators or extra transformer windings. Optoisolator circuits waste output power and the extra components increase the cost and physical size of the power supply. Optoisolators can also exhibit trouble due to limited dynamic response, nonlinearity, unit-to-unit variation and aging over life. Circuits employing extra transformer windings also exhibit deficiencies. Using an extra winding adds to the transformer’s physical size and cost, and dynamic response is often mediocre. The LT3575 derives its information about the isolated output voltage by examining the primary side flyback pulse waveform. In this manner, no optoisolator nor extra transformer winding is required for regulation. The output voltage is easily programmed with two resistors. Since this IC operates in boundary control mode, the output voltage is calculated from the switch pin when the secondary current is almost zero. This method improves load regulation without external resistors and capacitors. The Block Diagram shows an overall view of the system. Many of the blocks are similar to those found in traditional switching regulators including: internal bias regulator, oscillator, logic, current amplifier and comparator, driver, and output switch. The novel sections include a special flyback error amplifier and a temperature compensation circuit. In addition, the logic system contains additional logic for boundary mode operation, and the sampling error amplifier. The LT3575 features a boundary mode control method, where the part operates at the boundary between continuous conduction mode and discontinuous conduction mode. The VC pin controls the current level just as it does in normal current mode operation, but instead of turning the switch on at the start of the oscillator period, the part detects when the secondary side winding current is zero. Boundary Mode Operation Boundary mode is a variable frequency, current-mode switching scheme. The switch turns on and the inductor current increases until a VC pin controlled current limit. The voltage on the SW pin rises to the output voltage divided by the secondary-to-primary transformer turns ratio plus the input voltage. When the secondary current through the diode falls to zero, the SW pin voltage falls below VIN . A discontinuous conduction mode (DCM) comparator detects this event and turns the switch back on. Boundary mode returns the secondary current to zero every cycle, so the parasitic resistive voltage drops do not cause load regulation errors. Boundary mode also allows the use of a smaller transformer compared to continuous conduction mode and no subharmonic oscillation. At low output currents the LT3575 delays turning on the switch, and thus operates in discontinuous mode. Unlike a traditional flyback converter, the switch has to turn on to update the output voltage information. Below 0.6V on the VC pin, the current comparator level decreases to its minimum value, and the internal oscillator frequency decreases in frequency. With the decrease of the internal oscillator, the part starts to operate in DCM. The output current is able to decrease while still allowing a minimum switch off-time for the error amp sampling circuitry. The typical minimum internal oscillator frequency with VC equal to 0V is 40kHz. 3575f 7 LT3575 APPLICATIONS INFORMATION ERROR AMPLIFIER—PSEUDO DC THEORY In the Block Diagram, the RREF (R4) and RFB (R3) resistors can be found. They are external resistors used to program the output voltage. The LT3575 operates much the same way as traditional current mode switchers, the major difference being a different type of error amplifier which derives its feedback information from the flyback pulse. Operation is as follows: when the output switch, Q1, turns off, its collector voltage rises above the VIN rail. The amplitude of this flyback pulse, i.e., the difference between it and VIN, is given as: In combination with the previous VFLBK expression yields an expression for VOUT, in terms of the internal reference, programming resistors, transformer turns ratio and diode forward voltage drop: ⎛ R ⎞⎛ 1 ⎞ VOUT = VBG ⎜ FB ⎟ ⎜ ⎟ − VF − ISEC (ES R) ⎝ RREF ⎠ ⎝ α NPS ⎠ Additionally, it includes the effect of nonzero secondary output impedance (ESR). This term can be assumed to be zero in boundary control mode. More details will be discussed in the next section. VFLBK = (VOUT + VF + ISEC • ESR) • NPS Temperature Compensation VF = D1 forward voltage The first term in the VOUT equation does not have a temperature dependence, but the diode forward drop has a significant negative temperature coefficient. To compensate for this, a positive temperature coefficient current source is connected to the RREF pin. The current is set by a resistor to ground connected to the TC pin. To cancel the temperature coefficient, the following equation is used: ISEC = Transformer secondary current ESR = Total impedance of secondary circuit NPS = Transformer effective primary-to-secondary turns ratio The flyback voltage is then converted to a current by the action of RFB and Q2. Nearly all of this current flows through resistor RREF to form a ground-referred voltage. This voltage is fed into the flyback error amplifier. The flyback error amplifier samples this output voltage information when the secondary side winding current is zero. The error amplifier uses a bandgap voltage, 1.23V, as the reference voltage. The relatively high gain in the overall loop will then cause the voltage at the RREF resistor to be nearly equal to the bandgap reference voltage VBG . The relationship between VFLBK and VBG may then be expressed as: ⎛V ⎞ V α ⎜ FLBK ⎟ = BG ⎝ RFB ⎠ RREF VFLBK or, ⎛ R ⎞ ⎛ 1⎞ = VBG ⎜ FB ⎟ ⎜ ⎟ ⎝ RREF ⎠ ⎝ α ⎠ α = Ratio of Q1 IC to IE, typically ≈ 0.986 VBG = Internal bandgap reference 1 δ VF R • = − FB • δT R TC NPS 1 −RFB • R TC = NPS δ VF / δ T δ VTC or, δT δV R • TC ≈ FB δT NPS (δVF /δT) = Diode’s forward voltage temperature coefficient (δVTC /δT) = 2mV VTC = 0.55V The resistor value given by this equation should also be verified experimentally, and adjusted if necessary to achieve optimal regulation overtemperature. The revised output voltage is as follows: ⎛ R ⎞⎛ 1 ⎞ VOUT = VBG ⎜ FB ⎟ ⎜ ⎟ − VF ⎝ RREF ⎠ ⎝ NPS α ⎠ ⎛V ⎞ R − ⎜ TC ⎟ • FB – ISEC (ESR) ⎝ R TC ⎠ NPS α 3575f 8 LT3575 APPLICATIONS INFORMATION ERROR AMPLIFIER—DYNAMIC THEORY Selecting RFB and RREF Resistor Values Due to the sampling nature of the feedback loop, there are several timing signals and other constraints that are required for proper LT3575 operation. The expression for VOUT, developed in the Operation section, can be rearranged to yield the following expression for RFB: Minimum Current Limit The LT3575 obtains output voltage information from the SW pin when the secondary winding conducts current. The sampling circuitry needs a minimum amount of time to sample the output voltage. To guarantee enough time, a minimum inductance value must be maintained. The primary side magnetizing inductance must be chosen above the following value: L PRI ≥ VOUT • ⎛ 0 . 88µH ⎞ t MIN • NPS = VOUT • NPS • ⎜ ⎟ IMIN ⎝ V ⎠ tMIN = minimum off-time, 350ns IMIN = minimum current limit, 400mA The minimum current limit is higher than that on the Electrical Characteristics table due to the overshoot caused by the comparator delay. Leakage Inductance Blanking When the output switch first turns off, the flyback pulse appears. However, it takes a finite time until the transformer primary side voltage waveform approximately represents the output voltage. This is partly due to the rise time on the SW node, but more importantly due to the transformer leakage inductance. The latter causes a very fast voltage spike on the primary side of the transformer that is not directly related to output voltage (some time is also required for internal settling of the feedback amplifier circuitry). The leakage inductance spike is largest when the power switch current is highest. In order to maintain immunity to these phenomena, a fixed delay is introduced between the switch turn-off command and the beginning of the sampling. The blanking is internally set to 150ns. In certain cases, the leakage inductance may not be settled by the end of the blanking period, but will not significantly affect output regulation. RFB = RREF • NPS ⎡⎣( VOUT + VF ) α + VTC ⎤⎦ VBG where, VOUT = Output voltage VF = Switching diode forward voltage α = Ratio of Q1, IC to IE, typically 0.986 NPS = Effective primary-to-secondary turns ratio VTC = 0.55V The equation assumes the temperature coefficients of the diode and VTC are equal, which is a good first-order approximation. Strictly speaking, the above equation defines RFB not as an absolute value, but as a ratio of RREF. So, the next question is, “What is the proper value for RREF?” The answer is that RREF should be approximately 6.04k. The LT3575 is trimmed and specified using this value of RREF. If the impedance of RREF varies considerably from 6.04k, additional errors will result. However, a variation in RREF of several percent is acceptable. This yields a bit of freedom in selecting standard 1% resistor values to yield nominal RFB /RREF ratios. The RFB resistor given by this equation should also be verified experimentally, and adjusted if necessary for best output accuracy. Tables 1-4 are useful for selecting the resistor values for RREF and RFB with no equations. The tables provide RFB , RREF and RTC values for common output voltages and common winding ratios. Table 1. Common Resistor Values for 1:1 Transformers VOUT (V) NPS RFB (kΩ) RREF (kΩ) RTC (kΩ) 3.3 1.00 18.7 6.04 19.1 5 1.00 27.4 6.04 28 12 1.00 64.9 6.04 66.5 15 1.00 80.6 6.04 80.6 20 1.00 107 6.04 105 3575f 9 LT3575 APPLICATIONS INFORMATION Table 2. Common Resistor Values for 2:1 Transformers VOUT (V) NPS RFB (kΩ) RREF (kΩ) RTC (kΩ) 3.3 2.00 5 2.00 37.4 6.04 18.7 56 6.04 28 12 2.00 130 6.04 66.5 15 2.00 162 6.04 80.6 predict output power. In addition, the winding ratio can be changed to multiply the output current at the expense of a higher switch voltage. The graphs in Figures 1-3 show the maximum output power possible for the output voltages 3.3V, 5V, and 12V. The maximum power output curve is the calculated output power if the switch voltage is 50V during the off-time. To achieve this power level at a given input, a winding ratio value must be calculated to stress the switch to 50V, resulting in some odd ratio values. The curves below are examples of common winding ratio values and the amount of output power at given input voltages. Table 3. Common Resistor Values for 3:1 Transformers VOUT (V) NPS RFB (kΩ) RREF (kΩ) RTC (kΩ) 3.3 3.00 56.2 6.04 20 5 3.00 80.6 6.04 28.7 10 3.00 165 6.04 54.9 One design example would be a 5V output converter with a minimum input voltage of 20V and a maximum input voltage of 30V. A three-to-one winding ratio fits this design example perfectly and outputs close to ten watts at 30V but lowers to eight watts at 20V. Table 4. Common Resistor Values for 4:1 Transformers VOUT (V) NPS RFB (kΩ) RREF (kΩ) RTC (kΩ) 3.3 4.00 5 4.00 76.8 6.04 19.1 113 6.04 28 Output Power TRANSFORMER DESIGN CONSIDERATIONS A flyback converter has a complicated relationship between the input and output current compared to a buck or a boost. A boost has a relatively constant maximum input current regardless of input voltage and a buck has a relatively constant maximum output current regardless of input voltage. This is due to the continuous nonswitching behavior of the two currents. A flyback converter has both discontinuous input and output currents which makes it similar to a nonisolated buck-boost. The duty cycle will affect the input and output currents, making it hard to 10:1 7:1 5:1 4:1 10 8 3:1 6 2:1 4 12 1:1 2 4:1 7:1 10 3:1 5:1 2:1 8 6 1:1 4 2 0 5 10 15 20 25 30 INPUT VOLTAGE (V) 35 40 45 3575 F01 Figure 1. Output Power for 3.3V Output MAXIMUM OUTPUT 12 POWER MAX POUT 2:1 10 3:1 8 1:1 6 4 2 0 0 14 MAXIMUM OUTPUT POWER MAX POUT OUTPUT POWER (W) OUTPUT POWER (W) 12 14 MAXIMUM OUTPUT POWER MAX POUT Linear Technology has worked with several leading magnetic component manufacturers to produce pre-designed flyback transformers for use with the LT3575. Table 5 shows the details of several of these transformers. OUTPUT POWER (W) 14 Transformer specification and design is perhaps the most critical part of successfully applying the LT3575. In addition to the usual list of caveats dealing with high frequency isolated power supply transformer design, the following information should be carefully considered. 0 0 5 10 15 20 25 30 INPUT VOLTAGE (V) 35 40 45 3573 F02 Figure 2. Output Power for 5V Output 0 5 10 15 20 25 INPUT VOLTAGE (V) 30 35 40 3573 F03 Figure 3. Output Power for 12V Output 3575f 10 LT3575 APPLICATIONS INFORMATION Table 5. Predesigned Transformers—Typical Specifications, Unless Otherwise Noted TARGET APPLICATION* TRANSFORMER PART NUMBER DIMENSION (W × L × H) (mm) LPRI (μH) LLEAKAGE (nH) NP:NS RPRI (mΩ) RSEC (mΩ) VENDOR VO (V) IO (A) 750311306 15.24 × 13.3 × 11.43 100 1750 3:1 285 46 Würth Elektronik 12 1 750311307 15.24 × 13.3 × 11.43 100 2000 2:1 290 104 Würth Elektronik 24 0.5 750311308 15.24 × 13.3 × 11.43 100 2100 1:1 325 480 Würth Elektronik 24 0.5 750310564 15.24 × 13.3 × 11.43 63 450 3:1 115 50 Würth Elektronik ±5 1 750311303 15.24 × 13.3 × 11.43 50 800 5:1 106 13 Würth Elektronik 5 3 750311304 15.24 × 13.3 × 11.43 50 800 4:1 146 17 Würth Elektronik 5 3 750311305 15.24 × 13.3 × 11.43 50 1200 3:1 175 28 Würth Elektronik 12 1 PA2627NL 15.24 × 13.3 × 11.43 50 766 3:1 420 44 Pulse Engineering 3.3 3 750310471 15.24 × 13.3 × 11.43 25 350 3:1 57 11 Würth Elektronik 5 2 750310562 15.24 × 13.3 × 11.43 25 330 2:1 60 20 Würth Elektronik 12 0.8 750310563 15.24 × 13.3 × 11.43 25 325 1:1 60 60 Würth Elektronik 12 0.8 PA2364NL 15.24 × 13.3 × 11.43 25 1000 7:1 125 5.6 Pulse Engineering 3.3 1.5 PA2363NL 15.24 × 13.3 × 11.43 25 850 5:1 117 7.5 Pulse Engineering 5 1 PA2362NL 15.24 × 13.3 × 11.43 24 550 4:1 117 9.5 Pulse Engineering 3.3 1.5 PA2454NL 15.24 × 13.3 × 11.43 24 430 3:1 82 11 Pulse Engineering 5 1 PA2455NL 15.24 × 13.3 × 11.43 25 450 2:1 82 22 Pulse Engineering 12 0.5 PA2456NL 15.24 × 13.3 × 11.43 25 390 1:1 82 84 Pulse Engineering 12 0.3 750310559 15.24 × 13.3 × 11.43 24 400 4:1 51 16 Würth Elektronik 3.3 1.5 750311675 15.24 × 13.3 × 11.43 25 130 3:1 51 11 Würth Elektronik 5 2 750311342 15.24 × 13.3 × 11.43 15 440 2:1 85 22 Würth Elektronik 5 1.5 750311567 15.24 × 13.3 × 11.43 8 425 2:1 53 22 Würth Elektronik 5 2 750311422 17.7 × 14.0 × 12.7 50 574 5:1 80 8 Würth Elektronik 3.3 4 750311423 17.7 × 14.0 × 12.7 50 570 4:1 90 12 Würth Elektronik 5 2.4 750311457 17.7 × 14.0 × 12.7 50 600 4:1 115 12 Würth Elektronik 5 2.4 750311688 17.7 × 14.0 × 12.7 50 600 5:1 80 8 Würth Elektronik 3.3 4 750311689 17.7 × 14.0 × 12.7 50 600 4:1 115 12 Würth Elektronik 5 2.4 750311439 17.7 × 14.0 × 12.7 37 750 2:1 89 28 Würth Elektronik 12 1 PA2467NL 17.7 × 14.0 × 12.7 37 750 2:1 89 28 Pulse Engineering 12 1 PA2466NL 17.7 × 14.0 × 12.7 37 750 6:1 89 4.6 Pulse Engineering 3.3 4 PA2369NL 17.7 × 14.0 × 12.7 37 750 5:1 89 6.2 Pulse Engineering 5 2.5 750311458 17.7 × 14.0 × 12.7 15 175 3:1 35 6 Würth Elektronik 3.3 4 750311625 17.7 × 14.0 × 12.7 9 350 4:1 43 6 Würth Elektronik 3.3 4 750311564 17.7 × 14.0 × 12.7 9 120 3:1 36 7 Würth Elektronik 5 2.5 750311624 17.7 × 14.0 × 12.7 9 180 3:2 34 21 Würth Elektronik 15 1 *Target applications, not guaranteed 3575f 11 LT3575 APPLICATIONS INFORMATION Turns Ratio Note that when using an RFB /RREF resistor ratio to set output voltage, the user has relative freedom in selecting a transformer turns ratio to suit a given application.In contrast, simpler ratios of small integers, e.g., 1:1, 2:1, 3:2, etc., can be employed to provide more freedom in setting total turns and mutual inductance. Typically, the transformer turns ratio is chosen to maximize available output power. For low output voltages (3.3V or 5V), a N:1 turns ratio can be used with multiple primary windings relative to the secondary to maximize the transformer’s current gain (and output power). However, remember that the SW pin sees a voltage that is equal to the maximum input supply voltage plus the output voltage multiplied by the turns ratio. This quantity needs to remain below the ABS MAX rating of the SW pin to prevent breakdown of the internal power switch. Together these conditions place an upper limit on the turns ratio, N, for a given application. Choose a turns ratio low enough to ensure: N< 50 V – VIN(MAX ) VOUT + VF For larger N:1 values, a transformer with a larger physical size is needed to deliver additional current and provide a large enough inductance value to ensure that the off-time is long enough to accurately measure the output voltage. For lower output power levels, a 1:1 or 1:N transformer can be chosen for the absolute smallest transformer size. A 1: N transformer will minimize the magnetizing inductance (and minimize size), but will also limit the available output power. A higher 1:N turns ratio makes it possible to have very high output voltages without exceeding the breakdown voltage of the internal power switch. be required to avoid overvoltage breakdown at the output switch node. Transformer leakage inductance should be minimized. An RCD (resistor capacitor diode) clamp, shown in Figure 4, is required for most designs to prevent the leakage inductance spike from exceeding the breakdown voltage of the power device. The flyback waveform is depicted in Figure 5. In most applications, there will be a very fast voltage spike caused by a slow clamp diode that may not exceed 60V. Once the diode clamps, the leakage inductance current is absorbed by the clamp capacitor. This period should not last longer than 150ns so as not to interfere with the output regulation, and the voltage during this clamp period must not exceed 55V. The clamp diode turns off after the leakage inductance energy is absorbed and the switch voltage is then equal to: VSW(MAX) = VIN(MAX) + N(VOUT + VF) This voltage must not exceed 50V. This same equation also determines the maximum turns ratio. When choosing the snubber network diode, careful attention must be paid to maximum voltage seen by the SW pin. Schottky diodes are typically the best choice to be used in the snubber, but some PN diodes can be used if they turn on fast enough to limit the leakage inductance spike. The leakage spike must always be kept below 60V. Figures 6 and 7 show the SW pin waveform for a 24VIN , 5VOUT application at a 1A load current. Notice that the leakage spike is very high (more than 65V) with the “bad” diode, while the “good” diode effectively limits the spike to less than 55V. Leakage Inductance An alternative to RC network is a Zener diode clamping. The Zener diode must be able to handle the voltage rating and power dissipating during the switch turn-off time. Application Note 19 has more details on Zener diode snubber design for flyback converters. Transformer leakage inductance (on either the primary or secondary) causes a voltage spike to appear at the primary after the output switch turns off. This spike is increasingly prominent at higher load currents where more stored energy must be dissipated. In most cases, a snubber circuit will For applications with SW voltage exceeding 50V, Zener diode clamp must be considered. At higher operating primary current, the leakage inductance spike can potentially exceed the breakdown voltage of the internal power switch. 3575f 12 LT3575 APPLICATIONS INFORMATION VSW LS < 60V C CLAMP EITHER ZENER OR RC R < 55V < 50V D t OFF > 350ns tSP < 150ns 3575 F04 Figure 4. Snubber Clamping 10V/DIV 3575 F05 TIME Figure 5. Maximum Voltages for SW Pin Flyback Waveform 10V/DIV 100ns/DIV 3575 F06 Figure 6. Good Snubber Diode Limits SW Pin Voltage 100ns/DIV 3575 F07 Figure 7. Bad Snubber Diode Does Not Limit SW Pin Voltage 3575f 13 LT3575 APPLICATIONS INFORMATION Secondary Leakage Inductance In addition to the previously described effects of leakage inductance in general, leakage inductance on the secondary in particular exhibits an additional phenomenon. It forms an inductive divider on the transformer secondary that effectively reduces the size of the primary-referred flyback pulse used for feedback. This will increase the output voltage target by a similar percentage. Note that unlike leakage spike behavior, this phenomenon is load independent. To the extent that the secondary leakage inductance is a constant percentage of mutual inductance (over manufacturing variations), this can be accommodated by adjusting the RFB /RREF resistor ratio. The Switch Current Limit vs RILIM plot in the Typical Performance Characteristics section depicts a more accurate current limit. Undervoltage Lockout (UVLO) The SHDN/UVLO pin is connected to a resistive voltage divider connected to VIN as shown in Figure 8. The voltage threshold on the SHDN/UVLO pin for VIN rising is 1.22V. To introduce hysteresis, the LT3575 draws 2.8μA from the SHDN/UVLO pin when the pin is below 1.22V. The hysteresis is therefore user-adjustable and depends on the value of R1. The UVLO threshold for VIN rising is: VIN(UVLO,RISING) = Winding Resistance Effects Resistance in either the primary or secondary will reduce overall efficiency (POUT / PIN). Good output voltage regulation will be maintained independent of winding resistance due to the boundary mode operation of the LT3575. Bifilar Winding A bifilar, or similar winding technique, is a good way to minimize troublesome leakage inductances. However, remember that this will also increase primary-to-secondary capacitance and limit the primary-to-secondary breakdown voltage, so, bifilar winding is not always practical. The Linear Technology applications group is available and extremely qualified to assist in the selection and/or design of the transformer. 1 . 22V • (R1+ R2) + 2 . 8µA • R1 R2 The UVLO threshold for VIN falling is: VIN(UVLO,FALLING) = 1 . 22V • (R1 + R2) R2 To implement external run/stop control, connect a small NMOS to the UVLO pin, as shown in Figure 8. Turning the NMOS on grounds the UVLO pin and prevents the LT3575 from operating, and the part will draw less than a 1μA of quiescent current. VIN R1 SHDN/UVLO R2 LT3575 RUN/STOP CONTROL (OPTIONAL) Setting the Current Limit Resistor The maximum current limit can be set by placing a resistor between the RILIM pin and ground. This provides some flexibility in picking standard off-the-shelf transformers that may be rated for less current than the LT3575’s internal power switch current limit. If the maximum current limit is needed, use a 10k resistor. For lower current limits, the following equation sets the approximate current limit: GND 3575 F08 Figure 8. Undervoltage Lockout (UVLO) RILIM = 65 • 10 3(3 . 5A − ILIM ) + 10k 3575f 14 LT3575 APPLICATIONS INFORMATION Minimum Load Requirement The LT3575 obtains output voltage information through the transformer while the secondary winding is conducting current. During this time, the output voltage (multiplied times the turns ratio) is presented to the primary side of the transformer. The LT3575 uses this reflected signal to regulate the output voltage. This means that the LT3575 must turn on every so often to sample the output voltage, which delivers a small amount of energy to the output. This sampling places a minimum load requirement on the output of 1% to 2% of the maximum load. A Zener diode with a Zener breakdown of 20% higher than the output voltage can serve as a minimum load if pre-loading is not acceptable. For a 5V output, use a 6V Zener with cathode connected to the output. BIAS Pin Considerations For applications with an input voltage less than 15V, the BIAS pin is typically connected directly to the VIN pin. For input voltages greater than 15V, it is preferred to leave the BIAS pin separate from the VIN pin. In this condition, the BIAS pin is regulated with an internal LDO to a voltage of 3V. By keeping the BIAS pin separate from the input voltage at high input voltages, the physical size of the capacitors can be minimized (the BIAS pin can then use a 6.3V or 10V rated capacitor). schematics in the Typical Applications section for other possible values). If too large of an RC value is used, the part will be more susceptible to high frequency noise and jitter. If too small of an RC value is used, the transient performance will suffer. The value choice for CC is somewhat the inverse of the RC choice: if too small a CC value is used, the loop may be unstable, and if too large a CC value is used, the transient performance will also suffer. Transient response plays an important role for any DC/DC converter. Design Example The following example illustrates the converter design process using LT3575. Given the input voltage of 20V to 28V, the required output is 5V, 1A. VIN(MIN) = 20V, VIN(MAX) = 28V, VOUT = 5V, VF = 0.5V and IOUT = 1A 1. Select the transformer turns ratio to accommodate the output. The output voltage is reflected to the primary side by a factor of turns ratio N. The switch voltage stress VSW is expressed as: N= NP NS VSW(MAX ) = VIN + N( VOUT + VF ) < 50 V Overdriving the BIAS Pin with a Third Winding The LT3575 provides excellent output voltage regulation without the need for an optocoupler, or third winding, but for some applications with higher input voltages (>20V), it may be desirable to add an additional winding (often called a third winding) to improve the system efficiency. For proper operation of the LT3575, if a winding is used as a supply for the BIAS pin, ensure that the BIAS pin voltage is at least 3.15V and always less than the input voltage. For a typical 24VIN application, overdriving the BIAS pin will improve the efficiency gain 4-5%. Loop Compensation Or rearranged to: N< 50 − VIN(MAX ) ( VOUT + VF ) On the other hand, the primary side current is multiplied by the same factor of N. The converter output capability is: IOUT(MAX ) = 0 . 8 • (1 − D) • D= 1 NI 2 PK N( VOUT + VF ) VIN + N( VOUT + VF ) The LT3575 is compensated using an external resistorcapacitor network on the VC pin. Typical values are in the range of RC = 50k and CC = 1.5nF (see the numerous 3575f 15 LT3575 APPLICATIONS INFORMATION The transformer turns ratio is selected such that the converter has adequate current capability and a switch stress below 50V. Table 6 shows the switch voltage stress and output current capability at different transformer turns ratio. Table 6. Switch Voltage Stress and Output Current Capability vs Turns-Ratio N VSW(MAX) AT VIN(MAX) (V) IOUT(MAX) AT VIN(MIN) (A) DUTY CYCLE (%) 1:1 33.5 1.26 16~22 2:1 39 2.07 28~35 3:1 44.5 2.63 37~45 4:1 50 3.05 44~52 BIAS winding turns ratio is selected to program the BIAS voltage to 3V~5V. The BIAS voltage shall not exceed the input voltage. The turns ratio is then selected as primary: secondary: BIAS = 3:1:1. 2. Select the transformer primary inductance for target switching frequency. The LT3575 requires a minimum amount of time to sample the output voltage during the off-time. This off-time, tOFF(MIN), shall be greater than 350ns over all operating conditions. The converter also has a minimum current limit, IMIN, of 400mA to help create this off-time. This defines the minimum required inductance as defined as: L MIN = N( VOUT + VF ) • t OFF(MIN) IMIN The transformer primary inductance also affects the switching frequency which is related to the output ripple. If above the minimum inductance, the transformer’s primary inductance may be selected for a target switching frequency range in order to minimize the output ripple. The following equation estimates the switching frequency. fSW = 1 1 = IPK IPK t ON + t OFF + VIN NPS ( VOUT + VF ) L L Table 7.Switching Frequency at Different Primary Inductance at IPK L (μH) fSW AT VIN(MIN) (kHz) fSW AT VIN(MAX) (kHz) 15 174 205 30 87 103 60 44 51 Note: The switching frequency is calculated at maximum output. In this design example, the minimum primary inductance is used to achieve a nominal switching frequency of 200kHz at full load. The 750311458 from Würth Elektronik is chosen as the flyback transformer. Given the turns ratio and primary inductance, a customized transformer can be designed by magnetic component manufacturer or a multi-winding transformer such as a Coiltronics Versa-Pac may be used. 3. Select the output diodes and output capacitor. The output diode voltage stress VD is the summation of the output voltage and reflection of input voltage to the secondary side. The average diode current is the load current. VD = VOUT + VIN N The output capacitor should be chosen to minimize the output voltage ripple while considering the increase in size and cost of a larger capacitor. The following equation calculates the output voltage ripple. ΔVMAX LI 2PK = 2 CVOUT 4. Select the snubber circuit to clamp the switch voltage spike. A flyback converter generates a voltage spike during switch turn-off due to the leakage inductance of the transformer. In order to clamp the voltage spike below the maximum rating of the switch, a snubber circuit is used. There are many types of snubber circuits, for example R-C, R-C-D and 3575f 16 LT3575 APPLICATIONS INFORMATION Zener clamps. Among them, RCD is widely used. Figure 9 shows the RCD snubber in a flyback converter. RTC resistor for temperature compensation of the output voltage. RREF is selected as 6.04k. A typical switch node waveform is shown in Figure 10. A small capacitor in parallel with RREF filters out the noise during the voltage spike, however, the capacitor should limit to 10pF. A large capacitor causes distortion on voltage sensing. During switch turn-off, the energy stored in the leakage inductance is transferred to the snubber capacitor, and eventually dissipated in the snubber resistor. V ( V − N • VOUT ) 1 L S I2PK fSW = C C 2 R The snubber resistor affects the spike amplitude VC and duration tSP, the snubber resistor is adjusted such that tSP is about 150ns. Prolonged tSP may cause distortion to the output voltage sensing. The previous steps finish the flyback power stage design. 5. Select the feedback resistor for proper output voltage. Using the resistor Tables 1-4, select the feedback resistor RFB, and program the output voltage to 5V. Adjust the 6. Optimize the compensation network to improve the transient performance. The transient performance is optimized by adjusting the compensation network. For best ripple performance, select a compensation capacitor not less than 1.5nF, and select a compensation resistor not greater than 50k. 7. Current limit resistor, soft-start capacitor and UVLO resistor divider Use the current limit resistor RLIM to lower the current limit if a compact transformer design is required. Soft-start capacitor helps during the start-up of the flyback converter . Select the UVLO resistor divider for intended input operation range. These equations are aforementioned. LS C R VC NVOUT D VIN tSP 3575 F10 3575 F09 Figure 9. RCD Snubber in a Flyback Converter Figure 10. Typical Switch Node Waveform 3575f 17 LT3575 TYPICAL APPLICATIONS Low Input Voltage 5V Isolated Flyback Converter VIN 5V D1 3:1 C1 10μF R1 200k C6 0.22μF VIN R8 T1 1k 24μH 2.6μH VOUT+ 5V, 700mA C5 47μF SHDN/UVLO R2 90.9k R3 80.6k LT3575 VOUT– D2 RFB RREF R4 6.04k TC SW RILIM SS VC R6 28.7k R5 10k GND TEST BIAS R7 4.53k C3 33nF C2 10nF VIN T1: PULSE PA2454NL D1: PDS835L D2: PMEG6010 C5: MURATA, GRM32ER71A476K 3575 TA02 ±12V Isolated Flyback Converter VIN 5V D1 2:1:1 C1 10μF R1 200k C6 0.22μF VIN R8 T1 1k 33.2μH 8.3μH SHDN/UVLO VOUT1+ 12V, 200mA C5 47μF VOUT1– R2 90.9k R3 118k LT3575 RFB D2 D3 VOUT2+ 8.3μH RREF R4 6.04k TC C6 47μF VOUT2– –12V, 200mA SW RILIM SS VC R6 59k R5 10k C2 10nF GND TEST BIAS R7 4.99k C3 0.1μF VIN T1: COILTRONICS VPH2-0083-R D1, D2: PDS540 D3: PMEG6010 C5, C6: MURATA, GRM32ER71A476K 3575 TA03 3575f 18 LT3575 TYPICAL APPLICATIONS 5V Isolated Flyback Converter VIN 12V TO 24V (*30V) 3:1:1 C1 10μF R1 499k R8 1k C6 0.22μF VIN T1 24μH D1 2.6μH VOUT + 5V, 1.4A C5 47μF SHDN/UVLO VOUT – D3 R2 71.5k R3 80.6k LT3575 RFB RREF R4 6.04k TC RILIM SW SS VC R6 28.7k R5 10k C2 10nF GND TEST BIAS D2 R7 11.5k C3 4700pF C4 4.7μF L1C 2.6μH *OPTIONAL THIRD WINDING FOR 30V OPERATION 3575 TA04 T1: PULSE PA2454NL OR WÜRTH ELEKTRONIK 750310471/750311675 D1: PDS835L D3: PMEG6010 C5: MURATA, GRM32ER71A476K Efficiency 90 VIN = 24V 80 VIN = 12V EFFICIENCY (%) 70 60 50 40 30 20 10 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 IOUT (A) 3575 TA04b 3575f 19 LT3575 TYPICAL APPLICATIONS 3.3V Isolated Flyback Converter VIN 12V TO 24V (*36V) 4:1:1 C1 10μF R1 499k R8 1k C6 0.22μF VIN T1 24μH D1 1.5μH VOUT + 3.3V, 1.5A C5 47μF SHDN/UVLO R2 71.5k VOUT – D3 LT3575 RFB R3 76.8k RREF R4 6.04k TC RILIM SW SS VC R6 19.1k R5 10k C2 10nF GND TEST BIAS R7 4.99k C3 15nF D2 C4 4.7μF L1C 1.5μH *OPTIONAL THIRD WINDING FOR 36V OPERATION 3575 TA05 T1: PULSE PA2362NL OR WÜRTH ELEKTRONIK 750310559 D1: PDS835L D3: PMEG6010 3575f 20 LT3575 TYPICAL APPLICATIONS 12V Isolated Flyback Converter VIN 12V 3:1 C1 10μF R1 499k SHDN/UVLO C6 0.22μF VIN R2 71.5k D2 LT3575 RFB R8 1k T1 40.5μH D1 4.5μH VOUT 12V, 700mA C5 47μF VOUT– R3 178k RREF R4 6.04k TC RILIM SS VC R6 59k R5 10k C2 10nF 3575 TA06 SW GND TEST BIAS R7 7.87k C3 22nF VIN T1: COILTRONICS VP3-0055-R D1: PDS835L D2: PMEG6010 3575f 21 LT3575 TYPICAL APPLICATIONS Four Output 12V Isolated Flyback Converter VIN 12V TO 24V 2:1:1:1:1 C1 10μF R1 499k C6 0.22μF VIN R8 T1 1k 33.2μH SHDN/UVLO LT3575 R3 118k D2 8.3μH VOUT 2– RREF D3 R4 6.04k TC VC R6 59k R5 10k C2 10nF GND TEST BIAS R7 10k C3 0.1μF D4 VIN 8.3μH VOUT3+ 12V, 120mA C7 47μF VOUT 3– 8.3μH SW SS VOUT 1– VOUT2+ 12V, 120mA C6 47μF RFB RILIM VOUT1+ 12V, 120mA C5 47μF 8.3μH D5 R2 71.5k D1 VOUT4+ 12V, 120mA C8 47μF VOUT 4– T1: COILTRONICS VPH2-0083-R D1-D4: PDS540 D5: PMEG6010 3575 TA07 3575f 22 LT3575 PACKAGE DESCRIPTION FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation BA 4.90 – 5.10* (.193 – .201) 2.74 (.108) 2.74 (.108) 16 1514 13 12 1110 6.60 ±0.10 9 2.74 (.108) 4.50 ±0.10 2.74 6.40 (.108) (.252) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 0.25 REF 1.10 (.0433) MAX 0° – 8° 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 0.05 – 0.15 (.002 – .006) FE16 (BA) TSSOP 0204 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3575f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 23 LT3575 TYPICAL APPLICATION 13V to 30VIN, +5V/–5VOUT Isolated Flyback Converter T1 3:1:1:1 VIN 13V TO 30V C1 10μF R1 499k C6 0.22μF VIN L1A 63μH VOUT + +5V, 500mA C5 47μF L1B 7μH COM D4 SHDN/UVLO R2 64.9k R8 1k D1 L1C 7μH R3 80.6k LT3575 D2 RFB C6 47μF VOUT – –5V, 500mA RREF R4 6.04k TC RILIM SW SS GND TEST BIAS VC R5 28.7k R6 10k R7 7.68k C3 15nF C2 10nF *OPTIONAL THIRD WINDING FOR >24V OPERATION D3 C4 4.7μF L1D 7μH T1: WÜRTH ELEKTRONIK 750310564 D4: PMEG6010 D1, D2: PDS835L 3575 TA11 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT3574/LT3573 40V Isolated Flyback Converters Monolithic No-Opto Flybacks with Integrated 0.65A / 1.25A 60V Switch LT3957/LT3958 40V/100V Flyback, Boost Converters Monolithic with Integrated 5A/3.3A Switch LT3757/LT3758 40V/100V Flyback, Boost Controllers Universal Controllers with Small Package and Powerful Gate Drive LT1737/LT1725 20V Isolated Flyback Controller No Opto-Isolator or Third Winding Required LT3825/LT3837 Isolated Synchronous Flyback Controllers No Opto-Isolator or Third Winding Required LTC®3803/LTC3803-3 200kHz/300kHz Flyback DC/DC Controllers LTC3803-5 VIN and VOUT Limited Only by External Components LTC3805/LTC3805-5 VIN and VOUT Limited Only by External Components Adjustable Frequency Flyback Controllers 3575f 24 Linear Technology Corporation LT 0710 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2010