LT3573 Isolated Flyback Converter without an Opto-Coupler FEATURES DESCRIPTION 3V to 40V Input Voltage Range 1.25A, 60V Integrated NPN Power Switch Boundary Mode Operation No Transformer Third Winding or Opto-Isolator Required for Regulation n Improved Primary-Side Winding Feedback Load Regulation nV OUT Set with Two External Resistors n BIAS Pin for Internal Bias Supply and Power NPN Driver n Programmable Soft-Start n Programmable Power Switch Current Limit n Thermally Enhanced 16-Lead MSOP The LT®3573 is a monolithic switching regulator specifically designed for the isolated flyback topology. No third winding or opto-isolator is required for regulation. The part senses the isolated output voltage directly from the primary-side flyback waveform. A 1.25A, 60V NPN power switch is integrated along with all control logic into a 16‑lead MSOP package. n n n n The LT3573 operates with input supply voltages from 3V to 40V, and can deliver output power up to 7W with no external power devices.The LT3573 utilizes boundary mode operation to provide a small magnetic solution with improved load regulation. L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks and No RSENSE and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5438499 and 7471522. APPLICATIONS Industrial, Automotive and Medical Isolated Power Supplies n TYPICAL APPLICATION 5V Isolated Flyback Converter VIN 12V TO 24V 357k 0.22µF VIN 2k 24µH SHDN/UVLO PMEG6010 51.1k LT3573 RFB 3:1 VOUT+ 5V, 0.7A 2.6µH 47µF VOUT– 80.6k RREF TC 6.04k RILIM SS SW VC 28.7k GND 10nF 2 1 0 VIN = 24V VIN = 12V –1 –2 TEST BIAS –3 20k 10k 3 OUTPUT VOLTAGE ERROR (%) 10µF Load Regulation B340A 200 400 600 800 1000 1200 1400 IOUT (mA) 4.7µF 1nF 0 3573 TA01b 3573 TA01 3573fd For more information www.linear.com/LT3573 1 LT3573 ABSOLUTE MAXIMUM RATINGS (Note 1) PIN CONFIGURATION SW.............................................................................60V VIN, SHDN/UVLO, RFB, BIAS......................................40V SS, VC, TC, RREF , RILIM................................................5V Maximum Junction Temperature........................... 125°C Operating Junction Temperature Range (Note 2) LT3573E............................................. –40°C to 125°C Storage Temperature Range................... –65°C to 150°C TOP VIEW GND TEST GND SW VIN BIAS SHDN/UVLO GND 1 2 3 4 5 6 7 8 17 16 15 14 13 12 11 10 9 GND TC RREF RFB VC RILIM SS GND MSE PACKAGE 16-LEAD PLASTIC MSOP θJA = 50°C/W, θJC = 10°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE CONNECTED TO GND ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3573EMSE#PBF LT3573EMSE#TRPBF 3573 16-Lead Plastic MSOP –40°C to 125°C LT3573IMSE#PBF LT3573IMSE#TRPBF 3573 16-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, unless otherwise noted. PARAMETER CONDITIONS Input Voltage Range MIN l Quiescent Current SS = 0V VSHDN/UVLO = 0V Soft-Start Current SS = 0.4V SHDN/UVLO Pin Threshold UVLO Pin Voltage Rising SHDN/UVLO Pin Hysteresis Current VUVLO = 1V TYP 3 3.5 0 MAX 40 V 1 mA µA 7 l 1.15 2 Soft-Start Threshold µA 1.22 1.29 V 2.5 3 µA 0.7 Maximum Switching Frequency V 1000 Switch Current Limit RILIM = 10k Minimum Current Limit VC = 0V Switch VCESAT ISW = 0.5A RREF Voltage VIN = 3V 1.25 l RREF Voltage Line Regulation 3V < VIN < 40V RREF Pin Bias Current (Note 3) IREF Reference Current Measured at RFB Pin with RREF = 6.49k 1.55 kHz 1.85 200 l 1.21 1.20 UNITS A mA 150 250 mV 1.23 1.25 1.25 V 0.01 0.03 %/ V 100 600 nA 190 µA 3573fd 2 For more information www.linear.com/LT3573 LT3573 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, unless otherwise noted. PARAMETER CONDITIONS Error Amplifier Voltage Gain VIN = 3V MIN 150 V/V Error Amplifier Transconductance DI = 10µA, VIN = 3V 150 µmhos Minimum Switching Frequency VC = 0.35V 40 kHz TC Current into RREF RTC = 20.1k 27.5 µA BIAS Pin Voltage IBIAS = 30mA 2.9 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3573E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C Output Voltage 5.15 6 5.00 4.95 VIN = 5V 3 2 4.90 –25 50 0 25 75 TEMPERATURE (°C) 100 125 3573 G01 0 –50 VIN = 12V 2.8 2.6 2.4 2.2 1 4.85 4.80 –50 4 V VIN = 40V 3.0 VIN = 40V BIAS VOLTAGE (V) 5.05 3.1 Bias Pin Voltage 3.2 5 IQ (mA) VOUT (V) 5.10 UNITS TA = 25°C, unless otherwise noted. Quiescent Current 7 3 MAX to 125°C operating junction temperature range are assured by design characterization and correlation with statistical process controls. The LT3573I is guaranteed over the full –40°C to 125°C operating junction temperature range. Note 3: Current flows out of the RREF pin. TYPICAL PERFORMANCE CHARACTERISTICS 5.20 TYP –25 50 25 0 75 TEMPERATURE (°C) 100 125 3573 G02 2.0 –50 –25 50 25 0 75 TEMPERATURE (°C) 100 125 3573 G03 3573fd For more information www.linear.com/LT3573 3 LT3573 TYPICAL PERFORMANCE CHARACTERISTICS Switch Current Limit 400 1.8 350 1.6 25°C 125°C 250 –50°C 200 150 100 0.8 RILIM = 10k 0.6 0.25 0.50 0.75 1.00 SWITCH CURRENT (A) 1.25 1.50 0 –50 –25 0 25 50 75 1.0 0.8 0.6 0.2 100 125 TEMPERATURE (°C) 0 0 10 20 30 40 50 RILIM RESISTANCE (k) 3573 G05 3573 G04 3573 G06 SS Pin Current SHDN/UVLO Falling Threshold 1.28 12 10 1.26 SS PIN CURRENT (µA) SHDN/UVLO VOLTAGE (V) 1.2 0.4 MINIMUM CURRENT LIMIT 0.2 0 1.6 1.2 1.0 Switch Current Limit vs RILIM 1.4 0.4 50 0 MAXIMUM CURRENT LIMIT CURRENT LIMIT (A) 300 1.8 1.4 CURRENT LIMIT (A) SWITCH VCESAT VOLTAGE (mV) Switch VCESAT TA = 25°C, unless otherwise noted. 1.24 1.22 1.20 8 6 4 2 1.18 –60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 0 –60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 3573 G07 3573 G08 3573fd 4 For more information www.linear.com/LT3573 LT3573 PIN FUNCTIONS GND: Ground. TEST: This pin is used for testing purposes only and must be connected to ground for the part to operate properly. SW: Collector Node of the Output Switch. This pin has large currents flowing through it. Keep the traces to the switching components as short as possible to minimize electromagnetic radiation and voltage spikes. VIN : Input Voltage. This pin supplies current to the internal start-up circuitry and as a reference voltage for the DCM comparator and feedback circuitry. This pin must be locally bypassed with a capacitor. BIAS: Bias Voltage. This pin supplies current to the switch driver and internal circuitry of the LT3573. This pin must be locally bypassed with a capacitor. This pin may also be connected to VIN if a third winding is not used and if VIN ≤ 15V. If a third winding is used, the BIAS voltage should be lower than the input voltage for proper operation. SHDN/UVLO: Shutdown/Undervoltage Lockout. A resistor divider connected to VIN is tied to this pin to program the minimum input voltage at which the LT3573 will operate. At a voltage below ~0.7V, the part draws no quiescent current. When below 1.22V and above ~0.7V, the part will draw 10µA of current, but internal circuitry will remain off. Above 1.25V, the internal circuitry will start and a 10µA current will be fed into the SS pin. When this pin falls below 1.25V, 2.5µA will be pulled from the pin to provide programmable hysteresis for UVLO. RILIM: Maximum Current Limit Adjust Pin. A resistor should be tied to this pin to ground to set the current limit. Use a 10k resistor for the full current capabilities of the switch. SS: Soft-Start Pin. Place a soft-start capacitor here to limit start-up inrush current and output voltage ramp rate. Switching starts when the voltage at this pin reaches ~0.7V. VC: Compensation Pin for Internal Error Amplifier. Connect a series RC from this pin to ground to compensate the switching regulator. A 100pF capacitor in parallel helps eliminate noise. RFB: Input Pin for External Feedback Resistor. This pin is connected to the transformer primary (VSW). The ratio of this resistor to the RREF resistor, times the internal bandgap reference, determines the output voltage (plus the effect of any non-unity transformer turns ratio). The average current through this resistor during the flyback period should be approximately 200µA. For nonisolated applications, this pin should be connected to VIN. RREF : Input Pin for External Ground-Referred Reference Resistor. This resistor should be in the range of 6k, but for convenience, need not be precisely this value. For nonisolated applications, a traditional resistor voltage divider may be connected to this pin. TC: Output Voltage Temperature Compensation. Connect a resistor to ground to produce a current proportional to absolute temperature to be sourced into the RREF node. ITC = 0.55V/RTC . Exposed Pad: Ground. The Exposed Pad of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. The Exposed Pad must be soldered to the circuit board for proper operation and should be well connected with many vias to an internal ground plane. 3573fd For more information www.linear.com/LT3573 5 LT3573 BLOCK DIAGRAM D1 T1 VIN C1 L1A VOUT + L1B C2 R3 VOUT – N:1 TC CURRENT Q3 TC R6 RFB VIN SW FLYBACK ERROR AMP Q2 I2 20µA 1.23V –g m + – + ONE SHOT CURRENT COMPARATOR A2 – A1 + S S BIAS R DRIVER BIAS MASTER LATCH SHDN/UVLO R2 1.22V + A5 – 2.5µA INTERNAL REFERENCE AND REGULATORS I1 7µA Q1 Q C5 R1 – VIN RREF R4 + V1 120mV + – A4 RSENSE 0.02Ω GND OSCILLATOR VC Q4 R7 SS RILIM C3 C4 3573 BD R5 3573fd 6 For more information www.linear.com/LT3573 LT3573 OPERATION The LT3573 is a current mode switching regulator IC designed specifically for the isolated flyback topology. The special problem normally encountered in such circuits is that information relating to the output voltage on the isolated secondary side of the transformer must be communicated to the primary side in order to maintain regulation. Historically, this has been done with optoisolators or extra transformer windings. Opto-isolator circuits waste output power and the extra components increase the cost and physical size of the power supply. Opto-isolators can also exhibit trouble due to limited dynamic response, nonlinearity, unit-to-unit variation and aging over life. Circuits employing extra transformer windings also exhibit deficiencies. Using an extra winding adds to the transformer’s physical size and cost, and dynamic response is often mediocre. The LT3573 derives its information about the isolated output voltage by examining the primary-side flyback pulse waveform. In this manner, no opto-isolator nor extra transformer winding is required for regulation. The output voltage is easily programmed with two resistors. Since this IC operates in boundary control mode, the output voltage is calculated from the switch pin when the secondary current is almost zero. This method improves load regulation without external resistors and capacitors. The Block Diagram shows an overall view of the system. Many of the blocks are similar to those found in traditional switching regulators including: internal bias regulator, oscillator, logic, current amplifier and comparator, driver, and output switch. The novel sections include a special flyback error amplifier and a temperature compensation circuit. In addition, the logic system contains additional logic for boundary mode operation, and the sampling error amplifier. The LT3573 features a boundary mode control method, where the part operates at the boundary between continuous conduction mode and discontinuous conduction mode. The VC pin controls the current level just as it does in normal current mode operation, but instead of turning the switch on at the start of the oscillator period, the part detects when the secondary side winding current is zero. Boundary Mode Operation Boundary mode is a variable frequency, current-mode switching scheme. The switch turns on and the inductor current increases until a VC pin controlled current limit. The voltage on the SW pin rises to the output voltage divided by the secondary-to-primary transformer turns ratio plus the input voltage. When the secondary current through the diode falls to zero, the SW pin voltage falls below VIN . A discontinuous conduction mode (DCM) comparator detects this event and turns the switch back on. Boundary mode returns the secondary current to zero every cycle, so the parasitic resistive voltage drops do not cause load regulation errors. Boundary mode also allows the use of a smaller transformer compared to continuous conduction mode and no subharmonic oscillation. At low output currents the LT3573 delays turning on the switch, and thus operates in discontinuous mode. Unlike a traditional flyback converter, the switch has to turn on to update the output voltage information. Below 0.6V on the VC pin, the current comparator level decreases to its minimum value, and the internal oscillator frequency decreases in frequency. With the decrease of the internal oscillator, the part starts to operate in DCM. The output current is able to decrease while still allowing a minimum switch off-time for the error amp sampling circuitry. The typical minimum internal oscillator frequency with VC equal to 0V is 40kHz. 3573fd For more information www.linear.com/LT3573 7 LT3573 APPLICATIONS INFORMATION ERROR AMPLIFIER—PSEUDO DC THEORY In the Block Diagram, the RREF (R4) and RFB (R3) resistors can be found. They are external resistors used to program the output voltage. The LT3573 operates much the same way as traditional current mode switchers, the major difference being a different type of error amplifier which derives its feedback information from the flyback pulse. In combination with the previous VFLBK expression yields an expression for VOUT, in terms of the internal reference, programming resistors, transformer turns ratio and diode forward voltage drop: R 1 VOUT = VBG FB − VF −ISEC (ESR) RREF a NPS Operation is as follows: when the output switch, Q1, turns off, its collector voltage rises above the VIN rail. The amplitude of this flyback pulse, i.e., the difference between it and VIN, is given as: Additionally, it includes the effect of nonzero secondary output impedance (ESR). This term can be assumed to be zero in boundary control mode. More details will be discussed in the next section. VFLBK = (VOUT + VF + ISEC • ESR) • NPS Temperature Compensation VF = D1 forward voltage ISEC = Transformer secondary current ESR = Total impedance of secondary circuit NPS = Transformer effective primary-to-secondary turns ratio The flyback voltage is then converted to a current by the action of RFB and Q2. Nearly all of this current flows through resistor RREF to form a ground-referred voltage. This voltage is fed into the flyback error amplifier. The flyback error amplifier samples this output voltage information when the secondary side winding current is zero. The error amplifier uses a bandgap voltage, 1.23V, as the reference voltage. The relatively high gain in the overall loop will then cause the voltage at the RREF resistor to be nearly equal to the bandgap reference voltage VBG. The relationship between VFLBK and VBG may then be expressed as: V V a FLBK = BG RFB RREF The first term in the VOUT equation does not have a temperature dependence, but the diode forward drop has a significant negative temperature coefficient. To compensate for this, a positive temperature coefficient current source is connected to the RREF pin. The current is set by a resistor to ground connected to the TC pin. To cancel the temperature coefficient, the following equation is used: dVTC dVF R 1 = − FB • • dT R TC NPS dT R TC = or, dV −RFB 1 R • • TC ≈ FB NPS dVF / dT dT NPS (dVF /dT) = Diode’s forward voltage temperature coefficient (dVTC /dT) = 2mV VTC = 0.55V The resistor value given by this equation should also be verified experimentally, and adjusted if necessary to achieve optimal regulation over temperature. or, R 1 VFLBK = VBG FB RREF a The revised output voltage is as follows: R 1 VOUT = VBG FB − VF RREF NPS a a = Ratio of Q1 IC to IE, typically ≈ 0.986 VBG = Internal bandgap reference V R − TC • FB –ISEC (ESR) R TC NPS a 3573fd 8 For more information www.linear.com/LT3573 LT3573 APPLICATIONS INFORMATION ERROR AMPLIFIER—DYNAMIC THEORY Selecting RFB and RREF Resistor Values Due to the sampling nature of the feedback loop, there are several timing signals and other constraints that are required for proper LT3573 operation. The expression for VOUT, developed in the Operation section, can be rearranged to yield the following expression for RFB: Minimum Current Limit The LT3573 obtains output voltage information from the SW pin when the secondary winding conducts current. The sampling circuitry needs a minimum amount of time to sample the output voltage. To guarantee enough time, a minimum inductance value must be maintained. The primary-side magnetizing inductance must be chosen above the following value: LPRI ≥ VOUT • tMIN 1.4µH •NPS = VOUT •NPS • V IMIN RFB = RREF •NPS ( VOUT + VF ) a + VTC VBG where, VOUT = Output voltage VF = Switching diode forward voltage a = Ratio of Q1, IC to IE, typically 0.986 NPS = Effective primary-to-secondary turns ratio VTC = 0.55V The equation assumes the temperature coefficients of the diode and VTC are equal, which is a good first-order approximation. tMIN = minimum off-time, 350ns IMIN = minimum current limit, 250mA The minimum current limit is higher than that on the Electrical Characteristics table due to the overshoot caused by the comparator delay. Leakage Inductance Blanking When the output switch first turns off, the flyback pulse appears. However, it takes a finite time until the transformer primary-side voltage waveform approximately represents the output voltage. This is partly due to the rise time on the SW node, but more importantly due to the transformer leakage inductance. The latter causes a very fast voltage spike on the primary-side of the transformer that is not directly related to output voltage (some time is also required for internal settling of the feedback amplifier circuitry). The leakage inductance spike is largest when the power switch current is highest. In order to maintain immunity to these phenomena, a fixed delay is introduced between the switch turn-off command and the beginning of the sampling. The blanking is internally set to 150ns. In certain cases, the leakage inductance may not be settled by the end of the blanking period, but will not significantly affect output regulation. Strictly speaking, the above equation defines RFB not as an absolute value, but as a ratio of RREF. So, the next question is, “What is the proper value for RREF?” The answer is that RREF should be approximately 6.04k. The LT3573 is trimmed and specified using this value of RREF. If the impedance of RREF varies considerably from 6.04k, additional errors will result. However, a variation in RREF of several percent is acceptable. This yields a bit of freedom in selecting standard 1% resistor values to yield nominal RFB /RREF ratios. Tables 1-4 are useful for selecting the resistor values for RREF and RFB with no equations. The tables provide RFB, RREF and RTC values for common output voltages and common winding ratios. Table 1. Common Resistor Values for 1:1 Transformers VOUT (V) NPS RFB (kΩ) RREF (kΩ) RTC (kΩ) 3.3 1.00 18.7 6.04 19.1 5 1.00 27.4 6.04 28 12 1.00 64.9 6.04 66.5 15 1.00 80.6 6.04 80.6 20 1.00 107 6.04 105 3573fd For more information www.linear.com/LT3573 9 LT3573 APPLICATIONS INFORMATION relatively constant maximum output current regardless of input voltage. This is due to the continuous nonswitching behavior of the two currents. A flyback converter has both discontinuous input and output currents which makes it similar to a nonisolated buck-boost. The duty cycle will affect the input and output currents, making it hard to predict output power. In addition, the winding ratio can be changed to multiply the output current at the expense of a higher switch voltage. Table 2. Common Resistor Values for 2:1 Transformers NPS RFB (kΩ) RREF (kΩ) RTC (kΩ) 3.3 2.00 5 2.00 37.4 6.04 18.7 56 6.04 28 12 2.00 130 6.04 66.5 15 2.00 162 6.04 80.6 Table 3. Common Resistor Values for 3:1 Transformers VOUT (V) NPS RFB (kΩ) RREF (kΩ) RTC (kΩ) 3.3 3.00 56.2 6.04 20 5 3.00 80.6 6.04 28.7 10 3.00 165 6.04 54.9 The graphs in Figures 1-3 show the maximum output power possible for the output voltages 3.3V, 5V, and 12V. The maximum power output curve is the calculated output power if the switch voltage is 50V during the off-time. To achieve this power level at a given input, a winding ratio value must be calculated to stress the switch to 50V, resulting in some odd ratio values. The curves below are examples of common winding ratio values and the amount of output power at given input voltages. Table 4. Common Resistor Values for 4:1 Transformers VOUT (V) NPS RFB (kΩ) RREF (kΩ) RTC (kΩ) 3.3 4.00 5 4.00 76.8 6.04 19.1 113 6.04 28 Output Power One design example would be a 5V output converter with a minimum input voltage of 20V and a maximum input voltage of 30V. A three-to-one winding ratio fits this design example perfectly and outputs close to six watts at 30V but lowers to five watts at 20V. A flyback converter has a complicated relationship between the input and output current compared to a buck or a boost. A boost has a relatively constant maximum input current regardless of input voltage and a buck has a 8 7 6 N = 7:1 N = 10:1 5 N = 4:1 4 N = 3:1 3 2 1 0 8 MAXIMUM OUTPUT POWER N = 5:1 7 OUTPUT POWER (W) OUTPUT POWER (W) 8 MAXIMUM OUTPUT POWER 6 5 N = 7:1 N = 3:1 4 N = 2:1 3 2 5 10 15 20 25 INPUT VOLTAGE (V) 30 35 40 3573 F01 Figure 1. Output Power for 3.3V Output 0 6 N = 3:1 5 N = 1:1 4 3 2 1 1 0 MAXIMUM OUTPUT POWER N = 2:1 7 OUTPUT POWER (W) VOUT (V) 0 5 10 15 20 25 30 INPUT VOLTAGE (V) 35 40 45 3573 F02 Figure 2. Output Power for 5V Output 0 0 5 10 15 20 25 30 INPUT VOLTAGE (V) 35 40 45 3573 F03 Figure 3. Output Power for 12V Output 3573fd 10 For more information www.linear.com/LT3573 LT3573 APPLICATIONS INFORMATION TRANSFORMER DESIGN CONSIDERATIONS Transformer specification and design is perhaps the most critical part of successfully applying the LT3573. In addition to the usual list of caveats dealing with high frequency isolated power supply transformer design, the following information should be carefully considered. Linear Technology has worked with several leading magnetic component manufacturers to produce pre-designed flyback transformers for use with the LT3573. Table 5 shows the details of several of these transformers. Table 5. Predesigned Transformers—Typical Specifications, Unless Otherwise Noted TRANSFORMER PART NUMBER PA2362NL SIZE (W × L × H) (mm) LPRI (µH) LLEAKAGE (nH) NP:NS:NB RPRI (mΩ) RSEC (mΩ) VENDOR TARGET APPLICATIONS 15.24 × 13.1 × 11.45 24 550 4:1:1 117 9.5 Pulse Engineering 24V→3.3V, 1.5A PA2454NL 15.24 × 13.1 × 11.45 24 430 3:1:1 82 11 Pulse Engineering 24V→5V, 1A PA2455NL 15.24 × 13.1 × 11.45 25 450 2:1:1 82 22 Pulse Engineering 24V→12V, 0.5A PA2456NL 15.24 × 13.1 × 11.45 25 390 1:1:1 82 84 Pulse Engineering 12V→12V, 0.3A 24V→12V, 0.4A 36V→5V, 0.6A PA2617NL 12.70 × 10.67 × 9.14 21 245 1:1:0.33 164 166 Pulse Engineering 24V→15V, 0.4A PA2626NL 12.70 × 10.67 × 9.14 30 403 3:1:1 240 66 Pulse Engineering 24V→5V, 1A PA2627NL 15.24 × 13.1 × 11.45 50 766 3:1:1 420 44 Pulse Engineering 24V→5V, 1A GA3429-BL 15.24 × 12.7 × 11.43 25 566 4:1:1 95 7.5 Coilcraft 24V→3.3V, 1.5A 750310471 15.24 × 13.3 × 11.43 25 350 3:1:1 57 11 Würth Elektronik 24V→5V, 1A 750310559 15.24 × 13.3 × 11.43 24 400 4:1:1 51 16 Würth Elektronik 24V→3.3V, 1.5A 750310562 15.24 × 13.3 × 11.43 25 330 2:1:1 60 20 Würth Elektronik 24V→12V, 0.5A 750310563 15.24 × 13.3 × 11.43 25 325 1:1:0.5 60 60 Würth Elektronik 12V→12V, 0.3A 24V→12V, 0.4A 36V→5V, 0.6A 750310564 15.24 × 13.3 × 11.43 63 450 3:1:1 115 50 Würth Elektronik 24V→±5V, 0.5A 750310799 9.14 × 9.78 × 10.54 25 125 1:1:0.33 60 74 Würth Elektronik 24V→15V, 0.4A 750370040 9.14 × 9.78 × 10.54 30 150 3:1:1 60 12.5 Würth Elektronik 24V→5V, 1A 750370041 9.14 × 9.78 × 10.54 50 450 3:1:1 190 26 Würth Elektronik 24V→5V, 1A 750370047 13.35 × 10.8 × 9.14 30 150 3:1:1 60 12.5 Würth Elektronik 24V→5V, 1A 750311681 17.75 × 13.46 × 12.70 100 3000 1:10 220 28500 Würth Elektronik 12V→300V, 5mA L11-0059 9.52 × 9.52 × 4.95 24 3:1 266 266 BH Electronics 24V→5V, 1A L10-1019 9.52 × 9.52 × 4.95 18 1:1 90 90 BH Electronics 5V→5V, 0.2A 3573fd For more information www.linear.com/LT3573 11 LT3573 APPLICATIONS INFORMATION Turns Ratio Leakage Inductance Note that when using an RFB /RREF resistor ratio to set output voltage, the user has relative freedom in selecting a transformer turns ratio to suit a given application. In contrast, simpler ratios of small integers, e.g., 1:1, 2:1, 3:2, etc., can be employed to provide more freedom in setting total turns and mutual inductance. Transformer leakage inductance (on either the primary or secondary) causes a voltage spike to appear at the primary after the output switch turns off. This spike is increasingly prominent at higher load currents where more stored energy must be dissipated. In most cases, a snubber circuit will be required to avoid overvoltage breakdown at the output switch node. Transformer leakage inductance should be minimized. Typically, the transformer turns ratio is chosen to maximize available output power. For low output voltages (3.3V or 5V), a N:1 turns ratio can be used with multiple primary windings relative to the secondary to maximize the transformer’s current gain (and output power). However, remember that the SW pin sees a voltage that is equal to the maximum input supply voltage plus the output voltage multiplied by the turns ratio. This quantity needs to remain below the ABS MAX rating of the SW pin to prevent breakdown of the internal power switch. Together these conditions place an upper limit on the turns ratio, N, for a given application. Choose a turns ratio low enough to ensure: N< 50V – VIN(MAX) VOUT + VF For larger N:1 values, a transformer with a larger physical size is needed to deliver additional current and provide a large enough inductance value to ensure that the off-time is long enough to accurately measure the output voltage. For lower output power levels, a 1:1 or 1:N transformer can be chosen for the absolute smallest transformer size. A 1:N transformer will minimize the magnetizing inductance (and minimize size), but will also limit the available output power. A higher 1:N turns ratio makes it possible to have very high output voltages without exceeding the breakdown voltage of the internal power switch. Linear Technology has worked with several magnetic component manufacturers to produce predesigned flyback transformers for use with the LT3573. Table 5 shows the details of several of these transformers. An RCD (resistor capacitor diode) clamp, shown in Figure 4, is required for most designs to prevent the leakage inductance spike from exceeding the breakdown voltage of the power device. The flyback waveform is depicted in Figure 5. In most applications, there will be a very fast voltage spike caused by a slow clamp diode that may not exceed 60V. Once the diode clamps, the leakage inductance current is absorbed by the clamp capacitor. This period should not last longer than 150ns so as not to interfere with the output regulation, and the voltage during this clamp period must not exceed 55V. The clamp diode turns off after the leakage inductance energy is absorbed and the switch voltage is then equal to: VSW(MAX) = VIN(MAX) + N(VOUT + VF) This voltage must not exceed 50V. This same equation also determines the maximum turns ratio. When choosing the snubber network diode, careful attention must be paid to maximum voltage seen by the SW pin. Schottky diodes are typically the best choice to be used in the snubber, but some PN diodes can be used if they turn on fast enough to limit the leakage inductance spike. The leakage spike must always be kept below 60V. Figures 6 and 7 show the SW pin waveform for a 24VIN, 5VOUT application at a 1A load current. Notice that the leakage spike is very high (more than 65V) with the “bad” diode, while the “good” diode effectively limits the spike to less than 55V. 3573fd 12 For more information www.linear.com/LT3573 LT3573 APPLICATIONS INFORMATION LS – + VSW < 60V C R < 55V < 50V D t OFF > 350ns tSP 3573 F04 Figure 4. RCD Clamp 3573 F05 TIME Figure 5. Maximum Voltages for SW Pin Flyback Waveform 10V/DIV 10V/DIV 100ns/DIV 3573 F06 Figure 6. Good Snubber Diode Limits SW Pin Voltage 100ns/DIV 3573 F07 Figure 7. Bad Snubber Diode Does Not Limit SW Pin Voltage 3573fd For more information www.linear.com/LT3573 13 LT3573 APPLICATIONS INFORMATION Secondary Leakage Inductance In addition to the previously described effects of leakage inductance in general, leakage inductance on the secondary in particular exhibits an additional phenomenon. It forms an inductive divider on the transformer secondary that effectively reduces the size of the primary-referred flyback pulse used for feedback. This will increase the output voltage target by a similar percentage. Note that unlike leakage spike behavior, this phenomenon is load independent. To the extent that the secondary leakage inductance is a constant percentage of mutual inductance (over manufacturing variations), this can be accommodated by adjusting the RFB /RREF resistor ratio. The Switch Current Limit vs RILIM plot in the Typical Performance Characteristics section depicts a more accurate current limit. Undervoltage Lockout (UVLO) The SHDN/UVLO pin is connected to a resistive voltage divider connected to VIN as shown in Figure 8. The voltage threshold on the SHDN/UVLO pin for VIN rising is 1.22V. To introduce hysteresis, the LT3573 draws 2.5µA from the SHDN/UVLO pin when the pin is below 1.22V. The hysteresis is therefore user-adjustable and depends on the value of R1. The UVLO threshold for VIN rising is: VIN(UVLO,RISING) = 1.22V •(R1+R2) + 2.5µA •R1 R2 Winding Resistance Effects Resistance in either the primary or secondary will reduce overall efficiency (POUT /PIN). Good output voltage regulation will be maintained independent of winding resistance due to the boundary mode operation of the LT3573. The UVLO threshold for VIN falling is: Bifilar Winding A bifilar, or similar winding technique, is a good way to minimize troublesome leakage inductances. However, remember that this will also increase primary-to-secondary capacitance and limit the primary-to-secondary breakdown voltage, so, bifilar winding is not always practical. The Linear Technology applications group is available and extremely qualified to assist in the selection and/or design of the transformer. VIN(UVLO,FALLING) = To implement external run/stop control, connect a small NMOS to the UVLO pin, as shown in Figure 8. Turning the NMOS on grounds the UVLO pin and prevents the LT3573 from operating, and the part will draw less than a 1µA of quiescent current. VIN R1 SHDN/UVLO Setting the Current Limit Resistor R2 LT3573 The maximum current limit can be set by placing a resistor between the RILIM pin and ground. This provides some flexibility in picking standard off-the-shelf transformers that may be rated for less current than the LT3573’s internal power switch current limit. If the maximum current limit is needed, use a 10k resistor. For lower current limits, the following equation sets the approximate current limit: 1.22V •(R1+R2) R2 RUN/STOP CONTROL (OPTIONAL) GND 3573 F08 Figure 8. Undervoltage Lockout (UVLO) 3 RILIM = 65 •10 (1.6A −ILIM )+10k 3573fd 14 For more information www.linear.com/LT3573 LT3573 APPLICATIONS INFORMATION Minimum Load Requirement The LT3573 obtains output voltage information through the transformer while the secondary winding is conducting current. During this time, the output voltage (multiplied times the turns ratio) is presented to the primary side of the transformer. The LT3573 uses this reflected signal to regulate the output voltage. This means that the LT3573 must turn on every so often to sample the output voltage, which delivers a small amount of energy to the output. This sampling places a minimum load requirement on the output of 1% to 2% of the maximum load. BIAS Pin Considerations For applications with an input voltage less than 15V, the BIAS pin is typically connected directly to the VIN pin. For input voltages greater than 15V, it is preferred to leave the BIAS pin separate form the VIN pin. In this condition, the BIAS pin is regulated with an internal LDO to a voltage of 3V. By keeping the BIAS pin separate from the input voltage at high input voltages, the physical size of the capacitors can be minimized (the BIAS pin can then use a 6.3V or 10V rated capacitor). If too large of an RC value is used, the part will be more susceptible to high frequency noise and jitter. If too small of an RC value is used, the transient performance will suffer. The value choice for CC is somewhat the inverse of the RC choice: if too small a CC value is used, the loop may be unstable, and if too large a CC value is used, the transient performance will also suffer. Transient response plays an important role for any DC/DC converter. Design Example The following example illustrates the converter design process using LT3573. Given the input voltage of 20V to 28V, the required output is 5V, 1A. VIN(MIN) = 20V, VIN(MAX) = 28V, VOUT = 5V, VF = 0.5V and IOUT = 1A 1.Select the transformer turns ratio to accommodate the output. The output voltage is reflected to the primary side by a factor of turns ratio N. The switch voltage stress VSW is expressed as: Overdriving the BIAS Pin with a Third Winding The LT3573 provides excellent output voltage regulation without the need for an opto-coupler, or third winding, but for some applications with higher input voltages (>20V), it may be desirable to add an additional winding (often called a third winding) to improve the system efficiency. For proper operation of the LT3573, if a winding is used as a supply for the BIAS pin, ensure that the BIAS pin voltage is at least 3.15V and always less than the input voltage. For a typical 24VIN application, overdriving the BIAS pin will improve the efficiency gain 4-5%. N= VSW(MAX) = VIN +N(VOUT + VF ) < 50V Or rearranged to: N< 50 − VIN(MAX) (VOUT + VF ) On the other hand, the primary-side current is multiplied by the same factor of N. The converter output capability is: Loop Compensation The LT3573 is compensated using an external resistor-capacitor network on the VC pin. Typical values are in the range of RC = 50k and CC = 1nF (see the numerous schematics in the Typical Applications section for other possible values). NP 1 NS IOUT(MAX) = 0.8 •(1−D)• D= 1 NIPK 2 N(VOUT + VF ) VIN +N(VOUT + VF ) 3573fd For more information www.linear.com/LT3573 15 LT3573 APPLICATIONS INFORMATION The transformer turns ratio is selected such that the converter has adequate current capability and a switch stress below 50V. Table 6 shows the switch voltage stress and output current capability at different transformer turns ratio. Table 6. Switch Voltage Stress and Output Current Capability vs Turns-Ratio N VSW(MAX) AT VIN(MAX) (V) IOUT(MAX) AT VIN(MIN) (A) DUTY CYCLE (%) 1:1 33.5 0.39 16~22 2:1 39 0.65 28~35 3:1 44.5 0.825 37~45 4:1 50 0.96 44~52 BIAS winding turns ratio is selected to program the BIAS voltage to 3V~5V. The BIAS voltage shall not exceed the input voltage. The turns ratio is then selected as primary: secondary: BIAS = 3:1:1. 2.Select the transformer primary inductance for target switching frequency. The LT3573 requires a minimum amount of time to sample the output voltage during the off-time. This off-time, tOFF(MIN), shall be greater than 350ns over all operating conditions. The converter also has a minimum current limit, LMIN, of 250mA to help create this off-time. This defines the minimum required inductance as defined as: LMIN = N(VOUT + VF ) • tOFF(MIN) IMIN The transformer primary inductance also affects the switching frequency which is related to the output ripple. If above the minimum inductance, the transformer’s primary inductance may be selected for a target switching frequency range in order to minimize the output ripple. The following equation estimates the switching frequency. fSW = 1 1 = I IPK tON + tOFF PK + VIN NPS (VOUT + VF ) L L Table 7.Switching Frequency at Different Primary Inductance at IPK L (µH) fSW AT VIN(MIN) (kHz) fSW AT VIN(MAX) (kHz) 25 236 305 50 121 157 100 61 80 Note: The switching frequency is calculated at maximum output. In this design example, the minimum primary inductance is used to achieve a nominal switching frequency of 275kHz at full load. The PA2454NL from Pulse Engineering is chosen as the flyback transformer. Given the turns ratio and primary inductance, a customized transformer can be designed by magnetic component manufacturer or a multi-winding transformer such as a Coiltronics Versa-Pac may be used. 3.Select the output diodes and output capacitor. The output diode voltage stress VD is the summation of the output voltage and reflection of input voltage to the secondary side. The average diode current is the load current. VD = VOUT + VIN N The output capacitor should be chosen to minimize the output voltage ripple while considering the increase in size and cost of a larger capacitor. The following equation calculates the output voltage ripple. LI 2PK DVMAX = 2CVOUT 4.Select the snubber circuit to clamp the switch voltage spike. A flyback converter generates a voltage spike during switch turn-off due to the leakage inductance of the transformer. In order to clamp the voltage spike below the maximum rating of the switch, a snubber circuit is used. There are many types of snubber circuits, for example R-C, R-C-D and 3573fd 16 For more information www.linear.com/LT3573 LT3573 APPLICATIONS INFORMATION Zener clamps. Among them, RCD is widely used. Figure 9 shows the RCD snubber in a flyback converter. RTC resistor for temperature compensation of the output voltage. RREF is selected as 6.04k. A typical switch node waveform is shown in Figure 10. A small capacitor in parallel with RREF filters out the noise during the voltage spike, however, the capacitor should limit to 10pF. A large capacitor causes distortion on voltage sensing. During switch turn-off, the energy stored in the leakage inductance is transferred to the snubber capacitor, and eventually dissipated in the snubber resistor. V (V −N• VOUT ) 1 2 LS I PK fSW = C C R 2 The snubber resistor affects the spike amplitude VC and duration tSP, the snubber resistor is adjusted such that tSP is about 150ns. Prolonged tSP may cause distortion to the output voltage sensing. The previous steps finish the flyback power stage design. 5.Select the feedback resistor for proper output voltage. Using the resistor Tables 1-4, select the feedback resistor RFB, and program the output voltage to 5V. Adjust the 6.Optimize the compensation network to improve the transient performance. The transient performance is optimized by adjusting the compensation network. For best ripple performance, select a compensation capacitor not less than 1nF, and select a compensation resistor not greater than 50k. 7.Current limit resistor, soft-start capacitor and UVLO resistor divider Use the current limit resistor RLIM to lower the current limit if a compact transformer design is required. Soft-start capacitor helps during the start-up of the flyback converter. Select the UVLO resistor divider for intended input operation range. These equations are aforementioned. LS – + C R VC NVOUT D VIN tSP 3573 F10 3573 F09 Figure 9. RCD Snubber in a Flyback Converter Figure 10. Typical Switch Node Waveform 3573fd For more information www.linear.com/LT3573 17 LT3573 TYPICAL APPLICATIONS Low Input Voltage 5V Isolated Flyback Converter VIN 5V D1 3:1 C1 10µF R1 200k C6 0.22µF VIN R8 T1 2k 24µH 2.6µH SHDN/UVLO R2 90.9k LT3573 RFB RREF R3 80.6k VOUT+ 5V, 350mA C5 47µF VOUT– D2 R4 6.04k TC SW RILIM SS VC R6 28.7k R5 10k GND TEST BIAS R7 57.6k C3 1000pF C2 10nF VIN 3573 TA02 T1: PULSE PA2454NL OR WÜRTH ELEKTRONIK 750310471 D1: B340A D2: PMEG6010 C5: MURATA, GRM32ER71A476K ±12V Isolated Flyback Converter VIN 5V D1 2:1:1 C1 10µF R1 200k C6 0.22µF VIN R8 T1 2k 43.6µH 10.9µH SHDN/UVLO R2 90.9k LT3573 RFB RREF R3 118k D2 D3 10.9µH R4 6.04k TC VOUT1+ 12V, 100mA C5 47µF VOUT 1– VOUT2+ C6 47µF VOUT 2– –12V, 100mA SW RILIM SS VC R6 59k R5 10k C2 10nF GND TEST BIAS R7 56.2k C3 3300pF VIN T1: COILTRONICS VPH1-0076-R D1, D2: B240A D3: PMEG6010 C5, C6: MURATA, GRM32ER71A476K 3573 TA03 3573fd 18 For more information www.linear.com/LT3573 LT3573 TYPICAL APPLICATIONS 5V Isolated Flyback Converter VIN 12V TO 24V (*30V) 3:1:1 C1 10µF R1 499k C6 0.22µF VIN R2 71.5k R8 T1 2k 24µH D1 2.6µH VOUT + 5V, 700mA C5 47µF SHDN/UVLO LT3573 R3 80.6k RFB RREF VOUT – D3 R4 6.04k TC RILIM SW SS VC R6 28.7k R5 10k GND TEST BIAS D2 R7 45.3k C2 10nF C4 4.7µF C3 1000pF L1C 2.6µH *OPTIONAL THIRD WINDING FOR 30V OPERATION 3573 TA04 T1: PULSE PA2454NL OR WÜRTH ELEKTRONIK 750370047 D1: B340A D3: PMEG6010 C5: MURATA, GRM32ER71A476K Efficiency 90 VIN = 24V 80 EFFICIENCY (%) 70 VIN = 12V 60 50 40 30 20 10 0 0 200 400 600 800 1000 1200 1400 IOUT (mA) 3573 TA04b 3573fd For more information www.linear.com/LT3573 19 LT3573 TYPICAL APPLICATIONS 3.3V Isolated Flyback Converter VIN 12V TO 24V (*30V) 4:1:1 C1 10µF R1 499k C6 0.22µF VIN R8 T1 2k 24µH D1 1.5µH VOUT + 3.3V, 1A C5 47µF SHDN/UVLO R2 71.5k LT3573 R3 76.8k RFB RREF VOUT – D3 R4 6.04k TC RILIM SW SS GND TEST BIAS VC R6 19.1k R5 10k D2 R7 25.5k C3 1500pF C2 10nF C4 4.7µF L1C 1.5µH *OPTIONAL THIRD WINDING FOR 30V OPERATION 3573 TA05 T1: PULSE PA2362NL OR COILCRAFT GA3429-BL D1: B340A D3: PMEG6010 12V Isolated Flyback Converter VIN 5V 3:1 C1 10µF R1 499k R2 71.5k SHDN/UVLO C6 0.22µF VIN LT3573 RFB RREF TC RILIM SS VC R6 59k R5 10k C2 10nF 3573 TA06 R3 178k R8 T1 2k 58.5µH D2 D1 6.5µH VOUT 12V, 400mA C5 47µF VOUT– R4 6.04k SW GND TEST BIAS R7 40.2k C3 4700pF VIN T1: COILTRONICS VP1-0102-R D1: B340A D2: PMEG6010 3573fd 20 For more information www.linear.com/LT3573 LT3573 TYPICAL APPLICATIONS Four Output 12V Isolated Flyback Converter VIN 12V TO 24V D1 2:1:1:1:1 C1 10µF R1 499k C6 0.22µF VIN LT3573 RFB RREF TC VC C2 10nF R3 118k VOUT2+ 12V, 60mA VOUT 2– D3 R4 6.04k VOUT3+ 12V, 60mA C7 47µF VOUT 3– 10.9µH GND TEST BIAS R7 20k C3 0.01µF C6 47µF 10.9µH SW SS R5 10k VOUT 1– D5 RILIM R6 59k C5 47µF 10.9µH D2 SHDN/UVLO R2 71.5k T1 R8 2k 43.6µH VOUT1+ 12V, 60mA D4 VIN VOUT4+ 12V, 60mA C8 47µF 10.9µH VOUT 4– T1: COILTRONICS VPH1-0076-R D1-D4: B240A D5: PMEG6010 3573 TA07 5V Isolated Flyback Converter Using a Tiny Transformer VIN 12V 3:1 C1 10µF R1 200k R2 90.9k SHDN/UVLO C6 0.22µF VIN LT3573 RFB RREF TC RILIM SS VC R6 28.7k R5 30k C2 10nF 3573 TA08 R8 2k R3 80.6k D2 T1 20µH D1 2.2µH VOUT 5V, 600mA C5 47µF VOUT– R4 6.04k SW GND TEST BIAS R7 47.5k C3 1000pF VIN T1: BH ELECTRONICS L11-0059 D1: B340A D2: PMEG6010 3573fd For more information www.linear.com/LT3573 21 LT3573 TYPICAL APPLICATIONS 5V Isolated Flyback Converter Using Coupling Inductor VIN 5V 1:1 C1 10µF R1 200k R2 90.9k C6 0.22µF VIN SHDN/UVLO LT3573 RFB RREF TC RILIM SS VC R6 26.1k R5 10k C2 10nF 3573 TA09 R8 T1 2k 23.6µH R3 26.1k D2 D1 23.6µH VOUT+ 5V, 0.2A C5 47µF VOUT– R4 6.04k SW GND TEST BIAS R7 56.2k C3 1500pF VIN T1: BH ELECTRONICS, L10-1022 D1: B220A D2: CMD5H-3 3573fd 22 For more information www.linear.com/LT3573 LT3573 TYPICAL APPLICATIONS 300V Isolated Flyback Converter VIN 6V TO 15V 1:10 C1 10µF R1 100k C6 0.22µF VIN SHDN/UVLO R2 36k LT3573 RFB RREF TC RILIM SS VC R6 20.5k R5 10k C2 10nF 3573 TA10 R8 1k C8 100pF R3 150k D2 T1 100µH D1 VOUT+ 300V, 5mA 1M C5, 500V, 0.056µF ×4 VOUT– R4 6.04k SW GND TEST BIAS R7 25k C3 2200pF VIN T1: WÜRTH ELEKTRONIK 750311681 D1: CMMRIF-06 D2: CMMSHI-60 3573fd For more information www.linear.com/LT3573 23 LT3573 PACKAGE DESCRIPTION MSE Package 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev A) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ± 0.102 (.112 ± .004) 5.23 (.206) MIN 2.845 ± 0.102 (.112 ± .004) 0.889 ± 0.127 (.035 ± .005) 8 1 1.651 ± 0.102 (.065 ± .004) 1.651 ± 0.102 3.20 – 3.45 (.065 ± .004) (.126 – .136) 0.305 ± 0.038 (.0120 ± .0015) TYP 16 0.50 (.0197) BSC 4.039 ± 0.102 (.159 ± .004) (NOTE 3) RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 9 NO MEASUREMENT PURPOSE 0.280 ± 0.076 (.011 ± .003) REF 16151413121110 9 DETAIL “A” 0° – 6° TYP 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP 1234567 8 0.50 (.0197) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.86 (.034) REF 0.1016 ± 0.0508 (.004 ± .002) MSOP (MSE16) 0608 REV A 3573fd 24 For more information www.linear.com/LT3573 LT3573 REVISION HISTORY REV DATE DESCRIPTION B 10/09 Replaced Figure 1 (Revision history begins at Rev B) PAGE NUMBER 10 Updated Typical Applications drawings C D 07/10 12/13 18, 21, 22 Added patent numbers and revised Typical Application drawing 1 Revised D1 on Block Diagram 6 Revised Table 5 11 Revised Figure 4 in Applications Information section 13 Revised all drawings in Typical Applications section 18-23 Replaced Related Parts list 26 Added reference to Note 1 2 Changed flyback error amp input to 1.23V 6 Changed Table 6 IOUT(MAX) 16 Changed VIN(MAX) from 40V to 30V 20 3573fd Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT3573 25 LT3573 TYPICAL APPLICATION 9V to 30VIN, +5V/–5VOUT Isolated Flyback Converter T1 3:1:1:1 VIN 9V TO 30V C1 10µF R1 357k SHDN/UVLO R2 51.1k LT3573 RFB C5 47µF COM C6 47µF D2 VOUT – –5V, 350mA R4 6.04k TC SW SS VC C2 10nF VOUT + +5V, 350mA L1B 7µH L1C 7µH R3 80.6k RILIM R6 10k L1A 63µH D4 RREF R5 28.7k R8 2k C6 0.22µF VIN D1 GND TEST BIAS R7 23.7k C3 2700pF D3 C4 4.7µF *OPTIONAL THIRD WINDING FOR >24V OPERATION L1D 7µH T1: WÜRTH ELEKTRONIK 750310564 3573 TA11 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT8300 100VIN Micropower Isolated Flyback Converter with 150V/260mA Switch Low IQ Monolithic No-Opto Flybacks, 5-Lead TSOT23 LT3574/LT3575 40V Isolated Flyback Converters Monolithic No-Opto Flybacks with Integrated 0.65A/2.5A Switch LT3511/LT3512 100V Isolated Flyback Converters Monolithic No-Opto Flybacks with Integrated 240mA/420mA Switch, MSOP-16(12) LT3748 100V Isolated Flyback Controller 5V ≤ VIN ≤ 100V, No-Opto Flyback, MSOP-16(12) LT3798 Off-Line Isolated No-Opto Flyback Controller with Active PFC VIN and VOUT Limited Only by External Components LT3757A/LT3759 LT3758 40V/100V Flyback/Boost Controllers Universal Controllers with Small Package and Powerful Gate Drive LT3957/LT3958 40V/80V Boost/Flyback Converters Monolithic with Integrated 5A/3.3A Switch LTC®3803/LTC3803-3 200kHz/300kHz Flyback Controller in SOT-23 LTC3803-5 VIN and VOUT Limited Only by External Components LTC3805/LTC3805-5 VIN and VOUT Limited Only by External Components Adjustable Frequency Flyback Controllers 3573fd 26 Linear Technology Corporation LT 1213 REV D • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● For more information www.linear.com/LT3573 www.linear.com/LT3573 LINEAR TECHNOLOGY CORPORATION 2008