NCP57152 D

NCP57152, NCV57152
1.5 A, Very Low-Dropout
(VLDO) Fast Transient
Response Regulator
The NCP57152 is a high precision, very low dropout (VLDO), low
minimum input voltage and low ground current positive voltage
regulator that is capable of providing an output current in excess of
1.5 A with a typical dropout voltage of 330 mV at 1.5 A load current
and input voltage from 1.8 V and up. The devices are stable with
ceramic output capacitors.
The device can withstand up to 18 V max input voltage.
Internal protection features consist of output current limiting,
built−in thermal shutdown and reverse output current protection.
Logic level enable and error flag pins are available.
The NCP57152 is an Adjustable Voltage device and is available in
D2PAK−5 and DFN8 packages.
http://onsemi.com
MARKING
DIAGRAMS
TAB
y
57152
AWLYWWG
1
5
D2PAK
CASE 936A
1
EN
VIN
GND
VOUT
ADJ
Features
 Output Current in Excess of 1.5 A
 Minimum Operating Input Voltage 1.8 V for Full 1.5 A Output










Current
330 mV Typical Dropout Voltage at 1.5 A
Adjustable Output Voltage Range from 1.24 V to 13 V
Low Ground Current
Fast Transient Response
Stable with Ceramic Output Capacitor
Logic Compatible Enable and Error Flag Pins
Current Limit, Reverse Current and Thermal Shutdown Protection
Operation up to 13.5 V Input Voltage
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
Consumer and Industrial Equipment Point of Regulation
Servers and Networking Equipment
FPGA, DSP and Logic Power Supplies
Switching Power Supply Post Regulation
Battery Chargers
Functional Replacement for Industry Standard MIC29150,
MIC39150, MIC37150 with Improved Minimum Input Voltage
Specification
 Semiconductor Components Industries, LLC, 2013
May, 2013 − Rev. 1
DFN8
CASE 488AF
y
A
WL, L
Y
WW, W
G, G
NCy57
152
ALYWG
G
= P (NCP), V (NCV)
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(*Note: Microdot may be in either location)
ORDERING INFORMATION
Applications






1
1
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
Publication Order Number:
NCP57152/D
NCP57152, NCV57152
TYPICAL APPLICATIONS
NCP57152
VIN
+
CIN
VIN
VOUT
EN
ADJ
VOUT = 1.3 V
R1
GND
R2
NCP57152
VIN
+
+
COUT
47 mF, Ceramic
CIN
VIN
EN
VOUT
VOUT = 1.3 V
R1
FLAG
ADJ
GND
RFLAG
+
FLAG
COUT
47 mF, Ceramic
R2
Figure 1. Adjustable Regulator
Figure 2. Adjustable Regulator in DFN Package
PIN FUNCTION DESCRIPTION
Pin Number
D2PAK−5
Pin Number
DFN8
Pin Name
1
2
EN
Enable Input: CMOS and TTL logic compatible. Logic high = enable; Logic low = shutdown.
2
3
VIN
Input voltage which supplies both the internal circuitry and the current to the output load.
3
1
GND
Ground
4
6
VOUT
Linear Regulator Output.
5
7
ADJ
Adjustable Regulator Feedback Input.
Connect to output voltage resistor divider central node.
TAB
−
TAB
TAB is connected to ground.
−
8
FLG
Error Flag Open collector output.
Active−low indicates an output fault condition.
−
EP
EXPOSED
PAD
−
4, 5
NC
Pin Function
PAD for removing heat from the device. Must be connected to GND.
Not internally connected.
http://onsemi.com
2
NCP57152, NCV57152
ABSOLUTE MAXIMUM RATINGS
Value
Unit
VIN
Symbol
Supply Voltage
Rating
0 to 18
V
VEN
Enable Input Voltage
0 to 18
V
VFLG
Error Flag Open Collector Output Maximum Voltage
0 to 18
V
VOUT – VIN
Reverse VOUT – VIN Voltage (EN = Shutdown or Vin = 0 V) (Note 1)
0 to 6.5
V
PD
Power Dissipation (Notes 2 and 5)
Internally Limited
TJ
Junction Temperature
−40 v TJ v +125
C
TS
Storage Temperature
−65 v TJ v +150
C
2000
200
V
ESD Rating (Notes 3 and 4)
Human Body Model
Machine Model
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: All voltages are referenced to GND pin unless otherwise noted.
1. The ENABLE pin input voltage must be  0.8 V or Vin must be connected to ground potential.
2. PD(max) = (TJ(max) – TA) / RqJA, where RqJA depends upon the printed circuit board layout.
3. Devices are ESD sensitive. Handling precautions recommended..
4. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model (HBM) tested per AEC−Q100−002 (EIA/JESD22−A114C)
ESD Machine Model (MM) tested per AEC−Q100−003 (EIA/JESD22−A115C)
This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.
5. This protection is not guaranteed outside the Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS (Note 6)
Symbol
Rating
Value
Unit
1.8 to 13.5
V
VIN
Supply Voltage
VEN
Enable Input Voltage
0 to 13.5
V
VFLG
Error Flag Open Collector Voltage
0 to 13.5
V
TJ
Junction Temperature
−40 v TJ v +125
C
6. The device is not guaranteed to function outside it’s Recommended operating conditions.
http://onsemi.com
3
NCP57152, NCV57152
ELECTRICAL CHARACTERISTICS
TJ = 25C with VIN = VOUT nominal + 0.6 V; VEN = VIN; IL = 10 mA; bold values indicate –40C < TJ < +125C, unless noted. (Note 7)
Parameter
Conditions
Min
Typ
Max
Unit
Output Voltage Accuracy
DFN package
IL = 10 mA
−1
1
%
10 mA < IOUT < 1.5 A , VOUT nominal + 0.6  VIN  13.5 V
−2
2
%
Output Voltage Accuracy
D2PAK package
IL = 10 mA
−1.5
1.5
%
10 mA < IOUT < 1.5 A , VOUT nominal + 0.6  VIN  13.5 V
−2.5
2.5
%
Output Voltage Line Regulation
VIN = VOUT nominal + 0.6 V to 13.5 V; IL = 10 mA
0.5
%
Output Voltage Load Regulation
IL = 10 mA to 1.5 A
0.02
0.2
1.0
%
180
295
mV
IL = 750 mA
220
350
mV
IL = 1.0 A (Note 9)
260
410
mV
IL = 1.5 A
330
520
mV
Ground Pin Current (Note 10)
IL = 1.5 A
40
60
80
mA
Ground Pin Current in Shutdown
VEN v 0.5 V
1.0
5.0
mA
Overload Protection Current Limit
VOUT = 0 V
2.0
3.0
A
Start−up Time
VEN = VIN, VOUT nominal = 2.5 V, IOUT = 10 mA,
COUT = 47 mF
100
500
ms
40
200
ms/V
1.240
1.252
1.265
1.259
1.271
V
200
350
nA
VIN – VOUT Dropout Voltage (Note 8) IL = 500 mA (Note 9)
Output Voltage Start−up Slope
Reference Voltage
VEN = VIN, IOUT = 10 mA, COUT = 47 mF (Note 11)
DFN Package
1.228
1.215
1.221
1.209
D2PAK Package
Adjust Pin Bias Current
1.240
100
ENABLE INPUT
Enable Input Signal Levels
Enable Pin Input Current
Regulator Enable
V
1.4
Regulator Shutdown
0.8
V
VEN v 0.8 V (Regulator Shutdown)
2.0
4.0
mA
30
40
mA
1.0
2.0
mA
400
500
mV
6.5 V > VEN w 1.4 V (Regulator enable)
15
FLAG OUTPUT
IFLG(leak)
Voh = 13.5 V, Flag OFF
VFLG(LO)
VIN = 1.8 V, IFLG = 1 mA, Flag ON
VFLG
Low Threshold, % of particular VOUT
210
95
%
Hysteresis, % of particular VOUT
93
2
%
High Threshold, % of particular VOUT
97
99.2
%
7. VOUTnominal can be set by external resistor divider in the application. Tested for VOUTnominal = 1.24 V unless noted.
8. VDO = VIN – VOUT when VOUT decreases to 98% of its nominal output voltage with VIN = VOUT + 1 V. Tested for VOUTnominal = 2.5 V.
9. Guaranteed by design.
10. IIN = IGND + IOUT.
11. Device Start−up Time = Output Voltage Start−up Slope * VOUT nominal.
Package
Conditions / PCB Footprint
D2PAK–5, Junction−to−Case
D2PAK–5, Junction−to−Air
DFN8, Junction−to−Air
Thermal Resistance
RqJC = 2.1C/W
PCB with 100 mm2 2.0 oz Copper Heat Spreading Area
PCB with 500
mm2
2.0 oz Copper Heat Spreading Area
http://onsemi.com
4
RqJA = 52C/W
RqJA = 75C/W
NCP57152, NCV57152
450
450
400
DROPOUT VOLTAGE (mV)
500
400
350
300
250
200
150
100
50
0
0
0.25
OUTPUT VOLTAGE (V)
250
200
150
100
0.50
0.75
1.00
1.25
0
−50 −30
1.50
10
30
50
70
90
110 130
Figure 3. Dropout Voltage vs. Output Current
(VOUTnom = 2.5 V)
Figure 4. Dropout Voltage vs. Temperature
(VOUTnom = 2.5 V, IOUT = 1.5 A)
3.0
0.5 A
2.5
1.0 A
1.0
1.5 A
0.8
0.6
0.4
2.0
10 mA
0.5 A
1.5
1.5 A
1.0
1.0 A
0.5
0.2
1.0 1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
0
2.0
1.9
1.4
1.6
1.8
2.0
2.2
2.4
2.6
SUPPLY VOLTAGE (V)
Figure 5. Dropout Characteristics
(VOUTnom = 1.24 V)
Figure 6. Dropout Characteristics
(VOUTnom = 2.5 V)
25
1.2
GROUND CURRENT (mA)
1.4
20
15
10
5
0
1.0 1.2
SUPPLY VOLTAGE (V)
30
0
−10
TEMPERATURE (C)
10 mA
1.2
GROUND CURRENT (mA)
300
OUTPUT CURRENT (A)
1.4
0
350
50
OUTPUT VOLTAGE (V)
DROPOUT VOLTAGE (mV)
TYPICAL CHARACTERISTICS
0.25
0.50
0.75
1.00
1.25
1.0
0.8
0.6
0.4
0.2
0
1.50
2.8 3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5 5.0
OUTPUT CURRENT (A)
SUPPLY VOLTAGE (V)
Figure 7. Ground Current vs. Output Current
(VOUTnom = 1.24 V)
Figure 8. Ground Current vs. Supply Voltage
(VOUTnom = 1.24 V, IOUT = 10 mA)
http://onsemi.com
5
NCP57152, NCV57152
TYPICAL CHARACTERISTICS
2.5
50
GROUND CURRENT (mA)
GROUND CURRENT (mA)
60
40
30
1.5 A
20
1.0 A
0.5 A
10
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5 5.0
SUPPLY VOLTAGE (V)
Figure 9. Ground Current vs. Supply Voltage
(VOUTnom = 1.24 V)
Figure 10. Ground Current vs. Supply Voltage
(VOUTnom = 2.5 V, IOUT = 10 mA)
1.4
GROUND CURRENT (mA)
1.5 A
50
40
30
1.0 A
20
0.5 A
10
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
1.2
1.0
0.8
0.6
0.4
0.2
0
−50 −30
5.0
−10
10
30
50
70
90
110 130
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
Figure 11. Ground Current vs. Supply Voltage
(VOUTnom = 2.5 V)
Figure 12. Ground Current vs. Temperature
(VOUTnom = 2.5 V, IOUT = 10 mA, VIN = 3.5 V)
18
45
16
40
GROUND CURRENT (mA)
GROUND CURRENT (mA)
GROUND CURRENT (mA)
1.0
SUPPLY VOLTAGE (V)
60
0
1.5
0
5.0
4.5
2.0
14
12
10
8
6
4
35
30
25
20
15
10
5
2
0
−50 −30
−10
10
30
50
70
90
110
0
−50 −30
130
−10
10
30
50
70
90
110 130
TEMPERATURE (C)
TEMPERATURE (C)
Figure 13. Ground Current vs. Temperature
(VOUTnom = 2.5 V, IOUT = 0.75 A, VIN = 3.5 V)
Figure 14. Ground Current vs. Temperature
(VOUTnom = 2.5 V, IOUT = 1.5 A, VIN = 3.5 V)
http://onsemi.com
6
NCP57152, NCV57152
TYPICAL CHARACTERISTICS
2.60
90
70
2.55
PSRR (dB)
OUTPUT VOLTAGE (V)
80
2.50
2.45
60
50
Cout = 47 mF
40
30
Cout = 100 mF
20
10
2.40
−50 −30
−10
10
50
30
70
90
0
130
110
0.01
0.1
1
10
100
1000
TEMPERATURE (C)
FREQUENCY (kHz)
Figure 15. Output Voltage vs. Temperature
(VOUTnom = 2.5 V, IOUT = 10 mA)
Figure 16. PSRR vs. Frequency, Vin = 3.5 V +
200 mVpp Modulation, Vout = 2.5 V, Iout = 0.5 A
80
70
PSRR (dB)
60
50
Cout = 100 mF
40
30
20
Cout = 47 mF
10
0
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 17. PSRR vs. Frequency, Vin = 3.5 V +
200 mVpp Modulation, Vout = 2.5 V, Iout = 1.5 A
10
0.6
Vin = 2.24 V, 25C
Flag Open collector output is ON
8
Vin = 2.24 V, 25C
Flag Open collector output = Logic L
0.5
FLAG VOLTAGE (V)
FLAG CURRENT (mA)
9
7
6
5
4
3
2
0.4
0.3
0.2
0.1
1
0
0
2
4
6
8
10
12
14
16
18
0
20
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
FLAG VOLTAGE (V)
FLAG CURRENT (mA)
Figure 18. Flag Current vs. Flag Voltage
Figure 19. Flag Voltage vs. Flag Current
http://onsemi.com
7
5.0
NCP57152, NCV57152
TYPICAL CHARACTERISTICS
Figure 20. Line Transient Response
Figure 21. Load Transient Response
APPLICATIONS INFORMATION
Output Capacitor and Stability
The NCP57152 device requires an output capacitor for
stable operation. The NCP57152 is designed to operate with
ceramic output capacitors. The recommended output
capacitance value is 47 mF or greater. Such capacitors help
to improve transient response and noise reduction at high
frequency.
The FLG output is overload protected when a short circuit
of the pullup load resistor occurs in the application. This is
guaranteed in the full range of FLG output voltage Max
ratings (see Max Ratings table). Please be aware operation in
this mode is not recommended, power dissipated in the device
can impact on output voltage precision and other device
characteristics.
Input Capacitor
Overcurrent and Reverse Output Current Protection
An input capacitor of 1.0 mF or greater is recommended
when the device is more than 4 inches away from the bulk
supply capacitance, or when the supply is a battery. Small,
surface−mount chip capacitors can be used for the
bypassing. The capacitor should be place within 1 inch of
the device for optimal performance. Larger values will help
to improve ripple rejection by bypassing the input of the
regulator, further improving the integrity of the output
voltage.
The NCP57152 regulator is fully protected from damage
due to output current overload and output short conditions.
When NCP57152 output is overloaded, Output Current
limiting is provided. This limiting is linear; output current
during overload or output short conditions is constant. These
features are advantageous for powering FPGAs and other
ICs having current consumption higher than nominal during
their startup.
Thermal shutdown disables the NCP57152 device when
the die temperature exceeds the maximum safe operating
temperature.
When NCP57152 is disabled and (VOUT – VIN) voltage
difference is less than 6.5 V in the application, the output
structure of these regulators is able to withstand output
voltage (backup battery as example) to be applied without
reverse current flow. Of course the additional current
flowing through the feedback resistor divider needs to be
included in the backup battery discharging calculations.
Minimum Load Current
The NCP57152 regulator is specified between finite
loads. A 5 mA minimum load current is necessary for proper
operation.
Enable Input
NCP57152 regulators also feature an enable input for
on/off control of the device. It’s shutdown state draws “zero”
current from input voltage supply (only microamperes of
leakage). The enable input is TTL/CMOS compatible for
simple logic interface, but can be connected up to VIN.
Adjustable Voltage Design
The NCP/NCV57152 Adjustable voltage Device Output
voltage is set by the ratio of two external resistors as shown
in Figure 22.
The device maintains the voltage at the ADJ pin at 1.24 V
referenced to ground. The current in R2 is then equal to
1.24 V / R2, and the current in R1 is the current in R2 plus
Error Flag
NCP57152 devices in DFN package feature an error flag
circuit that monitors the output voltage and signals an error
condition when the voltage is 5% below the nominal output
voltage. The error flag is an open−collector output that can
sink up to 5 mA typically during a VOUT fault condition.
http://onsemi.com
8
NCP57152, NCV57152
Thermal Considerations
the ADJ pin bias current. The ADJ pin bias current flows
from VOUT through R1 into the ADJ pin.
NCP57152
VIN
VIN
VOUT
VOUT
+
R1
CIN
EN
The power handling capability of the device is limited by
the maximum rated junction temperature (125C). The PD
total power dissipated by the device has two components,
Input to output voltage differential multiplied by Output
current and Input voltage multiplied by GND pin current.
+
COUT
47 mF,
Ceramic
ADJ
GND
P D + ǒV IN * V OUTǓ @ I OUT ) V IN @ I GND
The GND pin current value can be found in Electrical
Characteristics table and in Typical Characteristics graphs.
The Junction temperature TJ is
R2
ǒ
Ǔ
R1
) I ADJ @ R1
R2
Figure 22. Adjustable Voltage Operation
V OUT + 1.24 V @ 1 )
T J + T A ) P D @ R qJA
(eq. 3)
where TA is ambient temperature and RqJA is the Junction to
Ambient Thermal Resistance of the NCP/NCV57152
device mounted on the specific PCB.
To maximize efficiency of the application and minimize
thermal power dissipation of the device it is convenient to
use the Input to output voltage differential as low as possible.
The static typical dropout characteristics for various
output voltage and output current can be found in the Typical
Characteristics graphs.
For the R2 resistor value up to 15 kOhm the IADJ current
impact can be neglected and the R1 resistor value can be
calculated by:
R1 + R2 @ ǒ(V OUTń1.24) * 1Ǔ
(eq. 2)
(eq. 1)
Where VOUT is the desired nominal output voltage.
ORDERING INFORMATION
Device
Output
Current
Output
Voltage
Junction Temp. Range
Package
Shipping†
NCP57152MNADJTYG
1.5 A
ADJ
−40C to +125C
DFN8−4x4
(Pb−Free)
4000 / Tape & Reel
NCV57152MNADJTYG*
1.5 A
ADJ
−40C to +125C
DFN8−4x4
(Pb−Free)
4000 / Tape & Reel
NCP57152DSADJR4G
1.5 A
ADJ
−40C to +125C
D2PAK−5
(Pb−Free)
800 / Tape & Reel
NCV57152DSADJR4G*
1.5 A
ADJ
−40C to +125C
D2PAK−5
(Pb−Free)
800 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and
PPAP Capable.
http://onsemi.com
9
NCP57152, NCV57152
PACKAGE DIMENSIONS
D2PAK 5
CASE 936A−02
ISSUE C
−T−
OPTIONAL
CHAMFER
A
TERMINAL 6
E
U
S
K
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A
AND K.
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 6.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED 0.025
(0.635) MAXIMUM.
V
H
1 2 3 4 5
M
D
0.010 (0.254)
M
T
DIM
A
B
C
D
E
G
H
K
L
M
N
P
R
S
U
V
P
N
G
L
R
C
SOLDERING FOOTPRINT
8.38
0.33
1.702
0.067
10.66
0.42
16.02
0.63
3.05
0.12
SCALE 3:1
5−LEAD D2PAK
http://onsemi.com
10
1.016
0.04
mm Ǔ
ǒinches
INCHES
MIN
MAX
0.386
0.403
0.356
0.368
0.170
0.180
0.026
0.036
0.045
0.055
0.067 BSC
0.539
0.579
0.050 REF
0.000
0.010
0.088
0.102
0.018
0.026
0.058
0.078
5 _ REF
0.116 REF
0.200 MIN
0.250 MIN
MILLIMETERS
MIN
MAX
9.804
10.236
9.042
9.347
4.318
4.572
0.660
0.914
1.143
1.397
1.702 BSC
13.691
14.707
1.270 REF
0.000
0.254
2.235
2.591
0.457
0.660
1.473
1.981
5 _ REF
2.946 REF
5.080 MIN
6.350 MIN
NCP57152, NCV57152
PACKAGE DIMENSIONS
DFN8, 4x4
CASE 488AF
ISSUE C
A
B
D
PIN ONE
REFERENCE
2X
0.15 C
2X
0.10 C
8X
0.08 C
NOTE 4
L1
ÉÉ
ÉÉ
0.15 C
DETAIL A
E
OPTIONAL
CONSTRUCTIONS
EXPOSED Cu
DETAIL B
ÇÇÇÇ
A
(A3)
A1
8
ÇÇÇ
ÉÉÉ
A1
C
ALTERNATE
CONSTRUCTIONS
SEATING
PLANE
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
L1
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20 REF
0.25
0.35
4.00 BSC
1.91
2.21
4.00 BSC
2.09
2.39
0.80 BSC
0.20
−−−
0.30
0.50
−−−
0.15
SOLDERING FOOTPRINT*
ÇÇÇ
Ç
Ç ÇÇ
1
MOLD CMPD
A3
DETAIL B
D2
K
ÇÇ
ÇÇ
ÉÉ
ÉÉ
TOP VIEW
SIDE VIEW
DETAIL A
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. DETAILS A AND B SHOW OPTIONAL
CONSTRUCTIONS FOR TERMINALS.
L
L
8X
L
2.21
4
5
e
8X
0.63
E2
8X
4.30 2.39
b
PACKAGE
OUTLINE
0.10 C A B
0.05 C
NOTE 3
BOTTOM VIEW
8X
0.80
PITCH
0.35
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
http://onsemi.com
11
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP57152/D