NCP102 Low Dropout Linear Regulator Controller The NCP102 is a low dropout linear regulator controller for applications requiring high-current and ultra low dropout voltages. The use of an external N-Channel MOSFET allows the user to adapt the device to a multitude of applications depending on system requirements for current and dropout voltage. An extremely accurate 0.8 V (±2%) reference allows the implementation of sub 1 V voltage supplies. The reference is guaranteed over the complete supply and temperature ranges. Other features of the NCP102 are a dedicated enable input, internally compensated error amplifier and an adjustable soft-start. A minimum drive capability of ±5 mA provides fast transient response. The drive current is internally limited to protect the controller in case of an external MOSFET failure. The NCP102 is packaged in a space saving TSOP-6. http://onsemi.com MARKING DIAGRAM 1 102 A Y W G Features •4.5 V to 13.5 V Supply Voltage Range •0.8 V (±2%) Voltage Reference (Temperature and Process) •Programmable Regulator Output Voltage Down to 0.8 V •Drive Current Capability of > ±5mA •MLCC and POSCAP Compatible •Programmable Soft-Start •Enable Active High •Space Saving TSOP-6 Package •RoHS Compliant Pb-Free Package EN 1 6 VCC GND 2 5 DRV FB 3 4 SOFT-S ORDERING INFORMATION Device VCC 2 Vin GND 6 Cin DRV 5 VOUT RG 3 NCP102SNT1G CCC NCP102 FB SOFT-S 4 CSOFT-S = Device Code = Assembly Location = Year = Work Week = Pb-Free Package (Top View) U1 VCC 1 PIN CONNECTIONS •Desktop and Laptops •Computer Peripherals such as Graphics Cards •Sub 1 V Power Supplies EN 102AYW G G (Note: Microdot may be in either location) Applications CHIP ENABLE 1 6 TSOP-6 (SOT23-6) SN SUFFIX CASE 318G X1 Package Shipping† TSOP-6 (Pb-Free) 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. COUT1 R1 COUT2 CFB R2 Figure 1. Typical Application © Semiconductor Components Industries, LLC, 2008 January, 2008 - Rev. 1 1 Publication Order Number: NCP102/D NCP102 VCC UVLO VCC IEN EN 9.75 V 15 V + 0.8 V VCC ISOFT-S GND SOFT-S 0.8 V FB + 9.75 V 9.75 V DRV Figure 2. Representative Block Diagram PIN FUNCTION DESCRIPTION Pin Symbol Name Description 1 EN 2 GND 3 FB Inverting input of the error amplifier. The output voltage is sampled by means of a resistor divider and ap‐ plied to this pin for regulation. 4 SOFT-S Programmable soft-start. An internal current source charges the capacitor connected to this pin. The softstart period ends once the voltage of the soft-start capacitor reaches 0.8 V. 5 DRV Gate drive for external N-Channel MOSFET. It is also the buffered output of the error amplifier. 6 VCC Power supply voltage input. Operating voltage range is from 4.5 to 13.5 V. A decoupling capacitor to GND should be used. A minimum of 0.1 mF is recommended. Enable Input (Active High). Pull the EN pin below 0.8 V to disable the regulator and enter the standby mode operation. Ground http://onsemi.com 2 NCP102 MAXIMUM RATINGS (TA = 25°C, unless otherwise noted) Rating Symbol Value Unit Main Supply Input Voltage Main Supply Input Current VCC ICC -0.3 to 15 100 V mA Enable Voltage Enable Current VEN IEN -0.3 to 9.75 100 V mA VSOFT-S ISOFT-S -0.3 to 9.75 100 V mA VDRV IDRV -0.3 to 9.75 100 V mA Feedback Voltage Feedback Current VFB IFB -0.3 to 9.75 100 V mA Thermal Resistance, Junction-to-Ambient (0.36 sq in Printed Circuit Copper Clad) (1.0 sq in Printed Circuit Copper Clad) RqJA Soft-Start Voltage Soft-Start Current Drive Voltage Drive Current °C/W 230 200 Power Dissipation (TA = 25°C, 2 oz Cu, 0.36 sq in Printed Circuit Copper Clad) PD 0.4 W Storage Temperature Range Tstg -65 to 150 °C Operating Junction Temperature Range TJ -40 to 125 °C Treflow 260 °C Reflow Temperature 10 seconds Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22-A114 Machine Model (MM) ±200 V per JEDEC standard: JESD22-A115 2. Latch-up current maximum rating: ±100 mA per JEDEC standard: JESD78. http://onsemi.com 3 NCP102 ELECTRICAL CHARACTERISTICS (VCC = 12 V, VEN = 1 V, VDRV = VFB, VSS = open, CCC = 0.1 mF. For typical values TJ = 25°C. For min/max values, TJ = -40°C to 125°C, unless otherwise noted) Parameter Condition Min Typ Max Unit POWER SUPPLY Supply Voltage VCC 4.5 - 13.5 V VCC = 5 V VCC = 12 V ICC1 ICC2 - 1.4 1.8 3.2 3.2 mA VCC Startup Voltage VCC increasing VCC(on) 4.0 4.2 4.5 V VCC Turn Off Voltage VCC decreasing VCC(off) 3.8 4.0 4.4 V VCC Hysteresis VCC(on) - VCC(off) VCC(hys) 0.10 0.24 0.30 V Standby Current VEN = 0 V, VCC = 5 V VEN = 0 V, VCC = 12 V ICC(off1) ICC(off2) - 0.3 0.48 0.8 1.5 mA VFB = 1.0 V IFB -1.0 - 1.0 mA Av 55 70 - dB VFB = VDRV BW - 0.7 - MHz VCC = 12 V, 100 Hz PSRR 50 - - dB Sink Current VDRV = 6 V, VFB = 1 V VDRV = 2.5 V, VCC = 5 V VFB = 1 V IDRV(SNK1) IDRV(SNK2) 5.0 5.0 - - mA Source Current VDRV = 6 V, VFB = 0.6 V VDRV = 2.5 V, VCC = 5 V, VFB = 0.6 V IDRV(SRC1) IDRV(SRC2) 5.0 5.0 - - mA IDRV = 5 mA, VFB = 1 V IDRV = 5 mA, VFB = 0.6 V, VCC = 9.5 V VDRV(low) VDRV(high) 9.0 - 0.5 - V VDRV = 0 V, VFB = 0.6 V VDRV = open, VFB = 0.6 V IDRV(MAX1) IDRV(MAX2) - - 45 40 mA VSOFT-S = 1 V ISOFT-S 3.5 4.5 6.2 mA IEN 5.0 10 15 mA VEN Increasing VEN Decreasing VEN(on) VEN(off) 0.7 0.66 0.8 0.77 0.9 0.88 VEN(on) - VEN(off) VEN(hys) - 35 - mV VCC = 5 V, VCC = 12 V VREF 0.784 0.8 0.816 V Supply Current ERROR AMPLIFIER Input Bias Current Open Loop DC Gain (Note 3) Unity Gain Bandwidth Power Supply Rejection Ratio (Note3) DRIVE Output Voltage Low State High State Drive Current Under Fault Conditions TJ = 25°C SOFT-START Source Current ENABLE Source Current Input Threshold Voltage V On State Off State Threshold Voltage Hysteresis REFERENCE Reference Voltage 3. Guaranteed by design. http://onsemi.com 4 NCP102 4.5 3.00 2.75 2.50 VCC = 12 V 2.25 2.00 4.4 VCC, SUPPLY VOLTAGE (V) ICC, SUPPLY CURRENT (mA) TYPICAL CHARACTERISTICS Operating 1.75 1.50 1.25 1.00 0.75 0.50 Standby 0.25 0 -50 -25 4.3 Start-up Threshold 4.2 4.1 4.0 Minimum Operating 3.9 3.8 3.7 3.6 3.5 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 -50 Figure 3. Supply Current vs. Junction Temperature Phase 144 108 72 40 36 30 0 20 -36 10 -72 0 -108 -10 -20 -144 -180 1 100 1000 80 70 VCC = 12 V, VDRV = 6 V, VFB = 1 V 60 50 40 30 VCC = 5 V, VDRV = 2.5 V, VFB = 1 V 20 10 0 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) Figure 5. Error Amplifier Open Loop Voltage Gain/Phase vs. Frequency Figure 6. Drive Sink Current vs. Junction Temperature 30 28 25 23 20 18 15 13 10 8 5 3 0 -50 10 90 f, FREQUENCY (kHz) IDRV(MAX), MAXIMUM DRIVE CURRENT (mA) IDRV(SRC), DRIVE SOURCE CURRENT (mA) 0.1 PHASE (°) 50 IDRV(SNK), DRIVE SINK CURRENT (mA) AVOL, OPEN LOOP VOLTAGE GAIN (dB) TJ = 25°C VCC = 5 V Gain VCC = 12 V, VFB = 0.6 V VCC = 5 V, VFB = 0.6 V -25 0 25 50 75 100 125 150 100 180 60 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) Figure 4. Supply Voltage Thresholds vs. Junction Temperature 80 70 -25 150 150 40 37 34 VDRV = 0 V, VFB = 0.6 V 31 28 25 22 19 16 13 10 -50 VDRV = open, VFB = 0.6 V -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 7. Drive Source Current vs. Junction Temperature Figure 8. Drive Current Under Fault Conditions vs. Junction Temperature http://onsemi.com 5 NCP102 9 8 7 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 150 0.90 0.85 On State 0.80 Off State 0.75 0.70 0.65 0.60 -50 -25 TJ, JUNCTION TEMPERATURE (°C) Figure 9. Soft-Start Charge Current vs. Junction Temperature 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) Figure 10. Enable Threshold Voltages vs. Junction Temperature 0.90 VREF, REFERENCE VOLTAGE (V) ISOFT-S, SOFT-START CHARGE (mA) 10 VEN, ENABLE THRESHOLD VOLTAGE (V) TYPICAL CHARACTERISTICS 0.88 VCC = 5 V 0.86 0.84 0.82 0.80 0.78 0.76 0.74 0.72 0.70 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) Figure 11. Reference Voltage vs. Junction Temperature http://onsemi.com 6 150 150 NCP102 DETAILED OPERATING DESCRIPTION The NCP102 is a low dropout linear regulator controller for applications requiring high-current and ultra low dropout voltages. The use of an external N-Channel MOSFET allows the user to adapt the device to a multitude of applications depending on system requirements for current and dropout voltage. An extremely accurate 0.8 V (±2%) reference allows the implementation of sub 1 V voltage supplies. The reference is guaranteed over the complete supply and temperature ranges. Other features of the NCP102 are a dedicated enable input, internally compensated error amplifier and an adjustable soft-start. A minimum drive capability of ±5 mA provides fast transient response. The drive current is internally limited to protect the controller in case of an external MOSFET failure. The NCP102 is packaged in a space saving TSOP-6. Equation 1 relates the output voltage to the internal reference voltage and external resistors R1 and R2. ǒ V out + V REF @ R1 ) R2 R2 Ǔ (eq. 1) ERROR AMPLIFIER The NCP102 has a wide bandwidth error amplifier. It allows the user to implement a wide bandwidth feedback loop resulting in better transient response and lower system cost. It requires the user to compensate the system. A narrow bandwidth error amplifier usually does not require external compensation but it requires more output capacitance to meet typical transient requirements. The output of the error amplifier is available for frequency compensation. A capacitor (CCOMP) can be placed between the DRV and FB pins. In most cases the resistor is not needed. The uncompensated error amplifier dominant pole is approximately 1.65 Hz. Any external capacitance between the DRV and FB pins reduces the dominant pole frequency due to the Miller multiplication effect. Equation 2 relates the dominant pole frequency to CCOMP. SUPPLY VOLTAGE The NCP102 supply voltage range is between 4.5 V and 13.5 V. The controller is enabled once the supply voltage exceeds its minimum supply threshold, typically 4.5 V. The minimum operating voltage is reduced to 4.2 V (typical) once the controller is enabled to provide noise immunity. A bypass capacitor is required on the VCC pin to provide charge storage during power up and transient events. A minimum of 0.1 mF is recommended. f pole + 6.7016 @ C COMP *0.846 (eq. 2) EXTERNAL ENABLE The EN input allows the NCP102 to be remotely enabled. An internal 10 mA (typ.) current source pulls up the EN voltage. The EN pin is internally pulled to VCC or 9.5 V, whichever is lower. The controller is enabled once the EN pin voltage exceeds 0.8 V (typ.). The controller is disabled by pulling down on the EN pin. Figure 12 shows the relationship between enable and soft-start. DRIVE OUTPUT A powerful error amplifier (EA) capable of driving an external MOSFET is built into the NCP102. The output of the error amplifier is connected to the DRV pin. It has a minimum drive current capability of ±5 mA providing a fast transient response. The EA is biased directly from VCC. The DRV voltage follows VCC up and it is internally clamped to 9.75 V (typ.). This allows the use of external MOSFETs with a maximum gate voltage of 12 V. The DRV current is provided directly from VCC. Therefore, the VCC capacitor should be large enough to maintain a constant VCC during power up and transients. Otherwise, the supply voltage may collapse reaching the controller undervoltage lockout threshold. EN SOFT-S Vout INTERNAL REFERENCE tSOFT-S The internal 0.8 V reference facilitates the implementation of sub 1 V supplies required in modern computing equipment. The internal reference is trimmed during manufacturing to obtain better than ±2% accuracy over the complete operating range. The output voltage, Vout, is programmed using a resistor divider (R1 and R2) as shown in Figure 1. The resistor divider senses the output voltage and compares it to the internal 0.8 V reference. Figure 12. Relationship Between Enable and Soft-Start The EN pin can be connected to VCC if the enable feature is not used. If connected to VCC and VCC is higher than 9.5 V a resistor in series should be used to limit the current into the EN pin as the pin is internally clamped to 9.5 V. A minimum of 40 kW is recommended. http://onsemi.com 7 NCP102 SOFT-START Soft-start reduces inrush current and overshoot of the output voltage. The adjustable soft-start built into the NCP102 allows the user to select the optimum soft-start time for the application. The soft-start time is set with a capacitor from the SOFT-S pin to ground. Soft-start is achieved by controlling the slope of the DRV voltage based on the slope of the soft-start capacitor voltage, CSOFT-S. The capacitor is charged to VCC with a constant 4.5 mA (typ.) current source, ISOFT-S. This results in a linear charge of the soft-start capacitor and thus the output voltage. The soft-start period, tSOFT-S, ends once the capacitor voltage reaches 0.8 V (typ). The soft-start capacitor is calculated using Equation 3. t SOFT*S + ǒc Ǔ @ 0.8 I SOFT*S SOFT*S Vout (slave) Soft-Start (slave) Vout (master) Soft-Start (master) Figure 13. Power-up Sequencing Waveforms (eq. 3) Power sequencing will affect the soft-start time calculated using Equation 3 because the soft-start capacitor charge current is now increased by the enable charge current. The soft-start time is calculated using Equation 3 by replacing ISOFT-S with the sum of IEN and ISOFT-S. The soft-start capacitor is internally pulled to GND when VCC is not within its operating range or the controller is disabled using the EN pin. POWER SEQUENCING Power sequencing can be easily implemented using the SOFT-S and EN pins. This is achieved by directly connecting the SOFT-S pin of the master controller to the EN pin of the slave controller. If VCC is above 9.5 V a resistor divider is required to limit the voltage on the EN pin because the pin is internally clamped to 9.5 V. Figure 13 shows the timing waveforms of the master and slave controllers. APPLICATION INFORMATION ON Semiconductor provides an electronic design tool, a demonstration board and an application note to facilitate design using the NCP102 and to reduce development cycle time. All the tools can be downloaded at www.onsemi.com. The electronic design tool allows the user to easily determine most of the system parameters of a linear regulator. The tool also evaluates the frequency response of the system. The demonstration board is designed to generate a 1.2V/3 A voltage supply from a 1.8 V supply. The circuit schematic is shown in Figure 14 and the regulator design is described in Application Note AND8303. Vin VCC TP2a J2 J1 TP2 TP1 R8 ENABLE 1 k J5 C11 100 p MMBT3904 Q3 U1 1 R7 365 k R6 10 k 2 3 Open EN VCC GND DRV FB TP12 TP5 6 0.01 C3 200 SOFT-S 4 C5 C6 470 4.7 0.1 NTD40N03 Q2 R1 5 C10 C4 100 p Q1 R2 TP6a 100 Vout C7 C8 C9 J3 1000 4.7 0.1 TP6 TP7 NCP102 TP4 R5 0 C1 0.01 R3 10 k TP8 TP9 TP10 TP11 TP3 R4 20 k GND J4 J6 Figure 14. Circuit Schematic http://onsemi.com 8 NCP102 PACKAGE DIMENSIONS TSOP-6 CASE 318G-02 ISSUE M A L 6 5 4 2 3 B S 1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS DIM MIN MAX A 2.90 3.10 B 1.30 1.70 C 0.90 1.10 D 0.25 0.50 G 0.85 1.05 H 0.013 0.100 J 0.10 0.26 K 0.20 0.60 L 1.25 1.55 M 0_ 10 _ S 2.50 3.00 D G M J C 0.05 (0.002) K H INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0610 0_ 10 _ 0.0985 0.1181 SOLDERING FOOTPRINT* 2.4 0.094 1.9 0.075 0.95 0.037 0.95 0.037 0.7 0.028 1.0 0.039 SCALE 10:1 mm Ǔ ǒinches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. The products described herein (NCP102), may be covered by one or more of the following U.S. patents: 7,307,476. There may be other patents pending. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 http://onsemi.com 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP102/D