IR MOSFET StrongIRFET™ IRF60R217 Application Brushed Motor drive applications BLDC Motor drive applications Battery powered circuits Half-bridge and full-bridge topologies Synchronous rectifier applications Resonant mode power supplies OR-ing and redundant power switches DC/DC and AC/DC converters DC/AC Inverters D VDSS 60V RDS(on) typ. 8.0m max 9.9m G S ID 58A D S Benefits Improved Gate, Avalanche and Dynamic dV/dt Ruggedness Fully Characterized Capacitance and Avalanche SOA Enhanced body diode dV/dt and dI/dt Capability Lead-Free, RoHS Compliant G D-Pak IRF60R217 G Gate Package Type IRF60R217 D-Pak Standard Pack Form Quantity Tape and Reel 2000 30 Orderable Part Number IRF60R217 60 25 50 20 T J = 125°C 15 10 5 40 30 20 10 T J = 25°C 0 0 4 6 8 10 12 14 16 18 20 VGS, Gate -to -Source Voltage (V) Fig 1. Typical On-Resistance vs. Gate Voltage 1 S Source ID = 35A ID, Drain Current (A) RDS(on), Drain-to -Source On Resistance (m ) Base part number D Drain 25 50 75 100 125 150 175 T C , Case Temperature (°C) Fig 2. Maximum Drain Current vs. Case Temperature 2016-01-05 IRF60R217 Absolute Maximum Rating Symbol ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C Parameter Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Pulsed Drain Current Maximum Power Dissipation Linear Derating Factor VGS Gate-to-Source Voltage TJ Operating Junction and TSTG Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case) Avalanche Characteristics EAS (Thermally limited) Single Pulse Avalanche Energy EAS (Thermally limited) Single Pulse Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy Thermal Resistance Symbol Parameter Junction-to-Case RJC Junction-to-Ambient (PCB Mount) RJA Junction-to-Ambient RJA Static @ TJ = 25°C (unless otherwise specified) Symbol Parameter V(BR)DSS Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage IDSS Drain-to-Source Leakage Current IGSS RG Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Gate Resistance Max. 58 41 217 83 0.56 ± 20 Units A W W/°C V -55 to + 175 °C 300 85 124 mJ See Fig 15, 16, 23a, 23b A mJ Typ. ––– ––– ––– Max. 1.8 50 110 Units °C/W Min. 60 Typ. Max. ––– ––– Units Conditions V VGS = 0V, ID = 250µA ––– ––– ––– 2.1 ––– ––– ––– ––– ––– 0.047 8.0 10 ––– ––– ––– ––– ––– 2.0 V/°C ––– 9.9 ––– 3.7 1.0 150 100 -100 ––– Reference to 25°C, ID = 1mA VGS = 10V, ID = 35A m VGS = 6.0V, ID = 18A V VDS = VGS, ID = 50µA VDS = 60V, VGS = 0V µA VDS = 60V,VGS = 0V,TJ =125°C VGS = 20V nA VGS = -20V Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by TJmax, starting TJ = 25°C, L = 0.14mH, RG = 50, IAS = 35A, VGS =10V. ISD 35A, di/dt 862A/µs, VDD V(BR)DSS, TJ 175°C. Pulse width 400µs; duty cycle 2%. Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS. R is measured at TJ approximately 90°C. When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.please refer to application note to AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 16A, VGS =10V. 2 2016-01-05 IRF60R217 Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified) Symbol gfs Qg Qgs Qgd Qsync td(on) tr Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge Sync. (Qg– Qgd) Turn-On Delay Time Rise Time Min. 120 ––– ––– ––– ––– ––– ––– Typ. ––– 40 10 12 28 7.6 29 td(off) Turn-Off Delay Time ––– 21 tf Ciss Coss Crss Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Effective Output Capacitance (Energy Related) Output Capacitance (Time Related) ––– ––– ––– ––– 12 2170 210 130 ––– 228 ––– VGS = 0V, VDS = 0V to 48V ––– 283 ––– VGS = 0V, VDS = 0V to 48V Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Min. Typ. Max. Units ––– ––– 58 ––– ––– 217 Conditions MOSFET symbol showing the integral reverse p-n junction diode. VSD Diode Forward Voltage ––– ––– 1.2 dv/dt Peak Diode Recovery dv/dt trr Reverse Recovery Time Qrr Reverse Recovery Charge IRRM Reverse Recovery Current ––– ––– ––– ––– ––– ––– 18 27 30 26 33 1.7 ––– ––– ––– ––– ––– ––– Coss eff.(ER) Coss eff.(TR) Max. Units Conditions ––– S VDS = 10V, ID = 35A 66 ID = 35A ––– VDS = 30V nC ––– VGS = 10V ––– ––– VDD =30V ––– ID = 35A ns ––– RG= 2.7 VGS = 10V ––– ––– ––– ––– pF VGS = 0V VDS = 25V ƒ = 1.0MHz, See Fig. 7 Diode Characteristics Symbol IS ISM 3 A V D G S TJ = 25°C,IS = 35A,VGS = 0V V/ns TJ = 175°C,IS = 35A,VDS = 60V TJ = 25°C VDD = 51V ns TJ = 125°C IF = 35A, TJ = 25°C di/dt = 100A/µs nC TJ = 125°C A TJ = 25°C 2016-01-05 IRF60R217 1000 1000 100 BOTTOM TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 100 10 4.5V BOTTOM VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V 4.5V 10 60µs PULSE WIDTH 60µs PULSE WI DTH Tj = 175°C Tj = 25°C 1 0.1 1 1 10 100 0.1 V DS, Drain-to-Source Voltage (V) RDS(on) , Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 100 2.5 1000 100 T J = 175°C 10 T J = 25°C 1 VDS = 25V 60µs PULSE WIDTH ID = 35A VGS = 10V 2.0 1.5 1.0 0.5 0.1 2 3 4 5 6 7 -60 -40 -20 0 20 40 60 80 100120140160180 8 T J , Junction Temperature (°C) VGS, Gate-to-Source Voltage (V) Fig 5. Typical Transfer Characteristics 10000 Fig 6. Normalized On-Resistance vs. Temperature 14 VGS, Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd C oss = C ds + C gd C, Capacitance (pF) 10 Fig 4. Typical Output Characteristics Fig 3. Typical Output Characteristics Ciss 1000 Coss Crss ID= 35A 12 VDS= 48V VDS= 30V 10 VDS= 12V 8 6 4 2 0 100 0.1 1 10 100 VDS, Drain-to-Source Voltage (V) Fig 7. Typical Capacitance vs. Drain-to-Source Voltage 4 1 V DS, Drain-to-Source Voltage (V) 0 10 20 30 40 50 60 QG, Total Gate Charge (nC) Fig 8. Typical Gate Charge vs. Drain-to-Source Voltage 2016-01-05 IRF60R217 1000 T J = 175°C ID, Drain-to-Source Current (A) ISD, Reverse Drain Current (A) 1000 100 T J = 25°C 10 1 OPERATION IN THIS AREA LIMITED BY RDS(on) 100 100µsec 10 1msec 1 10msec 0.1 VGS = 0V 0.01 0.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.1 1.6 1 10 100 VDS, Drain-toSource Voltage (V) VSD, Source-to-Drain Voltage (V) Fig 9. Typical Source-Drain Diode Forward Voltage Fig 10. Maximum Safe Operating Area 75 0.4 Id = 1.0mA 0.3 0.3 70 Energy (µJ) V(BR)DSS , Drain-to-Source Breakdown Voltage (V) DC Tc = 25°C Tj = 175°C Single Pulse 65 0.2 0.2 0.1 0.1 60 0.0 -60 -40 -20 0 20 40 60 80 100120140160180 0 T J , Temperature ( °C ) 20 30 40 50 60 VDS, Drain-to-Source Voltage (V) Fig 11. Drain-to-Source Breakdown Voltage RDS(on), Drain-to -Source On Resistance ( m ) 10 Fig 12. Typical Coss Stored Energy 24 VGS = 6.0V VGS = 7.0V VGS = 8.0V VGS = 10V 20 16 12 8 4 0 20 40 60 80 100 120 140 160 ID, Drain Current (A) Fig 13. Typical On-Resistance vs. Drain Current 5 2016-01-05 IRF60R217 Thermal Response ( Z thJC ) °C/W 10 1 D = 0.50 0.20 0.10 0.05 0.1 0.02 0.01 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 0.001 1E-006 1E-005 Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.0001 0.001 0.01 0.1 t1 , Rectangular Pulse Duration (sec) Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case 100 Avalanche Current (A) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150°C and Tstart = 25°C (Single Pulse) 10 1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25°C and Tstart = 150°C. 0.1 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 tav (sec) Fig 15. Avalanche Current vs. Pulse Width EAR , Avalanche Energy (mJ) 100 TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 35A 80 60 40 20 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (°C) Fig 16. Maximum Avalanche Energy vs. Temperature 6 Notes on Repetitive Avalanche Curves, Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1.Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 23a, 23b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figures 14, 15). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see Figure 14) PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC Iav = 2T/ [1.3·BV·Zth] EAS (AR) = PD (ave)·tav 2016-01-05 IRF60R217 12 4.0 10 IF = 23A V R = 51V TJ = 25°C 8 TJ = 125°C 3.5 3.0 IRRM (A) VGS(th) , Gate threshold Voltage (V) 4.5 2.5 ID = 50µA ID = 250µA ID = 1.0mA ID = 1.0A 2.0 6 4 2 1.5 1.0 0 -75 -25 25 75 125 175 0 200 T J , Temperature ( °C ) 600 800 1000 diF /dt (A/µs) Fig 18. Typical Recovery Current vs. dif/dt Fig 17. Threshold Voltage vs. Temperature 200 12 IF = 35A V R = 51V 10 IF = 23A V R = 51V 180 160 TJ = 25°C TJ = 125°C TJ = 25°C TJ = 125°C 140 QRR (nC) 8 IRRM (A) 400 6 120 100 80 4 60 2 40 20 0 0 200 400 600 800 0 1000 200 400 600 800 1000 diF /dt (A/µs) diF /dt (A/µs) Fig 19. Typical Recovery Current vs. dif/dt Fig 20. Typical Stored Charge vs. dif/dt 200 160 IF = 35A V R = 51V TJ = 25°C 140 TJ = 125°C QRR (nC) 180 120 100 80 60 40 20 0 200 400 600 800 1000 diF /dt (A/µs) Fig 21. Typical Stored Charge vs. dif/dt 7 2016-01-05 IRF60R217 Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs V(BR)DSS tp 15V L VDS D.U.T RG IAS 20V tp DRIVER + V - DD A I AS 0.01 Fig 23a. Unclamped Inductive Test Circuit Fig 23b. Unclamped Inductive Waveforms Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms Id Vds Vgs VDD Vgs(th) Qgs1 Qgs2 Fig 25a. Gate Charge Test Circuit 8 Qgd Qgodr Fig 25b. Gate Charge Waveform 2016-01-05 IRF60R217 D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information EXAMPLE: THIS IS AN IRFR120 WITH ASSEMBLY LOT CODE 1234 ASSEMBLED ON WW 16, 2001 IN THE ASSEMBLY LINE "A" PART NUMBER INTERNATIONAL RECTIFIER LOGO Note: "P" in assembly line position indicates "Lead-Free" IRFR120 12 116A 34 ASSEMBLY LOT CODE DATE CODE YEAR 1 = 2001 WEEK 16 LINE A "P" in assembly line position indicates "Lead-Free" qualification to the consumer-level OR INTERNATIONAL RECTIFIER LOGO PART NUMBER IRFR120 12 ASSEMBLY LOT CODE 34 DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) P = DESIGNATES LEAD-FREE PRODUCT QUALIFIED TO THE CONSUMER LEVEL (OPTIONAL) YEAR 1 = 2001 WEEK 16 A = ASSEMBLY SITE CODE Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 9 2016-01-05 IRF60R217 D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Note: For the most current drawing please refer to IR website at http://www.irf.com/package/ 10 2016-01-05 IRF60R217 Qualification Information† Industrial (per JEDEC JESD47F) †† Qualification Level Moisture Sensitivity Level D-Pak RoHS Compliant MSL1 Yes † Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/ †† Applicable version of JEDEC standard at the time of product release. Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2015 All Rights Reserved. IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer’s products and any use of the product of Infineon Technologies in customer’s applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on the product, technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. 11 2016-01-05