IRFB7540 Data Sheet (655 KB, EN)

StrongIRFET™
IRFB7540PbF
IRFS7540PbF
IRFSL7540PbF
HEXFET® Power MOSFET
Application
 Brushed Motor drive applications
 BLDC Motor drive applications
 Battery powered circuits
 Half-bridge and full-bridge topologies
 Synchronous rectifier applications
 Resonant mode power supplies
 OR-ing and redundant power switches
 DC/DC and AC/DC converters
 DC/AC Inverters
VDSS
60V
RDS(on) typ.
4.2m
max
5.1m
D
G
S
ID
110A
D
D
Benefits
 Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
 Fully Characterized Capacitance and Avalanche SOA
 Enhanced body diode dV/dt and dI/dt Capability
 Lead-Free, RoHS Compliant
S
D
G
S
G
TO-220AB
IRFB7540PbF
Package Type
IRFB7540PbF
IRFSL7540PbF
TO-220
TO-262
D2-Pak
Orderable Part Number
IRFB7540PbF
IRFSL7540PbF
IRFS7540PbF
IRFS7540TRLPbF
ID = 65A
100
12
10
T J = 125°C
8
6
80
60
40
20
4
T J = 25°C
0
2
4
6
8
10
12
14
16
18
20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
S
Source
120
14
ID, Drain Current (A)
RDS(on), Drain-to -Source On Resistance (m )
IRFS7540PbF
D
Drain
Standard Pack
Form
Quantity
Tube
50
Tube
50
Tube
50
Tape and Reel Left
800
S
D
TO-262
IRFSL7540PbF
D2Pak
IRFS7540PbF
G
Gate
Base part number
G
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25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRFB/S/SL7540PbF
Absolute Maximum Rating
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
Parameter
Max.
Continuous Drain Current, VGS @ 10V
110
Continuous Drain Current, VGS @ 10V
80
Pulsed Drain Current 
430
Maximum Power Dissipation
160
Linear Derating Factor
1.1
VGS
Gate-to-Source Voltage
± 20
TJ
Operating Junction and
-55 to + 175 TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Mounting Torque, 6-32 or M3 Screw
10 lbf·in (1.1 N·m)
Avalanche Characteristics 180
EAS (Thermally limited)
Single Pulse Avalanche Energy 
313
EAS (Thermally limited)
Single Pulse Avalanche Energy 
IAR
Avalanche Current 
See Fig 15, 16, 23a, 23b
Repetitive Avalanche Energy 
EAR
Thermal Resistance Symbol
Parameter
Typ.
Max.
Junction-to-Case 
RJC
–––
0.95
Case-to-Sink, Flat Greased Surface (TO-220)
RCS
0.50
–––
Junction-to-Ambient (TO-220)
RJA
–––
62
Junction-to-Ambient (PCB Mount) (D2Pak) 
RJA
–––
40
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
Drain-to-Source Breakdown Voltage
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
Min.
60
–––
–––
–––
2.1
–––
–––
–––
–––
–––
Units
A
W
W/°C
V
°C mJ
A
mJ
Units
°C/W Typ. Max. Units
Conditions
––– –––
V VGS = 0V, ID = 250µA
48
––– mV/°C Reference to 25°C, ID = 1mA
4.2
5.1
m VGS = 10V, ID = 65A 
5.4
–––
VGS = 6.0V, ID = 33A 

–––
3.7
V VDS = VGS, ID = 100µA
–––
1.0
VDS = 60V, VGS = 0V
µA
––– 150
VDS = 60V,VGS = 0V,TJ =125°C
––– 100
VGS = 20V
nA
––– -100
VGS = -20V
2.2
–––

Notes:

Repetitive rating; pulse width limited by max. junction temperature.
 Limited by TJmax, starting TJ = 25°C, L = 86µH, RG = 50, IAS = 65A, VGS =10V.

ISD  65A, di/dt  1130A/µs, VDD  V(BR)DSS, TJ 175°C.

Pulse width  400µs; duty cycle  2%.
 Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
 Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
 R is measured at TJ approximately 90°C.

When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques
refer to application note #AN-994: http://www.irf.com/technical-info/appnotes/an-994.pdf
 Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 25A, VGS =10V.
2
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Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg – Qgd)
Turn-On Delay Time
Rise Time
Min.
110
–––
–––
–––
–––
–––
–––
Typ.
–––
88
22
28
60
12
76
td(off)
Turn-Off Delay Time
–––
58
tf
Ciss
Coss
Crss
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance
(Energy Related)
Output Capacitance (Time Related)
–––
–––
–––
–––
56
4555
415
270
–––
430
–––
VGS = 0V, VDS = 0V to 48V
–––
550
–––
VGS = 0V, VDS = 0V to 48V
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Min.
Typ.
Max. Units
–––
–––
110
–––
–––
430
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
VSD
Diode Forward Voltage
–––
–––
1.2
dv/dt
Peak Diode Recovery dv/dt
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
–––
–––
–––
–––
–––
–––
11
33
37
36
47
1.9
–––
–––
–––
–––
–––
–––
Coss eff.(ER)
Coss eff.(TR)
Max. Units
Conditions
–––
S VDS = 10V, ID = 65A
130
ID = 65A
–––
VDS = 30V
nC –––
VGS = 10V
–––
–––
VDD = 30V
–––
ID = 65A
ns
–––
RG= 2.7
VGS = 10V 
–––
–––
–––
–––
pF VGS = 0V
VDS = 25V
ƒ = 1.0MHz, See Fig.7
Diode Characteristics Symbol
IS
ISM
3
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A
V
D
G
S
TJ = 25°C,IS = 65A,VGS = 0V 
V/ns TJ = 175°C,IS = 65A,VDS = 60V
TJ = 25°C
VDD = 51V
ns
TJ = 125°C
IF = 65A,
TJ = 25°C di/dt = 100A/µs 
nC
TJ = 125°C
A TJ = 25°C 
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IRFB/S/SL7540PbF
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
100
10
4.5V
1
60µs PULSE WIDTH
BOTTOM
4.5V
10
60µs PULSE WIDTH
Tj = 25°C
Tj = 175°C
0.1
1
0.1
1
10
100
1000
0.1
V DS, Drain-to-Source Voltage (V)
10
100
1000
Fig 4. Typical Output Characteristics
2.4
100
TJ = 175°C
10
TJ = 25°C
1
V DS = 25V
60µs PULSE WIDTH
RDS(on) , Drain-to-Source On Resistance
(Normalized)
1000
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
ID = 65A
V GS = 10V
2.0
1.6
1.2
0.8
0.4
0.1
2.0
3.0
4.0
5.0
6.0
7.0
-60 -40 -20 0 20 40 60 80 100120140160180
8.0
TJ , Junction Temperature (°C)
V GS, Gate-to-Source Voltage (V)
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
14.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + Cgd, C ds SHORTED
ID = 65A
V GS, Gate-to-Source Voltage (V)
C rss = C gd
C oss = Cds + Cgd
C, Capacitance (pF)
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
10000
Ciss
Coss
Crss
1000
12.0
V DS= 48V
V DS= 30V
10.0
V DS= 12V
8.0
6.0
4.0
2.0
0.0
100
1
10
100
0
20
40
60
80
100
V DS, Drain-to-Source Voltage (V)
QG, Total Gate Charge (nC)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
Fig 8. Typical Gate Charge vs.
Gate-to-Source Voltage
4
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120
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IRFB/S/SL7540PbF
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
TJ = 175°C
TJ = 25°C
10
100
OPERATION
IN THIS
AREA
LIMITED BY
R DS(on)
10
1
DC
0.1
0.2
0.6
1.0
1.4
1.8
0.1
V SD, Source-to-Drain Voltage (V)
1
10
VDS, Drain-to-Source Voltage (V)
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
0.8
78
Id = 1.0mA
0.7
76
0.6
74
Energy (µJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
V GS = 0V
1.0
100µsec
1msec
72
70
0.5
0.4
0.3
0.2
68
0.1
0.0
66
0
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
20
30
40
50
60
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
RDS(on), Drain-to -Source On Resistance ( m)
10
Fig 12. Typical Coss Stored Energy
14
12
Vgs = 5.5V
Vgs = 6.0V
Vgs = 7.0V
Vgs = 8.0V
Vgs = 10V
10
8
6
4
2
0
40
80
120
160
200
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRFB/S/SL7540PbF
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart = 25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming  j = 25°C and
Tstart = 150°C.
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
EAR , Avalanche Energy (mJ)
200
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 65A
150
100
50
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
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IRFB/S/SL7540PbF
12
3.5
2.5
2.0
ID = 100µA
ID = 250µA
1.5
ID = 1.0mA
ID = 1.0A
8
TJ = 125°C
6
4
2
1.0
0.5
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
400
600
800
1000
TJ , Temperature ( °C )
diF /dt (A/µs)
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
200
12
IF = 43A
V R = 51V
IF = 65A
V R = 51V
10
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
150
QRR (nC)
8
IRRM (A)
10
IF = 43A
V R = 51V
TJ = 25°C
3.0
IRRM (A)
V GS(th) , Gate threshold Voltage (V)
4.0
6
100
4
50
2
0
0
0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/µs)
diF /dt (A/µs)
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
200
IF = 65A
V R = 51V
TJ = 25°C
150
QRR (nC)
TJ = 125°C
100
50
0
0
200
400
600
800
1000
diF /dt (A/µs)
Fig 21. Typical Stored Charge vs. dif/dt
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IRFB/S/SL7540PbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V(BR)DSS
tp
15V
DRIVER
L
VDS
D.U.T
RG
IAS
20V
tp
+
V
- DD
A
I AS
0.01
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD Vgs(th)
Qgs1 Qgs2
Fig 25a. Gate Charge Test Circuit
8
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Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRFB/S/SL7540PbF
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
EXAM PLE:
T H IS IS A N IR F 1 0 1 0
LO T C O D E 1789
ASSEM BLED O N W W 19, 2000
IN T H E A S S E M B L Y L IN E "C "
N o t e : "P " in a s s e m b ly lin e p o s it io n
in d ic a t e s "L e a d - F r e e "
IN T E R N A T IO N A L
R E C T IF IE R
LO G O
ASSEM BLY
LO T C O D E
PART NUM BER
D ATE C O D E
YEA R 0 = 2000
W EEK 19
L IN E C
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRFB/S/SL7540PbF
TO-262 Package Outline (Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
ASSEMBLED ON WW19, 1997
IN THE ASSEMBLYLINE "C"
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
DATE CODE
YEAR 7 = 1997
WEEK 19
LINE C
OR
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
WEEK 19
A = ASSEMBLYSITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRFB/S/SL7540PbF
D2Pak (TO-263AB) Package Outline (Dimensions are shown in millimeters (inches))
D2Pak (TO-263AB) Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
F530S
DATE CODE
YEAR 0 = 2000
WEEK 02
LINE L
OR
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
PART NUMBER
F530S
DATE CODE
P = DESIGNATES LEAD - FREE
PRODUCT (OPTIONAL)
YEAR 0 = 2000
WEEK 02
A = ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
11
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IRFB/S/SL7540PbF
D2Pak (TO-263AB) Tape & Reel Information (Dimensions are shown in millimeters (inches))
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
12
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IRFB/S/SL7540PbF
Qualification Information† Industrial
(per JEDEC JESD47F) ††
Qualification Level Moisture Sensitivity Level
TO-220
N/A
2
D Pak
MSL1
TO-262
N/A
Yes
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
††
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
11/6/2014
Comments



Updated EAS (L =1mH) = 313mJ on page 2
Updated note 8 “Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 25A, VGS =10V”. on page 2
Updated package outline on page 9,10,11.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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