AN1045/D Series Triacs In AC High Voltage Switching Circuits http://onsemi.com By George Templeton Thyristor Applications Engineer APPLICATION NOTE INTRODUCTION Edited and Updated This paper describes the series connection of triacs to create a high voltage switch suitable for operation at voltages up to 2000 Volts. They can replace electromechanical contactors or extend their current rating and lifetime. Motor starters and controllers operating at line voltages of 240 Volts or more require high-voltage switches. Transformer action and resonant snubber charging result in voltages much greater than the peak of the line. Triacs can be subjected to both commutating and static dV/dt when multiple switching devices are present in the circuit. Snubber designs to prevent static dV/dt turn-on result in higher voltages at turn-off. Variable load impedances also raise voltage requirements. The benefits of series operation include: higher blocking voltage, reduced leakage, better thermal stability, higher dV/dt capability, reduced snubber costs, possible snubberless operation, and greater latitude in snubber design. The advantages of triacs as replacements for relays include: winding, and start capacitor voltage. This voltage increases when triac turn-off occurs at higher rpm. • Small size and light weight • Safety — freedom from arcing and spark initiated explosions • Long lifespan — contact bounce and burning eliminated • Fast operation — turn-on in microseconds and turn-off in milliseconds • Quiet operation The triacs retrigger every half cycle as soon as the line voltage rises to the value necessary to force the trigger current. The instantaneous line voltage V is TRIGGERING Figure 1 illustrates a series thyristor switching circuit. In this circuit, the top triac triggers in Quadrant 1 when the bottom triac triggers in Quadrant 3. When the optocoupler turns on, gate current flows until the triacs latch. At that time, the voltage between the gate terminals drops to about 0.6 Volts stopping the gate current. This process repeats each half cycle. The power rating of the gate resistor can be small because of the short duration of the gate current. Optocoupler surge or triac gate ratings determine the minimum resistance value. For example, when the maximum optocoupler ITSM rating is 1 A: V August, 1999 – Rev. 2 + IGT Rg ) 2 VGT ) 2 VTM (1.0) (1.1) where VGT, IGT are data book specifications for the triac and VTM is the on-voltage specification for the optocoupler. The phase delay angle is Triacs can be used to replace the centrifugal switch in capacitor start motors. The blocking voltage required of the triac can be much greater than the line voltage would suggest. It must block the vector sum of the line, auxiliary Semiconductor Components Industries, LLC, 1999 u+ VpeakńImax + 750 Vń1 A + 750 Ohm Rg Rg qd 1 ƪ ƫ + SIN*1 Ǹ2 V V LINE (1.2) Publication Order Number: AN1045/D AN1045/D IG IL G MEAN MT1 RG DESIGN CAPABILITY ∆I MT2 6σ 6σ 3σ 3σ MT2 G PROCESS WIDTH MT1 Figure 6.1. Series Switch Figure 6.2. Designing for Probable Leakage STATIC VOLTAGE SHARING Maximum blocking voltage capability results when the triacs share voltage equally. The blocking voltage can be dc or ac. A combination of both results when the triac switches the start winding in capacitor start motors. In the simple series connection, both triacs operate with an identical leakage current which is less than that of either part operated alone at the same voltage. The voltages across the devices are the same only when their leakage resistances are identical. Dividing the voltage by the leakage current gives the leakage resistance. It can range from 200 kohm to 2000 megohm depending on device characteristics, temperature, and applied voltage. Drawing a line corresponding to the measured series leakage on each device’s characteristic curve locates its operating point. Figure 3a shows the highest and lowest leakage units from a sample of 100 units. At room temperature, a leakage of 350 nA results at 920 Volts. The lowest leakage unit blocks at the maximum specified value of 600 Volts, while the highest blocks 320 Volts. A 50 percent boost results. Figure 3b shows the same two triacs at rated TJmax. The magnitude of their leakage increased by a factor of about 1000. Matching between the devices improved, allowing operation to 1100 Volts without exceeding the 600 Volt rating of either device. Identical case temperatures are necessary to achieve good matching. Mounting the devices closely together on a common heatsink helps. A stable blocking condition for operation of a single triac with no other components on the heatsink results when turn leads to greater leakage. If the rate of heat release at the junction exceeds the rate of removal as temperature increases, this process repeats until the leakage current is sufficient to trigger the thyristor on. DC blocking simplifies analysis. A design providing stable dc operation guarantees ac performance. AC operation allows smaller heatsinks. The last term in the stability equation is the applied voltage when the load resistance is low and the leakage causes negligible voltage drop across it. The second term is the thermal resistance from junction to ambient. The first term describes the behavior of leakage at the operating conditions. For example, if leakage doubles every 10°C, a triac operating with 2 mA of leakage at 800 Vdc with a 6°C/W thermal resistance is stable because dI MT dT J @ @ dT J dP J dP J dI MT t1 2 mA 10°C @ @ 6°C W 800 V + 0.96 Operating two triacs in series improves thermal stability. When two devices have matched leakages, each device sees half the voltage and current or 1/4 of the power in a single triac. The total leakage dissipation will approach half that of a single device operated at the same voltage. The additional voltage margin resulting from the higher total blocking voltage reduces the chance that either device will operate near its breakdown voltage where the leakage current increases rapidly with small increments in voltage. Higher voltage devices have lower leakage currents when operated near breakdown. Consequently, the highest breakover voltage unit in the pair will carry the greatest proportion of the burden. If the leakage current is large enough to cause significant changes in junction temperature, (∆TJ = φJC PD), the effect will tend to balance the voltage division between the two by lowering the leakage resistance of the hotter unit. If the leakage mismatch between the two is large, nearly all the voltage will drop across one device. As a result there will be little benefit connecting two in series. Series blocking voltage depends on leakage matching. Blocking stability depends on predictable changes in leakage with temperature. Leakage has three components. (2.0) Thermal run-away is a regenerative process which occurs whenever the loop gain in the thermal feedback circuit reaches unity. An increase in junction temperature causes increased leakage current and higher power dissipation. Higher power causes higher junction temperature which in http://onsemi.com 2 AN1045/D HIGH LOW ∆IL LOW HIGH (a) 100 V/ 100 nA/ (b) 25°C 100 µA/ 100 V/ 125°C Figure 6.3. Leakage Matching versus Temperature Surface Leakage from 70 to 150°C. Actual values measured 0.064 at 125° and 0.057 at 150°. Deviations from this behavior will result at voltages and temperatures where leakage magnitude, current gain, and avalanche multiplication aid unwanted turn-on. Sensitive gate triacs are not recommended for this reason. Passivation technique, junction design, and cleanliness determine the size of this component. It tends to be small and not very dependent on temperature. Diffusion Leakage Measurements with 1 volt reverse bias show that this component is less than 10 percent of the total leakage for allowed junction temperatures. It follows an equation of the form: I T e*(qvńkT) DERATING AND LEAKAGE MATCHING Operation near breakdown increases leakage mismatch because of the effects of avalanche multiplication. For series operation, devices should be operated at least 100 Volts below their rating. (2.1) and doubles about every 10°C. Its value can be estimated by extrapolating backward from high temperature data points. 20 18 PERCENT (SAMPLE SIZE = 100) Depletion Layer Charge Generation This component is a result of carriers liberated from within the blocking junction depletion layer. It grows with the square root of the applied voltage. The slope of the leakage versus applied voltage is the mechanism allowing for series operation with less than perfect leakage matching. Predictable diffusion processes determine this leakage. At temperatures between 70 and 150°C it is given by: i T e * kTE (2.2) + 1 di i dT J 550 V 14 TJ = 25°C 12 10 8 6 4 2 where E = 1.1 eV, k = 8.62E – 5 eV/k, T = degrees Kelvin, and k = 8.62 x 10 – 5 eV/k. It is useful to calculate the percentage change in leakage current with temperature: A 650 V 16 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 Figure 6.4. Normalized Leakage (Mean = 1.0) + kTE2 + 0.08 + 8% °C Figure 4 shows the leakage histogram for a triac sample operated at two different voltages. The skewedness in the high-voltage distribution is a consequence of some of the sample operating near breakdown. The coefficient A was evaluated on 3 different die size triacs by curve fitting to leakage measurements every 10° http://onsemi.com 3 AN1045/D HEATSINK SELECTION Low duty cycles allow the reduction of the heatsink size. The thermal capacitance of the heatsink keeps the junction temperature within specification. The package time constant (Cpkg RθJA) is long in comparison with the thermal response time of the die, causing the instantaneous TJ to rise above the case as it would were the semiconductor mounted on an infinite heatsink. Heatsink design requires estimation of the peak case temperature and the use of the thermal derating curves on the data sheet. The simplest model applies to a very small heatsink which could be the semicondutor package itself. When θSA is large in comparison with θCHS, it is sufficient to lump both the package and heatsink capacitances together and treat them as a single quantity. The models provide good results when the heatsink is small and the thermal paths are short. Model C, Figure 5 is a useful simplification for low duty cycle applications. Increasing heatsink mass adds thermal capacitance and reduces peak junction temperature. Heatsink thermal resistance is proportional to surface area and determines the average temperature. Solving equations (2.0) and (2.3) for the thermal resistance required to prevent runaway gives: θ JA @@ t A 1V i (3.0) where θJA is thermal resistance, junction to ambient, in °C/W, A = 0.08 at TJ = 125°C, V = rated VDRM, and i = rated IDRM. θJA must be low enough to remove the heat resulting from conduction losses and insure blocking stability. The latter can be the limiting factor when circuit voltages are high. For example, consider a triac operated at 8 amps (rms) and 8 Watts. The allowed case temperature rise at 25° ambient is 85°C giving a required θCA (thermal resistance, case to ambient) of 10.6°C/W. Allowing 1°C/W for θCHS (thermal resistance, case to heatsink) leaves 9.6°C/W for θSA (thermal resistance, heatsink to ambient). However, thermal stability at 600 V and 2 mA IDRM requires θJA = 10.4°C/W. A heatsink with θSA less than 7.4°C/W is needed, given a junction to case thermal resistance of 2°C/W. The operation of devices in series does not change the coefficient A. When matching and thermal tracking is perfect, both devices block half the voltage. The leakage current and power divide by half and the allowed θJA for blocking stability increases by 4. q SA + 32.6 A(*0.47) (3.1) where A = total surface area in square inches, θSA = thermal resistance sink to ambient in °C/W. Analysis of heatsink thermal response to a train of periodic pulses can be treated using the methods in ON Semiconductor application note AN569 and Figure 6. For example: http://onsemi.com 4 AN1045/D θCA Pd CPKG Pd θCA θCA ton CPKG TC TC TA TA (b.) Equivalent Circuit For (a) (a.) Standard Thermal Analogue For a Thyristor in Free Air In Circuit (B): The steady state case temperature is given by + ) (5.0) T CSS P d q CA T A in °C where Pd = Applied average power, watts θCA = Case to ambient thermal resistance, °C/W TA = ambient temperature, °C The package rises toward the steady state temperature exponentially with time constant t + q CA (5.1) C PKG, seconds In terms of measurable temperatures: DTCpk (5.3) r(t on) DTCSS + In model (b.) this is (5.4) r(t on) Solving 5-4 for the package capacitance gives (5.5) where Cpkg = HM, Joules/°C H = Specific heat, calories/(gm S °C) M = Mass in grams and 1 Calorie = 4.184 Joule 1 Joule = 1 Watt S Sec + (1 * e*tonńt) + (θCA In*(1ton* r(ton)) C PKG Use simplified model C when tt t tt DTCSS pk t on DT C The case temperature rise above ambient at the end of power pulse is: (5.2) where DTC pk + DTCpk + DTCSS(1 * e*tonńt) CPKG Pd * TA pk DTCSS + TCSS * TA TC TA To account for thermal capacity, a time dependent factor r(t) is applied to the steady state case-to-ambient thermal resistance. The package thermal resistance, at a given on-time, is called transient thermal resistance and is given by: R qCA (t on) (c.) Simplified Model + r(ton) qCA (5.6) T C where r(ton) = Unitless transient thermal impedance coefficient. + PCd ton ) TA PKG Figure 6.5. Transient Thermal Response For a Single Power Pulse http://onsemi.com 5 TC AN1045/D + (1 * e*180ń150) + .6988 R (t on ) Tp) + (1 * 1 *183ń150) + .7047 Assume the case temperature changes by 40°C for a single power pulse of 66.67 W and 3 s duration. Then from equation (5.6): C pkg R (T p) + (66.7 Watts)40°C(3 seconds) + 5 Joules °C Then from Figure 6: delta TC = (1.111 + 46.225 + 1.333 – 46.61) 30 = 61.8°C If the ambient temperature is 25°C, TC = 87°C. The heatsink thermal resistance can be determined by applying dc power, measuring the final case temperature, and using equation (5.0). TC COMPENSATING FOR MAXIMUM SPECIFIED LEAKAGE * TA + 175-25 + 30°CńW 5 PD Identical value parallel resistors around each triac will prevent breakdown resulting from mismatched leakages. Figure 7 derives the method for selecting the maximum allowed resistor size. A worst case design assumes that the series pair will operate at maximum TJ and that one of the triacs leaks at the full specified value while the other has no leakage at all. A conservative design results when the tolerances in the shunt resistors place the highest possible resistor across the low leakage unit and the lowest possible resistor around the high leakage unit. This method does not necessarily provide equal voltage balancing. It prevents triac breakover. Perfect voltage sharing requires expensive high-wattage resistors to provide large bleeder currents. The application requires a 3 s on-time and 180 s period at 66.7 W. Then P avg + (66.7 W) (3ń180) + 1.111 W Nth PULSE N+1 PULSE Pd ton tp PAVG 0 DT C (N IDRM (T2) ) 1) + [PAVG ) (Pd * PAVG) r (ton ) tp) ) Pd r (ton) * Pd r (tp)]qCA VS I1 V1 T1 + RV1 S)RR1 2 ) DRI1LR)1RR22 Let R1 = R (1 + p) and R2 = R (1 – p) where R = Nominal resistor value p = 0.05 for 5% tolerance, etc. Figure 6.6. Steady State Peak Case Temperature Rise Using equation (5.3), the theoretical steady state case temperature rise is: R(t on) IDRM (T1) R1 V1 and R2 ∆IL Where ∆ TC (N + 1) = maximum rise above ambient Pd = applied average power within a pulse PAV G = average power within a period r(ton + tp) = time dependent factor for sum of ton and tp r(ton) = time dependent factor for ton r(tp) = time dependent factor for tp T CSS I2 T2 R * VS (1 ) p) x 2 VDRM DI (1 * p2) L Worst case becomes: * TA + (66.7 W) (30°CńW) + 2000°C and + R (3 s) + (40°C measured rise)ń2000 + 0.02 IDRM (T1) = 0; IDRM (T2) = Spec. max. value ∆IL = Spec. Max. Value Figure 6.7. Maximum Allowed Resistor for Static Voltage Sharing From equation (5.4) and (5.1): http://onsemi.com 6 AN1045/D COMPENSATION FOR PROBABLE LEAKAGE Theoretically there would be no more than 3.4 triacs per million exceeding the design tolerance even if the mean value of the leakage shifted by plus or minus 1.5 sigma. Real triacs have a leakage current greater than zero and less than the specified value. Knowledge of the leakage distribution can be used to reduce resistor power requirements. The first step is to statistically characterize the product at maximum temperature. Careful control of the temperature is critical because leakage depends strongly on it. The process width is the leakage span at plus or minus 3 standard deviations (sigma) from the mean. To minimize the probability of out of spec parts, use a design capability index (Cp) of 2.0. Cp + (design DI)ń(process width) Cp + (12 sigma)ń(6 sigma) SELECTING RESISTORS Small resistors have low voltage ratings which can impose a lower constraint on maximum voltage than the triac. A common voltage rating for carbon resistors is: Rated Power (W) 1/4 Watt 1/2 1 2 (4.0) Figure 2 and Figure 7 describe this. Substituting delta IL at 6 sigma in Figure 7 gives the resistor value. The required power drops by about 4. Series resistors are used for higher voltage. ACTUAL TRIAC I Rmin Maximum Voltage (V) 250 Volts 350 500 750 Let V DRM IDRM MODEL TRIAC E E Rmax + VDRM R max VMT2 – 1 ǒ Ǔ + E RmaxRmax ) Rmin + VIDRM min 1 min ) IImax R min + VIDRM max (8.0) VDRM (a) Equivalent Circuit (b) Model Figure 6.8. Maximum Voltage Sharing Without Shunt Resistor OPERATION WITHOUT RESISTORS Table 1. Normalized leakage and voltage boost factor. (Mean = 1.0) Figure 8 derives the method for calculating maximum operating voltage. The voltage boost depends on the values of Imin and Imax. For example : ǒ ) Ǔ+ 1 131 mA 683 mA 1.19 A 19 percent voltage boost is possible with the 6 sigma design. Testing to the measured maximum and minimum of the sample allows the boost to approach the values given in Table 1. (1 ) 0.835ń1.228) + 1.68 Voltage (V) 550 650 550 550 550 550 TJ (°C) 25 25 100 125 125 150 150 Rshunt — — — — 1.5M 1.5M 510K Sample Size 100 100 16 16 16 16 16 Maximum 1.31 5 1.59 1 1.18 7 1.22 8 1.12 3 1.34 6 1.18 6 Minimum 0.72 9 0.68 1 0.84 0 0.83 5 0.92 0 0.82 0 0.87 7 Sigma 0.116 0.17 2 0.10 6 0.113 0.05 5 0.13 2 0.08 4 Sample Boost 1.55 1.43 1.71 1.68 1.82 1.61 1.74 6 Sigma Boost 1.18 1.00 1.22 1.19 1.50 1.12 1.33 http://onsemi.com 7 550 AN1045/D COMPENSATING FOR SURFACE LEAKAGE Triacs can tolerate very high rates of voltage rise when the peak voltage magnitude is below the threshold needed to trigger the device on. This behavior is a consequence of the voltage divider action between the device collector and gate-cathode junction capacitances. If the rise-time is made short in comparison with minority carrier lifetime, voltage and displaced charge determine whether the device triggers on or not. Series operation will extend the range of voltage A small low power shunt resistance will provide nearly perfect low temperature voltage sharing and will improve high temperature performance. It defines the minimum leakage current of the parallel triac-resistor combination. The design method in Figure 8 can be used by adding the resistor current to the measured maximum and minimum leakage currents of the triac sample. This is described in Table 1. ǒǓ SERIES dV dt s and load conditions where a static dV snubber is not dt ǒǓ needed. Figure 10 graphs the results of measurements on two series connected triacs operated without snubbers. The series connection doubled the allowed step voltage. However, this voltage remained far below the combined 1200 V breakover voltage of the pair. dV dt s The series connection will provide twice the capability of the lowest device in the pair (Figure 9). Dynamic matching without a snubber network depends on equality of the thyristor self capacitance. There is little variation in junction capacitance. Device gain variations introduce most of the spread in triac performance. The blocking junction capacitance of a thyristor is a declining function of dc bias voltage. Mismatch in static blocking voltage will contribute to unequal capacitances. However, this effect is small at voltages beyond a few volts. The attachment of a heatsink at the high-impedance node formed by connection of the triac main-terminals can also contribute to imbalance by introducing stray capacitance to ground. This can be made insignificant by adding small capacitors in parallel with the triacs. Snubbers will serve the same purpose. MAXIMUM STEP VOLTAGE (V) 800 700 600 500 400 V 300 u ń dV 10 kV ms dt f = 10 Hz pw = 100 µs 200 100 0 0 EXPONENTIAL STATIC dv/dtS (V/ µs) 10,000 9 8 7 6 5 4 20 40 60 80 TJ (°C) 100 120 140 160 Figure 6.10. Step Blocking Voltage VS TJ (Unsnubbed Series Triacs) ǒǓ Exponential dV dt s 1 3 than 2 kV/µs showed that turn-on of the series pair can 2 R occur because of breakdown or dV . The former was the C dt limiting factor at junction temperatures below 100°C. Performance improved with temperature because device gain aided voltage sharing. The triac with the highest current gain in the pair is most likely to turn-on. However, this device has the largest effective capacitance. Consequently 2 1000 9 8 7 6 5 4 tests performed at 1000 V and less R C 1 it is exposed to less voltage and dV . At higher temperadt R = 270 kΩ C = 1000 pF Vpk = 1000 V 3 tures, rate effects dominated over voltage magnitudes, and the capability of the series pair fell. dV performance of the dt 2 series devices was always better than that of a single triac alone. 100 0 15 30 45 60 75 90 TURNOFF 105 120 135 150 JUNCTION TEMPERATURE (TJ) °C Process tolerances cause small variations in triac turn-off time. Series operation will allow most of the reapplied blocking voltage to appear across the faster triac when a dynamic voltage sharing network is not used. Figure 6.9. Exponential Static dV/dt, Series MAC15-8 Triacs http://onsemi.com 8 AN1045/D The triacs were mounted on a temperature controlled hotplate. The single pulse non-repetitive test aids junction temperature control and allows the use of lower power rated components in the snubber and load circuit. CL 15K G2 13K S1 2W 15K 2W 11 Ω 2W – 100 V 20 µF 200 V MT1 G2 MT2 T2 G2 2.2 Meg 910 1/2W S1 + MOC3081 PUSH TO TEST S4B (a) Triac Gate Circuit 270K 2W 2.2 Meg G1 G1 T1 MT1 CL Rs Cs MT2 1N4001 G1 MOC3081 + MT1, T2 510 910 S4A PEARSON 301X 1 – PROBE 270K 2W LL S2 Hg RELAY Cs TRIAD C30X 50H, 3500 Ω Figure 11 describes the circuit used to investigate this behavior. It is a capacitor discharge circuit with the load series resonant at 60 Hz. This method of testing is desirable because of the reduced burn and shock hazard resulting from the limited energy storage in the load capacitor. S3 Rs CL VCC 1.5 kV 510 MT1, T1 S1 = GORDES MR988 REED WOUND WITH 1 LAYER AWG #18 LL = 320 MHY CL = 24 µFD, NON-POLAR (c) Load Circuit REVERSE S4 AND VCC TO CHECK OPPOSITE POLARITY. (b) Optocoupler Gate Circuit Figure 6.11. ǒdVǓ cTest Circuit dt suggest that the reverse recovery charge is less than 2 micro-coulombs. Recovery currents cannot be much greater than IH or IGT, or the triac would never turn-off. Recovery can be forward, reverse, or near zero current depending on conditions. Snubber design for the series switch has the following objectives: Snubberless turn-off at 1200 V and 320 milli-henry resulted in 800 V peak and 100 V/µs. Although this test exceeded the ratings of the triacs, they turned off successfully. Snubberless operation is allowable when: 1. The total transient voltage across both triacs does not exceed the rating for a single device. This voltage depends on the load phase angle, self capacitance of the load and triac, damping constant, and natural resonance of the circuit. • Controlling the voltage peak. Resonant charging will magnify the turn-off voltage. • Controlling the voltage rate. Peak voltage trades with voltage rate. • Equalizing the voltage across the series devices by providing for imbalance in turn-off charge. Designs that satisfy the first two objectives will usually provide capacitor values above the minimum size. Select the snubber for a satisfactory compromise between voltage 2. The total ǒdVǓ across the series combination does dt c not exceed the capability of a single device. Maximum turn-off voltage capability and tolerance for variable loads requires the use of a snubber network to provide equal dynamic voltage sharing. Figure 12 and Figure 13 derives the minimum size snubber capacitor allowed. It is determined by the recovery charge of the triac. Measurements in fast current crossing applications and dV . Then check the capacitor to insure that it is suffidt ciently large. http://onsemi.com 9 AN1045/D VMT2-1 AND IMT2 C2 Q+∆ Q ∆Q T2 VS T1 Q Q2 The hazard of thyristor damage by dl overstress is dt greater when circuit operating voltages are high because dl φ C1 Q 1 + C(1 ) p); ǒǓ dI dt c V2 Worst case: C2 dl CAPABILITY dt C1 VDRM dt t ∆Q IRRM VMT2-1 + C(1 * p); Q1 + 0; is proportional to voltage. Damage by short duration transients is possible even though the pulse is undetectable when observed with non-storage oscilloscopes. This type of damage can be consequence of snubber design, transients, or parasitic capacitances. A thyristor can be triggered on by gate current, exceeding (dv/dt)c Q2 ǒǓ + DQ its breakdown voltage, or by exceeding its dV where C = Nominal value of capacitor and p = 0.1 for 10% tolerance, etc. ∆Q = Reverse recovery charge dt s ty. In the latter case, a trigger current is generated by charging of the internal depletion layer capacitance in the device. This effect aids turn-on current spreading, although dam- Note that T1 has no charge while T2 carries full recovery charge. age can still occur if the rate of follow on dl is high. Repetidt For the model shown above, VS C capabili- + QC11 ) QC22 + C(1Q*1 p) ) QC(11 *)Dp)Q tive operation off the ac line at voltages above breakdown is a worst case condition. Quadrant 3 has a slightly slower gated turn-on time, increasing the chance of damage in this direction. Higher operating voltages raise power density and local heating, increasing the possibility of die damage due to hot-spots and thermal run-away. y 2 VDRM *DQVS(1 ) p) Figure 6.12. Minimum Capacitor Size for Dynamic Voltage Sharing Snubber designs for static, commutating, and combined dV dt stress are shown in Table 2. Circuits switching the line or a charged capacitor across a blocking triac require the addition of a series snubber inductor. The snubber must be designed R RE1 L NON-INDUCTIVE 5K 200W for maximum dV with the minimum circuit inductance. This T106-6 1K 2W CARBON 0–6 kV 1/2A 60 Hz dt contraint increases the required triac blocking voltage. MT1 *S1 G QTY = 6 TO 16 MKP1V130 dV dt c ǒǓ Both 320 0.4 320 ǒǓ Table 2. Snubber Designs Type L (mh) dV dt s MT2 C G RL Ohm 8 0 8 Rs Ohm 1820 48 48 Cs (µf) 0.5 0.5 0.5 Damping Ratio 1.14 0.85 .035 Vstep (V) 1200 1200 750 Vpk (V) 1332 1400 1423 tpk (µs) 768 29.8 1230 dV (V/µs) dt 4.6 103 MT2 1.3 Vci V C µFD L µHY R Ω dl/dt A/µs Rejects Tested 1000 4.06 3.4 5.7 100 0/100 1900* 1.05 7.9 5.7 179 0/195 1500 0.002 0.3 10 3000 3/10 * Open S1 to test breakover dl/dt Note: Divide Rs and dV by 2, multiply Cs by 2 for each triac. dt Figure 6.13. dl/dt Test Circuit http://onsemi.com 10 MT1 PEARSON 411 I PROBE AN1045/D turn-on. Alternatively, a large triac capable of surviving the surge can be used. Ideally, turn-on speed mismatch should not be allowed to force the slower thyristor into breakdown. An RC snubber across each thyristor prevents this. In the worst case, one device turns on instantly while the other switches at the slowest possible turn-on time. The rate of voltage rise at the + V2LIRs, where VI is the maxidt T2 slower device is roughly dV lpk IH1 ∆ Q ∆Q mum voltage across L. This rate should not allow the voltage to exceed VDRM in less than Tgt to prevent breakover. But what if the thyristors are operated without a snubber, or if avalanche occurs because of a transient overvoltage condition? The circuit in Figure 13 was constructed to investigate this behavior. The capacitor, resistor, and inductor create a pulse forming network to shape the current wave. The initial voltage on the capacitor was set by a series string of sidac bidirectional breakover devices. Test results showed that operation of the triac switch was safe as long as the rate of current rise was below 200 A/µs. This was true even when the devices turned on because of breakover. However, a 0.002 µf capacitor with no series limiting impedance was sufficient to cause damage in the Q3 firing polarity. Circuit malfunctions because of breakover will be temporary if the triac is not damaged. Test results suggest that there will be no damage when the series inductance is sufficient to hold dl/dt to acceptable values. Highly energetic transients such as those resulting from lightning strikes can cause damage to the thyristor by I2t surge overstress. Device survival requires the use of voltage limiting devices IH2 T1 DQ ωt = 0 ŕ for turn-off at I DQ + t1 t2 H t2 I pk SINwt dt I + pk w (cos wt1 * cos wt2) t1 + Ipk Sinwt1 I H1 thus t 1 + 1 Sin *1 w I pk Worst case : I H2 + 0; f 2 + wt 2 + p I H1 I pk DQ + w in the circuit and dV limiting snubbers to prevent unwanted Ǹ ǒ Ǔ ȣȧȤ ) cos[SIN*1 IIH1 ]) pk ȡȧ ) Ȣ I pk DQ + w (1 1 I * I H1 2 I pk Figure 6.14. Forward Recovery Charge for Turn-Off at lH dt http://onsemi.com 11 AN1045/D ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). 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