How to Use Auxiliary Winding Voltage for Biasing the NCP1602 CSZCD Pin

AND9455/D
How to Use Auxiliary
Winding Voltage for Biasing
the NCP1602 CSZCD Pin
NCP1602 combines the current sense (CS) and the core
demagnetization detection (ZCD, zero crossing detection)
signals into a single pin named CSZCD. In some noisy
environment, a non-optimum choice of sensing resistors
combined with a dense PCB layout can lead to a unstable
operation of 1602. In this particular situation, the adoption
of a more conventional way of sensing via a dedicated
winding is an advantageous solution bringing ease of
implementation and stronger noise immunity.
This application note describes how the NCP1602,
primarily designed to work without the need of an auxiliary
voltage for ZCD detection, can use the auxiliary voltage for
a better CSZCD pin immunity to noise.
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APPLICATION NOTE
Auxiliary Winding Circuit for CSZCD Pin
(to Avoid Sensitivity to PCB Parasitics)
To avoid pin CSZCD sensitivity, the circuitry shown in
Figure 2 can replace the original circuitry of Figure 1. There
is no VAUX voltage reflected by the auxiliary winding when
the part does not switch and, consequently, no current is
flowing through the RCS resistors so the standby current is
not affected by RCS resistors. The total resistance value of
the RCS bridge can then be set under the 1-MW limit
originally set to avoid PCB parasitic capacitances and
distortion of the CSZCD voltage signal. When an auxiliary
winding voltage is available, the circuitry of Figure 2 is then
preferred especially in applications where very low standby
consumption is important. The only drawback of Figure 2
circuitry is that product options including brown-out
detection cannot be used because the controller cannot start
switching in this configuration. The reason of this
non-functionality is that the brown-out high level can never
be reached for allowing the controller to start switching
because switching activity is needed for the brown-out level
to be sensed through the CSZCD pin.
Drain Connection for CSZCD Pin
(Sensitivity to PCB Parasitics)
When trying to reduce the no-switching standby
consumption current by increasing (above 1 MW) the
impedance (RCS1 + RCS2 ) of the CSZCD bridge connected
between the drain and the source of the power MOSFET (see
Figure 1), the sensitivity of the CSZCD pin to PCB parasitic
capacitors is increased, leading in some cases to
non-functionality caused for example by a constant false
triggering of OCP (Over Current Protection) or OVP (Over
Voltage Protection). This is due to the fact that the CSZCD
voltage is distorted and internal circuitry cannot work as
intended. Recommendations for avoiding such CSZCD pin
sensitivity are given in [1].
CAUX
VDRAIN
VDRAIN
RAUX
VX
DAUX1
RCS1
RCS0
DRV
VAUX
N AUX
N PRIM
RCS1
CSZCD
RCS0
DRV
CSZCD
VM
RCS2
RCS2
VSOURCE
VSOURCE
RSENSE
RSENSE
Figure 1. CSZCD Connection without Auxiliary
Winding
© Semiconductor Components Industries, LLC, 2016
June, 2016 − Rev. 0
Figure 2. CSZCD Connection with Auxiliary Winding
1
Publication Order Number:
AND9455/D
AND9455/D
Calculations of Component Values Used in CSZCD
Circuitry
During the on-time, capacitor CAUX is quickly charged
(see Figure 3) through the low value resistor RAUX to
a voltage value VCAUX given by:
The CSZCD pin has originally been designed to work
with the information contained in the instantaneous
drain-source voltage (case of RCS1 connected to power
MOSFET drain as shown in Figure 1). For the CSZCD pin
to work when RCS1 is not connected to the power MOSFET
drain but to VX node (see Figure 2), the VX node (which name
also represents the voltage between this node and GND)
must be proportional to the instantaneous power MOSFET
drain voltage VDRAIN . Let’s analyze the waveforms
corresponding to Figure 2 schematic.
During the on-time, VAUX voltage is given by:
V AUX + * V IN @
N AUX
V CAUX + V IN @
N AUX
N PRIM
V AUX + V DRAIN,AC @
N PRIM
V X + V AUX ) V CAUX + V OUT @
(eq. 2)
+ V DRAIN,INST @
+
(eq. 3)
+ V DRAIN,INST @
RAUX
DAUX1
N PRIM
N AUX
N AUX
N PRIM
+
(eq. 7)
N PRIM
N AUX
N PRIM
(eq. 8)
So vX (t) is a scaled down (by NAUX / NPRIM which is
auxiliary to primary turns ratio) version of vDRAIN (t).
vX (t) acts as a scaled down instantaneous drain voltage and
is then divided by the resistor bridge made with RCS1 and
RCS2 . In order to have the same voltage waveform on
CSZCD pin as when RCS divider was directly connected to
the power MOSFET drain, the resistor divider ratio must be
lowered.
With RCS1 connected to drain voltage, the design equation
to get RCS1 and RCS2 is:
CSZCD
VM
RCS2
VSOURCE
(eq. 6)
N AUX
v X(t) + v DRAIN(t) @
N AUX
N PRIM
RCS1
CAUX Discharge
CAUX
Charge
RCS0
DRV
+
We just have demonstrated that, during on-time,
demagnetization time and dead-time, which means
whatever time we have:
VAUX
VX
N PRIM
V X + V AUX ) V CAUX + ǒV IN ) V DRAIN,ACǓ @
−
CAUX
VDRAIN
N AUX
During the dead-time, by combining Equation 3 and
Equation 4 we get:
Where VDRAIN,AC is equal to VDRAIN − VIN (during
dead-time VDRAIN is ringing around its mean value which is
equal to VIN ).
VCAUX
(eq. 5)
N PRIM
Because vDS (t) during the on-time is equal to zero.
During the demagnetization time, by combining
Equation 2 and Equation 4 we get:
During the dead-time, VAUX voltage is given by:
N AUX
N AUX
V X + V AUX ) V CAUX + 0 + V DRAIN,INST @
Where VIN is the rectified mains voltage, right after the
diode rectifier bridge, NAUX & NPRIM are respectively the
number of turns of auxiliary and primary windings of the
transformer which primary inductor serves as the PFC boost
inductor.
During the demagnetization time, VAUX voltage is given
by:
V AUX + ǒV OUT * V INǓ @
(eq. 4)
N PRIM
The capacitor can only charge up to a greater value given
by Equation 4 so it means that the end of one switching
cycle, the voltage across CAUX must be such as VX voltage
is slightly negative so during the following on-time CAUX
can be charged at the value given by Equation 4. We can also
mention that the voltage drop across DAUX1 has been
neglected to keep simple equations.
During the on-time, by combining Equation 1 and
Equation 4 we get:
(eq. 1)
N PRIM
N AUX
RSENSE
R CS1 ) R CS2
R CS2
Figure 3. Charge and Discharge of CAUX Capacitor
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2
+ K CS + 138
(eq. 9)
AND9455/D
Let’s Explain CAUX Capacitor Calculation
Now with RCS1 connected to VX node, the design equation
to get RCS1 and RCS2 is:
ǒ
N AUX
Ǔ
N PRIM
*1
@
R CS1 ) R CS2
R CS2
+ K CS + 138
The CAUX capacitor charges up during on-time to ((NAUX
/ NPRIM ) V VIN ) minus a DAUX diode Vf and while VIN is
rising. It is recommended for DAUX to use a signal diode like
the 1N4148. CAUX is charging very fast cycle by cycle
because RAUX and CAUX values are chosen so that their time
constant equals 100 ns. As can be seen on Figure 4 when VIN
is decreasing and the CAUX discharge is not fast enough, the
voltage across CAUX cannot track ((NAUX / NPRIM ) V VIN )
versus time. The absolute value of CAUX voltage discharge
slope when vIN (t) is decreasing must be greater than the
slope of ((NAUX / NPRIM ) V vIN (t)) and while the equations are
too complex to be shown here, the following design
Equation 12 for determining CAUX value can be used.
(eq. 10)
For both cases and dictated by internal circuitry, KCS must
be as close as possible to 138 target value, within ±10% and
RCS2 not being allowed to be under 20 kW, it is advised to set
it to the normalized value of 22 kW. It is also advised to use
1% tolerance resistors for RCS1 and RCS2 as they are, with
internal voltage references, setting the line level detection,
the OVP2 (Second Over-Voltage protection), RCS0 value is
set using the following design equation:
ƪǒRCS1 ńń RCS2Ǔ ) RCS0ƫ @ 10 pF + 500 ns
(eq. 11)
ǒR CS1 ) R CS2Ǔ @ C AUX + 640 ms " 10%
Where 10 pF is the parasitic input capacitance of the
CSZCD pin and 500 ns the time constant of an internal zero.
This zero is there to cancel the un-wanted pole made by
associating the RCS resistors with the parasitic input
capacitance of the CSZCD pin (10 pF).The internal zero
ensures a non-distorted CSZCD voltage signal.
(eq. 12)
Once CAUX value is calculated, RAUX is calculated using
the following equation which allows the CAUX capacitor to
be fully charged during on-time:
R AUX @ C AUX + 100 ns
CAUXVoltage (V)
(NAUX /Np)*VIN
Diode Vf
CAUX = 47 nF
CAUX = 15 nF
CAUX = 5 nF
CAUX = 2.2 nF
time (ms)
Figure 4. Voltage Across CAUX Capacitor vs. Time and Different CAUX Values
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3
(eq. 13)
AND9455/D
Practical Example of Component Values Calculation
The closest standard value is: CAUX = 2.2 nF.
Let’s start with:
N AUX
N PRIM
+ 0.1
To calculate the RAUX value we will use the design
Equation 13 which gives:
(eq. 14)
R AUX +
RCS2 must not be less than 20 kW so let’s adopt the
standard value RCS = 22 kW.
Solving the following design Equation 10 for RCS1 gives:
ǒ
R CS1 + R CS2 @ K CS @
N AUX
N PRIM
Ǔ
*1 +
22 k
@
VDRAIN
1
+ 132.7
0.1
+
R CS1 @ R CS2
R CS1 ) R CS2
270 k @ 22 k
270 k ) 22 k
640 m
+
RCS2
22 kW
640 m
(eq. 20)
RAUX
2.2 nF
47 W
0.1
N AUX
N PRIM
CSZCD
20 kW
VSOURCE
RSENSE
+
(eq. 17)
Figure 5. CSZCD Schematic Circuitry with
Component Values Previously Calculated
+ 20.34 kW
270 k ) 22 k
+ 45.45 W
CAUX
RCS0
DRV
(eq. 16)
ǒR CS1 ) R CS2Ǔ @ C AUX + 640 ms " 10%
R CS1 ) R CS2
2.2 n
RCS1
270 kW
So we will take the standard value of RCS0 = 20 kW (we
could have taken also 22 kW because 10% error is
acceptable for matching a time constant)
Now we have to calculate CAUX capacitance value using
Equation 12 which gives:
C AUX +
100 n
DAUX1
1N4148
Which is acceptable because 138−10% = 124.2 and KCS
= 132.7. This value is above 138−10%.
Now that we have RCS1 and RCS2 values, let’s solve RCS0
using the design Equation 11 which gives:
R CS0 + 50 kW *
+
All the calculated component values which have been
calculated are now reported on Figure 5 schematic.
(eq. 15)
Let’s select the closest standard value which is: RCS1 =
270 kW.
Now let’s recalculate KCS to see if the new value is within
138 ±10%
The newly calculated KCS value is:
270 k ) 22 k
C AUX
The closest standard value is: RAUX = 47 W.
+ 22 k @ (138 @ 0.1 * 1) + 281.6 kW
K CS +
100 n
References
[1] Application Note AND9218/D “5 Key Steps to
Designing a Compact, High-Efficiency PFC Stage
Using the NCP1602” which can be downloaded at:
http://www.onsemi.com/pub_link/Collateral/
AND9218−D.PDF
(eq. 18)
+ 2.19 nF
(eq. 19)
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