NSBC123TPDP6 Complementary Bias Resistor Transistors R1 = 2.2 kW, R2 = 8 kW NPN and PNP Transistors with Monolithic Bias Resistor Network This series of digital transistors is designed to replace a single device and its external resistor bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. http://onsemi.com PIN CONNECTIONS (3) (2) R1 (1) R2 Q1 Q2 Features R2 • S and NSV Prefix for Automotive and Other Applications (4) (5) (6) MARKING DIAGRAMS MAXIMUM RATINGS (TA = 25°C both polarities Q1 (PNP) and Q2 (NPN), unless otherwise noted) R1 A • • • • Requiring Unique Site and Control Change Requirements; AEC-Q101 Qualified and PPAP Capable Simplifies Circuit Design Reduces Board Space Reduces Component Count These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 1 A M G MG G SOT−963 CASE 527AD = Specific Device Code = Date Code* = Pb−Free Package Symbol Max Unit Collector−Base Voltage VCBO 50 Vdc Collector−Emitter Voltage VCEO 50 Vdc (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. Rating Collector Current − Continuous IC 100 mAdc Input Forward Voltage VIN(fwd) 12 Vdc Input Reverse Voltage −NPN −PNP VIN(rev) Vdc 6 5 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. ORDERING INFORMATION Device NSBC123TPDP6T5G Package Shipping† SOT−963 8,000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2012 September, 2012 − Rev. 0 1 Publication Order Number: DTC123TP/D NSBC123TPDP6 THERMAL CHARACTERISTICS Characteristic Symbol Max Unit 231 269 1.9 2.2 mW NSBC123TPDP6 (SOT−963) One Junction Heated Total Device Dissipation TA = 25°C (Note 1) (Note 2) (Note 1) (Note 2) Derate above 25°C Thermal Resistance, Junction to Ambient (Note 1) (Note 2) PD RqJA mW/°C 540 464 °C/W 339 408 2.7 3.3 mW NSBC123TPDP6 (SOT−963) Both Junction Heated (Note 3) Total Device Dissipation TA = 25°C (Note 1) (Note 2) (Note 1) (Note 2) Derate above 25°C Thermal Resistance, Junction to Ambient (Note 1) (Note 2) Junction and Storage Temperature Range 1. FR−4 @ 100 mm2, 1 oz. copper traces, still air. 2. FR−4 @ 500 mm2, 1 oz. copper traces, still air. 3. Both junction heated values assume total power is sum of two equally powered channels. http://onsemi.com 2 PD mW/°C RqJA 369 306 °C/W TJ, Tstg −55 to +150 °C NSBC123TPDP6 ELECTRICAL CHARACTERISTICS (TA = 25°C both polarities Q1 (PNP) and Q2 (NPN), unless otherwise noted) Symbol Characteristic Min Typ Max − − 100 − − 500 − − 4.0 50 − − 50 − − 160 350 − − − 0.25 − − 0.6 0.6 − − − − 0.9 0.9 − − − − 0.2 4.9 − − Unit OFF CHARACTERISTICS Collector−Base Cutoff Current (VCB = 50 V, IE = 0) ICBO Collector−Emitter Cutoff Current (VCE = 50 V, IB = 0) ICEO Emitter−Base Cutoff Current (VEB = 6.0 V, IC = 0) IEBO Collector−Base Breakdown Voltage (IC = 10 mA, IE = 0) V(BR)CBO Collector−Emitter Breakdown Voltage (Note 4) (IC = 2.0 mA, IB = 0) V(BR)CEO nAdc nAdc mAdc Vdc Vdc ON CHARACTERISTICS hFE DC Current Gain (Note 4) (IC = 5.0 mA, VCE = 10 V) Collector−Emitter Saturation Voltage (Note 4) (IC = 10 mA, IB = 1.0 mA) VCE(sat) Input Voltage (off) (VCE = 5.0 V, IC = 100 mA) (NPN) (VCE = 5.0 V, IC = 100 mA) (PNP) Vi(off) Input Voltage (on) (VCE = 0.2 V, IC = 10 mA) (NPN) (VCE = 0.2 V, IC = 10 mA) (PNP) Vi(on) Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 kW) VOL Output Voltage (off) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW) VOH Input Resistor R1 1.5 2.2 2.9 Resistor Ratio R1/R2 − − − 4. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%. PD, POWER DISSIPATION (mW) 250 200 (1) (1) SOT−963; 100 mm2, 1 oz. copper trace 150 100 50 0 −50 −25 0 25 50 75 100 125 150 AMBIENT TEMPERATURE (°C) Figure 1. Derating Curve http://onsemi.com 3 Vdc Vdc Vdc Vdc Vdc kW NSBC123TPDP6 TYPICAL CHARACTERISTICS − NPN TRANSISTOR NSBC123TPDP6 1000 IC/IB = 10 150°C 150°C 25°C 0.1 hFE, DC CURRENT GAIN VCE(sat), COLLECTOR−EMITTER VOLTAGE (V) 1 −55°C 0.01 0 10 20 30 40 VCE = 10 V 1 10 100 IC, COLLECTOR CURRENT (mA) IC, COLLECTOR CURRENT (mA) Figure 2. VCE(sat) vs. IC Figure 3. DC Current Gain 100 1.6 IC, COLLECTOR CURRENT (mA) f = 10 kHz IE = 0 V TA = 25°C 1.2 0.8 0.4 0 10 20 30 40 150°C −55°C 1 0.1 VO = 5 V 0.01 50 25°C 10 0 0.4 0.8 1.2 1.6 2.0 VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (V) Figure 4. Output Capacitance Figure 5. Output Current vs. Input Voltage 10 Vin, INPUT VOLTAGE (V) Cob, OUTPUT CAPACITANCE (pF) −55°C 100 10 50 2.0 0 25°C 25°C −55°C 1 150°C 0.1 VO = 0.2 V 0 10 20 30 40 IC, COLLECTOR CURRENT (mA) Figure 6. Input Voltage vs. Output Current http://onsemi.com 4 50 2.4 NSBC123TPDP6 TYPICAL CHARACTERISTICS − PNP TRANSISTOR NSBC123TPDP6 1000 IC/IB = 10 150°C hFE, DC CURRENT GAIN VCE(sat), COLLECTOR−EMITTER VOLTAGE (V) 1 25°C 150°C 0.1 −55°C −55°C 10 VCE = 10 V 0.01 0 10 20 30 40 1 50 10 100 IC, COLLECTOR CURRENT (mA) Figure 7. VCE(sat) vs. IC Figure 8. DC Current Gain 100 5 IC, COLLECTOR CURRENT (mA) f = 10 kHz IE = 0 A TA = 25°C 6 4 3 2 1 0 10 20 30 40 150°C 10 25°C 1 0.1 0.01 VO = 5 V 0.001 50 −55°C 0 1 2 VR, REVERSE VOLTAGE (V) Vin, INPUT VOLTAGE (V) Figure 9. Output Capacitance Figure 10. Output Current vs. Input Voltage 100 Vin, INPUT VOLTAGE (V) 0 1 IC, COLLECTOR CURRENT (mA) 7 Cob, OUTPUT CAPACITANCE (pF) 25°C 100 10 25°C −55°C 1 150°C 0.1 VO = 0.2 V 0 10 20 30 40 IC, COLLECTOR CURRENT (mA) Figure 11. Input Voltage vs. Output Current http://onsemi.com 5 50 3 NSBC123TPDP6 PACKAGE DIMENSIONS SOT−963 CASE 527AD ISSUE E D X Y 6 5 4 1 2 3 HE E e 6X 6X BOTTOM VIEW DIM A b C D E e HE L L2 C SIDE VIEW TOP VIEW 6X L2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. A L MILLIMETERS MIN NOM MAX 0.34 0.37 0.40 0.10 0.15 0.20 0.07 0.12 0.17 0.95 1.00 1.05 0.75 0.80 0.85 0.35 BSC 0.95 1.00 1.05 0.19 REF 0.05 0.10 0.15 b 0.08 X Y RECOMMENDED MOUNTING FOOTPRINT 6X 6X 0.35 0.20 PACKAGE OUTLINE 1.20 0.35 PITCH DIMENSIONS: MILLIMETERS ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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