NLU1G07 Single Non-Inverting Buffer with Open Drain

NLU1G07
Single Non-Inverting Buffer
with Open Drain Output
The NLU1G07 MiniGatet is an advanced high−speed CMOS
non−inverting buffer with open drain output in ultra−small footprint.
The NLU1G07 input and output structures provide protection when
voltages up to 7.0 V are applied, regardless of the supply voltage.
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MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
High Speed: tPD = 3.8 ns (Typ) @ VCC = 5.0 V
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
Power Down Protection Provided on inputs
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input and Output Pins
Ultra−Small Packages
These are Pb−Free Devices
1
1
NC
1
6
VCC
OVT
IN A
1
5
2
GND
3
UDFN6
MU SUFFIX
CASE 517AA
JM
ULLGA6
1.0 x 1.0
CASE 613AD
JM
ULLGA6
1.2 x 1.0
CASE 613AE
JM
ULLGA6
1.45 x 1.0
CASE 613AF
JM
UDFN6
1.0 x 1.0
CASE 517BX
XM
UDFN6
1.45 x 1.0
CASE 517AQ
XM
NC
4
1
OUT Y
Figure 1. Pinout (Top View)
1
1
IN A
OUT Y
1
Figure 2. Logic Symbol
J
M
PIN ASSIGNMENT
= Device Marking
= Date Code
1
NC
2
IN A
3
GND
ORDERING INFORMATION
4
OUT Y
5
NC
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
6
VCC
FUNCTION TABLE
A
Y
L
H
L
Z
© Semiconductor Components Industries, LLC, 2012
July, 2012 − Rev. 3
1
Publication Order Number:
NLU1G07/D
NLU1G07
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
DC Supply Voltage
−0.5 to +7.0
V
VIN
DC Input Voltage
−0.5 to +7.0
V
DC Output Voltage
−0.5 to +7.0
V
VIN < GND
−20
mA
VOUT < GND
±20
mA
VOUT
Parameter
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Source/Sink Current
±12.5
mA
ICC
DC Supply Current Per Supply Pin
±25
mA
IGND
DC Ground Current per Ground Pin
±25
mA
TSTG
Storage Temperature Range
−65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction Temperature Under Bias
150
°C
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
ILATCHUP
Level 1
Oxygen Index: 28 to 34
ESD Withstand Voltage
UL 94 V−0 @ 0.125 in
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
Latchup Performance Above VCC and Below GND at 125°C (Note 5)
> 2000
> 200
N/A
V
±500
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA / JESD22−A114−A.
3. Tested to EIA / JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
1.65
5.5
V
VCC
Positive DC Supply Voltage
VIN
Digital Input Voltage
0
5.5
V
Output Voltage
0
5.5
V
−55
+125
°C
0
0
100
20
ns/V
VOUT
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
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2
NLU1G07
DC ELECTRICAL CHARACTERISTICS
Symbol
VIH
VIL
VOL
ILKG
Parameter
Conditions
Low−Level Input
Voltage
Low−Level Input
Voltage
Low−Level
Output Voltage
VCC
(V)
TA = +855C
TA = 25 5C
Min
Typ
Max
Min
1.65
0.75 x
VCC
0.75 x
VCC
2.3 to
5.5
0.70 x
VCC
0.70 x
VCC
Max
TA = −555C
to +1255C
Min
Max
V
1.65
0.25 x
VCC
0.25 x
VCC
0.25 x
VCC
2.3 to
5.5
0.30 x
VCC
0.30 x
VCC
0.30 x
VCC
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0
0
0
Unit
VIN = VIH or VIL
IOL = 50 mA
2.0
3.0
4.5
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
V
Z−State Output
Leakage Current
VIN = VIH, VOUT
= VCC or GND
5.5
±0.25
±2.5
±5.0
mA
Input Leakage
Current
0 = VIN = 5.5 V
0 to
5.5
±0.1
±1.0
±1.0
mA
IOFF
Power off Input
Leakage Current
0 VIN,
VOUT = 5.5 V
0.0
0.25
2.5
5
mA
ICC
Quiescent Supply
Current
0 VIN VCC
5.5
1.0
20
40
mA
TA = +855C
TA = −555C
to +1255C
IIN
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Symbol
tPZL
Parameter
Output Enable
Time, Input A to
Output Y
VCC
(V)
Test Condition
3.0 to
3.6
Max
Unit
8.5
10.0
ns
10.6
12.0
14.5
3.8
5.5
6.5
8.0
RL = R1 = 50 W,
CL = 50 pF
5.3
7.5
8.5
10.0
3.0 to
3.6
RL = R1 = 50 W,
CL = 50 pF
7.5
10.6
12.0
14.5
4.5 to
5.5
RL = R1 = 50 W,
CL = 50 pF
5.3
7.5
8.5
10.0
4
10
10
10.0
4.5 to
5.5
tPLZ
Output Disable
Time
CIN
Input Capacitance
CPD
Power Dissipation
Capacitance
(Note 6)
TA = 25 5C
Min
Typ
Max
RL = R1 = 50 W,
CL = 15 pF
5.0
7.1
RL = R1 = 50 W,
CL = 50 pF
7.5
RL = R1 = 50 W,
CL = 15 pF
5.0
18
Min
Max
Min
ns
pF
pF
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without
load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no−load
dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC.
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3
NLU1G07
VCC 2
50%
tPZL
Y
R1
VCC
A
tPLZ
50% VCC
A
GND
HIGH
IMPEDANCE
CL *
RL
VOL 0.3 V
*Includes jig and probe capacitance.
RL = R1 = 500 W
Figure 3. Switching Waveforms
Figure 4. Test Circuit
VCC
A
1.5 V to 7 V
OVT
RL
Figure 5. Output Voltage Mismatch Application
ORDERING INFORMATION
Package
Shipping†
UDFN6, 1.2 x 1.0, 0.4P
(Pb−Free)
3000 / Tape & Reel
NLU1G07AMX1TCG
ULLGA6, 1.45 x 1.0, 0.5P
(Pb−Free)
3000 / Tape & Reel
NLU1G07BMX1TCG
ULLGA6, 1.2 x 1.0, 0.4P
(Pb−Free)
3000 / Tape & Reel
NLU1G07CMX1TCG
ULLGA6, 1.0 x 1.0, 0.35P
(Pb−Free)
3000 / Tape & Reel
NLU1G07AMUTCG
UDFN6, 1.45 x 1.0, 0.5P
(Pb−Free)
3000 / Tape & Reel
NLU1G07CMUTCG
UDFN6, 1.0 x 1.0, 0.35P
(Pb−Free)
3000 / Tape & Reel
Device
NLU1G07MUTCG
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NLU1G07
PACKAGE DIMENSIONS
UDFN6 1.45x1.0, 0.5P
CASE 517AQ
ISSUE O
A
B
D
PIN ONE
REFERENCE
0.10 C
L1
ÉÉÉ
ÉÉÉ
DETAIL A
E
OPTIONAL
CONSTRUCTIONS
DETAIL B
A1
SIDE VIEW
MOLD CMPD
OPTIONAL
CONSTRUCTIONS
A
0.05 C
DIM
A
A1
A2
b
D
E
e
L
L1
DETAIL B
0.05 C
6X
A2
6X
C
6X
SEATING
PLANE
0.30
PACKAGE
OUTLINE
L
1.24
3
1
DETAIL A
6X
0.53
4
BOTTOM VIEW
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.07 REF
0.20
0.30
1.45 BSC
1.00 BSC
0.50 BSC
0.30
0.40
−−−
0.15
MOUNTING FOOTPRINT
e
6
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
ÉÉ
ÉÉ
EXPOSED Cu
TOP VIEW
0.10 C
L
L
6X
0.50
PITCH
DIMENSIONS: MILLIMETERS
b
0.10 C A B
0.05 C
1
NOTE 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5
NLU1G07
PACKAGE DIMENSIONS
UDFN6 1.0x1.0, 0.35P
CASE 517BX
ISSUE O
PIN ONE
REFERENCE
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
A B
D
ÉÉÉ
ÉÉÉ
ÉÉÉ
E
0.10 C
2X
0.10 C
DIM
A
A1
A3
b
D
E
e
L
L1
TOP VIEW
A3
0.05 C
A
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.12
0.22
1.00 BSC
1.00 BSC
0.35 BSC
0.25
0.35
0.30
0.40
0.05 C
SIDE VIEW
A1
C
RECOMMENDED
SOLDERING FOOTPRINT*
SEATING
PLANE
5X
e
5X
0.48
L
6X
0.22
3
1
L1
1.18
6
4
BOTTOM VIEW
6X
b
0.10
M
C A B
0.05
M
C
0.53
1
PKG
OUTLINE
NOTE 3
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
6
NLU1G07
PACKAGE DIMENSIONS
UDFN6, 1.2x1.0, 0.4P
CASE 517AA
ISSUE C
EDGE OF PACKAGE
PIN ONE
REFERENCE
2X
0.10 C
ÉÉ
ÉÉ
ÉÉ
L1
E
DETAIL A
Bottom View
(Optional)
TOP VIEW
2X
EXPOSED Cu
0.10 C
(A3)
0.10 C
A1
A
10X
0.08 C
ÉÉÉ
ÉÉÉ
A3
DETAIL B
Side View
(Optional)
5X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.30
0.40
0.00
0.15
0.40
0.50
MOUNTING FOOTPRINT*
6X
C
A1
DIM
A
A1
A3
b
D
E
e
L
L1
L2
MOLD CMPD
SEATING
PLANE
SIDE VIEW
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
D
6X
0.42
0.22
L
3
L2
6X
b
0.10 C A B
0.05 C
6
4
0.40
PITCH
e
NOTE 3
1.07
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
NLU1G07
PACKAGE DIMENSIONS
ULLGA6 1.0x1.0, 0.35P
CASE 613AD
ISSUE A
PIN ONE
REFERENCE
0.10 C
ÉÉ
ÉÉ
ÉÉ
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
A
B
D
E
DIM
A
A1
b
D
E
e
L
L1
TOP VIEW
0.05 C
A
6X
0.05 C
MOUNTING FOOTPRINT
SOLDERMASK DEFINED*
SEATING
PLANE
SIDE VIEW
C
A1
e
5X
L
MILLIMETERS
MIN
MAX
−−−
0.40
0.00
0.05
0.12
0.22
1.00 BSC
1.00 BSC
0.35 BSC
0.25
0.35
0.30
0.40
5X
0.48
NOTE 4
3
1
6X
0.22
1.18
L1
0.53
6
4
6X
b
0.35
PITCH
DIMENSIONS: MILLIMETERS
0.10 C A B
BOTTOM VIEW
1
PKG
OUTLINE
0.05 C
NOTE 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
8
NLU1G07
PACKAGE DIMENSIONS
ULLGA6 1.2x1.0, 0.4P
CASE 613AE
ISSUE A
PIN ONE
REFERENCE
0.10 C
ÉÉ
ÉÉ
ÉÉ
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
A
B
D
E
DIM
A
A1
b
D
E
e
L
L1
TOP VIEW
0.05 C
A
6X
0.05 C
MOUNTING FOOTPRINT
SOLDERMASK DEFINED*
SEATING
PLANE
SIDE VIEW
C
A1
e
5X
L
MILLIMETERS
MIN
MAX
−−−
0.40
0.00
0.05
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.25
0.35
0.35
0.45
5X
0.49
NOTE 4
3
1
1.24
L1
0.53
6
4
6X
b
0.10 C A B
BOTTOM VIEW
6X
0.26
0.05 C
NOTE 3
1
PKG
OUTLINE
0.40
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
9
NLU1G07
PACKAGE DIMENSIONS
ULLGA6 1.45x1.0, 0.5P
CASE 613AF
ISSUE A
PIN ONE
REFERENCE
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
4. A MAXIMUM OF 0.05 PULL BACK OF THE
PLATED TERMINAL FROM THE EDGE OF THE
PACKAGE IS ALLOWED.
A
B
D
ÉÉÉ
ÉÉÉ
ÉÉÉ
E
DIM
A
A1
b
D
E
e
L
L1
TOP VIEW
0.10 C
0.05 C
A
6X
0.05 C
MOUNTING FOOTPRINT
SOLDERMASK DEFINED*
SEATING
PLANE
SIDE VIEW
5X
C
A1
e
5X
L
MILLIMETERS
MIN
MAX
−−−
0.40
0.00
0.05
0.15
0.25
1.45 BSC
1.00 BSC
0.50 BSC
0.25
0.35
0.30
0.40
0.49
NOTE 4
3
1
1.24
L1
0.53
6
4
BOTTOM VIEW
6X
0.30
6X
b
0.10 C A B
0.05 C
NOTE 3
1
PKG
OUTLINE
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
MiniGate is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
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limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
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10
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For additional information, please contact your local
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NLU1G07/D