PACDN004, SZPACDN004 2-Channel ESD Protection Array Product Description The PACDN004 is a diode array designed to provide two channels of ESD protection for electronic components or sub−systems. Each channel consists of a pair of diodes which steers the ESD current pulse either to the positive (VP) or negative (VN) supply. The PACDN004 will protect against ESD pulses up to ±15 kV Human Body Model, and ±8 kV contact discharge per International Standard IEC 61000−4−2. This device has identical characteristics as the PACDN006 (6−channel array). They can be used together in order to provide a larger number of protected inputs if required. This device is particularly well−suited for a wide range of portable electronics (e.g. cellular phones, PDAs, notebook computers) because of its small package footprint, high ESD protection level and low loading capacitance. It is also suitable for protecting video output lines and I/O ports in computers and peripherals. The PACDN004 is available with RoHS compliant lead−free finishing. www.onsemi.com SOT−143 PACDN004SR CASE 527AF SOT−143 SZPACDN004SR CASE 318A SIMPLIFIED ELECTRICAL SCHEMATIC VP 4 2 3 CH1 CH2 Features • Two Channels of ESD Protection • ±8 kV Contact, ±15 kV Air ESD Protection per Channel • • • • • • (IEC 61000−4−2 Standard) ±15 kV of ESD Protection per Channel (HBM) Low Loading Capacitance of 3 pF Typical Low Leakage Current is Ideal for Battery−Powered Devices Miniature 4−Pin SOT−143 Package SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant 1 VN MARKING DIAGRAM D014 D014 = PACDN004SR Applications • • • • • • • Consumer Electronic Products Cellular Phones PDAs Notebook Computers Desktop PCs Digital Cameras and Camcorders VGA (Video) Port Protection for Desktop and Portable PCs © Semiconductor Components Industries, LLC, 2015 July, 2015 − Rev. 5 1 ORDERING INFORMATION Package Shipping† PACDN004SR SOT−143 (Pb−Free) 3000/Tape & Reel SZPACDN004SR SOT−143 (Pb−Free) 3000/Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: PACDN004/D PACDN004, SZPACDN004 TYPICAL APPLICATION CIRCUIT VCC 1 4 PACDN004 0.22 mF* Video Driver 2 Camera Video Connector NTSC Video Digital Camera Video Port ESD Protection * Decoupling capacitor must be placed as close as possible to Pin4. PACKAGE / PINOUT DIAGRAM Top View 1 CH1 2 4 VP 3 CH2 D014 VN SOT−143 Table 1. PIN DESCRIPTIONS PACDN004 (SOT−143) Pin Name Type Description 1 VN GND 2 CH1 I/O ESD Channel 1 3 CH2 I/O ESD Channel 2 4 VP Supply Negative Voltage Supply Rail or Ground Reference Rail Positive Voltage Supply Rail www.onsemi.com 2 PACDN004, SZPACDN004 SPECIFICATIONS Table 2. ABSOLUTE MAXIMUM RATINGS Parameter Rating Units Supply Voltage (VP − VN) 6.0 V Diode Forward DC Current (Note 1) 20 mA Operating Temperature Range −40 to +85 °C Storage Temperature Range −65 to +150 °C (VN − 0.5) to (VP + 0.5) V 225 mW DC Voltage at any Channel Input Package Power Rating Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Only one diode conducting at a time. Table 3. STANDARD OPERATING CONDITIONS Parameter Operating Temperature Range Operating Supply Voltage (VP − VN) Rating Units −40 to +85 °C 0 to 5.5 V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1) Symbol Parameter Conditions IP Supply Current (VP − VN) = 5.5 V VF Diode Forward Voltage IF = 20 mA ILEAK CIN VESD VCL Min ESD Protection Peak Discharge Voltage at any Channel Input, in System a) Human Body Model, MIL−STD−883, Method 3015 b) Contact Discharge per IEC 61000−4−2 Standard c) Air Discharge per IEC 61000−4−2 Channel Clamp Voltage Max Units 10 mA 0.95 V ±0.1 ±1.0 mA 3 5 pF 0.65 Channel Leakage Current Channel Input Capacitance Typ @ 1 MHz, VP = 5 V, VN = 0 V, VIN = 2.5 V kV (Note 2) (Notes 2 and 3) ±15 (Notes 2 and 4) ±8 (Notes 2 and 4) ±15 @ 15 kV ESD HBM (Notes 2 and 3) Positive Transients Negative Transients V VP + 13.0 VN − 13.0 Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. All parameters specified at TA = 25°C unless otherwise noted. VP = 5 V, VN = 0 V unless noted. 2. From I/O pins to VP or VN only. VP bypassed to VN with a 0.22 mF ceramic capacitor (see Application Information for more details). 3. Human Body Model per MIL−STD−883, Method 3015, CDischarge = 100 pF, RDischarge = 1.5 kW, VP = 5.0 V, VN grounded. 4. Standard IEC 61000−4−2 with CDischarge = 150 pF, RDischarge = 330 W, VP = 5.0 V, VN grounded. www.onsemi.com 3 PACDN004, SZPACDN004 PERFORMANCE INFORMATION Input Capacitance vs. Input Voltage Figure 1. Typical Variation of CIN vs. VIN (VP = 5 V, VN = 0 V, 0.1 mF Chip Capacitor between VP and VN) APPLICATION INFORMATION Design Considerations In order to realize the maximum protection against ESD pulses, care must be taken in the PCB layout to minimize parasitic series inductances on the Supply/Ground rails as well as the signal trace segment between the signal input (typically a connector) and the ESD protection device. Refer to Application of Positive ESD Pulse between Input Channel and Ground, which illustrates an example of a positive ESD pulse striking an input channel. The parasitic series inductance back to the power supply is represented by L1 and L2. The voltage VCL on the line being protected is: V CL + FwdVoltageDropofD 1 ) V SUPPLY ) L 1 d(I ESD)ńdt ) L 2 d(I ESD)ńdt where IESD is the ESD current pulse, and VSUPPLY is the positive supply voltage. An ESD current pulse can rise from zero to its peak value in a very short time. As an example, a level 4 contact discharge per the IEC61000−4−2 standard results in a current pulse that rises from zero to 30 Amps in 1 ns. Here d(IESD)/dt can be approximated by DIESD/Dt, or 30/(1x10−9). So just 10 nH of series inductance (L1 and L2 combined) will lead to a 300 V increment in VCL! Similarly for negative ESD pulses, parasitic series inductance from the VN pin to the ground rail will lead to drastically increased negative voltage on the line being protected. Another consideration is the output impedance of the power supply for fast transient currents. Most power supplies exhibit a much higher output impedance to fast transient current spikes. In the VCL equation above, the VSUPPLY term, in reality, is given by (VDC + IESD x ROUT), where VDC and ROUT are the nominal supply DC output voltage and effective output impedance of the power supply respectively. As an example, a ROUT of 1ĂW would result in a 10 V increment in VCL for a peak IESD of 10 A. If the inductances and resistance described above are close to zero, the rail−clamp ESD protection diodes will do a good job of protection. However, since this is not possible in practical situations, a bypass capacitor must be used to absorb the very high frequency ESD energy. So for any brand of rail−clamp ESD protection diodes, a bypass capacitor should be connected between the VP pin of the diodes and the ground plane (VN pin of the diodes) as shown in the Application Circuit diagram below. A value of 0.22 mF is adequate for IEC−61000−4−2 level 4 contact discharge protection (±8 kV). Ceramic chip capacitors mounted with short printed circuit board traces are good choices for this application. Electrolytic capacitors should be avoided as they have poor high frequency characteristics. For extra protection, connect a zener diode in parallel with the bypass capacitor to mitigate www.onsemi.com 4 PACDN004, SZPACDN004 the effects of the parasitic series inductance inherent in the capacitor. The breakdown voltage of the zener diode should be slightly higher than the maximum supply voltage. As a general rule, the ESD Protection Array should be located as close as possible to the point of entry of expected electrostatic discharges. The power supply bypass capacitor mentioned above should be as close to the VP pin of the Protection Array as possible, with minimum PCB trace lengths to the power supply, ground planes and between the signal input and the ESD device to minimize stray series inductance. Additional Information See also ON Semiconductor Application Notes AP209, “Design Considerations for ESD Protection” and AP219, “ESD Protection for USB 2.0 Systems”. L2 POSITIVE SUPPLY RAIL VP ÇÇÇÇÇÇ ÇÇÇÇÇÇ ÇÇÇÇÇÇ ÇÇÇÇÇÇ ÇÇÇÇÇÇ ÇÇÇÇÇÇ D1 0.22 mF D2 VN ONE CHANNEL OF PACDN004 ÇÇÇÇÇÇ ÇÇÇÇÇÇ ÇÇÇÇÇÇ ÇÇÇÇÇÇ ÇÇÇÇÇÇ ÇÇÇÇÇÇ PATH OF ESD CURRENT PULSE IESD LINE BEING PROTECTED L1 BEING PROTECTED CHANNEL INPUT 20 A 0A SYSTEM OR CIRCUITRY VCL GROUND RAIL CHASSIS GROUND Figure 2. Application of Positive ESD Pulse between Input Channel and Ground www.onsemi.com 5 PACDN004, SZPACDN004 PACKAGE DIMENSIONS SOT−143 CASE 318A−06 ISSUE U D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIM UM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PRO TRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, AND GATE BURRS SHALL NOT EXCEED 0.25 PER SIDE. DIMENSION E1 DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH AND PROTRUSION SHALL NOT EXCEED 0.25 PER SIDE. 5. DIMENSIONS D AND E1 ARE DETERMINED AT DATUM H. 6. DATUMS A AND B ARE DETERMINED AT DATUM H. e D A GAUGE PLANE E SEATING PLANE L L2 DETAIL A E1 b1 e1 B 3X b 0.20 TOP VIEW H c A A1 SIDE VIEW C A-B D M c 0.10 C C DETAIL A SEATING PLANE END VIEW RECOMMENDED SOLDERING FOOTPRINT 1.92 4X 0.75 2.70 0.20 3X 0.96 0.54 DIMENSIONS: MILLIMETERS www.onsemi.com 6 DIM A A1 b b1 c D E E1 e e1 L L2 MILLIMETERS MIN MAX 0.80 1.12 0.01 0.15 0.30 0.51 0.76 0.94 0.08 0.20 2.80 3.05 2.10 2.64 1.20 1.40 1.92 BSC 0.20 BSC 0.35 0.70 0.25 BSC PACDN004, SZPACDN004 PACKAGE DIMENSIONS SOT−143, 4 Lead CASE 527AF ISSUE A D SYMBOL MIN e A 0.80 1.22 A1 0.05 0.15 A2 0.75 b 0.30 0.50 b2 0.76 0.89 c 0.08 D 2.80 4 3 E1 1 E 2 e1 E 2.10 E1 1.20 e b 0.40 0.20 2.90 3.04 1.30 1.40 2.64 0.50 L1 0.54 REF L2 0.25 θ 0° 0.60 8° q A 1.07 0.20 BSC L A2 0.90 MAX 1.92 BSC e1 TOP VIEW NOM c L2 L b2 A1 L1 SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC TO-253. 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