Atmel | SMART SAMA5D3 Series SAMA5D3 Xplained USER GUIDE ED AIN XPL 3 5D MA SA Introduction This user guide introduces the Atmel® SAMA5D3 Xplained evaluation kit and describes the development and debugging capabilities for applications running on a SAMA5D36 ARM®-based embedded microprocessor unit (eMPU). Scope This guide provides details on the SAMA5D3 Xplained evaluation kit. It is made up of four main sections: Section 1. describes the evaluation kit content and its main features. Section 2. provides instructions to power up the SAMA5D3 Xplained board. Section 3. provides an overview of the SAMA5D3 Xplained board. Section 4. describes the SAMA5D3 Xplained board components. SMART Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Contents Boards ̶ One SAMA5D3 Xplained board Cables ̶ One micro-AB type USB cable A welcome letter Related Items 2 Atmel SAMA5D3 Series Datasheet SAMA5D3 Xplained Getting Started SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Table of Contents 1. Evaluation Kit Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 1.2 2. Power Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 2.2 3. Board Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Function Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Other Connector Details and PIO Usage Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 SAMA5D3 Xplained Board Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Errata . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 5.1 5.2 5.3 6. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Equipment List. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Board features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Board Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 4.2 4.3 4.4 5. Power up the Board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Sample Code and Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Hardware Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 3.2 3.3 4. Electrostatic Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Power Supply Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 The SPI lines available on the LCD connector J22 have been swapped.. . . . . . . . . . . . . . . . . . . . . 60 JP1 routing is incorrect and results in inaccurate VDDCORE current measurement . . . . . . . . . . . . 61 The TWI1 pull-up charge is excessive. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 3 1. Evaluation Kit Specifications Table 1-1. Evaluation Kit Specifications Characteristic Specifications Operating 0°C to +70°C Storage -40°C to +85°C Temperature 1.1 Relative Humidity 0 to 90% (non-condensing) RoHS status Compliant Ordering code ATSAMA5D3-XPLD Electrostatic Warning WARNING Electrostatic sensitive device 1.2 ESD-Sensitive Electronic Equipment! The evaluation kit is shipped in a protective anti-static package. The board system must not be subject to high electrostatic potentials. We strongly recommend using a grounding strap or similar ESD protective device when handling the board in hostile ESD environments (offices with synthetic carpet, for example). Avoid touching the component pins or any other metallic element on the board. Power Supply Warning WARNING WARNING Hardware Power Supply Limitation Using a power adapter greater than 5Vcc (e.g. the 12Vcc power adapters from other kits such as Arduino kits) may damage the board. Hardware Power Budget Using the USB as the main power source (max. 500 mA) is acceptable only with the use of the on-board peripherals and low-power LCD extension. When external peripheral or add-on boards need to be powered, we recommend the use of an external power adapter connected to a J2 DC Jack (can provide up to 1.2A on the 3.3V node). 4 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 2. Power Up Several power source options are available to power up the SAMA5D3 Xplained board. The board can be: USB-powered through the USB Micro-AB connector (J6 connector - default configuration) Powered through an external AC-to-DC adapter connected via a 2.1 mm center-positive plug into the optional power jack of the board. The recommended output voltage range of the power adapter is 5V at 2A. Powered through the Arduino shield. WARNING 2.1 Unlike Arduino Uno boards, the SAMA5D3 Xplained board runs at 3.3V. The maximum voltage that the I/O pins can tolerate is 3.3V. Providing higher voltages (e.g. 5V) to an I/O pin could damage the board. Power up the Board Unpack the board, taking care to avoid electrostatic discharge. Simply connect the USB Micro-AB cable to the connector (J6).Then, connect the other end of the cable to a free USB port of your PC. Table 2-1. 2.2 Electrical Characteristics Electrical Parameter Values Input voltage 5 VCC Maximum input voltage 6 VCC Max DC 3.3V current available 1.2A I/O Voltage 3.3V only Sample Code and Technical Support After booting up the board, you can run sample code or your own application on the board. You can download sample code and get technical support from the Atmel website. Linux software and demos can be found on the website Linux4SAM. SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 5 3. Hardware Introduction 3.1 Introduction The Atmel SAMA5D3 Xplained board is a fully-featured evaluation platform for Atmel SAMA5D3 series microcontrollers. It allows users to extensively evaluate, prototype and create application-specific designs. 3.2 Equipment List The SAMA5D3 Xplained board is built around the integration of a Cortex®-A5-based microcontroller (BGA 324 package) with external memory, dual Ethernet physical layer transceiver, two SD/MMC interfaces, two host USB ports and one device USB port, one 24-bit RGB LCD interface and one debug interface. Seven headers, compatible with Arduino R3, are available for various shield connections. 6 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 3.3 Board features Table 3-1. Board Specifications Characteristics Specifications PCB characteristics 125 x 75 x 20mm (10-layers) Processor SAMA5D36 (324-ball BGA package) ARM Cortex-A5 Processor with ARM v7-A Thumb2® instruction set, core frequency up to 536 MHz. Processor clock sources Memory Optional on-board memory SD/MMC USB Display interface Ethernet Debug port 12-MHz crystal oscillator 32.768-kHz crystal oscillator 2 x 1Gb DDR2 (16M x 16 bits x 8 banks) 1 x 2Gb SLC NAND Flash (256M x 8 bits) One Serial EEPROM SPI One 1-Wire EEPROM One 8-bit SD card connector One optional 4-bit Micro-SD card connector Two USB Hosts with power switch One Micro-AB USB device One LCD interface connector, LCD TFT Controller with overlay, alphablending, rotation, scaling and color space conversion One Gigabit Ethernet PHY (GRMII 10/100/1000) One Ethernet PHY (RMII 10/100) One JTAG interface connector One serial DBGU interface (3.3V level) Arduino R3 compatible set of headers Expansion connectors The SAMA5D36 GPIO,TWI, SPI, USART, UART, Audio and ISI interfaces are accessible through these headers. 5V from USB or power jack or Arduino shield Board supply voltage On-board power regulation is performed by a Power Management Unit (PMU) Battery On-board optional power Cap for CMOS backup User interface Reset, wakeup and free user pushbutton One red user/power LED and one blue user LED SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 7 4. Board Components 4.1 Board Overview The full-featured SAMA5D3 Xplained board integrates several peripherals and interface connectors, as shown in Figure 4-1. Figure 4-1. SAMA5D3 Xplained Board Overview J18 PIO Expansion J20 PIO Expansion SPI Interface 2Gb Nand Flash Memory J19 PIO Expansion J15 PIO Expansion USB Host Interfaces USB A Device Supply Input 1Gb DDR2 Memory SAMA5D36 ATSAMA5D36 CU 1401 A XX XXXXXXXXXX ARM GigaBit Ethernet 1Gb DDR2 Memory Optional Supply Inputt Ethernet 10/100 Voltages and Reset Interface Free User Push Button System Buttons JTAG Interface ADC Inputs Expansion 8 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 ADC Inputs and CAN Interfaces A ector LCD Connector Debug Interface The SAMA5D3 Xplained board is equipped with the interface connectors described in Table 4-1. Table 4-1. 4.2 SAMA5D3 Xplained Board Interface Connectors Header Interfaces to J2 Main power supply J6 USB A device. Supports USB device using a Micro-AB connector J7 (upper) USB B Host. Supports USB host using a type A connector J7 (lower) USB C Host. Supports USB host using a type A connector J23 Serial DBGU 3.3V level J24 JTAG, 20-pin IDC connector J10 SD/MMC connector J11 Micro-SD connector J12 Gigabit Ethernet ETH0 J13 Ethernet ETH1 J22 Expansion connector with all LCD controller signals for display module connection (QTouch®, TFT LCD display with Touch Screen and backlight C41 Optional SuperCap J14–J21 Expansion connectors with Arduino R3 compatible PIO signals – Various test points located on the board Function Blocks Figure 4-2. Evaluation Kit Architecture Push Buttons Reset Force PwrOn Single PMU Solution 5V INPUT USB DEVICE 5V & 3V3 USB A,B,C Power rails ATMEL USB Host x2 JTAG & DBGU USER LEDS PIO SAMA5D36 CORTEX-A5 PROCESSOR VBAT JTAG DBGU 2Gb DDR2 SDRAM (Up to 4Gb) Expansion Headers EBI 2Gb NAND FLASH ANALOG Reference (Up to 4Gb) PIO A,...E LCD Connector PIO A,...E SD CARD Micro SD CARD SERIAL DATA FLASH 10/100/1000 FAST ETHERNET ETH0 10/100 ETHERNET ETH1 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 9 4.2.1 Processor The SAMA5D3 Xplained board is built around the SAMA5D36, a Cortex-A5 application processor which combines high-performance computing device with low-power consumption and a wide range of communication peripherals. It features a combination of user interface functionalities and high data rate IOs, including LCD controller, touchscreen, camera interface, Gigabit and 10/100 Ethernet ports, high-speed USB and SDIO. The ARM Cortex-A5 supports the latest generation of DDR2 and NAND Flash memory interfaces for program and data storage. An internal 166-MHz multi-layer bus architecture associated with 24 DMA channels and two 64Kbyte SRAM blocks, sustains the high bandwidth required by the processor and the high-speed peripherals. 4.2.2 Clock Circuitry The SAMA5D3 Xplained evaluation board features four clock sources: Two clocks are alternatives for the SAMA5D3 series processor main clock Two crystal oscillators are used for the GETH and Ethernet MII/RMII chip Table 4-2. Quantity 4.2.3 Main Components Associated with the Clock Systems Description Component Assignment 1 Crystal for internal clock, 12 MHz Y1 1 Crystal for RTC clock, 32.768 kHz Y2 1 Oscillator for ethernet clock RGMII, 25 MHz Y3 1 Oscillator for ethernet clock RMII, 25 MHz Y4 Power Supplies The on-board power supply generation is based on the Active-Semi® Power Management Unit (PMU) featuring a 3-channel (3.3V / 1.8V /1.2V or 1.0V) topology. For maximum efficiency, these supply channels are generated by three integrated step-down converters. In addition to these 3 DCDC channels, 4 LDO channels with low noise and high PSRR performance are available for the application. These channels are disabled at startup by default and can be turned on and adjusted under software control through an I²C link. They are also used to supply the 2.5V VDDFUSE and the 3.3V VDDANA power inputs of the processor. The power supply sequencing of the three primary channels is controlled by the PMU itself in full compliance with the SAMAD3 requirements. The turn-on sequence is: 3.3V first, then 1.8V and finally 1.2V. WARNING There is a known error on the ACT8865 I²C implementation. The port must be shut off after configuration or problems may occur with devices using the same I²C channel, e.g., TM43xx LCD display. Refer to the ACT8865 datasheet at http://www.active-semi.com/ for more details. 10 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Table 4-3 summarizes the power specifications. Table 4-3. Supply Group Configuration Nominal Name Power domains Power source 3.0V VDDBU The slow clock oscillator, the internal 32K RC, the internal 12M RC and a part of the system controller Optional on-board battery 3.3V VDDIOP0 A part of peripheral I/O lines 3.3V VDDIOP1 A part of peripheral I/O lines 3.3V VDDUTMII The three USB interfaces 3.3V VDDOSC The main oscillator cells 3.3V VDDANA The analog-to-digital converter 1.2V VDDCORE The core, including the processor, the embedded memories and the peripherals 1.2V VDDUTMIC The USB UTMI + core 1.2V VDDPLLA The PLLA cell 1.8V VDDIODDR DDR2 interface I/O lines 1.8V VDDIOM NAND, NOR Flash and SMC interface I/O lines ADVREF ADC reference voltage J15 header VDDFUSE Fuse box for programming PMU 3.0V to 3.3V 2.5V Note: PMU PMU Jumper footprints are available on board to measure power consumption on main power lines. By default, the jumpers are not implemented. They are short-circuited by a thin PCB wire. To use this functionality, open the short circuit and mount a 2-pin jumper. SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 11 Figure 4-3. Board Power Management Schematic JP1 DNP(JUMPER) 1 2 VDDCORE AVDDL_PLL L1 1 2 180ohm at 100MHz L2 1 2 180ohm at 100MHz L3 1 2 180ohm at 100MHz AVDDL 5V_MAIN R6 1.5K 1% C1 4.7uF 3V3 R7 1.5K 1% C2 4.7uF C3 4.7uF R4 1R C6 R8 10K R186 [5] SHDN R9 R18 23 VDDREF INL45 INL67 5 6 C5 1uF R5 2R2 JP2 DNP(JUMPER) 10uH60mA C7 4.7uF VDDIODDR 0R DNP(0R) 1K R11 0R 11 12 13 20 18 10 17 nRST0 nIRQ nPBSTAT VSEL NC1 PWRHLD PWREN 21 22 SCL SDA 32 REFBP VDDPLLA L4 C4 1uF 1uF [5,9,10,11] NRST [7] PC31 [5] WKUP [7] PE30 ACT8865 VP1 VP2 VP3 NC2 SW1 OUT1 30 1 L5 SW2 OUT2 27 24 L7 SW3 OUT3 15 19 L9 OUT4 3 OUT5 4 OUT6 7 OUT7 8 2.2uH (1V8) C8 10uF C9 10uF C10 100nF C12 10uF C13 10uF C14 100nF C15 10uF C16 10uF C17 100nF 1 2 3V3 DVDDL 5V_MAIN MN1 31 26 16 25 VDDUTMIC L6 R10 2R2 10uH60mA 2.2uH C11 4.7uF (1V2) JP3 DNP(JUMPER) 3V3 2.2uH (3V3) VDDIOP0 1 2 [7] TWCK_PMIC [7] TWD_PMIC PC27 PC26 L8 1 2 180ohm at 100MHz L10 1 2 180ohm at 100MHz FUSE_2V5 BP1 WAKUP or Force Power ON RESET SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 EXPAD GNDP3 GNDP2 BP2 33 14 GNDP1 GNDA BP1 2 100K 1% 12 nPBIN 2 IRLML2502 C130 10nF 9 R15 0R Q1 3 1 R19 49.9K 28 C25 100nF R12 29 C20 100nF VDDIOP1 (2V5) VDDANA JP4 DNP(JUMPER) VDDIOM (3V3) 1 2 C18 47nF Auto PWRON (option) BP2 R14 50K R13 0R TP1 R16 0R TP2 SMD C22 2.2uF C23 2.2uF C24 2.2uF 2 180ohm at 100MHz VDDOSC L12 SMD C21 2.2uF L11 1 C19 100nF R17 2R2 10uH60mA C26 4.7uF 4.2.3.1 Power Options Several power options are available to configure the SAMA5D3 Xplained board powering scheme. The power sources are selected by a set of 0R resistors. The USB-powered operation is the default configuration. The power source is the USB device port (J6) connected to a PC or a mini-AB 5V DC supply. The USB supply is sufficient to power the board in most applications if USB host ports are not used. If USB host ports are used, it is recommended to use a DC supply source. Schematic diagrams of various power options are illustrated in Figure 4-4. Input Powering Scheme Option Schematic R1 0R R175 0R [5] Vbus 5V_MAIN R2 DNP(0R) R176 DNP(0R) R3 DNP(0R) R177 DNP(0R) [11] 5V_Ext 2 Figure 4-4. D4 3 2 1 1 J2 P4SMAJ5.0A DNP(DC JACK) Note: USB-powered operation is a good “single cable” solution because it combines powering and board control through a unique cable. Consequently, it eliminates the need for other wires and batteries. This power option is suitable for most projects that only require 5 volts at up to 500 mA. 4.2.3.2 Mains Power Adapter A mains power supply adapter can be used to provide power to the board. A regulated 5V DC supply of typically 2A is required but a current range of 3A is recommended if the USB ports and expansion headers are likely to be used. It needs a 2.1 mm plug with a center-hot configuration. If you are using the USB host ports or expansion board Arduino shields, a higher current is required. To supply the full 500 mA per port, a mains power adapter must be used. 4.2.3.3 VBAT By default, VDDBU is delivered through the 3.3V node. An optional SuperCap (C41), used for real-time clock backup, is provided. The board does not come equipped with the SuperCap. When the SuperCap is not installed, an R185 must be installed. You must make sure that the R185 is removed prior to installing the SuperCap. VBAT Powering Scheme Option Schematic 3V3 TP4 SMD 100R D1 (Super)-Capacitor energy storage Populate R185 if no Super Cap (C41) VDDBU 3 BAT54CLT1 R185 C41 1.5K 1% R21 100K 1% R22 DNP(100K) C28 100nF V15 DNP(0.2F/3V3) 3V3 R23 1.5K 1% [4,9,10,11] NRST NRST [11] TDI [11] TMS [11] TCK [11] TDO [11] NTRST TDI TMS TCK TDO NTRST R25 10K T9 R8 N10 P9 M11 P11 V9 JTAGSEL TDI TMS TCK TDO NTRST NRST U15 U9 TST BMS VDDBU C27 10nF [11] VBat Place TP4 to Bottom 2 R20 1 Figure 4-5. SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 13 4.2.4 Reset Circuitry The reset sources for the SAMA5D3 Xplained board are: 4.2.5 Power-on reset from the Power Management Unit (PMU), Reset Pushbutton BP2, JTAG reset from an in-circuit emulator (through JTAG interface) Memory Organization The SAMA5D3x-series processor features a DDR2/SDRAM memory interface and an External Bus Interface (EBI) to interface with a wide range of external memories and to almost any kind of parallel peripherals. The memory devices that equip the SAMA5D3 Xplained evaluation kit are as follows: Two DDR2/SDRAM (MT47H64M16HR) used as main system memory (256 MByte). The board includes 2 Gbits of on-board soldered DDR2 (double data rate) SDRAM. The footprints can also host two DDR2 (MT47H128M16RT) from Micron® for a total of 512 MBytes of DDR2 memory. The memory bus is 32 bits wide and operates with a frequency of up to 166 MHz (See Figure 4-6). One NAND Flash (MT29F2G08ABAEAWP) connected to the processor. The default size is 256 MBytes. The footprint can also host a 4-Gbit Micron chip for a total of 512 MBytes of NAND Flash memory (See Figure 47). Figure 4-6. DDR2 Schematic DDR_D[0..31] MN5 DDR_A[0..13] MN4 VDDIODDR R36 R38 DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 A0 DDR2 SDRAM A1 A2 MT47H64M16HR A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 DDR_BA0 DDR_BA1 DDR_BA2 L2 L3 L1 BA0 BA1 BA2 DNP(1K) K9 ODT 0R DDR_CKE DDR_CLK DDR_CLKN DDR_CS DDR_CAS DDR_RAS DDR_WE DDR_DQS1 R40 4.7K K2 J8 K8 L8 L7 K7 K3 B7 A8 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 CS CAS RAS WE UDQS UDQS DDR_DQS0 R42 4.7K F7 E8 LDQS LDQS DDR_DQM1 DDR_DQM0 B3 F3 UDM LDM A2 E2 R3 R7 RFU1 RFU2 RFU3 RFU4 DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 DDR_D0 DDR_D1 DDR_D2 DDR_D3 DDR_D4 DDR_D5 DDR_D6 DDR_D7 DDR_D8 DDR_D9 DDR_D10 DDR_D11 DDR_D12 DDR_D13 DDR_D14 DDR_D15 VDD VDD VDD VDD VDD A1 E1 J9 M9 R1 C67 C69 C71 C73 C75 VDDL J1 C77 100nF VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 C79 C81 C83 C85 C87 C89 C91 C93 C95 C97 VREF J2 VSS VSS VSS VSS VSS A3 E3 J3 N1 P9 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSDL A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 J7 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 A0 DDR2 SDRAM A1 A2 MT47H64M16HR A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 L2 L3 L1 BA0 BA1 BA2 K9 ODT DDR_CKE K2 CKE DDR_CLK DDR_CLKN J8 K8 CK CK DDR_CS L8 CS DDR_CAS DDR_RAS L7 K7 CAS RAS DDR_WE K3 WE DDR_DQS3 R39 4.7K B7 A8 UDQS UDQS DDR_DQS2 R41 4.7K F7 E8 LDQS LDQS DDR_DQM3 DDR_DQM2 B3 F3 UDM LDM A2 E2 R3 R7 RFU1 RFU2 RFU3 RFU4 DDR_BA0 DDR_BA1 DDR_BA2 VDDIODDR R35 DNP(1K) VDDIODDR CKE CK CK G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 100nF 100nF 100nF 100nF 100nF R37 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF DDR_VREF C100 100nF 0R VDDIODDR L16 10uH60mA C101 4.7uF R45 1R C102 100nF TP3 R46 SMD 1.5K 1% DDR_VREF C103 4.7uF 14 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 C104 100nF R47 1.5K 1% DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 VDD VDD VDD VDD VDD A1 E1 J9 M9 R1 DDR_D16 DDR_D17 DDR_D18 DDR_D19 DDR_D20 DDR_D21 DDR_D22 DDR_D23 DDR_D24 DDR_D25 DDR_D26 DDR_D27 DDR_D28 DDR_D29 DDR_D30 DDR_D31 VDDIODDR C66 C68 C70 C72 C74 100nF 100nF 100nF 100nF 100nF VDDL J1 C76 100nF VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 C78 C80 C82 C84 C86 C88 C90 C92 C94 C96 VREF J2 VSS VSS VSS VSS VSS A3 E3 J3 N1 P9 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSDL A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 J7 DDR_VREF C98 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF Figure 4-7. NAND Flash Schematic VDDIOM R48 100K 1% R49 100K 1% MN6 MT29F2G08ABAEAWP PE22 PE21 NRD NWE R50 100K 1% (NANDCLE) 16 (NANDALE) 17 8 18 (NANDCE) 9 CLE ALE RE WE CE 7 R/B NANDRDY 19 JP5 NCS3 1 2 JUMPER 1 2 3 4 5 6 10 11 14 15 20 23 24 35 21 22 38 WP N.C1 N.C2 N.C3 N.C4 N.C5 N.C6 N.C7 N.C8 N.C9 N.C10 N.C11 N.C12 N.C13 N.C14 DNU1 DNU2 DNU3 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8_N.C I/O9_N.C I/O10_N.C I/O11_N.C I/O12_N.C I/O13_N.C I/O14_N.C I/O15_N.C VCC VCC VCC_N.C VCC_N.C 29 30 31 32 41 42 43 44 26 27 28 33 40 45 46 47 12 37 34 39 VSS VSS VSS_N.C VSS_N.C 13 36 25 48 M_EBI_D0 M_EBI_D1 M_EBI_D2 M_EBI_D3 M_EBI_D4 M_EBI_D5 M_EBI_D6 M_EBI_D7 VDDIOM C105 100nF C106 100nF The following memory part numbers are recommended: Table 4-4. 4.2.6 Recommended Memories Part Number Supplier Size Type MT47H128M16 Micron 2 Gb (16 M x 16 x 8 banks) DDR2 - BGA MT47H128M32 Micron 4 Gb (32 M x 16 x 8 banks) DDR2 - BGA MT29F2G08 Micron 2 Gb NAND Flash - TSOP MT29F4G08 Micron 4 Gb NAND Flash - TSOP SD/MMC Interface The SAMA5D3 Xplained board features two high-speed Multimedia Card Interfaces (MCI). The first interface is used as an 8-bit interface (MCI0), connected to a SD/MMC card slot (J10) located on the bottom side of the PCB. The second interface is used as a 4-bit interface (MCI1), connected to an optional Micro-SD card connector (J11) located on the top side of the PCB. The MCI0 SD card power line is enabled by default. It is PIO-controlled through a MOSFET transistor. Note: The power source is VCC (3.3 volts). 4.2.6.1 J10 SD Card Slot When a card is inserted into the SD/MMC connector, the Card Detect pin (PE0) is tied to ground. SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 15 Figure 4-8. J10 SD Card Schematic VDD_MCI0 2 3 VDDIOP1 VDDIOP1 Q3 IRLML6402 1 R53 100K 1% [7] PE0 [7] PD2 [7] PD1 [7] PD9 [7] PD0 [7] PD4 [7] PD3 R54 R128 R127 R55 C108 10uF C109 100nF DNP(4.7K) R56 10K 10K 68K R125 R124 R123 R126 68K 68K 68K 68K R122 68K 68K 68K R121 PE2 [7] VDDIOM (MCI0_CD) J10 (MCI0_DA1) (MCI0_DA0) (MCI0_CK) R182 16 15 14 8 7 6 5 4 3 2 1 9 22R (MCI0_CDA) (MCI0_DA3) (MCI0_DA2) R57 0R (MCI0_WP) 13 12 11 10 7SDMM-B0-2211 [7] [7] [7] [7] PD5 PD6 PD7 PD8 (MCI0_DA4) (MCI0_DA5) (MCI0_DA6) (MCI0_DA7) 4.2.6.2 J11 SD Card Slot (optional) When a card is inserted into the Micro SD connector, the Card Detect pin is tied to ground. This is detected on pin PE1 of the main processor. Figure 4-9. J11 Micro SD Card Schematic VDDIOP1 PB20 PB21 PB22 PB23 [7] PB19 [7] PB24 [7] PE1 (MCI1_CDA) (MCI1_CK) R183 R112 R58 10K R132 R129 68K 68K R131 (MCI1_DA0) (MCI1_DA1) (MCI1_DA2) (MCI1_DA3) R59 10K DNP(68K) [7] [7] [7] [7] 68K 68K R130 VDDIOM J11 22R (MCI1_CD) 7 8 1 2 DAT0 DAT1 DAT2 DAT3 3 5 CMD CLK 4 6 VDD VSS 9 10 C110 10uF C111 100nF PGND PGND PGND NC NC 11 12 13 14 15 CD PGND DNP(MCTF-0403) Micro SD CARD INTERFACE - MCI1 4.2.7 Serial Peripheral Interface (SPI) The SAMA5D3X-series processor features two high-speed Serial Peripheral Interfaces. One port is used to interface with the optional on-board serial DataFlash®. There are four main signals used in the SPI interface; Clock, Data In, Data Out, and Chip Select. 16 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Optional Serial DataFlash Schematic VDDIOP1 R52 100K 1% VDDIOP1 MN8 PD11 PD10 PD12 (SPI0_MOSI) (SPI0_MIS0) (SPI0_SPCK) 5 2 6 (SPI0_CS) PD13 1 2 Figure 4-10. 1 VCC DQO DQ1 C W/Vpp/DQ2 HOLD/DQ3 S GND 8 3 7 4 C107 100nF DNP(N25Q032A13ESE40F) JP6 JUMPER SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 17 4.2.8 Optional 1-Wire EEPROM The SAMA5D3 Xplained board can use a 1-Wire device as “soft label” to store data such as chip type, manufacturer’s name, production date, etc. Figure 4-11. Optional One-Wire EEPROM Schematic VDDIOM R51 1.5K MN11 PE23 1 IO GND 2 3 NC DNP(DS28E05) MN7 2 1 GND IO 4.2.9 NC1 NC2 NC3 NC4 3 4 5 6 DNP(DS2431) 10/100/100 Ethernet Port The SAMA5D3 Xplained board features a MICREL PHY device (KSZ9031RN) operating at 10/100/1000 Mb/s. The board supports the RGMII interface mode. The Ethernet interface consists of four pairs of low-voltage differential pair signals designated from GRX± and GTX± plus control signals for link activity indicators. These signals are routed to the 10/100/1000 BaseT RJ45 connector (J12). For monitoring and control purposes, LEDs are integrated in the RJ45 connectors to indicate activity, link, and speed status information for the corresponding ports. For more information about the Ethernet controller device, refer to the MICREL KSZ9031RN datasheet. Figure 4-12. Gigabit Ethernet Schematic 10Base-T/100Base-TX/1000BASE-T XI 1 20pF 2 C112 AVDDL_PLL NRST [4,5,10,11] + C113 10uF 20pF C114 10nF C115 10nF L17 1 AVDDH 180ohm at 100MHz 2 + C117 10uF C118 10nF C119 10nF C120 10nF R63 7 8 9 10 TD3+ TD3TD4+ TD4- YELC YELA DNP(0R) C125 C124 100nF GND GND GND GND TCT RCT 11 12 Left Green LED 13 14 Right Yellow LED ETH0_LED1 ACT 49 + C127 10uF ETH0_LED2 LINK C128 10nF C129 10nF 1 2 3 4 5 6 7 8 9 10 11 12 ETH0_A+ ETH0_AETH0_B+ ETH0_BETH0_C+ ETH0_C- 15 16 17 18 48 47 46 45 44 43 42 41 40 39 38 37 AVDDL P_GND ETH0_C+ ETH0_CETH0_D+ ETH0_D- DNP(10uF 0805) PB[0..31] ETH0_D+ ETH0_D- 48F-01GY2DPL2NL G125CK PB18 INT_GETHR PB10 PB17 GMDIO VDDIOP1 C121 10nF AVDDH TXRXP_A TXRXM_A AVDDL TXRXP_B TXRXM_B TXRXP_C TXRXM_C AVDDL TXRXP_D TXRXM_D AVDDH KSZ9031RNI 48-pin QFN C123 10nF C122 10nF MN10 KSZ9031RN ISET AVDDH XI XO AVDDL_PLL LDO_O RESET_N CLK125_NDO DVDDH DVDDL INT_N MDIO GRLA GRLC R72 TD1+ TD1TD2+ TD2- 470R 1 2 3 4 R71 ETH0_A+ ETH0_AETH0_B+ ETH0_B- 470R J12 R111 VDDIOP1 12.1K 1% VDDIOP1 5 6 4.7K 1K 22R [7,8,10,11] VDDIOP1 AVDDH R60 R61 R62 XO XI XO C116 4 3 Y3 25MHz + C126 10uF VDDIOP1 R64 R65 R66 R67 4.7K 4.7K 4.7K 4.7K MDC RX_CLK DVDDH RX_DV RXD0 RXD1 DVDDL VSS RXD2 RXD3 DVDDL TX_EN 36 35 34 33 32 31 30 29 28 27 26 25 R68 22R GMDC GRXCK PB16 PB11 GRX_CTL GRX0 GRX1 PB13 PB4 PB5 GRX2 GRX3 PB6 PB7 GTX_CTL PB9 GTXCK GTX3 GTX2 GTX1 GTX0 PB8 PB3 PB2 PB1 PB0 VSS_PS DVDDL LED2 DVDDH LED1 DVDDL TXD0 TXD1 TXD2 TXD3 DVDDL GTX_CLK EARTH_ETH0 13 14 15 16 17 18 19 20 21 22 23 24 ETH0_GND VDDIOP1 R69 4.7K R73 ETH0_GND 18 0R L18 1 180ohm at 100MHz 2 DVDDL + C132 10uF C133 10nF C134 10nF ETH0_LED2 ETH0_LED1 EARTH_ETH0 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 C135 10nF C136 10nF C137 10nF C138 10nF R70 22R 4.2.10 Ethernet 10/100 Port The SAMA5D3 Xplained board features a MICREL PHY device (KSZ8081RNB) operating at 10/100 Mb/s. The board supports RMII interface modes. The Ethernet interface consists of two pairs of low-voltage differential pair signals designated from GRX± and GTX± plus control signals for link activity indicators. These signals are routed to the 10/100 BaseT RJ45 connector (J13). For monitoring and control purposes, a LED functionality is added on the RJ45 connectors to indicate activity, link, and speed status information for the corresponding ports. For more information about the Ethernet controller device, refer to the MICREL KSZ8081RNB controller manufacturer's datasheet. RMII Ethernet Schematic 4 TX+ TD- 2 TX- TX- 6 TXM 3 RX+ RD+ 3 RX+ RX+ 5 RXP CT 5 RD- 6 RX- RX- 4 RXM 2 VDD_1V2 RX- 75 4 75 C141 2.2uF C142 100nF 75 NC 7 5 1 33 22 26 27 R76 10 GND_ETH1 1nF 75 7 8 8 6.49k/1% EARTH_ETH1 Right yellow LED 19 TXD1 TXD0 TXEN RXD3/PHYAD0 RXD2/PHYAD1 RXD1/PHYAD2 RXD0/DUPLEX RXDV/CONFIG2 RXER/ISO CRS/CONFIG1 COL/CONFIG0 25 24 23 13 14 15 16 18 20 29 28 GND PADDLE TXC TXD2 TXD3 REXT MDC MDIO INTRP/NAND 12 11 21 ETH1_PC3 [7] ETH1_PC2 [7] ETH1_PC5 [7] ETH1_PC6 [7] ETH1_PC8 [7] ETH1_PC9 [7] PB12 [7] E1_AVDDT VDDIOP0 L19 VDDA_3V3 3 10K R115 ETH1_PC7 [7] ETH1_PC1 [7] ETH1_PC0 [7] ETH1_PC4 [7] 1 2 180ohm at 100MHz C143 + C144 100nF 10uF Left Green LED VDDIOP0 R79 470R R80 470R R77 10K 9 10 11 VDDIOP0 12 15 16 C140 100nF RXC/B-CAST_OFF TXP TX- C139 100nF EARTH_ETH1 7 2 6 13 14 TX+ 10K R120 1 CT 10K R119 TD+ R75 1K 10K R118 TX+ R74 1K 10K R117 1 MN9 J13 10K R114 10Base-T/100Base-TX 13F-64GYD2PL2NL VDDIOP0 10K R113 VDDIOP1 10K R116 Figure 4-13. ETH1_LED1 ACT ETH1_LED0 LINK R78 10K ETH1_XO 8 ETH1_XI 9 ETH1_LED0 ETH1_LED1 30 31 XO XI VDDIO 17 C145 + C146 100nF 10uF LED0/NWAYEN LED1/SPEED RESET 32 NRST [4,5,9,11] KSZ8081RNB C147 20pF ETH1_XI 0R L20 1 3 4 Y4 25MHz + C148 10uF R81 1 2 VDDIOP0 C149 2 180ohm at 100MHz ETH1_XO 20pF GND_ETH1 EARTH_ETH1 4.2.11 Indicators Two LEDs are available on the SAMA5D3 Xplained board. Both can be software-controlled by the user. The red LED indicates that power is applied to the board (by default). It can be controlled via software. The blue LED is mainly controlled by one GPIO line. Figure 4-14. LED Indicators Schematic 3V3 [4,7,8,11] R32 470R PE[0..31] PE23 D2 BLUE R33 PE24 1 2 3 Q2 IRLML2502 R34 470R LED 100K 1% D3 RED SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 19 4.2.12 USB The SAMA5D3 Xplained board features three USB communication ports: Port A: High-speed (EHCI) and full-speed (OHCI) host multiplexed with high-speed USB device Micro-AB connector (J6) Port B: High-speed (EHCI) and full-speed (OHCI) host, standard type A connector (J7 upper port) Port C: Full-speed OHCI host, standard type A connector (J7 lower port) The two USB host ports are equipped with 500-mA high-side power switch for self-powered and bus-powered applications. The USB device port A (J6) features a VBUS insert detection function through the ladder-type resistors R26 and R27. USB Interface Schematic 12MHz C51 C5 1 20pF p 20pF p DIBN DIBP VDDUTMIC GNDANA GNDUTMI_1 ADVREF L4 T13 GNDIOM_1 GNDIOM_2 VBG R12 R11 180ohm at 100MHz 2 VDDANA J11 J1 1 T17 HHSDMC HHSDPC GNDIOP_1 GNDIOP_2 GNDIOP_3 GNDIOP_4 HHSDMB HHSDPB V14 U14 J7 N11 N11 U7 E5 V12 U12 HHSDMC HHSDPC GNDIODDR_1 GNDIODDR_2 GNDIODDR_3 GNDIODDR_4 GNDIODDR_5 HHSDMB HHSDPB E14 F10 F13 F15 H14 H1 4 HHSDMA HHSDPA GNDCORE_1 GNDCORE_2 GNDCORE_3 GNDCORE_4 GNDCORE_5 GNDCORE_6 V10 U10 GNDOSC GNDFUSE HHSDMA HHSDPA A16 C9 N13 N1 3 T8 T14 V17 U6 V6 GNDPLL 20pF EARTH_USB_A L21 1 XOUT32 GNDBU 7 6 1 2 3 4 5 V16 T11 P4 C56 C5 6 J6 UBAF-1015P XIN32 1 2 USB A DEVICE INTERFACE U16 VDDUTMII VDDPLLA 32.768K Y2 P10 3 C53 C5 3 8 VDDOSC XOUT MN2H SAMA5D3x_BGA324 [4] Vbus VBUS DM DP ID GND V8 4 100K 1% R27 200K 3 R26 (VBUS_SENSE) [7,11] PE9 4 Figure 4-15. R30 C60 5.62K 1% 10pF EARTH_USB_A R31 0R GNDUTMI GNDUTMI MN3 J7 Dual USB A J7_USB_A_Up 5V_USBB HHSDMB HHSDPB L15 1 5 6 7 8 B 9 10 2 180ohm at 100MHz EARTH_USB J7_USB_B_Down 1 2 3 4 A L13 1 5V_USBC C61 100nF 5V_USBC HHSDMC HHSDPC C62 10uF 5V_USBB 1112 L14 1 C64 100nF C65 10uF 8 2 180ohm at 100MHz 5V_MAIN 7 C63 100nF 2 180ohm at 100MHz OUTA IN ENA 1 EN5V_USBC PE4 [7] FLGA 2 OVCUR_USB PE5 [7] EN5V_USBB PE3 [7] 6 GNG FLGB 3 5 OUTB ENB 4 SP2526A-2E EARTH_USB 4.2.13 Pushbutton Switches The following pushbuttons switches are available: 20 One board reset button (BP2). When pressed and released, this pushbutton causes a power-on reset of the whole board. One wakeup pushbutton that brings the processor out of Low-power mode (BP1) One user pushbutton (BP3) SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Pushbutton Schematic nPBIN 2 100K 1% GNDP1 BP1 2 IRLML2502 C130 10nF 9 R15 0R Q1 3 1 R19 49.9K GNDA C25 100nF R12 REFBP TP5 SMD GNDP2 C20 100nF 32 BP3 [7,11] PE29 28 C18 47nF Auto PWRON (option) 29 R14 50K BP2 Figure 4-16. Place TP5 to Bottom USER BUTTON BP2 BP1 RESET WAKUP or Force Power ON 4.2.14 LCD The SAMA5D36 processor drives 24 bits of data and control signals to the LCD interface. Other signals are used to control the LCD and are also routed to the J22 connector: TWI, SPI, 2 GPIOs for interrupt, ID for 1-Wire EEPROM (ID_SYS) and power supply lines. 4.2.14.1 LCD Connector One 1.27 mm pitch 50-pin header is provided to gain access to the LCD signals. Figure 4-17. LCD Expansion Header Interface Schematic 5V_MAIN 3V3 R92 DNP(0R) R93 0R LCD Connector J22 NRST PE6 (RST_LCD) See Errata section R94 R99 0R DNP(0R) PD20 (AD0) PD12 (SPI0_SPCK) R95 R96 DNP(0R) 22R PD21 (AD1) PD11 (SPI0_MOSI) R100 R97 DNP(0R) 22R PD22 (AD2) PD10 (SPI0_MISO) R98 R101 DNP(0R) 22R PD23 (AD3) R102 PD16 (SPI0_NPCS3) R103 DNP(0R) 22R PA28 (LCDPCK) 22R [7] TWCK_LCD [7] TWD_LCD R184 TWCK_LCD TWD_LCD PA24 (LCDPWM) PE8 (IRQ2) PE7 IRQ1) TWCK_LCD TWD_LCD PA25 (LCDDISP) PA29 (LCDDEN) PA27 (LCDHSYNC) PA26 (LCDVSYNC) PE28 PE27 PC15 PC10 (LCDDAT23) (LCDDAT22) (LCDDAT21) (LCDDAT20) PC11 PC12 PC13 PC14 (LCDDAT19) (LCDDAT18) (LCDDAT17) (LCDDAT16) PA15 PA14 PA13 PA12 (LCDDAT15) (LCDDAT14) (LCDDAT13) (LCDDAT12) PA11 PA10 PA9 PA8 (LCDDAT11) (LCDDAT10) (LCDDAT9) (LCDDAT8) PA7 PA6 PA5 PA4 (LCDDAT7) (LCDDAT6) (LCDDAT5) (LCDDAT4) PA3 PA2 PA1 PA0 (LCDDAT3) (LCDDAT2) (LCDDAT1) (LCDDAT0) PE23 (ID_SYS) 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 52 51 FP520T1-50SR04 4.2.14.2 LCD Power To operate correctly with various LCD modules, regardless of the processor, two voltage lines are available: 3V3 by default and 5V_MAIN, both selected by 0R resistors R92 and R93. SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 21 4.2.15 Debug JTAG/ICE and DBGU 4.2.15.1 Debug JTAG/ICE A 2x10-pin JTAG header is implemented on the SAMA5D3 Xplained board to enable the software development and debugging of the board by using various JTAG emulators. The interface signals have a voltage level of 3.3V. Figure 4-18. JTAG/ICE Interface Schematic JTAG VDDIOP0 3V3 R104 100K 1% R105 100K 1% R106 100K 1% R107 100K 1% J24 2 4 6 8 10 12 14 16 18 20 1 3 5 7 9 11 13 15 17 19 R108 TDI TMS TCK RTCK TDO R109 0R R110 0R 0R NTRST [5] TDI [5] TMS [5] TCK [5] TDO [5] NRST [4,5,9,10] 4.2.15.2 DBGU The SAMA5D3 Xplained board has a dedicated serial port for debugging, which is accessible through the 6-pin male header J23. Various interfaces can be used as USB/Serial DBGU port bridge, such as FTDI TTL-232R-3V3 USB to TTL serial cable or basic breakout board for the 232/USB converter. These interfaces are available on the following websites: Adafruit: http://www.adafruit.com/products/284 Sparkfun: https://www.sparkfun.com/products/9873 DBGU Interface Schematic PE13 R173 (TXD) (RXD) 0R PE14 R174 0R [7] PB31 [7] PB30 3V3 5V_MAIN DNP(0R) R172 68K R189 3V3 68K R190 DNP(0R) R171 Figure 4-19. 1 2 3 4 5 6 J23 DEBUG P101-1*06SGF-116A-NX R171 and R172 are optional (not implemented) resistors that can be used for power selection. Power can be delivered either by the SAMA5D3 Xplained board or by the debug interface tool. To avoid a contention between your debug interface (e.g. FTDI) and the on-board power system, be careful during the installation of one of this resistor. 4.2.16 Expansion Ports Five 8-pin, one 10-pin, one 6-pin and one 2x18-pin headers (J14 to J21) are implemented on the board to enable the PIO connection of various expansion cards that could be developed by users or by other sources. Due to 22 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 multiplexing, different signals can be provided on each pin. These connectors are mechanically- and footprintcompatible with the Arduino R3 shields. As the SAMA5D3 signals have a voltage level of 3.3V, 5-V level shields must not be used on the SAMA5D3 Xplained. In addition to its standard IO functionality, the SAMA5D3 processor can provide alternate functions to external IO lines available on the J14 to J21 headers. These alternate functions are: UARTs: UART0, UART1 USARTs: USART0, USART1, USART2, USART3 SPI: SPI1 I²C: TWI0, TWI1 Timer capture and compare: TIOA, TIOB Clock out: PCK0, PCK1, PCK2 PWMs: PWML0, PWMH0, PWML1, PWMH1 DIGITAL AUDIO: TD0, TK0, TF0, RD0, RK0, RF0 ISI: ISI[D0:D11], ISI_HSYNC, ISI_VSYNC, ISI_PCK CAN: CAN-RX0, CANTX0, CANRX1, CAN_TX1 Analog: AD[0:11], ADTRG, ADREF GPIO: MISC RESET VBAT Refer to the SAMA5D3 series datasheet for further details on the PIO multiplexing and alternate function selection. SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 23 4.2.16.1 Functions Available Through the Arduino Headers The following tables illustrate the functionalities provided by the SAMA5D3 Xplained board. They show the pins used to implement each functionality. Note: Some pins are multiplexed for different functionalities, which means that only one at a time can be active for each pin. Table 4-5. 24 Function by PIO (Part 1) PIO NAME PCK ISI SSC CAN SPI PC16 -- -- TK0 -- -- PC17 -- -- TF0 -- -- PC18 -- -- TD0 -- -- PC20/PD28 -- -- RF0 -- -- PC21/PD29 -- -- RD0 -- -- PC19/PD30 PCK0 -- RK0 -- -- PD30/PC15 PCK0/PCK2 -- -- -- -- PD31 PCK1 -- -- -- -- PB14 -- -- -- CANRX1 -- PD14 -- -- -- CANRX0 -- PB15 -- -- -- CANTX1 -- PD15 -- -- -- CANTX0 -- PC22/PC1 -- -- -- -- SPI1_MISO PC24/PC0 -- -- -- -- SPI1_SPCK PC23/PC2 -- -- -- -- SPI1_MOSI PC25 -- -- -- -- SPI1_NPCS0 PC26/PA30 -- ISI_D11/VSYNC -- -- SPI1_NPCS1 PC27/PA31 -- ISI_D10/HSYNC -- -- SPI1_NPCS2 PC28 -- ISI_D9 -- -- SPI1_NPCS3 PC29 -- ISI_D8 -- -- -- PA23 -- ISI_D7 -- -- -- PA22 -- ISI_D6 -- -- -- PA21 -- ISI_D5 -- -- -- PA20 -- ISI_D4 -- -- -- PA19 -- ISI_D3 -- -- -- PA18 -- ISI_D2 -- -- -- PA17 -- ISI_D1 -- -- -- PA16 -- ISI_D0 -- -- -- PC30 -- ISI_PCK -- -- -- PA30 -- ISI_VSYNC -- -- -- PA31 -- ISI_HSYNC -- -- -- SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Table 4-6. Function by PIO (Part 2) PIO NAME TWI UART/USART ANALOG MISC 3V3/5V -- -- -- 3V3/5V nRTS -- -- -- nRTS GND -- -- -- GND AREF -- -- AREF -- 5V -- -- -- 5V PC18 -- -- AD0 -- PD21 -- -- AD1 -- PD22 -- -- AD2 -- PD23 -- -- AD3 -- PD24 -- -- AD4 -- PD25 -- -- AD5 -- PD26 -- -- AD6 -- PD27 -- -- AD7 -- PC20/PD28 -- -- AD8 -- PC21/PD29 -- -- AD9 -- PC19/PD30 -- -- AD10 -- PD31 -- -- AD11 -- PD19/PB15 -- -- ADTRG -- PA19 TWCK2 -- -- -- PA18 TWD2 -- -- -- PC26 TWD1 -- -- -- PA30 TWD0 URXD1 -- -- PA31 TWCK0 UTXD1 -- -- PC26/PA30 TWD0/TWD1 URXD1 -- -- PC27/PA31 TWCK0/TWCK1 URTD1 -- -- PC30 -- UTXD0 -- -- PC29 -- URXD0 -- PWMFI2 PD14 -- SCK0 -- -- PD15 -- CTS0 -- -- PD18 -- TXD0 -- -- PD17 -- RXD0 -- -- PB25 -- SCK1 -- -- PB26 -- CTS1 -- -- PB29 -- TXD1 -- -- PB28 -- RXD1 -- -- PB27 -- RTS1 -- PWMH1 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 25 Table 4-6. 26 Function by PIO (Part 2) (Continued) PIO NAME TWI UART/USART ANALOG MISC PE20 -- SCK2 -- -- PE23 -- CTS2 -- -- PE26 -- TXD2 -- -- PE25 -- RXD2 -- -- PE24 -- RTS2 -- -- PE15 -- SCK3 -- -- PE16 -- CTS3 -- -- PE19 -- TXD3 -- -- PE18 -- RXD3 -- -- PE17 -- RTS3 -- -- PC22/PC1 -- -- -- GPIO PC23/PC2 -- -- -- GPIO PC24/PC0 -- -- -- GPIO PC9 -- -- -- GPIO PE9 -- -- -- GPIO PE10 -- -- -- GPIO PE11 -- -- -- GPIO PE12 -- -- -- GPIO PE16 -- -- -- GPIO PE31 -- -- -- IRQ/PWML1 PC28 -- -- -- PWMFI0 PA20 -- -- -- PWMH0 PA22 -- -- -- PWMH1 PA21 -- -- -- PWML0 PA23 -- -- -- PWML1 PE29 -- -- -- TCLK2 PC5 -- -- -- TCLK4 PC8 -- -- -- TCLK5 PC3 -- -- -- TIOA4 PC6 -- -- -- TIOA5 PC4 -- -- -- TIOB4 PC7 -- -- -- TIOB5 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 4.2.16.2 J15 Header Figure 4-20. J15 Header Table 4-7. J15 Header IOs Silkscreen PIO Function 1 Function 2 Function 3 PIO Function 4 Function 5 SCL0 PA31 TWCK0 UTXD1 ISI_HSYNC -- -- -- SDA0 PA30 TWD0 URXD1 ISI_VSYNC -- -- -- ARFE -- -- -- -- -- -- -- GND -- -- -- -- -- -- -- 13 PC24 SPI1_SPCK -- -- PC0 ETX0 TIOA3 12 PC22 SPI1_MISO -- -- PC1 ETX1 TIOB3 11 PC23 SPI1_MOSI -- -- PC2 ERX0 TCLK3 10 PC25 SPI1_NPCS0 -- -- -- -- -- 9 PC3 ERX1 TIOA4 -- -- -- -- 8 PC4 ETXEN TIOB4 -- -- -- -- SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 27 4.2.16.3 J18 Header Figure 4-21. J18 Header Table 4-8. 28 J18 Header IOs Silkscreen PIO Function 1 Function 2 Function 3 7 PC5 ECRSDV TCLK4 -- 6 PC6 ERXER TIOA5 -- 5 PC7 EREFCK TIOB5 -- 4 PC28 SPI1_NPCS3 PWMFI0 ISI_D9 3 PC8 EMDC TCLK5 -- 2 PC9 EMDIO -- -- 1 PC30 UTXD0 ISI_PCK -- 0 PC29 URXD0 PWMFI2 ISI_D8 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 4.2.16.4 J20 Header Figure 4-22. J20 Header Table 4-9. J20 Header IOs Silkscreen PIO Function 1 Function 2 Function 3 PIO Function 4 Function 5 Function 6 TXD3 14 PE19 A19 TXD3 -- -- -- -- -- RXD3 15 PE18 A18 RXD3 -- -- -- -- -- TXD1 16 PB29 TXD1 -- -- -- -- -- -- RXD1 17 PB28 RXD1 -- -- -- -- -- -- TXD0 18 PD18 TXD0 -- -- -- -- -- -- RXD0 19 PD17 RXD0 -- -- -- -- -- -- SDA 20 PC26 SPI1_NPCS1 TXWD1 ISI_D11 PA30 TWD0 URXD1 ISI_VSYNC SCL 21 PC27 SPI1_NPCS2 TWCK1 ISI_D10 PA31 TWCK0 UTXD1 ISI_HSYNC SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 29 4.2.16.5 J19 Header Figure 4-23. J19 Header Table 4-10. 30 J19 Header IOs Silkscreen PIO Function 1 Function 2 Function 3 PIO Function 4 Function 5 PD30 PD30 AD10 PCK0 -- PC15 PCI2_CK PCK2 PC17 PC17 TF0 -- -- -- -- -- PB26 PB26 CTS1 GRX7 -- -- -- -- PE9 PE9 A9 -- -- -- -- -- PA17 PA17 LCDDAT17 ISI_D1 -- -- -- -- PA19 PA19 LCDDAT19 TWCk2 ISI_D3 -- -- -- PA21 PA21 LCDDAT21 PWML0 ISI_D5 -- -- -- PA23 PA23 LCDDAT23 PWML1 ISI_D7 -- -- -- PE15 PE15 A15 SCK3 -- -- -- -- PE17 PE17 A17 RTS3 -- -- -- -- PE11 PE11 A11 -- -- -- -- -- PE23 PE23 A23 CTS2 -- -- -- -- PE25 PE25 A25 RXD2 -- -- -- -- PE13 PE13 A13 -- -- -- -- -- SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Table 4-10. J19 Header IOs (Continued) Silkscreen PIO Function 1 Function 2 Function 3 PIO Function 4 Function 5 PE29 PE29 NWR1/NBS1 TCLK2 -- -- -- -- PC26 PC26 SPI1_NPCS1 TXWD1 ISI_D11 -- -- -- PC16 PC16 TK0 -- -- -- -- -- PB25 PB25 SCK1 GRX6 -- -- -- -- PB27 PB27 RTS1 PWMH1 -- -- -- -- PE10 PE10 A10 -- -- -- -- -- PA16 PA16 LCDDAT16 ISI_D0 -- -- -- -- PA18 PA18 LCDDAT18 TWD2 ISI_D2 -- -- -- PA20 PA20 LCDDAT20 PWMH0 ISI_D4 -- -- -- PA22 PA22 LCDDAT22 PWMH1 ISI_D6 -- -- -- PE16 PE16 A16 CTS3 -- -- -- -- PE20 PE20 A20 SCK2 -- -- -- -- PE12 PE12 A12 -- -- -- -- -- PE24 PE24 A24 RTS2 -- -- -- -- PE26 PE26 NCS0 TXD2 -- -- -- -- PE14 PE14 A14 -- -- -- -- -- PE31 PE31 IRQ PWML1 -- -- -- -- PB15 PB15 GCOL CANTX1 -- -- -- -- SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 31 4.2.16.6 J16 Header Figure 4-24. J16 Header Table 4-11. 32 J16 Header IOs Silkscreen PIO Function 1 MISO1 PC22 SPI1_MISO 5V/3V3 -- Power supply SPCK PC24 SPI1_SPCK MOSI1 PC23 SPI1_MOSI RST NRST System reset GND -- Power ground SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 4.2.16.7 J14 Header Figure 4-25. J14 Header Position Table 4-12. J14 Header IOs Silkscreen Function VBAT VBAT supply 3V3 AREF. Reference voltage for the analog inputs of the SAMA5D36 processor. RST System reset 3V3 Main 3.3V supply - generated by the on-board regulator. Maximum sourced current is 1.2A. This regulator also provides the power supply to the SAMA5D36 microcontroller and components. 5V Main 5.0V supply GND System ground GND System ground NC Not connected SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 33 4.2.16.8 J17 Header Figure 4-26. J17 Header Table 4-13. 34 J17 Header IOs Silkscreen PIO Function 1 Function 2 Function 3 PIO Function 4 Function 5 A0 PC18 TD0 -- -- PD20 AD0 -- A1 PD21 AD1 -- -- -- -- -- A2 PD22 AD2 -- -- -- -- -- A3 PD23 AD3 -- -- -- -- -- A4 PD24 AD4 -- -- -- -- -- A5 PD25 AD5 -- -- -- -- -- A6 PD26 AD6 -- -- -- -- -- A7 PD27 AD7 -- -- -- -- -- SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 4.2.16.9 J21 Header Figure 4-27. J21 Header Table 4-14. J21 Header IO Silkscreen PIO Function 1 Function 2 Function 3 PIO Function 4 Function 5 A8 PC20 RF0 -- -- PD28 AD8 -- A9 PC21 RD0 -- -- PD29 AD9 -- A10 PC19 RK0 -- -- PD30 AD10 PCK0 A11 PD31 PCK1 -- -- -- -- -- ** PB14 GCRS CANRX1 -- -- -- -- ** PD19 ADTRG -- -- PB15 GCOL CANTX1 CANRX0 PD14 SCK0 SPO_NPCS1 CANRX0 -- -- -- CANTX0 PD15 CTS0 SPI0_NPCS2 CANTX0 -- -- -- SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 35 4.3 Other Connector Details and PIO Usage Summary 4.3.1 Power Supply Figure 4-28. Power Supply Connector J2 (Optional) Table 4-15. Pin 4.3.2 Mnemonic Signal Description 1 Center +5V 2 -- GND 3 -- Floating JTAG/ICE Connector Figure 4-29. JTAG port J24 Table 4-16. Pin 36 Power Supply Connector J2 Signal Description 2 4 6 8 10 12 14 16 18 20 1 3 5 7 9 11 13 15 17 19 JTAG/ICE Connector J24 Signal Descriptions Mnemonic Signal Description 1 VTref 3.3V power This is the target reference voltage. It is used to check if the target has power, to create the logic-level reference for the input comparators, and to control the output logic levels to the target. It is normally fed from VDD on the target board and must not have a series resistor. 2 Vsupply 3.3V power This pin is not connected in SAM-ICE™. It is reserved for compatibility with other equipment. Connect to VDD or leave open in target system. 3 nTRST Target Reset - Active-low output signal that resets the target. JTAG Reset. Output from SAM-ICE to the reset signal on the target JTAG port. Typically connected to nTRST on the target CPU. This pin is normally pulled High on the target to avoid unintentional resets when there is no connection. 4 GND Common ground. SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Table 4-16. Pin 4.3.3 JTAG/ICE Connector J24 Signal Descriptions (Continued) Mnemonic Signal Description 5 TDI Test Data Input - Serial data output line, sampled on the rising edge of the TCK signal. JTAG data input of target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI on target CPU. 6 GND Common ground. 7 TMS Test Mode Select. JTAG mode set input of target CPU. This pin should be pulled up on the target. Typically connected to TMS on target CPU. Output signal that sequences the target's JTAG state machine, sampled on the rising edge of the TCK signal. 8 GND Common ground. 9 TCK Test Clock - Output timing signal, for synchronizing test logic and control register access. JTAG clock signal to target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TCK on target CPU. 10 GND Common ground. 11 RTCK - Input Return Test Clock signal from the target. Some targets must synchronize the JTAG inputs to internal clocks. To fulfill this requirement, a returned and resynchronized TCK can be used to dynamically control the TCK rate. SAM-ICE supports adaptive clocking which waits for TCK changes to be echoed correctly before making further changes. Connect to RTCK if available, otherwise to GND. 12 GND Common ground. 13 TDO JTAG Test Data Output Serial data input from the target. JTAG data output from target CPU. Typically connected to TDO on target CPU. 14 GND Common ground 15 nSRST RESET Active-low reset signal. Target CPU reset signal. 16 GND Common ground 17 RFU This pin is not connected. 18 GND Common ground 19 RFU This pin is not connected. 20 GND Common ground USB Type A Dual Port Figure 4-30. USB Type A Dual Port J19 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 37 Table 4-17. USB Type A Dual Port J19 Signal Descriptions Pin Mnemonic Signal Description A1 Vbus - USB_A 5V power A2 DM - USB_A Data minus A3 DP - USB_A Data plus A4 GND Common ground B1 Vbus - USB_A 5V power B2 DM - USB_A Data minus B3 DP - USB_A Data plus B4 GND Common ground -- Shield Mechanical pins 4.3.4 USB Micro-AB Figure 4-31. USB Host/Device Micro-AB Connector J6 1 2 3 4 5 Table 4-18. Pin 38 USB Device Micro-AB Connector J6 Signal Descriptions Mnemonic Signal Description 1 Vbus 5V power 2 DM Data minus 3 DP Data plus 4 ID On-the-go identification 5 GND Common ground SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 4.3.5 DEBUG Connector Figure 4-32. DEBUG Connector J23 Table 4-19. DEBUG Connector J23 Signal Descriptions Pin 4.3.6 Mnemonic PIO Signal Description 1 -- PE13 -- 2 TXD (transmitted data) PB31 RS232 serial data input signal 3 RXD (transmitted data) PB30 RS232 serial data output signal 4 -- -- 5 -- PE14 6 GND Power line (5V/3V3) -- -- Common ground SD/MMC Plus MCI0 Figure 4-33. SD/MMC Socket J10 Table 4-20. Pin SD/MMC Socket J10 Signal Descriptions Mnemonic PIO Signal Description 1 DAT3 PD4 Data bit 2 CMD PD0 Command line 3 VSS -- Command line 4 VCC -- Supply voltage 3.3V 5 CLK PD9 Clock / command line 6 CD PE0 Card detect 7 DAT0 PD1 Data bit 8 DAT1 PD2 Data bit 9 DAT2 PD3 Data bit 10 DAT4 PD5 Data bit 11 DAT5 PD6 Data bit 12 DAT6 PD7 Data bit 13 DAT7 PD8 Data bit SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 39 Table 4-20. 4.3.7 Pin Mnemonic PIO Signal Description 14 WP R57 Protect 15 VSS -- Common ground 16 VSS -- Common ground MicroSD MCI1 Figure 4-34. MicroSD Socket J11 Table 4-21. Pin 4.3.8 SD/MMC Socket J10 Signal Descriptions MicroSD Socket J11 Signal Descriptions Mnemonic PIO 1 DAT2 PB22 Data bit 2 2 CD/DAT3 PB23 Card detect / data bit 3 3 CMD PB19 Command line 4 VCC -- 5 CLK PB24 6 VSS -- 7 DAT0 PB20 Data bit 0 8 DAT1 PB21 Data bit 1 9 SW1 -- 10 CARD DETECT PE1 Gigabit Ethernet ETH0 RJ45 Socket J12 Figure 4-35. Gigabit Ethernet RJ45 Socket J12 12345678 RJ-45 40 Signal Description SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Supply voltage 3.3V Clock / command line Common ground Not used, grounded Card detect 4.3.9 Ethernet ETH1 RJ45 Socket J13 Figure 4-36. Ethernet RJ45 Socket J13 12345678 RJ-45 4.3.10 LCD Socket J22 Figure 4-37. LCD Socket J22 Table 4-22. LCD Socket J22 Signal Descriptions PIN Signal Display Module Interface Function MCU Interface Function 1 ID_SYS Extension module identification (connected to 1-wire EEPROM available on LCD display module) Extension module identification 2 GND GND GND 3 D0 Data line Data line 4 D1 Data line Data line 5 D2 Data line Data line 6 D3 Data line Data line 7 GND GND GND 8 D4 Data line Data line 9 D5 Data line Data line 10 D6 Data line Data line 11 D7 Data line Data line 12 GND GND GND 13 D8 Data line Data line 14 D9 Data line Data line 15 D10 Data line Data line 16 D11 Data line Data line 17 GND GND GND 18 D12 Data line Data line SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 41 Table 4-22. PIN Signal Display Module Interface Function MCU Interface Function 19 D13 Data line Data line 20 D14 Data line Data line 21 D15 Data line Data line 22 GND GND GND 23 D16 Data line Data line 24 D17 Data line Data line 25 D18 Data line Data line 26 D19 Data line Data line 27 GND GND GND 28 D20 Data line Data line 29 D21 Data line Data line 30 D22 Data line Data line 31 D23 Data line Data line 32 GND GND GND 33 PCLK Pixel clock -- 34 VSYNC/CS Vertical sync Chip select 35 HSYNC/WE Horizontal sync Write enable 36 DATA_ENABLE/ RE Data enable Read enable 37 (1) SPI_SCK (1) -- SPI_SCK (1) 38 (1) SPI_MOSI (1) -- SPI_MOSI (1) 39 (1) SPI_MISO (1) -- SPI_MISO (1) 40 (1) SPI_CS (1) -- SPI_CS (1) 41 ENABLE Display enable signal Display enable signal ® 42 TWI_SDA I2C data line (maXTouch ) I2C data line (maXTouch) 43 TWI_SCL I2C clock line (maXTouch) I2C clock line (maXTouch) 44 IRQ1 maXTouch interrupt line maXTouch interrupt line 45 IRQ2 Interrupt line for other I2C devices Interrupt line for other I2C devices 46 PWM Backlight control Backlight control 47 RESET Reset for both display and maXTouch Reset for both display and maXTouch 48 VCC 3.3V or 5V supply (0R) 3.3V supply 49 VCC 3.3V or 5V supply (0R) 3.3V supply 50 GND GND GND Note: 42 LCD Socket J22 Signal Descriptions (Continued) 1. See Section 5. “Errata”. SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 4.3.11 PIO Usage Most signals can also be configured as simple inputs or outputs from the processor. Table 4-23. PIO A Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP0 PA0 LCDDAT0 – – – LCDDAT0 VDDIOP0 PA1 LCDDAT1 – – – LCDDAT1 VDDIOP0 PA2 LCDDAT2 – – – LCDDAT2 VDDIOP0 PA3 LCDDAT3 – – – LCDDAT3 VDDIOP0 PA4 LCDDAT4 – – – LCDDAT4 VDDIOP0 PA5 LCDDAT5 – – – LCDDAT5 VDDIOP0 PA6 LCDDAT6 – – – LCDDAT6 VDDIOP0 PA7 LCDDAT7 – – – LCDDAT7 VDDIOP0 PA8 LCDDAT8 – – – LCDDAT8 VDDIOP0 PA9 LCDDAT9 – – – LCDDAT9 VDDIOP0 PA10 LCDDAT10 – – – LCDDAT10 VDDIOP0 PA11 LCDDAT11 – – – LCDDAT11 VDDIOP0 PA12 LCDDAT12 – – – LCDDAT12 VDDIOP0 PA13 LCDDAT13 – – – LCDDAT13 VDDIOP0 PA14 LCDDAT14 – – – LCDDAT14 VDDIOP0 PA15 LCDDAT15 – – – LCDDAT15 VDDIOP0 PA16 LCDDAT16 ISI_D0 – – ISI_D0 VDDIOP0 PA17 LCDDAT17 ISI_D1 – – ISI_D1 VDDIOP0 PA18 LCDDAT18 TWD2 ISI_D2 – TWD2/ISI_D2 VDDIOP0 PA19 LCDDAT19 TWCK2 ISI_D3 – TWCK2/ISI_D3 VDDIOP0 PA20 LCDDAT20 PWMH0 ISI_D4 – ISI_D4 VDDIOP0 PA21 LCDDAT21 PWML0 ISI_D5 – ISI_D5 VDDIOP0 PA22 LCDDAT22 PWMH1 ISI_D6 – ISI_D6 VDDIOP0 PA23 LCDDAT23 PWML1 ISI_D7 – ISI_D7 VDDIOP0 PA24 LCDPWM – – – LCDPWM VDDIOP0 PA25 LCDDISP – – – LCDDISP VDDIOP0 PA26 LCDVSYNC – – – LCDVSYNC VDDIOP0 PA27 LCDHSYNC – – – LCDHSYNC VDDIOP0 PA28 LCDPCK – – – LCDPCK VDDIOP0 PA29 LCDDEN – – – LCDDEN VDDIOP0 PA30 TWD0 URXD1 ISI_VSYN C TWD0 URXD1/ISI_VSYNC VDDIOP0 PA31 TWCK0 UTXD1 ISI_HSYN C TWCK0 UTXD1/ISI_HSYNC SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 43 Table 4-24. 44 PIO B Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP1 PB0 GTX0 PWMH0 – GTX0 – VDDIOP1 PB1 GTX1 PWML0 – GTX1 – VDDIOP1 PB2 GTX2 TK1 – GTX2 – VDDIOP1 PB3 GTX3 TF1 – GTX3 – VDDIOP1 PB4 GRX0 PWMH1 – GRX0 – VDDIOP1 PB5 GRX1 PWML1 – GRX1 – VDDIOP1 PB6 GRX2 TD1 – GRX2 – VDDIOP1 PB7 GRX3 RK1 – GRX3 – VDDIOP1 PB8 GTXCK PWMH2 – GTXCK – VDDIOP1 PB9 GTXEN PWML2 – GTXEN – VDDIOP1 PB10 GTXER RF1 – INT_GETH -- VDDIOP1 PB11 GRXCK RD1 – GRXCK -- VDDIOP1 PB12 GRXDV PWMH3 – INT_ETH – VDDIOP1 PB13 GRXER PWML3 – GRXER – VDDIOP1 PB14 GCRS CANRX1 – – CANRX1 VDDIOP1 PB15 GCOL CANTX1 – – CANTX1 VDDIOP1 PB16 GMDC – – GMDC -- VDDIOP1 PB17 GMDIO – – GMDIO – VDDIOP1 PB18 G125CK – – G125CK – VDDIOP1 PB19 MCI1_CDA GTX4 – MCI1_CDA -- VDDIOP1 PB20 MCI1_DA0 GTX5 – MCI1_DA0 – VDDIOP1 PB21 MCI1_DA1 GTX6 – MCI1_DA1 -- VDDIOP1 PB22 MCI1_DA2 GTX7 – MCI1_DA2 -- VDDIOP1 PB23 MCI1_DA3 GRX4 – MCI1_DA3 – VDDIOP1 PB24 MCI1_CK GRX5 – MCI1_CK – VDDIOP1 PB25 SCK1 GRX6 – – SCK1 VDDIOP1 PB26 CTS1 GRX7 – – CTS1 VDDIOP1 PB27 RTS1 PWMH1 – – RTS1 VDDIOP1 PB28 RXD1 – – – RXD1 VDDIOP1 PB29 TXD1 – – – TXD1 VDDIOP0 PB30 DRXD – – DRXD (DBGU) -- VDDIOP0 PB31 DTXD – – DTXD (DBGU) -- SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Table 4-25. PIO C Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP0 PC0 ETX0 TIOA3 – ETX0 ETX0/TIOA3 VDDIOP0 PC1 ETX1 TIOB3 – ETX1 ETX1/TIOB3 VDDIOP0 PC2 ERX0 TCLK3 – ERX0 ERX0/TCLK3 VDDIOP0 PC3 ERX1 TIOA4 – ERX1 ERX1/TIOA4 VDDIOP0 PC4 ETXEN TIOB4 – ETXEN ETXEN/TIOB4 VDDIOP0 PC5 ECRSDV TCLK4 – ECRSDV ECRSDV/TCLK4 VDDIOP0 PC6 ERXER TIOA5 – ERXER ERXER/TIOA5 VDDIOP0 PC7 EREFCK TIOB5 – EREFCK EREFCK/TIOB5 VDDIOP0 PC8 EMDC TCLK5 – EMDC EMDC/TCLK5 VDDIOP0 PC9 EMDIO -- – EMDIO EMDIO VDDIOP0 PC10 MCI2_CDA LCDDAT20 – – LCDDAT20 VDDIOP0 PC11 MCI2_DA0 LCDDAT19 – – LCDDAT19 VDDIOP0 PC12 MCI2_DA1 TIOA1 LCDDAT18 – LCDDAT18 VDDIOP0 PC13 MCI2_DA2 TIOB1 LCDDAT17 – LCDDAT17 VDDIOP0 PC14 MCI2_DA3 TCLK1 LCDDAT16 – LCDDAT16 VDDIOP0 PC15 MCI2_CK PCK2 LCDDAT21 – LCDDAT21/PCK2 VDDIOP0 PC16 TK0 – – – TK0 Audio VDDIOP0 PC17 TF0 – – – TF0 Audio VDDIOP0 PC18 TD0 – – – TD0 Audio VDDIOP0 PC19 RK0 – – – RK0 Audio VDDIOP0 PC20 RF0 – – – RF0 Audio VDDIOP0 PC21 RD0 – – – RD0 Audio VDDIOP0 PC22 SPI1_MISO – – – SPI1_MISO VDDIOP0 PC23 SPI1_MOSI – – – SPI1_MOSI VDDIOP0 PC24 SPI1_SPCK – – – SPI1_SPCK VDDIOP0 PC25 SPI1_NPCS0 – – – SPI1_NPCS0 VDDIOP0 PC26 SPI1_NPCS1 TWD1 ISI_D11 – SPI1_NPCS1/TWD1 VDDIOP0 PC27 SPI1_NPCS2 TWCK1 ISI_D10 – SPI1_NPCS2/TWCK1 VDDIOP0 PC28 SPI1_NPCS3 PWMFI0 ISI_D9 – SPI1_NPCS3/ISI_D9 VDDIOP0 PC29 URXD0 PWMFI2 ISI_D8 – URXD0/ISI_D8 VDDIOP0 PC30 UTXD0 ISI_PCK – – UTXD0/ISI_PCK VDDIOP0 PC31 FIQ PWMFI1 – IRQ_PMIC – SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 45 Table 4-26. 46 PIO D Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOP1 PD0 MCI0_CDA – – MCI0_CDA – VDDIOP1 PD1 MCI0_DA0 – – MCI0_DA0 – VDDIOP1 PD2 MCI0_DA1 – – MCI0_DA1 – VDDIOP1 PD3 MCI0_DA2 – – MCI0_DA2 – VDDIOP1 PD4 MCI0_DA3 – – MCI0_DA3 – VDDIOP1 PD5 MCI0_DA4 TIOA0 PWMH2 MCI0_DA4 – VDDIOP1 PD6 MCI0_DA5 TIOB0 PWML2 MCI0_DA5 – VDDIOP1 PD7 MCI0_DA6 TCLK0 PWMH3 MCI0_DA6 – VDDIOP1 PD8 MCI0_DA7 PWML3 – MCI0_DA7 – VDDIOP1 PD9 MCI0_CK – – MCI0_CK – VDDIOP1 PD10 SPI0_MISO – – SPI0_MISO SPI0_MISO VDDIOP1 PD11 SPI0_MOSI – – SPI0_MOSI SPI0_MOSI VDDIOP1 PD12 SPI0_SPCK – – SPI0_SPCK SPI0_SPCK VDDIOP1 PD13 SPI0_NPCS0 – – SPI0_NPCS0 – VDDIOP1 PD14 SCK0 SPI0_NPCS1 CANRX0 – SCK0/SPI0_NPCS 0/CANRX0 VDDIOP1 PD15 CTS0 SPI0_NPCS2 CANTX0 – CST0/SPI0_NPCS 2/CANTX0 VDDIOP1 PD16 RTS0 SPI0_NPCS3 PWMFI3 – SPI0_NPCS3 VDDIOP1 PD17 RXD0 – – – RXD0 VDDIOP1 PD18 TXD0 – – – TXD0 VDDIOP1 PD19 ADTRG – – – ADTRG (HSYNC) VDDANA PD20 AD0 – – – AD0/LCD TSC VDDANA PD21 AD1 – – – AD1/LCD TSC VDDANA PD22 AD2 – – – AD2/LCD TSC VDDANA PD23 AD3 – – – AD3/LCD TSC VDDANA PD24 AD4 – – – AD4 VDDANA PD25 AD5 – – – AD5 VDDANA PD26 AD6 – – – AD6 VDDANA PD27 AD7 – – – AD7 VDDANA PD28 AD8 – – – AD8 VDDANA PD29 AD9 – – – AD9 VDDANA PD30 AD10 PCK0 – -- AD10/PCK0 VDDANA PD31 AD11 PCK1 – – AD11/PCK1 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 Table 4-27. PIO E Pin Assignment and Signal Description Power Rail PIO Signal Signal Signal Main Board Function Extended Function VDDIOM PE0 A0/NBS0 – – MCI0_CD – VDDIOM PE1 A1 – – MCI1_CD – VDDIOM PE2 A2 – – PWR_MCI0 – VDDIOM PE3 A3 – – EN5V_USBB – VDDIOM PE4 A4 – – EN5V_USBC – VDDIOM PE5 A5 – – OVCUR_USB – VDDIOM PE6 A6 – – – RST_LCD VDDIOM PE7 A7 – – – IRQ1 / ChgMXT VDDIOM PE8 A8 – – – IRQ2/ChgQT VDDIOM PE9 A9 – – VBUS_SENSE A9 VDDIOM PE10 A10 – – – A10 VDDIOM PE11 A11 – – – A11 VDDIOM PE12 A12 – – – A12 VDDIOM PE13 A13 – – – A13 VDDIOM PE14 A14 – – – A14 VDDIOM PE15 A15 SCK3 – – A15/SCK3 VDDIOM PE16 A16 CTS3 – – A16/CTS3 VDDIOM PE17 A17 RTS3 – – A17/RTS3 VDDIOM PE18 A18 RXD3 – – A18/RXD3 VDDIOM PE19 A19 TXD3 – – A19/TXD3 VDDIOM PE20 A20 SCK2 – – A20/SCK2 VDDIOM PE21 A21/NANDALE – – A21/NANDALE – VDDIOM PE22 A22/NANDCLE – – A22/NANDCLE – VDDIOM PE23 A23 CTS2 – 1-Wire / User LED A23/1-Wire/CTS2 VDDIOM PE24 A24 RTS2 – Power LED A24/RTS2 VDDIOM PE25 A25 RXD2 – – A25/RXD2 VDDIOM PE26 NCS0 TXD2 – – NCS0/TXD2 VDDIOM PE27 NCS1 TIOA2 LCDDAT22 – LCDDAT22 VDDIOM PE28 NCS2 TIOB2 LCDDAT23 VDDIOM PE29 NWR1/NBS1 TCLK2 – USER_PB NWR1/NBS1/TCLK2 VDDIOM PE30 NWAIT – – nPBSTA_PMIC – VDDIOM PE31 IRQ PWML1 – – IRQ/PWML1 LCDDAT23 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 47 4.4 SAMA5D3 Xplained Board Schematics This section contains the following schematics: 48 General information Block Diagram PIO Multiplexing Table Power Supplies SAMA5D3 Device and USB Interfaces DDR2 Memory NAND Flash and Optional Memories SD and Micro-SD Interfaces Gigabit Ethernet Ethernet 10/100 LCD, JTAG, DEBUG and Extended Connectors SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 3 4 2 Figure 4-38. 5 1 D Schematic: SAMA5D3 Xplained SHEET C SHEET NAME 01 Title & Revision History 02 Block Diagram 03 PIO Assignment 04 Power Supply 05 SAMA5D3x-I & USB 06 SAMA5D3x-II & DDR2 07 SAMA5D3x-II & NAND 08 HSMCI 09 Ethernet_ETH0_10/100/1000 10 Ethernet_ETH1_10/100 11 Connectors DATE REVISION 19 Feb 2014 SAMA5D3 Xplained RevA DESCRIPTION Official Release C SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 B B A A A A REV SAMA5D3 Xplained Embest 19-Feb-14 PPn 27-Sep-13 RevA INIT EDIT MODIF. SCALE DES. 1/1 4 3 2 XXX XX-XXX-XX XXX XX-XXX-XX VER. DATE REV. SHEET A Title & Revision History 5 DATE 1 1 11 General information D 49 Figure 4-39. 50 Push Buttons 3 4 Reset Force PwrOn D Single PMU Solution 2 1 5V INPUT USB DEVICE 5V & 3V3 USB A,B,C Power rails ATMEL SAMA5D36 CORTEX(R)-A5 PROCESSOR Extention boards connectors C B USER LEDS D USB Host x2 JTAG DBGU JTAG & DBGU PIO C 2/4Gb DDR2 SDRAM VBAT EBI 2Gb NAND FLASH ANALOG Reference PIO A,...E LCD Connector PIO A,...E SD CARD Micro SD CARD SERIAL DATA FLASH B 10/100/1000 FAST ETHERNET ETH0 10/100 FAST ETHERNET ETH1 A A A A REV SAMA5D3 Xplained Embest 19-Feb-14 PPn 27-Sep-13 RevA INIT EDIT MODIF. SCALE DES. 1/1 4 3 2 XXX XX-XXX-XX XXX XX-XXX-XX VER. DATE REV. SHEET A Block Diagram 5 DATE 1 2 11 Block diagram SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 5 3 4 2 Figure 4-40. 5 1 PIOA USAGE PIOA PA0 LCDDAT0 PA16 ISI_D0 PB0 GTX0 PB16 GMDC PC0 ETX0 PC16 TK0 PA1 LCDDAT1 PA17 ISI_D1 PB1 GTX1 PB17 GMDIO PC1 ETX1 PC17 TF0 2 PA2 LCDDAT2 PA18 ISI_D2 PB2 GTX2 PB18 G125CK PC2 ERX0 PC18 TD0 3 PA3 LCDDAT3 PA19 ISI_D3 PB3 GTX3 PB19 MCI1_CDA PC3 ERX1 PC19 RK0 LCDDAT1 4 PA4 LCDDAT4 PA20 ISI_D4 PB4 GRX0 PB20 MCI1_DA0 PC4 ETXEN PC20 RF0 LCDDAT2 5 PA5 LCDDAT5 PA21 ISI_D5 PB5 GRX1 PB21 MCI1_DA1 PC5 ECRSDV PC21 RD0 LCDDAT3 6 PA6 LCDDAT6 PA22 ISI_D6 PB6 GRX2 PB22 MCI1_DA2 PC6 ECRSDV PC22 SPI1_MISO GND 7 PA7 LCDDAT7 PA23 ISI_D7 PB7 GRX3 PB23 MCI1_DA3 PC7 EREFCK PC23 SPI1_MOSI LCDDAT4 8 PA8 LCDDAT8 PA24 LCDPWM PB8 GTXCK PB24 MCI1_CK PC8 EMDC PC24 SPI1_SPCK LCDDAT5 9 PA9 LCDDAT9 PA25 LCDDISP PB9 GTXEN PB25 SCK1 PC9 EMDIO PC25 SPI1_NPCS0 LCDDAT6 10 PA10 LCDDAT10 PA26 LCDVSYNC PB10 INT_GETH PB26 CTS1 PC10 LCDDAT20 PC26 SPI1_NPCS1/TWD1/ISI_D11 LCDDAT7 11 PA11 LCDDAT11 PA27 LCDHSYNC PB11 GRXCK PB27 RTS1 PC11 LCDDAT19 PC27 SPI1_NPCS2/TWCK1/ISI_D10 GND 12 PA12 LCDDAT12 PA28 LCDPCK PB12 INT_ETH PB28 RXD1 PC12 LCDDAT18 PC28 SPI1_NPCS3/ISI_D9 LCDDAT8 13 PA13 LCDDAT13 PA29 LCDDEN PB13 GRXER PB29 TXD1 PC13 LCDDAT17 PC29 URXD0/ISI_D8 LCDDAT9 14 PA14 LCDDAT14 PA30 ISI_VSYNC/URXD1 PB14 CANRX1 PB30 DRXD PC14 LCDDAT16 PC30 UTXD0/ISI_PCK LCDDAT10 15 PA15 LCDDAT15 PA31 ISI_HSYNC/UTXD1 PB15 CANTX1 PB31 DTXD PC15 LCDDAT21/PCK2 PC31 IRQ_PMIC LCDDAT11 16 GND 17 PIOD LCDDAT12 18 PD0 MCI0_CDA LCDDAT13 19 PD1 LCDDAT14 20 PD2 LCDDAT15 21 GND LCD D C SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 B A ID_SYS 1 GND LCDDAT0 USAGE PIOB USAGE PIOB USAGE PIOC USAGE USAGE PIOC D C PIOD USAGE PD16 SPI0_NPCS3 PE0 MCI0_CD PE16 A16/CTS3 MCI0_DA0 PD17 RXD0 PE1 MCI1_CD PE17 A17/RTS3 MCI0_DA1 PD18 TXD0 PE2 PWR_MCI0 PE18 A18/RXD3 PD3 MCI0_DA2 PD19 ADTRG PE3 EN5V_USBB PE19 A19/TXD3 22 PD4 MCI0_DA3 PD20 AD0 PE4 EN5V_USBC PE20 A20/SCK2 LCDDAT16 23 PD5 MCI0_DA4 PD21 AD1 PE5 OVCUR_USB PE21 A21/NANDALE PART LCDDAT17 24 PD6 MCI0_DA5 PD22 AD2 PE6 RST_LCD PE22 A22/NANDCLE JP1 SHORT I_CORE Measurement LCDDAT18 25 PD7 MCI0_DA6 PD23 AD3 PE7 IRQ1 PE23 1-Wire/User led1/A23/CTS2 JP2 SHORT I_IODDR Measurement LCDDAT19 26 PD8 MCI0_DA7 PD24 AD4 PE8 IRQ2 PE24 Power led/A24/RTS2 JP3 SHORT I_IOP Measurement GND 27 PD9 MCI0_CK PD25 AD5 PE9 VBUS_SENSE/A9 PE25 A25/RXD2 JP4 SHORT I_IOM Measurement LCDDAT20 28 PD10 SPI0_MISO PD26 AD6 PE10 A10 PE26 NCS0/TXD2 JP5 CLOSE CS Nand flash memory LCDDAT21 29 PD11 SPI0_MOSI PD27 AD7 PE11 A11 PE27 LCDDAT22 JP6 CLOSE CS Serial flash memory LCDDAT22 30 PD12 SPI0_SPCK PD28 AD8 PE12 A12 PE28 LCDDAT23 LCDDAT23 31 PD13 SPI0_NPCS0 PD29 AD9 PE13 A13 PE29 NWR1/NBS1/TCLK2 GND 32 PD14 SCK0/CANRX0 PD30 AD10/PCK0 PE14 A14 PE30 STA_PMIC PD15 CTS0/CANTX0 PD31 /PCK1 PE15 A15/SCK3 PE31 ADTRG/PWML1 LCDPCK 33 LCDVSYNC 34 LCDHSYNC 35 LCDDEN 36 SPI0_NPCS3/AD3_YM 37 SPI0_MISO/AD2_YP 38 SPI0_MOSI/AD1_XM 39 SPI0_SPCK/AD0_XP 40 LCDDISP 41 TWD1 42 TWCK1 43 IRQ1 44 IRQ2 45 LCDPWM 46 Reset 47 VCC 48 VCC 49 GND 50 USAGE PIOE USAGE PIOE USAGE JUMPER DESCRIPTION DEFAULT FUNCTION B A A A REV SAMA5D3 Xplained Embest 19-Feb-14 PPn 27-Sep-13 RevA INIT EDIT MODIF. SCALE DES. 1/1 4 3 2 XXX XX-XXX-XX XXX XX-XXX-XX VER. DATE REV. SHEET A PIO Assignment 5 DATE 1 3 11 PIO Multiplexing Table PIO MUXING 51 Figure 4-41. 52 3 4 2 1 R1 R2 R3 R175 R176 R177 0R 0805 R1 0R R175 0R [5] Vbus 5V_MAIN D R2 DNP(0R) R176 DNP(0R) [11] 5V_Ext 2 D D4 JP1 DNP(JUMPER) J2 DNP(0R) DNP(0R) VDDCORE P4SMAJ5.0A 1 2 R3 R177 1 3 2 1 AVDDL_PLL DNP(DC JACK) L1 1 2 180ohm at 100MHz L2 1 2 180ohm at 100MHz L3 1 2 180ohm at 100MHz AVDDL 5V_MAIN R6 1.5K 1% C C1 4.7uF 3V3 R7 1.5K 1% C2 4.7uF C3 4.7uF R4 1R VDDREF INL45 INL67 R186 R9 R18 0R DNP(0R) 1K R11 L4 C4 1uF SW1 OUT1 [5] WKUP [7] PE30 5 6 C5 1uF R5 VDDPLLA 2R2 10uH 60mA JP2 DNP(JUMPER) C7 4.7uF VDDIODDR [5,9,10,11] NRST [7] PC31 [5] SHDN 23 C6 1uF R8 10K ACT8865 VP1 VP2 VP3 NC2 0R 11 12 13 20 18 10 17 nRST0 nIRQ nPBSTAT VSEL NC1 PWRHLD PWREN 21 22 SCL SDA 32 REFBP 30 1 L5 2.2uH (1V8) C8 10uF C9 10uF C10 100nF C 1 2 3V3 DVDDL 5V_MAIN MN1 31 26 16 25 L6 R10 VDDUTMIC 2R2 10uH 60mA SW2 OUT2 27 24 L7 2.2uH C11 4.7uF (1V2) C12 10uF C13 10uF C14 100nF JP3 DNP(JUMPER) 3V3 L9 2.2uH VDDIOP0 (3V3) SW3 OUT3 15 19 OUT4 3 OUT5 4 OUT6 7 R13 0R TP1 OUT7 8 R16 0R TP2 C15 10uF C16 10uF 1 2 PC27 PC26 [7] TWCK_PMIC [7] TWD_PMIC C17 100nF L8 1 2 180ohm at 100MHz L10 1 2 180ohm at 100MHz FUSE_2V5 BP1 WAKUP or Force Power ON SMD TP6 SMD TP7 VDDANA JP4 DNP(JUMPER) VDDIOM (3V3) EXPAD GNDP3 GNDP2 SMD C22 2.2uF C23 2.2uF 2 180ohm at 100MHz L12 SMD C21 2.2uF L11 1 C19 100nF R17 VDDOSC 2R2 B 10uH 60mA C24 2.2uF C26 4.7uF 33 14 GNDP1 BP1 2 100K 1% 28 IRLML2502 C130 10nF nPBIN 2 R19 9 R15 0R Q1 3 1 49.9K GNDA C25 100nF B R12 29 C20 100nF VDDIOP1 (2V5) 1 2 C18 47nF Auto PWRON (option) BP2 R14 49.9K BP2 RESET BP1 Place TP6 TP7 to Bottom BP2 A A A A REV SAMA5D3 Xplained Embest 19-Feb-14 PPn 27-Sep-13 RevA INIT EDIT MODIF. SCALE DES. 1/1 4 3 2 XXX XX-XXX-XX XXX XX-XXX-XX VER. DATE REV. SHEET A Power Supply 5 DATE 1 4 11 Power supplies SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 5 3 4 2 Figure 4-42. 5 1 3V3 Place TP4 to Bottom 2 100R D1 Populate R185 if no Super Cap (C41) (Super)-Capacitor energy storage VDDIOP1 VDDCORE R22 DNP(100K) NRST [4,9,10,11] NRST 10K 100K 1% T9 R8 N10 P9 M11 P11 V9 JTAGSEL TDI TMS TCK TDO NTRST NRST U15 U9 TST BMS T10 T12 WKUP SHDN VDDIOP0 WKUP SHDN L11 M4 VDDBU TDI TMS TCK TDO NTRST [11] TDI [11] TMS [11] TCK [11] TDO [11] NTRST R25 R24 [4] WKUP [4] SHDN 100nF C33 100nF 100nF C34 100nF C35 100nF C36 100nF C37 100nF C39 100nF C38 100nF C40 1uF D 3V3 R23 1.5K 1% C32 C31 100nF C5 C7 D14 T7 T15 U17 V7 R21 100K 1% V15 1 [11] VBat DNP(0.2F/3V3) C30 C29 100nF VDDCORE_1 VDDCORE_2 VDDCORE_3 VDDCORE_4 VDDCORE_5 VDDCORE_6 VDDCORE_7 C41 1.5K 1% C28 100nF G7 V11 R185 VDDIOP0_1 VDDIOP0_2 BAT54C D VDDIOP0 VDDBU 3 10nF VDDIOP1_1 VDDIOP1_2 C27 VDDIOM VDDIOM_1 VDDIOM_2 P12 T16 VDDIODDR_1 VDDIODDR_2 VDDIODDR_3 VDDIODDR_4 VDDIODDR_5 D13 F14 G10 G13 H11 C42 100nF C43 100nF C44 100nF C45 100nF VDDIODDR C46 100nF C47 100nF C48 100nF FUSE_2V5 20pF C51 20pF C53 20pF V8 4 100K 1% XIN32 VDDUTMIC T13 C58 100nF R28 0R GNDANA GNDUTMI_1 L6 ADVREF ADVREF L5 R29 DNP(0R) B R30 C60 5.62K 1% 10pF Max trace-length mismatch between USB signals pairs should be no greater than 3.8mm 3V3 R31 0R [4,7,8,11] PE[0..31] A L15 1 5 6 7 8 GNDUTMI R&C as close as possible B 9 10 2 180ohm at 100MHz EARTH_USB 5V_USBC J7_USB_B_Down 1 2 3 4 A 1112 L13 1 C61 100nF 5V_USBC HHSDMC HHSDPC D2 470R BLUE A copper plan for GNDUTMI cover all USB compoments PE24 1 2 J7 USB8S-AR2HF-NBW-S2 R32 PE23 GNDUTMI C62 10uF 5V_USBB L14 1 C64 100nF C65 10uF ENA 1 EN5V_USBC PE4 [7] IN FLGA 2 OVCUR_USB PE5 [7] 6 GNG FLGB 3 5 OUTB ENB 4 8 2 180ohm at 100MHz 5V_MAIN 7 C63 100nF 2 180ohm at 100MHz OUTA 3 100K 1% R34 470R LED D3 RED BP3 [7,11] PE29 Place TP5 to Bottom EN5V_USBB R33 Q2 IRLML2502 TP5 SMD MN3 5V_USBB HHSDMB HHSDPB AREF [11] C59 100nF L4 VBG GNDIOM_1 GNDIOM_2 R11 J11 T17 HHSDMC HHSDPC R12 V14 U14 GNDIOP_1 GNDIOP_2 GNDIOP_3 GNDIOP_4 top/bot J7 N11 U7 E5 HHSDMC HHSDPC VDDANA VDDANA GNDIODDR_1 GNDIODDR_2 GNDIODDR_3 GNDIODDR_4 GNDIODDR_5 HHSDMB HHSDPB E14 F10 F13 F15 H14 V12 U12 C57 100nF GNDCORE_1 GNDCORE_2 GNDCORE_3 GNDCORE_4 GNDCORE_5 GNDCORE_6 top/bot V13 GNDUTMI GNDBU HHSDMB HHSDPB A16 C9 N13 T8 T14 V17 HHSDMA HHSDPA GNDOSC GNDFUSE V10 U10 GNDPLL top/bot DIBN DIBP T11 P4 U6 V6 90 ohms differential trace impedance Routing top or bottom J7_USB_A_Up USER BUTTON PE3 [7] A SP2526A-2E EARTH_USB A A USB HOST B&C INTERFACE REV SAMA5D3 Xplained Embest 19-Feb-14 PPn 27-Sep-13 RevA INIT EDIT MODIF. SCALE DES. 1/1 4 3 2 DATE XXX XX-XXX-XX XXX XX-XXX-XX VER. DATE REV. SHEET A SAMA5D3x-I & USB 5 C C55 100nF XOUT32 Routing USB EARTH_USB_A C52 100nF C54 100nF VDDUTMIC 20pF HHSDMA HHSDPA VDDOSC R10 1 2 C56 1 2 3 4 5 180ohm at 100MHz 2 U13 C50 100nF top/bot VDDPLLA P10 7 J6 UBAF-1015P 6 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 L21 1 VDDUTMII VDDPLLA 32.768KHz CL=12.5pF Y2 V16 EARTH_USB_A B U11 4 3 U16 [4] Vbus 8 VDDOSC 3V3 MN2H SAMA5D3x_BGA324 USB DEVICE A INTERFACE VBUS DM DP ID GND R3 XOUT R27 200K C VDDFUSE XIN Y1 12MHz CL=15pF 3 R26 (VBUS_SENSE) [7,11] PE9 U8 1 2 C49 1 5 11 SAMA5D3 Device and USB Interfaces TP4 SMD R20 53 Figure 4-43. 54 MN2F SAMA5D3x_BGA324 D C B 2 1 DDR_A[0..13] DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 B10 C11 A9 D11 B9 E10 D10 A8 C10 B8 F11 A7 D9 A6 DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 DDR_D0 DDR_D1 DDR_D2 DDR_D3 DDR_D4 DDR_D5 DDR_D6 DDR_D7 DDR_D8 DDR_D9 DDR_D10 DDR_D11 DDR_D12 DDR_D13 DDR_D14 DDR_D15 DDR_D16 DDR_D17 DDR_D18 DDR_D19 DDR_D20 DDR_D21 DDR_D22 DDR_D23 DDR_D24 DDR_D25 DDR_D26 DDR_D27 DDR_D28 DDR_D29 DDR_D30 DDR_D31 H12 H17 H13 G17 G16 H15 F17 G15 F16 E17 G14 E16 D17 C18 D16 C17 B16 B18 C15 A18 C16 C14 D15 B14 A15 A14 E12 A11 B11 F12 A10 E11 DDR_D0 DDR_D1 DDR_D2 DDR_D3 DDR_D4 DDR_D5 DDR_D6 DDR_D7 DDR_D8 DDR_D9 DDR_D10 DDR_D11 DDR_D12 DDR_D13 DDR_D14 DDR_D15 DDR_D16 DDR_D17 DDR_D18 DDR_D19 DDR_D20 DDR_D21 DDR_D22 DDR_D23 DDR_D24 DDR_D25 DDR_D26 DDR_D27 DDR_D28 DDR_D29 DDR_D30 DDR_D31 DDR_BA0 DDR_BA1 DDR_BA2 E9 B6 F9 DDR_BA0 DDR_BA1 DDR_BA2 DDR_RAS DDR_CAS G11 A5 DDR_RAS DDR_CAS DDR_CKE DDR_CLK DDR_CLKN B7 B12 A12 DDR_CKE DDR_CLK DDR_CLKN C8 B5 DDR_CS DDR_WE DDR_DQM0 DDR_DQM1 DDR_DQM2 DDR_DQM3 G12 E15 B15 D12 DDR_DQM0 DDR_DQM1 DDR_DQM2 DDR_DQM3 DDR_DQS0 DDR_DQSN0 DDR_DQS1 DDR_DQSN1 DDR_DQS2 DDR_DQSN2 DDR_DQS3 DDR_DQSN3 E18 D18 G18 F18 B17 A17 B13 A13 DDR_DQS0 DDR_CS DDR_WE 3 4 C13 DDR_CALN C12 DDR_CALP E13 DDR_D[0..31] MN5 DDR_A[0..13] MN4 DDR_D[0..31] VDDIODDR R36 R38 Differencial 100 Ohms Top/Bottom DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 A0 DDR2 SDRAM A1 A2 MT47H64M16HR A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 DDR_BA0 DDR_BA1 DDR_BA2 L2 L3 L1 BA0 BA1 BA2 K9 DNP(1K) 0R DDR_CKE K2 CKE J8 K8 CK CK DDR_CS L8 CS DDR_CAS DDR_RAS L7 K7 CAS RAS K3 WE DDR_DQS1 R40 4.7K B7 A8 DDR_DQS0 R42 4.7K F7 E8 LDQS LDQS DDR_DQM1 DDR_DQM0 B3 F3 UDM LDM A2 E2 R3 R7 RFU1 RFU2 RFU3 RFU4 Differencial 100 Ohms Top/Bottom DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 DDR_A0 DDR_A1 DDR_A2 DDR_A3 DDR_A4 DDR_A5 DDR_A6 DDR_A7 DDR_A8 DDR_A9 DDR_A10 DDR_A11 DDR_A12 DDR_A13 DDR_D0 DDR_D1 DDR_D2 DDR_D3 DDR_D4 DDR_D5 DDR_D6 DDR_D7 DDR_D8 DDR_D9 DDR_D10 DDR_D11 DDR_D12 DDR_D13 DDR_D14 DDR_D15 DDR_BA0 DDR_BA1 DDR_BA2 VDDIODDR R35 DNP(1K) VDDIODDR ODT DDR_CLK DDR_CLKN DDR_WE UDQS UDQS VDD VDD VDD VDD VDD A1 E1 J9 M9 R1 C67 C69 C71 C73 C75 VDDL J1 C77 100nF VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 C79 C81 C83 C85 C87 C89 C91 C93 C95 C97 VREF J2 VSS VSS VSS VSS VSS A3 E3 J3 N1 P9 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSDL A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 J7 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF DDR_VREF C100 100nF A0 DDR2 SDRAM A1 A2 MT47H64M16HR A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 L2 L3 L1 BA0 BA1 BA2 K9 ODT DDR_CKE K2 CKE DDR_CLK DDR_CLKN J8 K8 CK CK DDR_CS L8 CS DDR_CAS DDR_RAS L7 K7 CAS RAS DDR_WE K3 WE DDR_DQS3 R39 4.7K B7 A8 UDQS UDQS DDR_DQS2 R41 4.7K F7 E8 LDQS LDQS DDR_DQM3 DDR_DQM2 B3 F3 UDM LDM A2 E2 R3 R7 RFU1 RFU2 RFU3 RFU4 R37 Differencial 100 Ohms Top/Bottom M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 R8 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 G8 G2 H7 H3 H1 H9 F1 F9 C8 C2 D7 D3 D1 D9 B1 B9 VDD VDD VDD VDD VDD A1 E1 J9 M9 R1 DDR_D16 DDR_D17 DDR_D18 DDR_D19 DDR_D20 DDR_D21 DDR_D22 DDR_D23 DDR_D24 DDR_D25 DDR_D26 DDR_D27 DDR_D28 DDR_D29 DDR_D30 DDR_D31 VDDIODDR 0R C66 C68 C70 C72 C74 100nF 100nF 100nF 100nF 100nF VDDL J1 C76 100nF VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 C78 C80 C82 C84 C86 C88 C90 C92 C94 C96 VREF J2 VSS VSS VSS VSS VSS A3 E3 J3 N1 P9 VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSDL A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 J7 C 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF DDR_VREF C98 100nF B DDR_DQS1 DDR_DQS2 Keep nets as short as possible, therefore, DDR2 devices have to be placed close as possible of SAMA5D36 The layout EBI DDR2 should use controlled impedance traces of ZO= 50ohm characteristic impedance. DDR_DQS3 C99 DDR_VREF D DDR2 SDRAM Address, control and data traces may not exceed 1.3 inches (33.0 mm). Address, control and data traces must be length-matched to within 0.1 inch (2.54mm). Address, control and data traces must match the data group trace lengths to within 0.25 inches (6.35mm). VDDIODDR 100nF DDR_VREF R43 200R 1% L16 10uH 60mA VDDIODDR C101 4.7uF R45 1R C102 100nF TP3 R46 SMD 1.5K 1% R44 200R 1% DDR_VREF A A C103 4.7uF C104 100nF R47 1.5K 1% A A REV SAMA5D3 Xplained Embest 19-Feb-14 PPn 27-Sep-13 RevA INIT EDIT MODIF. SCALE DES. 1/1 4 3 2 XXX XX-XXX-XX XXX XX-XXX-XX VER. DATE REV. SHEET A SAMA5D3x-II & DDR2 5 DATE 1 6 11 DDR2 Memory SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 5 E3 F5 D2 F4 D1 J10 G4 J9 F3 J8 E2 K8 F2 G6 E1 H5 H3 H6 H4 H7 H2 J6 G2 J5 F1 J4 G3 J3 G1 K4 H1 K3 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 A 22R 22R R158 R159 DNP(22R) DNP(22R) R160 R161 22R 22R R162 R163 DNP(22R) DNP(22R) R164 R165 22R 22R R166 R167 22R 22R PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PD16 PD17 PD18 PD19 PD20 PD21 PD22 PD23 PD24 PD25 PD26 PD27 PD28 PD29 PD30 PD31 K5 P1 K6 R1 L7 P2 L8 R2 K7 U2 K9 M5 K10 N4 L9 N3 L10 N5 M6 T1 N2 M3 M2 L3 M1 N1 L1 L2 K1 K2 J1 J2 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PD16 PD17 PD18 PD19 PD20 PD21 PD22 PD23 PD24 PD25 PD26 PD27 PD28 PD29 PD30 PD31 PE0_A0/NBS0 PE1_A1 PE2_A2 PE3_A3 PE4_A4 PE5_A5 PE6_A6 PE7_A7 PE8_A8 PE9_A9 PE10_A10 PE11_A11 PE12_A12 PE13_A13 PE14_A14 PE15_A15_SCK3 PE16_A16_CTS3 PE17_A17_RTS3 PE18_A18_RXD3 PE19_A19_TXD3 PE20_A20_SCK2 PE21_A21/NANDALE PE22_A22/NANDCLE PE23_A23_CTS2 PE24_A24_RTS2 PE25_A25_RXD2 PE26_NCS0_TXD2 PE27_NCS1_TIOA2 PE28_NCS2_TIOB2 PE29_NWR1/NBS1_TCLK2 PE30_NWAIT PE31_IRQ_PWML1 P13 R14 R13 V18 P14 U18 T18 R15 P17 P15 P18 R16 N16 R17 N17 R18 N18 P16 M18 N15 M15 N14 M17 M13 M16 N12 M14 M12 L13 L15 L14 L16 PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14 PE15 PE16 PE17 PE18 PE19 PE20 PE21 (NANDALE) PE22 (NANDCLE) PE23 PE24 PE25 PE26 PE27 PE28 PE29 PE30 PE31 J15_TWD [11] J15_TWCK [11] TWD_LCD [11] TWCK_LCD [11] R180 R181 3.3K 3.3K 3V3 TWD_ISI [11] TWCK_ISI [11] TWD_PMIC [4] TWCK_PMIC [4] 3V3 R178 3.3K R179 3.3K VDDIOM R48 100K 1% R49 100K 1% MN6 MT29F2G08ABAEAWP PE22 PE21 NRD NWE (NANDCLE) 16 (NANDALE) 17 8 18 9 (NANDCE) R50 100K 1% NANDRDY JP5 NCS3 1 2 JUMPER CLE ALE RE WE CE 7 R/B 19 WP 1 2 3 4 5 6 10 11 14 15 20 23 24 35 21 22 38 N.C1 N.C2 N.C3 N.C4 N.C5 N.C6 N.C7 N.C8 N.C9 N.C10 N.C11 N.C12 N.C13 N.C14 DNU1 DNU2 DNU3 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8_N.C I/O9_N.C I/O10_N.C I/O11_N.C I/O12_N.C I/O13_N.C I/O14_N.C I/O15_N.C 29 30 31 32 41 42 43 44 26 27 28 33 40 45 46 47 VCC VCC VCC_N.C VCC_N.C 12 37 34 39 VSS VSS VSS_N.C VSS_N.C 13 36 25 48 M_EBI_D0 M_EBI_D1 M_EBI_D2 M_EBI_D3 M_EBI_D4 M_EBI_D5 M_EBI_D6 M_EBI_D7 D VDDIOM D8 A4 E8 A3 A2 F8 B3 G8 B4 F7 A1 D7 C6 E7 B2 F6 B1 E6 C3 D6 C4 D5 C2 G9 C1 H10 H9 D4 H8 G5 D3 E4 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 PC30 PC31 MN2E SAMA5D3x_BGA324 C105 100nF C106 100nF PE[0..31] [4,5,8,11] C OPTIONAL VDDIOM R51 1.5K 1% MN11 PE23 1 IO 2 NC 3 GND DNP(DS28E05) MN7 2 IO GND PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 1 T2 N7 T3 N6 P5 T4 R4 U1 R5 P3 R6 V3 P6 V1 R7 U3 P7 V2 V5 T6 N8 U4 M7 U5 M8 T5 N9 V4 M9 P8 M10 R9 NC1 NC2 NC3 NC4 3 4 5 6 B DNP(DS2431) PC[0..31] [4,11] MN2C SAMA5D3x_BGA324 PC0_ETX0 PC1_ETX1 PC2_ERX0 PC3_ERX1 PC4_ETXEN PC5_ECRSDV PC6_ERXER PC7_EREFCK PC8_EMDC PC9_EMDIO PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 PC30 PC31 PC26 PC27 R156 R157 5 PC24 PC0 R153 R133 R134 22R DNP(22R) 22R PC22 PC1 R154 R135 R136 22R DNP(22R) 22R PC23 PC2 R155 R137 R138 22R DNP(22R) 22R PC3 R139 R140 22R 22R PC4 R141 R142 R143 R144 22R 22R 22R 22R R145 R146 R147 R148 22R 22R 22R 22R R149 R150 R151 R152 22R 22R 22R 22R PC5 PC6 PC7 PC8 PC9 J15_Pin6 [11] ETH1_PC0 [10] J15_Pin5 [11] ETH1_PC1 [10] J15_Pin4 [11] ETH1_PC2 [10] J15_PC3 [11] ETH1_PC3 [10] J15_PC4 [11] ETH1_PC4 [10] J18_PC5 [11] ETH1_PC5 [10] J18_PC6 [11] ETH1_PC6 [10] J18_PC7 [11] ETH1_PC7 [10] VDDIOP1 MN2G SAMA5D3x_BGA324 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D16 R52 100K 1% M_EBI_D0 M_EBI_D1 M_EBI_D2 M_EBI_D3 M_EBI_D4 M_EBI_D5 M_EBI_D6 M_EBI_D7 K12 K15 K14 K16 K13 K17 J12 K18 J14 J16 J13 J17 J15 J18 H16 H18 MN8 PD11 PD10 PD12 5 2 6 (SPI0_CS) PD13 1 VDDIOP1 DQO VCC DQ1 C W/Vpp/DQ2 HOLD/DQ3 S GND 8 C107 100nF 3 7 4 DNP(N25Q032A13ESE40F) JP6 JUMPER NCS3 L12 NCS3 NRD NWE_NWR0 L17 K11 NRD NWE NANDRDY L18 A NANDRDY A A J18_PC8 [11] ETH1_PC8 [10] J18_PC9 [11] ETH1_PC9 [10] 4 (SPI0_MOSI) (SPI0_MIS0) (SPI0_SPCK) 1 2 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 B PB0_GTX0 PB1_GTX1 PB2_GTX2 PB3_GTX3 PB4_GRX0 PB5_GRX1 PB6_GRX2 PB7_GRX3 PB8_GTXCK PB9_GTXEN PB10_GTXER PB11_GRXCK PB12_GRXDV PB13_GRXER PB14_GCRS PB15_GCOL PB16_GMDC PB17_GMDIO PB18_G125CK PB19_GTX4 PB20_GTX5 PB21_GTX6 PB22_GTX7 PB23_GRX4 PB24_GRX5 PB25_GRX6 PB26_GRX7 PB27 PB28 PB29 PB30 PB31 PA30 PA31 1 PB[0..31] [8,9,10,11] MN2B SAMA5D3x_BGA324 C 2 PD[0..31] [8,11] MN2D SAMA5D3x_BGA324 REV SAMA5D3 Xplained Embest 19-Feb-14 PPn 27-Sep-13 RevA INIT EDIT MODIF. SCALE DES. 1/1 2 XXX XX-XXX-XX XXX XX-XXX-XX VER. DATE REV. SHEET A SAMA5D3x-II & NAND 3 DATE 1 7 11 NAND Flash and Optional Memories D PA0_LCDDAT0 PA1_LCDDAT1 PA2_LCDDAT2 PA3_LCDDAT3 PA4_LCDDAT4 PA5_LCDDAT5 PA6_LCDDAT6 PA7_LCDDAT7 PA8_LCDDAT8 PA9_LCDDAT9 PA10_LCDDAT10 PA11_LCDDAT11 PA12_LCDDAT12 PA13_LCDDAT13 PA14_LCDDAT14 PA15_LCDDAT15 PA16_LCDDAT16 PA17_LCDDAT17 PA18_LCDDAT18 PA19_LCDDAT19 PA20_LCDDAT20 PA21_LCDDAT21 PA22_LCDDAT22 PA23_LCDDAT23 PA24_LCDPWM PA25_LCDDISP PA26_LCDVSYNC PA27_LCDHSYNC PA28_LCDPCK PA29_LCDDEN PA30_TWD0 PA31_TWCK0 3 4 PA[0..31] [11] Figure 4-44. 5 MN2A SAMA5D3x_BGA324 55 Figure 4-45. 56 3 4 VDD_MCI0 2 VDDIOP1 Q3 IRLML6402 2 3 VDDIOP1 1 1 R53 100K 1% D D R54 R128 R127 R126 R125 R124 R123 R122 R55 C108 10uF C109 100nF DNP(4.7K) R56 10K 10K 68K 68K 68K 68K 68K 68K 68K 68K R121 PE2 [7] VDDIOM (MCI0_CD) [7] PE0 J10 (MCI0_DA1) (MCI0_DA0) [7] PD2 [7] PD1 (MCI0_CK) [7] PD9 R182 22R (MCI0_CDA) (MCI0_DA3) (MCI0_DA2) [7] PD0 [7] PD4 [7] PD3 16 15 14 0R 8 7 6 5 4 3 2 1 9 R57 (MCI0_WP) 13 12 11 10 7SDMM-B0-2211 [7] [7] [7] [7] (MCI0_DA4) (MCI0_DA5) (MCI0_DA6) (MCI0_DA7) PD5 PD6 PD7 PD8 C C SD/MMCPlus CARD INTERFACE - MCI0 VDDIOP1 (MCI1_CDA) (MCI1_CK) [7] PB19 [7] PB24 R183 R112 R58 10K R129 68K R132 R131 (MCI1_DA0) (MCI1_DA1) (MCI1_DA2) (MCI1_DA3) PB20 PB21 PB22 PB23 R59 10K DNP(68K) [7] [7] [7] [7] 68K B 68K 68K R130 VDDIOM B J11 22R (MCI1_CD) [7] PE1 7 8 1 2 DAT0 DAT1 DAT2 DAT3 3 5 CMD CLK 4 6 VDD VSS 9 10 C110 10uF C111 100nF PGND PGND PGND NC NC 11 12 13 14 15 CD PGND DNP(MCTF-0403) Micro SD CARD INTERFACE - MCI1 A A A A REV SAMA5D3 Xplained Embest 19-Feb-14 XXX XX-XXX-XX PPn 27-Sep-13 XXX XX-XXX-XX RevA INIT EDIT MODIF. SCALE DES. 1/1 5 4 3 2 DATE VER. DATE REV. SHEET A HSMCI 1 8 11 SD and Micro-SD Interfaces SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 5 3 4 2 Figure 4-46. 5 1 D ETH0 10Base-T/100Base-TX/1000BASE-T top/bot XI 1 20pF 2 C112 AVDDL_PLL 20pF NRST [4,5,10,11] + C113 10uF top/bot C114 10nF C115 10nF R60 R61 4.7K 1K R62 22R L17 1 180ohm at 100MHz 2 + C117 10uF AVDDH C118 10nF C119 10nF C120 10nF R63 49 48 47 46 45 44 43 42 41 40 39 38 37 AVDDL VDDIOP1 R111 5 6 DNP(0R) 100nF TCT RCT R72 11 12 Left Green LED YELC YELA 13 14 Right Yellow LED GND GND GND GND C124 C125 ETH0_LED2 LINK ETH0_LED1 ACT 1 2 3 4 5 6 7 8 9 10 11 12 top/bot top/bot ETH0_A+ ETH0_AETH0_B+ ETH0_BETH0_C+ ETH0_C- top/bot top/bot top/bot top/bot ETH0_D+ ETH0_D- top/bot top/bot 15 16 17 18 AVDDH TXRXP_A TXRXM_A AVDDL TXRXP_B TXRXM_B TXRXP_C TXRXM_C AVDDL TXRXP_D TXRXM_D AVDDH KSZ9031RNI 48-pin QFN + C126 10uF VDDIOP1 R64 R65 R66 R67 C 4.7K 4.7K 4.7K 4.7K MDC RX_CLK DVDDH RX_DV RXD0 RXD1 DVDDL VSS RXD2 RXD3 DVDDL TX_EN 36 35 34 33 32 31 30 29 28 27 26 25 R68 22R GMDC GRXCK PB16 PB11 GRX_CTL GRX0 GRX1 PB13 PB4 PB5 GRX2 GRX3 PB6 PB7 GTX_CTL PB9 48F-01GY2DPL2NL GTXCK GTX3 GTX2 GTX1 GTX0 PB8 PB3 PB2 PB1 PB0 13 14 15 16 17 18 19 20 21 22 23 24 EARTH_ETH0 VDDIOP1 DVDDL ETH0_GND R69 4.7K B SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 DNP(10uF 0805) GRLA GRLC C129 10nF C123 10nF VSS_PS DVDDL LED2 DVDDH LED1 DVDDL TXD0 TXD1 TXD2 TXD3 DVDDL GTX_CLK AVDDH TD3+ TD3TD4+ TD4- 470R 7 8 9 10 R71 ETH0_C+ ETH0_CETH0_D+ ETH0_D- TD1+ TD1TD2+ TD2- 470R J12 C128 10nF P_GND + C127 10uF C122 10nF MN10 KSZ9031RN ISET AVDDH XI XO AVDDL_PLL LDO_O RESET_N CLK125_NDO DVDDH DVDDL INT_N MDIO VDDIOP1 C PB18 G125CK INT_GETHR PB10 PB17 GMDIO 12.1K 1% C121 10nF 1 2 3 4 PB[0..31] [7,8,10,11] VDDIOP1 ETH0_A+ ETH0_AETH0_B+ ETH0_B- VDDIOP1 XO XI XO C116 4 3 Y3 25MHz + C132 10uF C133 10nF C134 10nF C135 10nF C136 10nF C137 10nF C138 10nF R70 22R top/bot ETH0_LED2 ETH0_LED1 R73 ETH0_GND 0R L18 1 B 180ohm at 100MHz 2 RGMII Routing Constraints (Reduced Gigabit Media Independent Interface): The RGMII signals must be length-matched by TX and RX groups. That is, the TX group should be matched within 0.25 inch (6.35 mm), and the RX group should be matched within 0.25 inch (6.35 mm). Total length should not exceed 1.75 inch (44.5 mm). There is no requirement to match the TX and RX groups because their clocks are not related. EARTH_ETH0 A A A A REV SAMA5D3 Xplained Embest 19-Feb-14 XXX XX-XXX-XX PPn 27-Sep-13 XXX XX-XXX-XX RevA INIT EDIT MODIF. SCALE DES. 1/1 5 4 3 2 DATE VER. DATE REV. SHEET A Ethernet_ETH0_10/100/1000 1 9 11 Gigabit Ethernet D 57 Figure 4-47. 58 3 4 2 1 D D 4 TX+ TX+ top/bot 7 2 TX- TD- 2 TX- TX- top/bot 6 TXM 3 RX+ RD+ 3 RX+ RX+ top/bot 5 RXP CT 5 RD- 6 RX- RX- top/bot 4 RXM C141 2.2uF 2 VDD_1V2 C142 100nF 1 33 22 26 27 10 GND PADDLE TXC TXD2 TXD3 REXT C 6 RX- C139 100nF 75 4 75 NC 7 5 6.49K 1% 19 TXD1 TXD0 TXEN RXD3/PHYAD0 RXD2/PHYAD1 RXD1/PHYAD2 RXD0/DUPLEX RXDV/CONFIG2 RXER/ISO CRS/CONFIG1 COL/CONFIG0 25 24 23 13 14 15 16 18 20 29 28 MDC MDIO INTRP/NAND 12 11 21 3 10K R115 [7] [7] [7] [7] ETH1_PC3 ETH1_PC2 ETH1_PC5 ETH1_PC6 [7] [7] [7] [7] C ETH1_PC8 [7] ETH1_PC9 [7] PB12 [7] E1_AVDDT VDDA_3V3 ETH1_PC7 ETH1_PC1 ETH1_PC0 ETH1_PC4 VDDIOP0 L19 180ohm at 100MHz 1 2 C143 + C144 100nF 10uF Left Green LED VDDIOP0 9 VDDIOP0 B R76 EARTH_ETH1 Right yellow LED 10 15 16 8 8 12 EARTH_ETH1 GND_ETH1 1nF 75 7 11 13 14 C140 100nF 75 RXC/B-CAST_OFF TXP 10K R120 1 CT 10K R119 TD+ 10K R118 TX+ R75 1K 10K R117 1 13F-64GYD2PL2NL R74 1K 10K R116 J13 MN9 10K R114 10Base-T/100Base-TX VDDIOP0 10K R113 VDDIOP1 ETH1 R79 470R R80 470R ETH1_LED1 ACT ETH1_LED0 LINK R77 R78 10K 10K ETH1_XO 8 XO ETH1_XI 9 XI ETH1_LED0 ETH1_LED1 30 31 VDDIO 17 C145 + C146 100nF 10uF LED0/NWAYEN LED1/SPEED RESET 32 NRST [4,5,9,11] B KSZ8081RNB C147 20pF ETH1_XI R81 GND_ETH1 0R 180ohm at 100MHz L20 1 2 C149 4 Y4 25MHz 3 + C148 10uF 1 2 VDDIOP0 ETH1_XO 20pF EARTH_ETH1 A A A A REV SAMA5D3 Xplained Embest 19-Feb-14 PPn 27-Sep-13 RevA INIT EDIT MODIF. SCALE DES. 1/1 4 3 2 XXX XX-XXX-XX XXX XX-XXX-XX VER. DATE REV. SHEET A Ethernet_ETH1_10/100 5 DATE 1 10 11 Ethernet 10/100 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 5 3 4 2 R187 R188 0R DNP(0R) PE[0..31] [4,5,7,8] PC23 PC26 0R DNP(0R) 0R DNP(0R) 0R DNP(0R) 1 2 3 4 5 6 7 8 R168 DNP(0R) R170 1 2 3 4 5 6 7 8 R84 R83 DNP(0R) 5V_Ext PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14 PE15 PE16 PE17 PE18 PE19 PE20 PE21 PE22 PE23 PE24 PE25 PE26 PE27 PE28 PE29 PE30 PE31 A J18_PC8 [7] J18_PC9 [7] PC30 UTXD0 PC29 URXD0 Extention boards connectors J20 J19 1 2 3 4 5 6 7 8 JT254-DS180-850-218-001 PE19 PE18 PB29 PB28 PD18 PD17 PC26 PC27 TXD3 RXD3 TXD1 RXD1 TXD0 RXD0 TWD1 TWCK1 TWD_ISI [7] TWCK_ISI [7] FH2543-08GT10 C 5V_MAIN 3V3 R92 DNP(0R) R93 0R NRST PE6 (RST_LCD) R94 R99 0R DNP(0R) PD20 (AD0) PD12 (SPI0_SPCK) R95 R96 DNP(0R) 22R PD21 (AD1) PD11 (SPI0_MOSI) R100 R97 DNP(0R) 22R PD22 (AD2) PD10 (SPI0_MISO) R98 R101 DNP(0R) 22R PD23 (AD3) R102 PD16 (SPI0_NPCS3) R103 DNP(0R) 22R PA28 (LCDPCK) 22R LCD Connector J22 See Errata section R184 JTAG R104 R105 R106 R107 100K 1% 100K 1% 100K 1% 100K 1% J24 1 3 5 7 9 11 13 15 17 19 PA29 (LCDDEN) PA27 (LCDHSYNC) PA26 (LCDVSYNC) PE28 (LCDDAT23) PE27 (LCDDAT22) PC15 (LCDDAT21) PC10 (LCDDAT20) PC11 PC12 PC13 PC14 (LCDDAT19) (LCDDAT18) (LCDDAT17) (LCDDAT16) PA15 PA14 PA13 PA12 (LCDDAT15) (LCDDAT14) (LCDDAT13) (LCDDAT12) PA11 PA10 PA9 PA8 (LCDDAT11) (LCDDAT10) (LCDDAT9) (LCDDAT8) PA7 PA6 PA5 PA4 (LCDDAT7) (LCDDAT6) (LCDDAT5) (LCDDAT4) PA3 PA2 PA1 PA0 (LCDDAT3) (LCDDAT2) (LCDDAT1) (LCDDAT0) VDDIOP0 3V3 2 4 6 8 10 12 14 16 18 20 PA24 (LCDPWM) PE8 (IRQ2) PE7 IRQ1) TWCK_LCD TWD_LCD PA25 (LCDDISP) R108 TDI TMS TCK RTCK TDO R109 0R R110 0R 0R NTRST [5] TDI [5] TMS [5] TCK [5] TDO [5] NRST [4,5,9,10] P101-2*10SGF-116A-NX PE23 (ID_SYS) 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 B 3V3 R189 TWCK_LCD TWD_LCD [7] TWCK_LCD [7] TWD_LCD PC[0..31] [4,7] PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 PC30 PC31 J18_PC5 [7] J18_PC6 [7] J18_PC7 [7] PC28 SPI1_NPCS3 68K SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 B PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 J15_PC3 [7] J15_PC4 [7] FH2543-08GT10 J21 FH2543-08GT10 C J15_Pin6 [7] J15_Pin5 [7] J15_Pin4 [7] J18 0R 1 2 3 4 5 6 7 8 J15_TWCK [7] J15_TWD [7] AREF [5] ETX0 ETX1 ERX0 PC25 SPI1_NPCS0 ERX1 ETXEN D DNP(0R) FH2543-08GT10 PA31 TWCK0 PA30 TWD0 AREF FH2543-10GT10 PE29 PE13 PE25 PE23 PE11 PE17 PE15 PA23 PA21 PA19 PA17 PE9 PB26 PC17 R86 R87 R88 R89 R91 R90 J17 SPI1_MOSI 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 PC20 AD8 PD28 PC21 AD9 PD29 PC19 AD10 PD30 PD31 CANRX1 PB14 PD19 PB15 CANRX0 PD14 CANTX0 PD15 AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 0R DNP(0R) 10 9 8 7 6 5 4 3 2 1 3V3 5V_Ext 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 R82 R85 SPI1_MISO J16 P101-2*03SGF-116A-NX FH2543-08GT10 PC18 PD20 PD21 PD22 PD23 PD24 PD25 PD26 PD27 PC24 PC22 NRST PD30 PC15 5V_Ext [4] 5V_Ext SPI1_SPCK 1 2 3 4 5 6 7 8 DNP(0R) R169 NRST 5 3 1 [4,5,9,10] PE13 R173 (TXD) (RXD) 0R PE14 R174 0R [7] PB31 [7] PB30 3V3 5V_MAIN DNP(0R) R172 PB[0..31] [7,8,9,10] [5] VBat 3V3 6 4 2 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PD11 PD12 PD13 PD14 PD15 PD16 PD17 PD18 PD19 PD20 PD21 PD22 PD23 PD24 PD25 PD26 PD27 PD28 PD29 PD30 PD31 PB15 PE31 PE14 PE26 PE24 PE12 PE20 PE16 PA22 PA20 PA18 PA16 PE10 PB27 PB25 PC16 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 J23 1 2 3 4 5 6 DEBUG P101-1*06SGF-116A-NX A 52 51 A A FP520T1-50SR04 REV SAMA5D3 Xplained RevA Embest 19-Feb-14 PPn 27-Sep-13 INIT EDIT MODIF. SCALE DES. 1/1 4 3 2 XXX XX-XXX-XX XXX XX-XXX-XX VER. DATE REV. SHEET A Connectors 5 DATE 1 11 11 LCD, JTAG, DEBUG and Extended Connectors J15 J14 D 1 PD[0..31] [7,8] 68K R190 DNP(0R) R171 PA[0..31] [7] Figure 4-48. 5 59 5. Errata 5.1 The SPI lines available on the LCD connector J22 have been swapped. Current implementation (wrong): Pin 37 = SPI0_NPCS3 Pin 38 = SPI0_MISO Pin 39 = SPI0_MOSI Pin 40 = SPI0_SPCK Correct implementation: Pin 37 = SPI0_SPCK Pin 38 = SPI0_MOSI Pin 39 = SPI0_MISO Pin 40 = SPI0_NPCS3 To date, there is no impact because no LCD screen available on the market uses the SPI bus on this connector, in particular the PDA Inc. TM430x and TM700x product series recommended by Atmel. A potential problem exists only if the future "Xplained Pro" series LCD extensions are used because these extensions could require the SPI bus on this LCD connector. Also, for customers or third parties planning to develop their own extensions using a connection to J22, we strongly recommend following the correct implementation so as to guarantee a future consistency and compatibility with all Atmel tools. Workaround: 1. 60 Unsolder and remove resistors R96, R97, R101 and R103 located here: SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 2. Solder isolated pieces of wire as follows. Resin coated wires were used below. Make sure not to create any short-circuits between the wires and the other components. 5.2 JP1 routing is incorrect and results in inaccurate VDDCORE current measurement The jumper JP1 was incorrectly routed on the SAMA5D3 Xplained board. As a result, the on-board connections on the left and right sides of the jumper do not match the schematics and VDDCORE current measurement is incorrect. Workaround: 1. Locate C13, L7 and JP1 on the SAMA5D3 Xplained board. C13, L7 and JP1 located on the bottom side 2. JP1 located on the top side On the top side, cut the track between pins 1 and 2 of JP1. Before After SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 61 3. On the top side, solder a 2-pin header in the JP1 footprint. 4. On the bottom side, cut the large track between C13 and L7. Before Zoom 62 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 After 5. Unsolder C13 and re-solder it across the cut made in Step 3, directly to L7. C13 Removed C13 Re-soldered 6. Solder a wire between the top pad of L7 and pin 1 of JP1. 7. To complete the procedure, either: a) install a jumper across both JP1 pins for normal operation, or b) remove the jumper and connect an ammeter across both JP1 pins to measure VDDCORE current. SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 63 5.3 The TWI1 pull-up charge is excessive. The pull-up charge on TWI1 data and clock lines is a bit too high and out of I²C specification. Workaround: Although the board proves to be functional as is, we recommend to fix this excessive pull-up charge by removing resistors R178 and R179. These are located near the J17 connector and the Atmel logo, as shown in the following figure: Figure 5-1. 64 Position of R178 and R179 SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 6. Revision History Table 6-1. SAMA5D3 Xplained User Guide Rev. 11269 Revision History Doc. Rev. Changes 11269D “Errata” section: added Section 5.3 “The TWI1 pull-up charge is excessive.” Inserted Table 4-1 “SAMA5D3 Xplained Board Interface Connectors”. 11269C Section 4.3.1 “Power Supply”: added WARNING on known error on ACT8865 I²C implementation. Added Section 5.2 “JP1 routing is incorrect and results in inaccurate VDDCORE current measurement” Added Section 5.“Errata” . 11269B Added references to “Errata” in Figure 4-17 on page 21 and Figure 4-48 on page 59 and in Table 4-22, “LCD Socket J22 Signal Descriptions,” on page 41 (added note 1) 11269A First issue. SAMA5D3 Xplained [USER GUIDE] Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15 65 ARM Connected Logo XXXXXX Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com © 2015 Atmel Corporation. / Rev.: Atmel-11269D-ATARM-SAMA5D3-Xplained-XPLD-User Guide_07-Sep-15. Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, maXTouch®, QTouch® and others are registered trademarks or trademarks of Atmel Corporation in U.S. and other countries. ARM®, ARM Connected® logo, and others are the registered trademarks or trademarks of ARM Ltd. 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