Atmel | SMART SAM9G10
SAM9G10-EK2
USER GUIDE
Introduction
The Atmel ® SAM9G10-EK2 evaluation kit is an effective platform to evaluate
microcontroller performance and to develop code for applications based on the
Atmel | SMART SAM9G10.
This guide is a description of the hardware included in the SAM9G10-EK2.
Software files are available embedded into the board’s memory upon delivery.
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
Table of Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.
Deliverables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.
Board Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3.
SAM9G10-EK Modifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4.
Setting Up the SAM9G10-EK2 Evaluation Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4.1
4.2
4.3
4.4
4.5
4.6
4.7
5.
2
List of Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Errata . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.1
9.
Configuration Straps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1
8.
SAM9G10 Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
SAM9G10 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Clock Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Reset Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Shutdown Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Power Supply Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Remote Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Audio Stereo Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
User Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Debug Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Expansion Slot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
PIO Usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Configuration Straps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1
7.
5
5
6
8
8
8
8
Board Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
5.11
5.12
5.13
6.
Electrostatic Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Powering Up the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Backup Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Getting Started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SAM9G10-EK2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JTAGSEL S5 Footprint Selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
1.
Deliverables
The SAM9G10-EK2 kit box contains the following items:
2.
a SAM9G10-EK2 board
one A/B-type USB cable
one serial RS232 cable
one RJ45 crossed Ethernet cable
universal input AC/DC power supply with US and EU plug adapter
Board Features
The board is equipped with a SAM9G10 microcontroller in a 217-ball LFBGA package together with the following:
64 Mbytes of SDRAM memory
256 Mbytes of NAND Flash memory
one serial DataFlash
one USB device port interface
two USB host port interfaces
one DBGU serial communication port
JTAG/ICE debug interface
one Ethernet 100-base TX with three status LEDs
one Wolfson WM8731 Audio DAC
one 3.5" 1/4 VGA TFT LCD Module with TouchScreen and backlight
one Power LED and two general-purpose LEDs
four user input pushbuttons
one wakeup input pushbutton
one reset pushbutton
one DataFlash SD/MMC card slot
two expansion footprint connectors (solder side)
one lithium coin cell battery retainer for 12 mm cell size
dual pitch prototyping area
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
3
3.
SAM9G10-EK Modifications
Table 3-1 lists the changes made to the SAM9G10-EK to create the SAM9G10-EK2.
Table 3-1.
SAM9G10-EK versus SAM9G10-EK2
Item
SAM9G10-EK
SAM9G10-EK2
Refer to
Power Management
Linear Technology LT1963 +
Texas Instruments TPS60500
Richtek RT9018A + RT9186A
Figure 7-2
Audio DAC
Atmel AT73C213
Wolfson WM8731
Figure 7-2
ETM Trace Port
On-board
Removed
Figure 7-3
Secondary 8-bit NAND Flash
footprint
On-board
Removed
Figure 7-4
Ethernet PHY
Davicom DM9000E
Davicom DM9000C
Figure 7-5
LCD
Hitachi HILTX09D71VM1CCA
Truly TFT1N4633-E
Figure 7-6
Touchscreen Controller
Texas Instruments ADS7843E
Analog Devices
AD7877ACPZ, and a backlight
driver added externally
Figure 7-6
Connector
High-density PIO connector
footprint
IDC male headers
Figure 7-7
Series Resistors
–
Added 33 Ohm series resistors
on EBI bus
Figure 7-8
Layout
–
Reworked
–
PIO LInes
–
Lines re-assigned
Section 5.13
4
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
4.
Setting Up the SAM9G10-EK2 Evaluation Board
4.1
Electrostatic Warning
The SAM9G10-EK2 evaluation board is shipped in a protective anti-static package. The board must not be
subjected to high electrostatic potentials. In risky ESD environments (e.g. offices with carpet) a grounding strap or
similar protective device should be worn when handling the board. Also, generally avoid touching the component
pins or any other metallic element of the board.
4.2
Requirements
In order to set up the SAM9G10-EK2, the following items are required:
the SAM9G10-EK2 evaluation board itself
AC/DC power adapter (5V at 2A), 2.1 mm by 5.5 mm
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
5
4.3
Layout
Figure 4-1.
6
SAM9G10-EK2 Layout - Top View
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
Figure 4-2.
SAM9G10-EK2 Layout - Bottom View
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
7
4.4
Powering Up the Board
The SAM9G10-EK2 requires 5V DC (±5%). DC power is supplied to the board via the 2.1 mm by 5.5 mm socket
(J1). The coaxial power plug center pin is the positive (+) pole.
4.5
Backup Power Supply
The user has the possibility to add a battery (3V Lithium Battery CR1225 or equivalent) in order to permanently
power the backup part of the device. In this case, J9 configuration must to be set in position 1, 2.
Refer to Table 6-1, “Configuration Jumpers and Straps”.
4.6
Getting Started
The SAM9G10-EK2 is delivered with an embedded demo and documentation files allowing the user to begin
evaluating the SAM9G10 microcontroller quickly. Simply power the board and connect it to the USB port of your
PC to open it. For more information, refer to the SAM9G10 tools page on www.atmel.com for the most up-to-date
information on getting started with the SAM9G10-EK2.
SAM9G10-EK2 Block Diagram
Figure 4-3.
Block Diagram
DBGU
RS232
ETHERNET 10/100
JTAG/ICE
HEADPHONE
OUT
RJ45
TFT
320 x 240
1/4 VGA DISPLAY
WITH TOUCHSCREEN
TXD
RXD
4.7
ADM3202A
POWER SUPPLY
5 VDC
WM8731
STEREO
AUDIO DAC
EMAC + PHY
LINEAR REGULATOR
VDD3V3
3V3
CONTROLLER
SCC1 I2S
HDMB - HDPB
HDMA - HDPA
DDM
DRXD - DTXD
DDP
TOUCHSCREEN
NRST
VDDIO
SYSTEM CONTROLLER
SPI0
SPI0_NPCS2
PA29 / SPI0_NPCS3
SCC1
USB HOST
VDDPLL VDDOSC
USB DEVICE
DBGU
SHUTDOWN
VDDCORE
EBI
1V2
NRST
1V2
LCD CONTROLLER
SAM9G10
PIO A, B, C
3
2
1
1V2
3
2
1
32
16
16
SDRAM
256 Mb
CS
SDRAM
256 Mb
NANDFLASH
DATAFLASH
DEVICE
3V3
USER'S GREEN LED
9 1 2 3 4 5 6 7 8
SD/MMC
DATAFLASH
CARD READER
8
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
SPI0
8
1.2V
3V
+
SPI0_NPCS0
EBI
WKUP
PIO
MISO - MOSI - SPCK
3V3
GNDBU
SHDN
EXT CLK INPUT
VDDBU
XIN
MCI
18.432 MHz
XOUT
SPI0_NPCS3 / PA6
REG
1V2
EXPANSION CONNECTORS
PIO
LCD CONTROL
SHUTDOWN
YELLOW POWER LED
5V
5.
Board Description
5.1
SAM9G10 Microcontroller
Incorporates the ARM926EJ-S™ ARM® Thumb® Processor
̶
DSP Instruction Extensions
̶
ARM Jazelle® Technology for Java Acceleration
̶
16-Kbyte Data Cache, 16-Kbyte Instruction Cache, Write Buffer
̶
266 MHz core frequency
̶
Memory Management Unit
̶
EmbeddedICE In-circuit Emulation, Debug Communication Channel Support
̶
Mid-level implementation Embedded Trace Macrocell
Additional Embedded Memories
̶
32 Kbytes of Internal ROM, Single-cycle Access at Maximum Bus Speed
̶
160 Kbytes of Internal SRAM, Single-cycle Access at Maximum Processor or Bus Speed
External Bus Interface (EBI)
LCD Controller
̶
Supports SDRAM, Static Memory, NAND Flash and CompactFlash
̶
RGB Addressing
̶
Supports Passive or Active Displays
̶
Up to 16-bits per Pixel in STN Color Mode
̶
Up to 16M Colors in TFT Mode (24-bit per Pixel), Resolution up to 2048 x 2048
USB
̶
USB 2.0 Full Speed (12 Mbits per second) Host Double Port
Dual On-chip Transceivers
̶
Integrated FIFOs and Dedicated DMA Channels
̶
̶
USB 2.0 Full Speed (12 Mbits per second) Device Port
̶
Bus Matrix
̶
Handles Five Masters and Five Slaves
̶
Boot Mode Select Option
̶
Remap Command
Fully Featured System Controller (SYSC) for Efficient System Management, including
̶
Reset Controller, Shutdown Controller, Four 32-bit Battery Backup Registers for a Total of 16 Bytes
Clock Generator and Power Management Controller
̶
Advanced Interrupt Controller and Debug Unit
̶
Periodic Interval Timer, Watchdog Timer and Real-time Timer
̶
Three 32-bit PIO Controllers
Based on Power-on Reset Cells, Reset Source Identification and Reset Output Control
Shutdown Controller (SHDWC)
̶
̶
Reset Controller (RSTC)
̶
On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
Programmable Shutdown Pin Control and Wake-up Circuitry
Clock Generator (CKGR)
̶
32.768 kHz Low-power Oscillator on Battery Backup Power Supply, Providing a Permanent Slow
Clock
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
9
̶
3 to 20 MHz On-chip Oscillator and two PLLs
Power Management Controller (PMC)
̶
Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities
̶
Four Programmable External Clock Signals
Advanced Interrupt Controller (AIC)
̶
Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
̶
Three External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
Debug Unit (DBGU)
̶
2-wire USART and Support for Debug Communication Channel, Programmable ICE Access
Prevention
Periodic Interval Timer (PIT)
̶
20-bit Interval Timer plus 12-bit Interval Counter
Watchdog Timer (WDT)
̶
Key Protected, Programmable Only Once, Windowed 12-bit Counter, Running at Slow Clock
Real-Time Timer (RTT)
̶
32-bit Free-running Backup Counter Running at Slow Clock
Three 32-bit Parallel Input/Output Controllers (PIO) PIOA, PIOB and PIOC
96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
̶
Input Change Interrupt Capability on Each I/O Line
̶
̶
Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
Nineteen Peripheral DMA (PDC) Channels
Multimedia Card Interface (MCI)
̶
Compliant with Multimedia Cards and SDCards
̶
Automatic Protocol Control and Fast Automatic Data Transfers with PDC, MMC and SDCard
Compliant
Three Synchronous Serial Controllers (SSC)
̶
Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
̶
I²S Analog Interface Support, Time Division Multiplex Support
̶
High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
Three Universal Synchronous/Asynchronous Receiver Transmitters (USART)
̶
Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation
̶
Support for ISO7816 T0/T1 Smart Card, Hardware and Software Handshaking, RS485 Support
Two Master/Slave Serial Peripheral Interface (SPI)
̶
8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
One Three-channel 16-bit Timer/Counters (TC)
̶
Three External Clock Inputs, Two multi-purpose I/O Pins per Channel
̶
Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
Two-wire Interface (TWI)
IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
Required Power Supplies:
̶
10
Master Mode Support, All Two-wire Atmel EEPROMs Supported
̶
1.08V to 1.32V for VDDCORE and VDDBU
̶
3.0V to 3.6V for VDDOSC and for VDDPLL
̶
2.7V to 3.6V for VDDIOP (Peripheral I/Os)
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
̶
1.65V to 1.95V and 3.0V to 3.6V for VDDIOM (Memory I/Os)
Available in a 217-ball LFBGA RoHS-compliant Package
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
11
SAM9G10 Block Diagram
Block Diagram
ARM926EJ-S Core
ICE
Instruction Cache
16K bytes
TCM
Interface
System Controller
I
AIC
PIO
TST
FIQ
IRQ0-IRQ2
DRXD
DTXD
PCK0-PCK3
ITCM
DBGU
PLLA
PLLRCB
PLLB
XIN
XOUT
OSC
OSC
POR
VDDCORE
POR
EBI
CompactFlash
NAND Flash
SDRAM
Controller
PIT
Peripheral
Bridge
RTT
Static
Memory
Controller
Peripheral
DMA
Controller
SHDWC
VDDBU
GNDBU
DTCM
5-layer
Matrix
GPBREG
SHDN
WKUP
D
Fast ROM
32K bytes
PMC
WDT
XIN32
XOUT32
I
DMA
FIFO
RSTC
USB Host
NRST
APB
PIOA
PIOB
TCLK
TPS0-TPS2
TPK0-TPK15
BIU
Fast SRAM
160K bytes
PDC
PLLRCA
D
ETM
Data Cache
16K bytes
MMU
PIO
TSYNC
JTAG
Boundary Scan
PIO
JTAGSEL
TDI
TDO
TMS
TCK
NTRST
RTCK
FIFO
PIOC
USB Device
Transceiver
Figure 5-1.
BMS
D0-D15
A0/NBS0
A1/NBS2/NWR2
A2-A15/A18-A21
A22/REG
A16/BA0
A17/BA1
NCS0
NCS1/SDCS
NCS2
NCS3/NANDCS
NRD/CFOE
NWR0/NWE/CFWE
NWR1/NBS1/CFIOR
NWR3/NBS3/CFIOW
SDCK
SDCKE
RAS-CAS
SDWE
SDA10
NWAIT
A23-A24
A25/CFRNW
NCS4/CFCS0
NCS5/CFCS1
CFCE1
CFCE2
NCS6/NANDOE
NCS7/NANDWE
D16-D31
HDMA
HDPA
HDMB
HDPB
Transceiver
5.2
DDM
DDP
DMA
MCI
LUT
LCD Controller
PDC
RXD0
TXD0
SCK0
RTS0
CTS0
USART0
RXD1
TXD1
SCK1
RTS1
CTS1
USART1
SPI0_NPCS0
SPI0_NPCS1
SPI0_NPCS2
SPI0_NPCS3
SPI0_MISO
SPI0_MOSI
SPI0_SPCK
SPI1_NPCS10
SPI1_NPCS1
SPI1_NPCS12
SPI1_NPCS3
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
12
PIO
PIO
PDC
SSC0
PDC
TF0
TK0
TD0
RD0
RK0
RF0
SSC1
PDC
TF1
TK1
TD1
RD1
RK1
RF1
PIO
MCCK
MCCDA
MCDA0-MCDA3
RXD2
TXD2
SCK2
RTS2
CTS2
LCDD0-LCDD23
LCDVSYNC
LCDHSYNC
LCDDOTCK
LCDDEN
LCDCC
FIFO
PDC
USART2
SSC2
PDC
PDC
Timer Counter
SPI0
PDC
TC0
TC1
TC2
TF2
TK2
TD2
RD2
RK2
RF2
TCLK0
TCLK1
TCLK2
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
SPI1
TWI
PDC
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
TWD
TWCK
5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10
5.11
Memory
32 Kbytes of Internal ROM
160 Kbytes of Internal High-speed SRAM
Serial DataFlash
64 Mbytes of SDRAM memory
256 Mbytes of NAND Flash memory
Clock Circuitry
18.432 MHz standard crystal for the embedded oscillator
32.768 kHz standard crystal for the slow clock oscillator
Reset Circuitry
Internal reset controller with a bi-directional reset pin
External reset push button
Shutdown Controller
Programmable shutdown and Wake-Up
Wake-up push button
Power Supply Circuitry
For dynamic power consumption, the SAM9G10 consumes a maximum of 50 mA on VDDCORE at
maximum speed in typical conditions (1.2V, 25°C), processor running full-performance algorithm
On-board 1.2V high efficiency step-down charge pump regulator with shutdown control
On-board 3.3V linear regulator with shutdown control
Remote Communication
One Serial interface (DBGU COM Port) via RS-232 DB9 male socket
USB V2.0 Full-speed Compliant, 12 Mbits per second (UDP)
Two USB Host port V2.0 Full-speed Compliant, 12 Mbits per second (UHP)
One Ethernet 100-base TX with three status LEDs
Audio Stereo Interface
One Wolfson WM8731 stereo audio DAC
One 32 Ohm/20 mW Stereo Headset output (J20) with Master Volume and Mute Controls
User Interface
Four user input pushbuttons
Two user green LEDs
One yellow power LED (can be also software controlled)
One ¼ VGA display LCD with Touchscreen and white LED backlight
Debug Interface
20-pin JTAG/ICE interface connector
DBGU COM Port
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
13
5.12
14
Expansion Slot
One DataFlash, SD/MMC card slot
All I/Os of the SAM9G10 are routed to peripheral extension IDC connectors (J25, J26, J27, J29, J30). This
allows the developer to extend the features of the board by adding external hardware components or
boards.
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
5.13
PIO Usage
Table 5-1.
PIO Controller A
I/O Line
Peripheral A
Peripheral B
Comments
PA0
SPI0_MISO
MCDA0
SD/MMC/DATAFLASH SOCKET (J22) & DATAFLASH DEVICE
& TOUCH SCREEN CONTROLLER
SPI0_MISO or
MCI0_DA0
PA1
SPI0_MOSI
MCCDA
SD/MMC/DATAFLASH SOCKET (J22) & DATAFLASH DEVICE
& TOUCH SCREEN CONTROLLER
SPI0_MOSI or
MCI0_CDA
PA2
SPI0_SPCK
MCCK
SD/MMC/DATAFLASH SOCKET (J22) & DATAFLASH DEVICE
& TOUCH SCREEN CONTROLLER
SPI0_SPCK or
MCCK
PA3
SPI0_NPCS0
–
DATAFLASH DEVICE or DATAFLASH SOCKET (J22)
SPI0_NPCS0
PA4
SPI0_NPCS1
MCDA1
SD/MMC/DATAFLASH SOCKET (J22)
MCDA1
PA5
SPI0_NPCS2
MCDA2
SD/MMC/DATAFLASH SOCKET (J22)
MCDA2
PA6
SPI0_NPCS3
MCDA3
SD/MMC/DATAFLASH SOCKET (J22)
SPI0_NPCS3 or
MCDA3
PA7
TWD
PCK0
Audio DAC
TWD
PA8
TWCK
PCK1
Audio DAC
TWCK
PA9
DRXD
PCK2
SERIAL DEBUG PORT (J15)
DRXD
PA10
DTXD
PCK3
SERIAL DEBUG PORT (J15)
DTXD
PA11
TSYNC
SCK1
TOUCH SCREEN CONTROLLER (MN11) PENIRQ
PA11
PA12
TCLK
RTS1
TFT CONTROL PANEL (J23) POWER CONTROL IN
PA12
PA13
TPS0
CTS1
GREEN USER'S LED 1 (DS8)
PA13
PA14
TPS1
SCK2
GREEN USER'S LED 2 (DS7)
PA14
PA15
TPS2
RTS2
SD/MMC/DATAFLASH SOCKET (J9) Card Detect
SD_CD
PA16
TPK0
CTS2
–
–
PA17
TPK1
TF1
I2S AUDIO DAC WM8731 (MN1) DACLRC
TF1
PA18
TPK2
TK1
I2S AUDIO DAC WM8731 (MN1) BCLK
TK1
PA19
TPK3
TD1
I2S AUDIO DAC WM8731 (MN1) DACDAT
TD1
PA20
TPK4
RD1
I2S AUDIO DAC WM8731 (MN1) ADCDAT
RD1
PA21
TPK5
RK1
I2S AUDIO DAC WM8731 (MN1) BCLK (optional)
RK1
PA22
TPK6
RF1
I2S AUDIO DAC WM8731 (MN1) ADCLRC
RF1
PA23
TPK7
RTS0
YELLOW POWER LED CONTROL (DS1)
PA23
PA24
TPK8
SPI1_NPCS1
USER'S PUSH BUTTON INPUT (BP6)
PA24
PA25
TPK9
SPI1_NPCS2
TOUCH SCREEN CONTROLLER (MN11) CS#
SPI1_NPCS2
PA26
TPK10
SPI1_NPCS3
USER'S PUSH BUTTON INPUT (BP4)
PA26
PA27
TPK11
SPI0_NPCS1
USER'S PUSH BUTTON INPUT (BP3)
PA27
PA28
TPK12
SPI0_NPCS2
USER'S PUSH BUTTON INPUT (BP5)
PA28
PA29
TPK13
SPI0_NPCS3
I2S AUDIO DAC WM8731 (MN1)
TWI_ADDR
PA30
TPK14
A23
–
–
PA31
TPK15
A24
–
–
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
15
Table 5-2.
PIO Controller B
I/O Line
Peripheral A
Peripheral B
PB0
LCDVSYNC
–
PB1
LCDHSYNC
PB2
LCDDOTCK
PB3
Comments
–
–
–
TFT PANEL CONTROL (J23)
LCDHSYNC
–
PCK0
TFT PANEL CONTROL (J23)
LCDDOTCK
–
LCDDEN
–
TFT PANEL CONTROL (J23)
LCDDEN
–
PB4
LCDCC
LCDD2
TFT PANEL CONTROL (J23) BACKLIGHT
BL_SHDN#
–
PB5
LCDD0
LCDD3
TFT PANEL CONTROL (J23)
LCDD0
RED
PB6
LCDD1
LCDD4
TFT PANEL CONTROL (J23)
LCDD1
RED
PB7
LCDD2
LCDD5
TFT PANEL CONTROL (J23)
LCDD2
RED
PB8
LCDD3
LCDD6
TFT PANEL CONTROL (J23)
LCDD3
RED
PB9
LCDD4
LCDD7
TFT PANEL CONTROL (J23)
LCDD4
RED
PB10
LCDD5
LCDD10
TFT PANEL CONTROL (J23)
LCDD5
RED
PB11
LCDD6
LCDD11
TFT PANEL CONTROL (J23)
LCDD6
RED
PB12
LCDD7
LCDD12
TFT PANEL CONTROL (J23)
LCDD7
RED
PB13
LCDD8
LCDD13
TFT PANEL CONTROL (J23)
LCDD8
GREEN
PB14
LCDD9
LCDD14
TFT PANEL CONTROL (J23)
LCDD9
GREEN
PB15
LCDD10
LCDD15
TFT PANEL CONTROL (J23)
LCDD10
GREEN
PB16
LCDD11
LCDD19
TFT PANEL CONTROL (J23)
LCDD11
GREEN
PB17
LCDD12
LCDD20
TFT PANEL CONTROL (J23)
LCDD12
GREEN
PB18
LCDD13
LCDD21
TFT PANEL CONTROL (J23)
LCDD13
GREEN
PB19
LCDD14
LCDD22
TFT PANEL CONTROL (J23)
LCDD14
GREEN
PB20
LCDD15
LCDD23
TFT PANEL CONTROL (J23)
LCDD15
GREEN
PB21
TF0
LCDD16
TFT PANEL CONTROL (J23)
LCDD16
BLUE
PB22
TK0
LCDD17
TFT PANEL CONTROL (J23)
LCD17
BLUE
PB23
TD0
LCDD18
TFT PANEL CONTROL (J23)
LCDD18
BLUE
PB24
RD0
LCDD19
TFT PANEL CONTROL (J23)
LCDD19
BLUE
PB25
RK0
LCDD20
TFT PANEL CONTROL (J23)
LCDD20
BLUE
PB26
RF0
LCDD21
TFT PANEL CONTROL (J23)
LCDD21
BLUE
PB27
SPI1_NPCS1
LCDD22
TFT PANEL CONTROL (J23)
LCDD22
BLUE
PB28
SPI1_NPCS0
LCDD23
TFT PANEL CONTROL (J23)
LCDD23
BLUE
PB29
SPI1_SPCK
IRQ2
TOUCH SCREEN CONTROLLER (MN11) DCLK
PB29
–
PB30
SPI1_MISO
IRQ1
TOUCH SCREEN CONTROLLER (MN11) DOUT
SPI1_MISO
–
PB31
SPI1_MOSI
PCK2
TOUCH SCREEN CONTROLLER (MN11) DIN
SPI1_MOSI
–
16
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
Table 5-3.
PIO Controller C
I/O Line
Peripheral A
Peripheral B
Comments
PC0
NANDOE
NCS6
NAND FLASH DEVICE (MN6x) RE#
NANDRE
PC1
NANDWE
NCS7
NAND FLASH DEVICE (MN6x) WE#
NANDWE
PC2
NWAIT
IRQ0
TOUCH SCREEN CONTROLLER (MN11) DAV#
DAV
PC3
A25/CFRNW
–
USB DEVICE CONNECTION/POWER DETECTION
USB_CNX
PC4
NCS4/CFCS0
–
USB DEVICE D+ PULLUP ENABLE
USB_DP_PUP
PC5
NCS5/CFCS1
–
–
–
PC6
CFCE1
–
–
–
PC7
CFCE2
–
–
–
PC8
TXD0
PCK2
AUDIO DAC INTERFACE (MN1) MCLK
PCK2
PC9
RXD0
PCK3
–
–
PC10
RTS0
SCK0
–
–
PC11
CTS0
FIQ
ETHERNET CONTROLLER (MN8) IRQ
FIQ
PC12
TXD1
NCS6
–
–
PC13
RXD1
NCS7
–
–
PC14
TXD2
SPI1_NPCS2
NAND FLASH DEVICE (MN6) CHIP ENABLE (CE)
NANDCE
PC15
RXD2
SPI1_NPCS3
NAND FLASH DEVICE (MN6) READY/BUSY (R/B)
PC15
PC16
D16
TCLK0
EBI DATA BUS D16
D16
PC17
D17
TCLK1
EBI DATA BUS D17
D17
PC18
D18
TCLK2
EBI DATA BUS D18
D18
PC19
D19
TIOA0
EBI DATA BUS D19
D19
PC20
D20
TIOB0
EBI DATA BUS D20
D20
PC21
D21
TIOA1
EBI DATA BUS D21
D21
PC22
D22
TIOB1
EBI DATA BUS D22
D22
PC23
D23
TIOA2
EBI DATA BUS D23
D23
PC24
D24
TIOB2
EBI DATA BUS D24
D24
PC25
D25
TF2
EBI DATA BUS D25
D25
PC26
D26
TK2
EBI DATA BUS D26
D26
PC27
D27
TD2
EBI DATA BUS D27
D27
PC28
D28
RD2
EBI DATA BUS D28
D28
PC29
D29
RK2
EBI DATA BUS D29
D29
PC30
D30
RF2
EBI DATA BUS D30
D30
PC31
D31
PCK1
EBI DATA BUS D31
D31
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
17
6.
Configuration Straps
6.1
Configuration Straps
Table 6-1 gives details on configuration straps on the SAM9G10-EK2 and their default settings.
Table 6-1.
Configuration Jumpers and Straps
Designation
Default Setting
Feature
J2
Closed
3.3V Jumper (1)
This jumper footprint is provided for 3.3V power consumption measurement use.
By default, it is closed. To use this feature, the user has to open the strap by
cutting it before soldering a jumper.
J3
Closed
Forces power on. To use the software shutdown control, J3 must be opened.
Open
Enables Boot on the internal ROM
J4
18
Closed
Enables Boot on the NCS0
J8
Closed
VDDPLL Jumper (1)
J9
2–3
J12
Closed
VDDBU Jumper select (1)
1–2: Lithium 3V Battery
2–3: 1.2V from VDDCORE
VDDCORE Jumper (1)
NPCS0 select
1–2: DataFlash device (MN7)
2–3: DataFlash card interface (J22)
Warning: In this case NPCS03 must be configured as input.
J21
1–2
J24
Closed
S2
Open
S3
Closed
Enables the ICE RTCK return. S6 must be opened
S4
Closed
Enables the ICE NRST input
S5
Open
Selects ICE mode or JTAG mode (See Section 6, Errata)
S6
Open
Disables TCK <-> RTCK local loop. If S6 is closed, S3 must be opened.
S7-S8
Closed
S9
Open
S10
Closed
S12
Open
Disables Serial DataFlash write protect.
S13
Open
If closed, enables NAND FLASH write protect.
S14
Closed
Enables the use of interrupt ETHERNET MAC (PC11, FIQ).
S15
Closed
Enables the use of ETHERNET MAC (NCS2).
S19
Closed
Enables the use of the User LED DS7 (PA14)
S20
Closed
Enables the use of the User LED DS8 (PA13)
S21
Closed
Enables the use of the DBGU RXD signal (PA9)
S22
Closed
Enables the use of the USB CNX detection (PC3)
S23
Closed
Enables the use of AUDIO DAC INTERFACE (TWI_ADDR)
S24
Closed
Enables the use of TOUCH SCREEN CONTROLLER (NPCS2)
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
Enables the selection of the on-board Nand-Flash device. Remove this jumper to
prevent the system boot from that device and to be able to reprogram it.
Disables the ICE NTRST input
Enables the use of 18.432 MHz crystal. If external clock used, S7-S8 must be
opened and S9 closed.
Enables the use of SDRAM (NCS1_SDCS)
Table 6-1.
Configuration Jumpers and Straps (Continued)
Designation
Default Setting
S25
Closed
Enables the use of TOUCH SCREEN CONTROLLER DAV signal (PC2)
S26
Closed
Enables the use of TOUCH SCREEN CONTROLLER PENIRQ (PA11, PENIRQ)
TP1
N.A
3.3V Test point.
TP2
N.A
GND Test point.
TP3
N.A
1.2V Test point.
TP4
N.A
GND Test point.
TP63
N.A
0 to 3.3V analog user's input
TP64
N.A
0 to 3.3V analog user's input
TP65
N.A
AGND of TP63
TP66
N.A
AGND of TP64
Note:
1.
Feature
These jumpers are provided for measuring power consumption. By default, they are closed. To use this feature,
the user has to open the strap and insert an ammeter.
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
19
7.
Schematics
7.1
List of Schematics
This section contains the following schematics:
20
Board architecture diagram
Power supply and audio
SAM9G10 microcontroller
SDRAM and NAND Flash
Ethernet
LCD and user interface
Serial and I/O expansion
EBI serial resistor
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
Board Architecture
8
6
4
5
2
3
1
POWER
SDRAM DATA BUS
AUDIO DAC
INTERFACE
SDRAM
D
SDRAM ADDR/CTRL BUS
PIO A,B,C
D
FLASH DATA BUS
SHEET 2
DEBUG
PORT
FLASH ADDR. BUS
NAND FLASH
EBI
Serial
Terminal
Resistor
SERIAL
EEPROM
Atmel | SMART
ARM9-based Processor
SAM9G10 (LFBGA217)
EBI ADDR. BUS
CARD
READER
EBI CTRL. BUS
C
EXPANSION CONNECTORS
PIO A,B,C
C
SHEET 4
ETHERNET
ETH DATA BUS
ETH ADDR. BUS
SHEET 8
B
SERIAL
MMC/SD CARD DATA
FLASH
DEVICE
USB INTERFACES
HOST
EBI DATA BUS
SHEET 7
B
PIO A,B,C
SHEET 5
LCD
SHEET 3
TOUCH SCREEN
CONTROLLER
PIO A,B,C
USER INTERFACE
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
5V
7
ICE INTERFACE
21
Figure 7-1.
A
PIO MUXING
PIOA
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
SHEET 6
NOTE
"DNP" means the component is not populated by default
USAGE
SPI0_MISO /MCDA0
SPI0_MOSI /MCCDA
SPI0_SPCK
SPI0_NPCS0
MCDA1
MCDA2
SPI0_NPCS3 MCDA3
TW I_TW D
TW I_TW CK
DBGU_RXD
DBGU_TXD
PENIRQ
DISP
USER LED
USER LED
SD_CD
PIOA
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
USAGE
-TF1
TK1
TD1
RD1
RK1
RF1
POW ER LED
BP6
SPI1_NPCS2
BP4
BP3
BP5
TW I_addr
---
PIOB
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
USAGE
LCDVSYNC
LCDHSYNC
LCDDDOTCK
LCDDEN & BMS
BL_SHDN#
R0
R1
R2
R3
R4
R5
R6
R7
G0
G1
G2
PIOB
USAGE
PIOC
USAGE
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
G3
G4
G5
G6
G7
B0
B1
B2
B3
B4
B5
B6
B7
SPI1_SPCK
SPI1_MISO
SPI1_MOSI
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
NANDOE
NANDW E
DAV
USB_CNX
USB_DP_PUP
---PCK2
--FIQ
--#CE
R/#B
A
A
REV MODIF.
AT91SAM9G10-EK2
Derek
24.Mar.10
DES.
DATE
SCALE
This agreement is our property. Reproduction and pu blication without our written authorization shall expose offender to legal proceedings.
7
6
5
4
3
2
XX/XX/XX
DATE
A
TOP LEVEL
8
XXX
VER.
REV.
1/1
1
SHEET
1
8
Figure 7-2.
Power Supply and Audio
7
8
5
6
4
2
3
MODE = 0: 2-wire
MPU mode for 9G10
TWI interface
AUDIO DAC INTERFACE
3V3
VOUT =
0.8V x (Rtop + Rbottom)/Rbottom
5V
1
2
3
4
C1
330uF
+
CR1
5V
PGOOD
EN
VIN
VDD
EP
J1
1
3
2
10NF
MN2
RT9018A-25PSP
C5
1uF
C114
10uF
GND
ADJ
VOUT
NC
R44
MN1
2
47k
{3,7} PC8
PC8
TP1
3.3V
C11
1uF
GWS-DC001ABNT15
49R9
1%
PCK2
R68 25
TP2
GND
26
XTO
12
LOUT
13
ROUT
MODE
CSB
SDIN
SCLK
21
22
23
24
1V2
100NF
100NF
C82 20
C65 19
C86 18
R103
4.7K
R104
4.7K
S23
TWI_addr
TWI_TWD
TWI_TWCK
3V3
DBVDD
1
DCVDD
27
AVDD
14
HPVDD
8
VCC_DAC
100NF
R93
10K
in Slave Mode
CLKOUT
XTI/MCLK
R68 should be close to ARM
C83
10uF
R86
10K
WM8731SEDS
3V3
J2
R24
15K
1%
3V3
CSB = 1:
addr=0011011
D
C72
8
7
6
5
9
R2
100K
5V
REGULATED
5V ONLY
OSC
D
1
PA29
PA7
PA8
10uF
100NF
C79
C80
10uF
100NF
C77
C78
10uF
100NF
C75
C76
10uF
100NF
C81
C73
PA29 {3,7}
PA7 {3,7}
PA8 {3,7}
LLINEIN
GND_DAC
RLINEIN
MICIN
VMID
16
BCLK
DACDAT
DACLRC
ADCDAT
ADCLRC
3
4
5
6
7
10uF
100NF
C113
C112
GND_DAC
RK1
TK1
TD1
TF1
RD1
RF1
PA21
PA18
PA19
PA17
PA20
PA22
GND_DAC
17
J20
3.5 PHONEJACK STEREO
2
5
1
3
4
VIN
VIN
PGOOD
EN
VOUT
VOUT
ADJ
GND
8
7
6
5
TP3
R43
47k
R1
47k
C10
1uF
1.2V
220uF/10V
C7
220uF/10V
C3
C2
10uF
R42
47k
10
RHPOUT
9
LHPOUT
R45 DNP
AGND
C85
DNP
9
1
2
3
4
EP
MN9
RT9186A-GQV
MICBIAS
+
5V
C
1V2
+
R3
100K
R46
47K
C6
1uF
R47
47K
HPGND
15
DGND
11
PA21
PA18
PA19
PA17
PA20
PA22
{3,7}
{3,7}
{3,7}
{3,7}
{3,7}
{3,7}
C
IIS of Audio Interface
in Slave Mode
28
GND_DAC
GND_DAC
TP4
GND
VOUT =
0.8V x (Rtop + Rbottom)/Rbottom
VCC_DAC
C127
10uF
L4
4.7uH
3V3
C87
10NF
PWR_EN
R69 0R
B
B
5V
GND_DAC
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
R4
100K
Q2
6
Si1563EDH-T1-E3
3V3
5
POWER LED
R41
470R
4
ADHESIVE FEET
USER'S GRID AERA
J3
DS1
RED
FORCE
POWER
ON
1
C71
15PF
2
R8
100K
3V3
5V
Z3
Z4
11.1
11.1
3
R5
10K
R6
10K
3
Q3
IRLML2402
1
{3,7} SHDN
PA23
Z7
Z8
11.1
11.1
PA23 {3,7}
3V3
2
5V
A
A
A
REV MODIF.
AT91SAM9G10-EK2
SCALE
Derek
24.Mar.10
DES.
DATE
1/1
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
7
6
5
4
3
2
XX/XX/XX
DATE
A
POW ER SUPPLY & AUDIO
8
XXX
VER.
REV.
1
SHEET
2
8
22
23
Figure 7-3.
SAM9G10 Microcontroller
7
8
{2,5,6,7,8}
5
6
4
2
3
1
PC[0..15]
BOOT MODE SELECT
BMS
{7} VDDBU
C
RR1
100K
4
3
2
1
J6
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15 ICE_NRST
17
19
ICE_NTRST
TDI
TMS
TCK
ICE_RTCK
TDO
S4
S2
{7} DDP
{7} DDM
A12
B12
{7} HDPA
{7} HDMA
C12
B14
{7} HDPB
{7} HDMB
A13
A14
S3
NRST
S5
E17
C17
D17
U17
F16
B10
F17
S6
HTST-110-01-SM-D
22nF
C12
R11
C13
2.2nF
C15
1.5nF
C14
15nF
R12
1.5K
1%
U9
2.05K
1%
U10
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
U2
P6
T4
U3
R6
T6
U5
P7
R7
T7
T8
P8
R8
U8
R9
T9
P1
N2
M3
R1
T1
R2
P3
T2
P4
U1
T3
R4
P5
R5
P2
N3
HDPB
HDMB
TDI
TMS
TCK
RTCK
TDO
JTAGSEL
RAS
CAS
NTRST
SDW E
SDA10
SDCKE
SDCK
PLLRCB
NCS0
SDCS/NCS1
NCS2
NANDCS/NCS3
CFOE/NRD
PLLRCA
B
2
U12
Y1
18.432MHz
U11
S8
1
A10
2
C19
10PF
R17
C
F2
J4
RAS {8}
CAS {8}
G3
E4
F1
H4
SDWE {8}
SDA10 {8}
SDCKE {8}
SDCK {8}
F4
D2
D1
G4
E3
NCS0 {8}
SDCS_NCS1 {8}
NCS2 {5,8}
SMCS_NCS3 {8}
CFOE_NOE_NRD
E2
E1
F3
CFWE_NWE_NWR0 {8}
CFIOR_NBS1_NWR1 {8}
CFIOW_NBS3_NWR3 {8}
F15
NRST
B
{8}
NRST {4,5,7}
VDDIOP
VDDIOP
VDDIOP
VDDIOP
T5
P15
P11
VDDIOP
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOP
J14
D11
C15
N4
L4
H3
D4
C8
C5
C3
C10
A9
C14
D10
R14
1K
BP1
3V3
A
C28
10uF
J12
1
1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
C43
10uF
R16
DNP
100K
1K
VDDIOM
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
VDDCORE
VDDCORE
VDDCORE
A16
C7
C11
D3
H8
H9
H10
J3
J8
J9
J10
K8
K9
K10
R3
R16
U4
U7
P12
D5
M4
C9
K14
3
2
1
SHDN
WKUP
GNDPLL
VDDCORE
NC1
NC2
NC3
GNDBU
TST
VDDPLL
VDDBU
XIN32
WAKE UP
R15
D8
B8
A8
A7
B7
D7
A6
B6
C6
A5
D6
B5
A4
B4
A3
B3
A2
C4
B2
A1
B1
C2
C1
R13
1K
B11
3
GND
OUT
J9
3
C126
100NF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
XOUT32
1V2
1
2
2
VDD
3V3
MN10
R1100D121C
{8}
3V3
B9
1
A11
R10
C21
100NF
P9
CR2
MMBD1704A
NRST
G1
G2
H1
H2
J1
J2
K1
K4
K2
L1
K3
L2
L3
M1
N1
M2
32.768 kHz
Y2
C20
10PF
J10
CFW E/NW E/NW R0
CFIOR/NBS1/NW R1
CFIOW /NBS3/NW R3
XIN
T10
VDDOSC
C18
100NF
T11
GNDOSC
VDDOSC + VDDPLL
CURRENT MEASURE
A
XOUT
D9
2
4
1
C17
22PF
J8
3V3
S7
3
C16
22PF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
NBS0/A0
NW R2/NBS2/A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
BA0/A16
BA1/A17
A18
A19
A20
A21
A22
AT91SAM9G10
DDP
DDM
HDPA
HDMA
{8}
A[0..22]
D
VDDIOP
5
6
7
8
3V3
D[0..31]
U6
2
PB3
R7
10K
J4
PA0/SPI0_MISO/MCDA0
PA1/SPI0_MOSI/MCCDA
PA2/SPI0_SPCK/MCCK
PA3/SPI0_NPCS0
PA4/SPI0_NPCS1/MCDA1
PA5/SPI0_NPCS2/MCDA2
PA6/SPI0_NPCS3/MCDA3
PA7/TW D/PCK0
PA8/TW CK/PCK1
PA9/DRXD/PCK2
PA10/DTXD/PCK3
PA11/TSYNK/SCK1
PA12/TCLK/RTS1
PA13/TPS0/CTS1
PA14/TPS1/SCK2
PA15/TPS2/RTS2
PA16/TPK0/CTS2
PA17/TPK1/TF1
PA18/TPK2/TK1
PA19/TPK3/TD1
PA20/TPK4/RD1
PA21/TPK5/RK1
PA22/TPK6/RF1
PA23/TPK7/RTS0
PA24/TPK8/SPI1_NPCS1
PA25/TPK9/SPI1_NPCS2
PA26/TPK10/SPI1_NPCS3
PA27/TPK11/SPI0_NPCS1
PA28/TPK12/SPI0_NPCS2
PA29/TPK13/SPI0_NPCS3
PA30/TPK14/A23
PA31/TPK15/A24
NANDOE/NCS6/PC0
NANDWE/NCS7/PC1
NWAIT/IRQ0/PC2
A25/CFRNW/PC3
NCS4/CFCS0/PC4
NCS5/CFCS1/PC5
CFCE1/PC6
CFCE2/PC7
TXD0/PCK2/PC8
RXD0/PCK3/PC9
RTS0/SCK0/PC10
CTS0/FIQ/PC11
TXD1/NCS6/PC12
RXD1/NCS7/PC13
TXD2/SPI1_NPCS2/PC14
RXD2/SPI1_NPCS3/PC15
D16/TCLK0/PC16
D17/TCLK1/PC17
D18/TCLK2/PC18
D19/TIOA0/PC19
D20/TIOB0/PC20
D21/TIOA1/PC21
D22/TIOB1/PC22
D23/TIOA2/PC23
D24/TIOB2/PC24
D25/TF2/PC25
D26/TK2/PC26
D27/TD2/PC27
D28/RD2/PC28
D29/RK2/PC29
D30/RF2/PC30
D31/PCK1/PC31
D
R11
T12
U13
P10
T13
U14
T14
R12
T15
U16
R13
T16
U15
R14
T17
P13
P14
R15
R17
P16
P17
N15
N14
N16
N17
M14
M15
L15
M16
M17
L14
L16
LCDVSYNC/PB0
LCDHSYNK/PB1
LCDDOTCK/PCK0/PB2
BMS/LCDDEN/PB3
LCDCC/LCDD2/PB4
LCDD0/LCDD3/PB5
LCDD1/LCDD4/PB6
LCDD2/LCDD5/PB7
LCDD3/LCDD6/PB8
LCDD4/LCDD7/PB9
LCDD5/LCDD10/PB10
LCDD6/LCDD11/PB11
LCDD7/LCDD12/PB12
LCDD8/LCDD13/PB13
LCDD9/LCDD14/PB14
LCDD10/LCDD15/PB15
LCDD11/LCDD19/PB16
LCDD12/LCDD20/PB17
LCDD13/LCDD21/PB18
LCDD14/LCDD22/PB19
LCDD15/LCDD23/PB20
TF0/LCDD16/PB21
TK0/LCDD17/PB22
TD0/LCDD18/PB23
RD0/LCDD19/PB24
RK0/LCDD20/PB25
RF0/LCDD21/PB26
SPI1_NPCS1/LCDD22/PB27
SPI1_NPCS0/LCDD23/PB28
SPI1_SPCK/IRQ2/PB29
SPI1_MISO/IRQ1/PB30
SPI1_MOSI/PCK2/PB31
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
1
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
MN3
{2,4,6,7} PA[0..31]
L17
K16
K17
K15
J17
H17
J16
H16
G17
J15
H14
G16
G15
H15
G14
E16
F14
D16
E15
B17
D15
C16
E14
D14
A17
B16
B15
A15
D13
D12
C13
B13
{6,7} PB[0..31]
C22
100NF
BP2
{7} VDDBU
{2,7} SHDN
{7} WKUP
C24
C26
100NF 100NF
C23
C25
C27
10uF
100NF
100NF
2
1V2
C29
C33
C31
C35
100NF
100NF
100NF
100NF
C30
C32
C34
100NF
100NF
100NF
VDDCORE
CURRENT
MEASURE
C36
C38
C40
C42
100NF
100NF
100NF
100NF
C37
C39
C41
100NF
100NF
100NF
A
REV MODIF.
AT91SAM9G10-EK2
SCALE
Derek
24.Mar.10
DES.
DATE
1/1
AT91SAM9G10
7
6
5
4
3
2
XX/XX/XX
DATE
SHEET
A
This agreement is our property. Reproduction and pu blication without our written authorization shall expose offender to legal proceedings.
8
XXX
VER.
REV.
1
3
8
Figure 7-4.
SDRAM and NAND Flash
8
6
7
5
4
2
3
1
EBI SDRAM INTERFACE
{8} SDRAM_D[0..31]
{8} SDRAM_A[0..17]
{8} SDRAM_RAS
{8} SDRAM_CAS
D
D
{8} SDRAM_SDW E
{8} SDRAM_SDA10
{8} SDRAM_SDCKE
{8} SDRAM_SDCK
MN4
SDRAM_A2
SDRAM_A3
SDRAM_A4
SDRAM_A5
SDRAM_A6
SDRAM_A7
SDRAM_A8
SDRAM_A9
SDRAM_A10
SDRAM_A11
SDRAM_SDA10
SDRAM_A13
{8} SDRAM_CFIOR_NBS1_NW R1
{8} SDRAM_CFIOW _NBS3_NW R3
{8} SDRAM_SDCS_NCS1
23
24
25
26
29
30
31
32
33
34
22
35
SDRAM_A16 BA0
SDRAM_A17 BA1
20
21
SDRAM_A14
36
40
SDRAM_SDCKE
37
SDRAM_SDCK
38
SDRAM_A0 NBS0 15
SDRAM_CFIOR_NBS1_NW R1 39
17
18
SDRAM_CAS
SDRAM_RAS
C
3V3
R18
100K
SDRAM_SDW E
16
19
MN5
A0 MT48LC16M16A2 DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
DQ8
A9
DQ9
A10
DQ10
A11
DQ11
DQ12
BA0
DQ13
BA1
DQ14
DQ15
A12
N.C
VDD
VDD
CKE
VDD
VDDQ
CLK
VDDQ
VDDQ
DQML
VDDQ
DQMH
VSS
CAS
VSS
RAS
VSS
VSSQ
VSSQ
VSSQ
WE
CS
VSSQ
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
1
14
27
3
9
43
49
28
41
54
6
12
46
52
SDRAM_D0
SDRAM_D1
SDRAM_D2
SDRAM_D3
SDRAM_D4
SDRAM_D5
SDRAM_D6
SDRAM_D7
SDRAM_D8
SDRAM_D9
SDRAM_D10
SDRAM_D11
SDRAM_D12
SDRAM_D13
SDRAM_D14
SDRAM_D15
SDRAM_A2
SDRAM_A3
SDRAM_A4
SDRAM_A5
SDRAM_A6
SDRAM_A7
SDRAM_A8
SDRAM_A9
SDRAM_A10
SDRAM_A11
SDRAM_SDA10
SDRAM_A13
3V3
SDRAM_A16 BA0
SDRAM_A17 BA1
20
21
SDRAM_A14
36
40
SDRAM_SDCKE
37
SDRAM_SDCK
38
SDRAM_A1 NBS2
SDRAM_CFIOW _NBS3_NW R3
15
39
17
18
SDRAM_CAS
SDRAM_RAS
C50
C51
C52
C53
100NF
100NF
100NF
100NF
C44
C45
C46
100NF
100NF
100NF
23
24
25
26
29
30
31
32
33
34
22
35
SDRAM_SDW E
16
19
A0 MT48LC16M16A2 DQ0
A1
DQ1
A2
DQ2
A3
DQ3
A4
DQ4
A5
DQ5
A6
DQ6
A7
DQ7
A8
DQ8
A9
DQ9
A10
DQ10
A11
DQ11
DQ12
BA0
DQ13
BA1
DQ14
DQ15
A12
N.C
VDD
VDD
CKE
VDD
VDDQ
CLK
VDDQ
VDDQ
DQML
VDDQ
DQMH
VSS
CAS
VSS
RAS
VSS
VSSQ
VSSQ
WE
VSSQ
CS
VSSQ
256 Mbits
S10
2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53
SDRAM_D16
SDRAM_D17
SDRAM_D18
SDRAM_D19
SDRAM_D20
SDRAM_D21
SDRAM_D22
SDRAM_D23
SDRAM_D24
SDRAM_D25
SDRAM_D26
SDRAM_D27
SDRAM_D28
SDRAM_D29
SDRAM_D30
SDRAM_D31
3V3
1
14
27
3
9
43
49
28
41
54
6
12
46
52
C
C55
C56
C54
C57
100NF
100NF
100NF
100NF
C47
C48
C49
100NF
100NF
100NF
256 Mbits
{8} flash_D[0..15]
3V3
R85
100K
MN6
{8} flash_PC15
7
19
3V3
1
2
3
4
5
6
10
11
14
15
20
21
22
23
24
35
38
B
R19
100K
S13
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
WP
CLE
ALE
RE
WE
CE
29
30
31
32
41
42
43
44
26
27
28
33
40
45
46
47
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8_N.C
I/O9_N.C
I/O10_N.C
I/O11_N.C
I/O12_N.C
I/O13_N.C
I/O14_N.C
I/O15_N.C
R/B
WP
N.C1
N.C2
N.C3
N.C4
N.C5
N.C6
N.C7
N.C8
N.C9
N.C10
N.C11
N.C12
N.C13
N.C14
N.C15
N.C16
N.C17
flash_D0
flash_D1
flash_D2
flash_D3
flash_D4
flash_D5
flash_D6
flash_D7
flash_D8
flash_D9
flash_D10
flash_D11
flash_D12
flash_D13
flash_D14
flash_D15
3V3
8bits DATA BUS
With MT29F2G08AAD Micron
MN7
{3,7} PA0
{3,7} PA1
{3,7} PA2
Optional 16bits DATA BUS
With AT29F2G16AAD Micron
PA0
PA1
PA2
0R
VCC
GND
6
C58
100NF
7
RESET
WP
5
AT45DB642D-CNU
S12
W RITE PROTECT
NORMALLY OPEN
3V3
{3,7} PA3
100K
PA3
3V3
1
2
3
J21
C59
100NF
SO
SI
SCK
CS
B
12
37
34
39
13
36
25
48
8
1
2
4
3
R20
VSS
VSS
VSS_N.C
VSS_N.C
R106
{3,5,7} NRST
3V3
VCC
VCC
VCC_N.C
VCC_N.C
SPI0_MISO
SPI0_MOSI
SPI0_SPCK
SPI0_NPCS0
C60
100NF
R94
68K
R92
68K
R90
68K
R87
68K
R72
10K
SD CARD / MMC CARD
J22
{3,7} PA4
{3,7} PA0
K9F2G08U0A-PCB0
{3,7} PA2
PA4
PA0
0R
0R
R95
R96
MCDA1
SPI0_MISO MCDA0
PA2
0R
R97
SPI0_SPCK MCCK
8
7
6
5
4
3
2
1
9
3V3
3V3
{3,7} PA1
{3,7} PA6
{3,7} PA5
PA1
PA6
PA5
R91
10K
6
5
TW I_TW CK
TW I_TW D
{2,3} PA8
{2,3} PA7
3V3
C125
100n
8
4
SCL
SDA
VCC
GND
{3,7} PA15
1
2
3
A0
A1
A3
R98
SPI0_MOSI MCCDA
R99
SPI0_NPCS3 MCDA3
R100 MCDA2
put the 0R resistors close
to the main chip.
MN12
A
0R
0R
0R
INSERT/SW1
PROTECT/SW2
CONTACT/SW3
16
17
8
18
NANDCE 9
flash_A21
flash_A22
flash_PC0
flash_PC1
1
2
J24
flash_PC15
{8} flash_A21
{8} flash_A22
{8} flash_PC0
{8} flash_PC1
{8} flash_PC14
FPS009
C115
100NF
PA15
SD_CD
A
R101
10K
JP13
7
WP
A
AT24C512BN
REV MODIF.
3V3
AT91SAM9G10-EK2
SERIAL EEPROM
Derek
24.Mar.10
DES.
DATE
1/1
SCALE
SDRAM & NANDFLASH
7
6
5
4
3
2
XX/XX/XX
DATE
A
This agreement is our property. Reproduction and pu blication without our written authorization shall expose offender to legal proceedings.
8
XXX
VER.
REV.
1
SHEET
4
8
24
Ethernet
8
6
7
5
4
2
3
1
{8} ETH_D[0..15]
D
ETH_D7
ETH_D6
ETH_D5
ETH_D4
ETH_D3
ETH_D2
ETH_D1
ETH_D0
DNP R27
DNP R33
VDD
Note1: 8/16 bit DataBus
selection; Removed R27
when using 16-bit mode;
otherwise is 8-bit mode.
VCCA
25
26
27
28
29
30
31
32
33
34
35
36
ETH_D13
ETH_D12
ETH_D11
ETH_D10
ETH_D9
VDD
ETH_D8
ETH_A2
{8} ETH_A2
{8} ETH_CFOE_NOE_NRD
{8} ETH_CFW E_NW E_NW R0
VDD
R28
DNP
GP6/SD13
GP5/SD12
GP4/SD11
GP3/SD10
GP2/SD9
VDD
GP1/SD8
CMD
GND
INT
IOR#
IOW#
1 TD+
SD5
SD6
SD7
TXVDD18
TXTX+
TXGND
RXGND
RXRX+
RXVDD18
BGRES
DM9000C
R32
100K
12
11
10
9
8
7
6
5
4
3
2
1
C62
100NF
ETH_TXETH_TX+
ETH_RXETH_RX+
C74
100NF
R31
6.80K
1%
C63
100NF
J13
R29
49R9
1%
1
2 TD-
TX-
2
7 RD+
RX+
3
RX-
6
3 CT
6 CT
8 RD-
R30
49R9
1%
R26
49R9
1%
75
4
R25
49R9
1%
PC11 FIQ
C64
100NF
S15
{3,8} NCS2
B
S14
C61
100NF
VDD
LINK&ACT
10
Left LED
SPEED
11
Right LED
4
5
1nF
75
5
{3,7} PC11
J0026D21B
TX+
75 75
+ C88
220uF/10V
C
16
C
15
MN8
DM9000C
LED3/SD14
VDD
WAKE/SD15
EECS
EECK
EEDIO
SD0
SD1
SD2
GND
SD3
SD4
24
23
22
21
20
19
18
17
16
15
14
13
ETH_D15
ETH_D14
CS#
LED2
LED1
PWRST#
TEST
VDD
X2
X1
GND
SD
RXGND
BGGND
7
8
B
2
Y3
1
C66
22PF
9
12
{3,4,7} NRST
3
4
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
Note2: the INT polarity
Selection . Pull EECK pin
high, INT is low active;
otherwise high active.
D
37
38
39
40
41
42
43
44
45
46
47
48
25
Figure 7-5.
25MHz
C67
22PF
1K
R21
1K
R22
R71
0R
VDD
SPEED
R70 0R
LINK&ACT
A
A
3V3
L6
4.7uH
VDD
C89
10uF
C90
10uF
C68
100NF
C69
100NF
C70
100NF
A
REV MODIF.
AT91SAM9G10-EK2
Derek
24.Mar.10
DES.
DATE
1/1
ETHERNET
7
6
5
4
3
2
XX/XX/XX
DATE
A
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
8
XXX
VER.
REV.
SCALE
1
SHEET
5
8
Figure 7-6.
LCD and User Interface
8
6
7
5
4
2
3
1
3V3
0541044031
LCM1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TRULY
D
Conductors
on
TOP SIDE
PIN 40
PIN 1
C
TFT1N4633-E
LCD1
R89
DNP
Y_UP
X_LEFT
Y_LOW
X_RIGHT
DE
VSYNC
HSYNC
DISP
PCLK
B7
B6
B5
B4
B3
B2
B1
B0
G7
G6
G5
G4
G3
G2
G1
G0
R7
R6
R5
R4
R3
R2
R1
R0
PA12
LCDHSYNC
1
2
3
4
LCDDEN
LCDVSYNC
LCDHSYNC
8 RR43
7 33R
6
5
D
PA12 {3,7}
5V
PB3
PB0
PB1
PB2
D1
RB160M-60
L23
VLED+
3V3
LCDDDOTCK
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
LCDD23
LCDD22
LCDD21
LCDD20
LCDD19
LCDD18
LCDD17
LCDD16
LCDD15
LCDD14
LCDD13
LCDD12
LCDD11
LCDD10
LCDD9
LCDD8
LCDD7
LCDD6
LCDD5
LCDD4
LCDD3
LCDD2
LCDD1
LCDD0
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
8
7
6
5
RR42
33R
PB28
PB27
PB26
PB25
PB24
PB23
PB22
PB21
PB20
PB19
PB18
PB17
PB16
PB15
PB14
PB13
PB12
PB11
PB10
PB9
PB8
PB7
PB6
PB5
RR41
33R
RR40
33R
RR39
33R
RR38
33R
RR37
33R
3V3
22uH
C4
10uF
C201
2.2uF
R138
DNP
MN25
CP2122ST
5
PB4
{3,7} PB4
4
BL_SHDN#
VIN
SHDN#
1
2
3
SW
GND
FB
300mV
R137
10K
VLEDR123
10R
1%
2 x 4 LEDs Back Light
2*15mA, 12.6+/-0.6V MAX
C
PB[0..31] {3,7}
VLED+
VLED-
J23
LCD_FIX
C124
100NF
C9
10uF
TOUCH SCREEN CONTROLLER
AD7877ACPZ-500RL7
MN11
X_LEFT
X_RIGHT
Y_UP
Y_LOW
B
PA27
R73
R77
R76
R78
12
10
13
11
0R
0R
0R
0R
C116
DNP DNP DNP DNP
PA27 {3,7}
6
5
4
21
3
2
C119
BP3
C118 C117
3V3
R50
220R
PA26
PA14 {3,7}
PA26 {3,7}
BP4
DS7
GREEN
R67
220R
100K
3V3
S19
PA14
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
GREEN
R80
R81
100K
100K
TP63
TP64
PA28
PA13 {3,7}
PA28 {3,7}
TP65
TP66
31
R105
0R
14
STOPACQ
ALERT*
DAV*
PENIRQ*
AUX1/GPIO1
AUX2/GPIO2
AUX3/GPIO3
GPIO4
BAT1
BAT2
AOUT
ARNG
VCC
VDRIVE
DOUT
DIN
DCLK
CS*
NC1
NC2
NC3
NC4
NC5
NC6
NC7
VREF
DGND
AGND
EP
20
22
23
17
R79
39R
27
19
26
18
49R9
1%
32
25
24
16
9
8
1
LCDHSYNC
S25
S26
PC2
PA11
DAV
PENIRQ
R74
S24
PB30
PB31
PB29
PA25
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
SPI1_NPCS2
PC2 {3,7}
PA11 {3,7}
PB30
PB31
PB29
PA25
B
{3,7}
{3,7}
{3,7}
{3,7}
R84
100K
15
3V3
33
C8
10uF
AGND
BP5
DS8
30
29
7
28
L5
4.7uH
S20
PA13
R102
X+
XY+
Y-
TWO USER'S ANALOG INPUTS
C121
100NF
C123
C122
100NF
100NF
R82 0R
Full-Scale Input Span 0 to VREF
A
PA24
A
PA24 {3,7}
BP6
A
REV MODIF.
AT91SAM9G10-EK2
Derek
24.Mar.10
DES.
DATE
1/1
SCALE
LCD_USER'S INTERFACE
7
6
5
4
3
2
XX/XX/XX
DATE
A
This agreement is our property. Reproduction and pu blication without our written authorization shall expose offender to legal proceedings.
8
XXX
VER.
REV.
1
SHEET
6
8
26
Serial and I/O Expansion
4
2
3
EXPANSION CONNECTORS
{2,3,4,6}
PA[0..31]
{3,6}
PB[0..31]
{2,3,5,6,8}
PC[0..15]
D
C
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
{8}
CONN_A[0..22]
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
J25
PB0
PB2
PB4
PB6
PB8
PB10
PB12
PB14
PB16
PB18
PB20
PB22
PB24
PB26
PB28
PB30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
3V3 37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
PB1
PB3
PB5
PB7
PB9
PB11
PB13
PB15
PB17
PB19
PB21
PB23
PB25
PB27
PB29
PB31
PC14
PC12
PC10
PC8
PC6
PC4
PC2
PC0
CONN_D30
CONN_D28
CONN_D26
CONN_D24
CONN_D22
CONN_D20
CONN_D18
CONN_D16
3V3
{3,4,5} NRST
{3} VDDBU
IDC40
PC15
PC13
PC11
PC9
PC7
PC5
PC3
PC1
CONN_D31
CONN_D29
CONN_D27
CONN_D25
CONN_D23
CONN_D21
CONN_D19
CONN_D17
C94
100NF
5
R52 0R
{3} PA10
PA10
C1C2+
GND
15
V+
C2-
V-
SERIAL DEBUG PORT
C92
100NF
2
C93
100NF
G3170-200201
J15
1
6
2
7
3
8
4
9
5
C95
100NF
6
RXD
11
T
14
DBGU_TXD 10
T
7
TXD
S21
{3} PA9
PA9
DBGU_RXD 12
R
13
9
R
8
R53 0R
D
ADM3202ARN
WKUP {3}
SHDN {2,3}
5V
F1
500 mA
F2
500 mA
J18
Dual USB A
{3} HDMA
{3} HDPA
J26
CONN_D0
CONN_D1
CONN_D2
CONN_D3
CONN_D4
CONN_D5
CONN_D6
CONN_D7
CONN_D8
CONN_D9
CONN_D10
CONN_D11
CONN_D12
CONN_D13
CONN_D14
CONN_D15
CONN_D16
CONN_D17
CONN_D18
CONN_D19
CONN_D20
CONN_D21
CONN_D22
CONN_D23
CONN_D24
CONN_D25
CONN_D26
CONN_D27
CONN_D28
CONN_D29
CONN_D30
CONN_D31
A
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
16
USB HOST INTERFACE
{8}
CONN_D[0..31]
CONN_A0
CONN_A1
CONN_A2
CONN_A3
CONN_A4
CONN_A5
CONN_A6
CONN_A7
CONN_A8
CONN_A9
CONN_A10
CONN_A11
CONN_A12
CONN_A13
CONN_A14
CONN_A15
CONN_A16
CONN_A17
CONN_A18
CONN_A19
CONN_A20
CONN_A21
CONN_A22
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
VCC
IDC40
PA0
PA2
PA4
PA6
PA8
PA10
PA12
PA14
PA16
PA18
PA20
PA22
PA24
PA26
PA28
PA30
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
5V
39
HDMA
HDPA
R54
39R
R55
39R
A1
A2
A3
A4
B1
B2
B3
B4
C
J30
2
4
PA1
6
PA3
8
PA5
10
PA7
12
PA9
14 PA11
16 PA13
18 PA15
20 PA17
22 PA19
24 PA21
26 PA23
28 PA25
30 PA27
32 PA29
34 PA31
36
38 5V
40
CONN_D15
CONN_D13
CONN_D11
CONN_D9
CONN_D7
CONN_D5
CONN_D3
CONN_D1
{8}
CONN_SMCS_NCS3
3V3
3V3
5V
IDC40
B
3
4
J27
C1+
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
R56
15K
DNP
CONN_D14
CONN_D12
CONN_D10
CONN_D8
CONN_D6
CONN_D4
CONN_D2
CONN_D0
{3} HDMB
{3} HDPB
HDMB
HDPB
CONN_CAS {8}
CONN_SDCK
{8}
R58
39R
R59
39R
R57
15K
DNP
R60
15K
DNP
3V3
3V3
C96
47pF
DNP
R61
15K
DNP
C97
47pF
DNP
C98
100NF
1 2
3 4
C99
100NF
C101
47pF
DNP
C100
47pF
DNP
5V
IDC40
USB DEVICE INTERFACE
S22
{3} PC3
PC3
R62 15K
USB_CNX
B
J29
{8}
CONN_NCS2
{8} CONN_CFOE_NOE_NRD
{8} CONN_CFIOR_NBS1_NWR1
{8}
CONN_SDA10
{8} CONN_RAS
CONN_A22
CONN_A20
CONN_A18
CONN_A16
CONN_A14
CONN_A12
CONN_A10
CONN_A8
CONN_A6
CONN_A4
CONN_A2
CONN_A0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
CONN_SDCS_NCS1 {8}
CONN_CFIOW_NBS3_NWR3
CONN_CFWE_NWE_NWR0
CONN_NCS0
{8}
CONN_SDWE {8}
CONN_SDCKE
{8}
R63
22K
NOT POPULATED
{8}
{8}
3V3
MN14
VCC
{3} PC4
CONN_A21
CONN_A19
CONN_A17
CONN_A15
CONN_A13
CONN_A11
CONN_A9
CONN_A7
CONN_A5
CONN_A3
CONN_A1
{3,4,5} NRST
PC4
USB_DP_PUP
5
2
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
3V3
MN13
1
C91
100NF
1
11
5
6
10
7
8
1
4
1
Q5
IRLML6302TRPBF
2
NRST
3
C102
DNP
GND
DNP
SN74LVC1G00DBV
DNP
3
27
Figure 7-7.
R64
IDC40
{3} DDM
{3} DDP
DDM
R65
39R
DDP
R66
39R
C105
DNP
DNP
USB_B 90
J19
C103
DNP
2
1
3
C106
DNP
C104
100NF
4
5
6
A
A
REV MODIF.
AT91SAM9G10-EK2
SCALE
Derek
24.Mar.10
DES.
DATE
1/1
SERIAL & I/O EXPANSION
7
6
5
4
3
2
XX/XX/XX
DATE
SHEET
A
This agreement is our property. Reproduction and pu blication without our written authorization shall expose offender to legal proceedings.
8
XXX
VER.
REV.
1
7
8
Figure 7-8.
EBI Serial Resistor
8
7
{3}
D[0..31]
6
D
4
{4}
SDRAM_D[0..31]
{4}
SDRAM_A[0..17]
D0
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
5
SDRAM_D0
SDRAM_D1
SDRAM_D2
SDRAM_D3
SDRAM_D4
SDRAM_D5
SDRAM_D6
SDRAM_D7
SDRAM_D8
SDRAM_D9
SDRAM_D10
SDRAM_D11
SDRAM_D12
SDRAM_D13
SDRAM_D14
SDRAM_D15
SDRAM_D16
SDRAM_D17
SDRAM_D18
SDRAM_D19
SDRAM_D20
SDRAM_D21
SDRAM_D22
SDRAM_D23
SDRAM_D24
SDRAM_D25
SDRAM_D26
SDRAM_D27
SDRAM_D28
SDRAM_D29
SDRAM_D30
SDRAM_D31
D1
D2
D1
D2
D3
D4
D5
D6
D5
D6
D7
33R
1
2
3
4
RR2
8
7
6
5
flash_D0
ETH_D0
CONN_D0
flash_D1
33R
1
2
3
4
RR3
8
7
6
5
33R
1
2
3
4
RR4
8
7
6
5
D0
D1
D2
D3
0R
1
2
3
4
RR51
8
7
6
5
SDRAM_D0
SDRAM_D1
SDRAM_D2
SDRAM_D3
flash_D2
ETH_D2
ETH_D1
CONN_D1
D4
D5
D6
D7
0R
1
2
3
4
RR18
8
7
6
5
SDRAM_D4
SDRAM_D5
SDRAM_D6
SDRAM_D7
CONN_D2
flash_D3
ETH_D3
CONN_D3
D8
D9
D10
D11
0R
1
2
3
4
RR21
8
7
6
5
SDRAM_D8
SDRAM_D9
SDRAM_D10
SDRAM_D11
33R
1
2
3
4
RR9
8
7
6
5
flash_D4
ETH_D4
CONN_D4
flash_D5
33R
1
2
3
4
RR6
8
7
6
5
flash_D6
ETH_D6
ETH_D5
CONN_D5
33R
1
2
3
4
RR7
8
7
6
5
33R
1
2
3
4
RR13
8
7
6
5
33R
1
2
3
4
33R
1
2
3
4
SDRAM_A13
SDRAM_A14
0R
1
2
3
4
RR20
8
7
6
5
SDRAM_D12
SDRAM_D13
SDRAM_D14
SDRAM_D15
D16
D17
D18
D19
27R
1
2
3
4
RR25
8
7
6
5
SDRAM_D16
SDRAM_D17
SDRAM_D18
SDRAM_D19
D20
D21
D22
D23
27R
1
2
3
4
RR23
8
7
6
5
SDRAM_D20
SDRAM_D21
SDRAM_D22
SDRAM_D23
flash_D9
ETH_D8
CONN_D8
flash_D8
D24
D25
D26
D27
27R
1
2
3
4
RR29
8
7
6
5
SDRAM_D24
SDRAM_D25
SDRAM_D26
SDRAM_D27
RR10
8
7
6
5
ETH_D9
CONN_D9
flash_D10
ETH_D10
D28
D29
D30
D31
27R
1
2
3
4
RR27
8
7
6
5
SDRAM_D28
SDRAM_D29
SDRAM_D30
SDRAM_D31
RR11
8
7
6
5
CONN_D10
flash_D11
ETH_D11
CONN_D11
D12
D13
D14
D15
CONN_D6
flash_D7
ETH_D7
CONN_D7
SDRAM_A0
SDRAM_A1
SDRAM_A2
SDRAM_A3
SDRAM_A4
SDRAM_A5
SDRAM_A6
SDRAM_A7
SDRAM_A8
SDRAM_A9
SDRAM_A10
SDRAM_A11
SDRAM_A16
SDRAM_A17
3
{3}
A[0..22]
2
{7}
CONN_A[0..22]
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
CONN_A0
CONN_A1
CONN_A2
CONN_A3
CONN_A4
CONN_A5
CONN_A6
CONN_A7
CONN_A8
CONN_A9
CONN_A10
CONN_A11
CONN_A12
CONN_A13
CONN_A14
CONN_A15
CONN_A16
CONN_A17
CONN_A18
CONN_A19
CONN_A20
CONN_A21
CONN_A22
C
D9
{4}
flash_D[0..15]
{5}
ETH_D[0..15]
D8
D9
flash_D0
flash_D1
flash_D2
flash_D3
flash_D4
flash_D5
flash_D6
flash_D7
flash_D8
flash_D9
flash_D10
flash_D11
flash_D12
flash_D13
flash_D14
flash_D15
ETH_D0
ETH_D1
ETH_D2
ETH_D3
ETH_D4
ETH_D5
ETH_D6
ETH_D7
ETH_D8
ETH_D9
ETH_D10
ETH_D11
ETH_D12
ETH_D13
ETH_D14
ETH_D15
D10
D11
D13
D12
D13
B
D14
{7}
CONN_D[0..31]
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
A
RR17
8
7
6
5
33R
1
2
3
4
RR14
8
7
6
5
RR44
8
7
6
5
SDRAM_SDWE {4}
SDRAM_CAS {4}
SDRAM_RAS {4}
SDRAM_SDA10 {4}
27R
1
2
3
4
RR45
8
7
6
5
SDRAM_SDCK {4}
SDRAM_SDCKE {4}
SDRAM_CFIOR_NBS1_NWR1
SDRAM_CFIOW_NBS3_NWR3
27R
1
2
3
4
RR46
8
7
6
5
33R
1
2
3
4
RR36
8
7
6
5
flash_PC0 {4}
flash_PC1 {4}
flash_PC14 {4}
flash_PC15 {4}
{3} CFIOR_NBS1_NWR1
{3} CFIOW_NBS3_NWR3
{3} CFOE_NOE_NRD
{3} SDCS_NCS1
33R
1
2
3
4
RR47
8
7
6
5
CONN_CFIOR_NBS1_NWR1
{7}
CONN_CFIOW_NBS3_NWR3
{7}
CONN_CFOE_NOE_NRD
{7}
CONN_SDCS_NCS1 {7}
{3} RAS
{3} CAS
{3} SDWE
{3} SMCS_NCS3
33R
1
2
3
4
RR48
8
7
6
5
CONN_RAS {7}
CONN_CAS {7}
CONN_SDWE {7}
CONN_SMCS_NCS3
{3} SDCK
{3} SDCKE
{3} SDA10
{3} CFWE_NWE_NWR0
33R
1
2
3
4
RR49
8
7
6
5
CONN_SDCK {7}
CONN_SDCKE {7}
CONN_SDA10 {7}
CONN_CFWE_NWE_NWR0
{3,5} NCS2
{3} NCS0
{3} CFOE_NOE_NRD
{3} CFWE_NWE_NWR0
33R
1
2
3
4
RR50
8
7
6
5
CONN_NCS2 {7}
CONN_NCS0 {7}
ETH_CFOE_NOE_NRD {5}
ETH_CFWE_NWE_NWR0 {5}
flash_D13
ETH_D12
CONN_D12
flash_D12
SDWE
CAS
RAS
SDA10
{3} SDCK
{3} SDCKE
{3} CFIOR_NBS1_NWR1
{3} CFIOW_NBS3_NWR3
ETH_D13
CONN_D13
flash_D14
ETH_D14
{3} SDCS_NCS1
33R
1
2
3
4
RR15
8
7
6
5
CONN_D14
flash_D15
ETH_D15
CONN_D15
D19
D18
D17
D16
33R
1
2
3
4
RR33
8
7
6
5
CONN_D19
CONN_D18
CONN_D17
CONN_D16
D23
D22
D21
D20
33R
1
2
3
4
RR24
8
7
6
5
CONN_D23
CONN_D22
CONN_D21
CONN_D20
D27
D26
D25
D24
33R
1
2
3
4
RR28
8
7
6
5
CONN_D27
CONN_D26
CONN_D25
CONN_D24
D31
D30
D29
D28
33R
1
2
3
4
RR32
8
7
6
5
D15
CONN_D0
CONN_D1
CONN_D2
CONN_D3
CONN_D4
CONN_D5
CONN_D6
CONN_D7
CONN_D8
CONN_D9
CONN_D10
CONN_D11
CONN_D12
CONN_D13
CONN_D14
CONN_D15
CONN_D16
CONN_D17
CONN_D18
CONN_D19
CONN_D20
CONN_D21
CONN_D22
CONN_D23
CONN_D24
CONN_D25
CONN_D26
CONN_D27
CONN_D28
CONN_D29
CONN_D30
CONN_D31
33R
1
2
3
4
27R
1
2
3
4
{3}
{3}
{3}
{3}
{3,7}
{3,7}
{3,7}
{3,7}
CONN_D31
CONN_D30
CONN_D29
CONN_D28
PC0
PC1
PC14
PC15
SDRAM_SDCS_NCS1
1
{4}
{4}
{4}
A0
A1
A2
A3
27R
1
2
3
4
RR5
8
7
6
5
SDRAM_A0
SDRAM_A1
SDRAM_A2
SDRAM_A3
A4
A5
A6
A7
27R
1
2
3
4
RR8
8
7
6
5
SDRAM_A4
SDRAM_A5
SDRAM_A6
SDRAM_A7
A11
A10
A9
A8
27R
1
2
3
4
RR12
8
7
6
5
SDRAM_A11
SDRAM_A10
SDRAM_A9
SDRAM_A8
A14
A13
A16
A17
27R
1
2
3
4
RR16
8
7
6
5
SDRAM_A14
SDRAM_A13
SDRAM_A16
SDRAM_A17
A0
A1
A2
A3
33R
1
2
3
4
RR19
8
7
6
5
CONN_A0
CONN_A1
CONN_A2
CONN_A3
A4
A5
A6
A7
33R
1
2
3
4
RR22
8
7
6
5
CONN_A4
CONN_A5
CONN_A6
CONN_A7
A8
A9
A10
A11
33R
1
2
3
4
RR26
8
7
6
5
CONN_A8
CONN_A9
CONN_A10
CONN_A11
A12
A14
A13
A15
33R
1
2
3
4
RR30
8
7
6
5
CONN_A12
CONN_A14
CONN_A13
CONN_A15
A16
A17
A18
A19
33R
1
2
3
4
RR31
8
7
6
5
CONN_A16
CONN_A17
CONN_A18
CONN_A19
A21
A22
A20
33R
1
2
3
4
RR34
8
7
6
5
CONN_A21
CONN_A22
CONN_A20
33R
1
2
3
4
RR35
8
7
6
5
A2
A22
A21
D
ETH_A2
flash_A22
flash_A21
C
ETH_A2 {5}
flash_A22 {4}
flash_A21 {4}
{7}
A
{7}
A
REV MODIF.
AT91SAM9G10-EK2
SCALE
Derek
24.Mar.10
DES.
DATE
6
5
4
3
2
XX/XX/XX
DATE
A
This agreement is our property. Reproduction and pu blication without our written authorization shall expose offender to legal proceedings.
7
XXX
VER.
REV.
1/1
EBI SERIAL RESISTOR
8
B
1
SHEET
8
8
28
8.
Errata
8.1
JTAGSEL S5 Footprint Selector
For JTAG selection, the S5 footprint must never be soldered, otherwise the chip can be damaged.
By default, the JTAGSEL input pin integrates a pull-down resistor (ICE mode).
To select JTAG mode, the designer should connect the JTAGSEL input pin to VDDBU power.
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
29
9.
Revision History
Table 9-1.
SAM9G10-EK2 User Guide – Revision History
Doc. Rev. 11262A
02-Mar-15
30
Changes
First issue.
SAM9G10-EK2 [USER GUIDE]
Atmel-11262A-ATARM-SAM9G10-EK2-UserGuide_02-Mar-15
ARM Connected Logo
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