SC4614 Datasheet

SC4614
500kHz Voltage Mode PWM Controller
POWER MANAGEMENT
Description
Features
The SC4614 is a high-speed, voltage mode PWM controller that provides the control and protection features
necessary for a synchronous buck converter.
u 500kHz switching frequency
u 4V to 25V power rails
u 0.5V voltage reference for programmable output
The SC4614 is designed to directly drive the top and
bottom MOSFETs of the buck converter. It allows the converter to operate at 500kHz switching frequency with
4V to 25V power rail and as low as 0.5V output. It uses
an internal 8.2V supply as the gate drive voltage for minimum driver power loss and MOSFET switching loss.
u
u
u
u
u
u
u
The SC4614 features soft-start, supply power under voltage lockout, and hiccup mode over current protection.
The SC4614 monitors the output current by using the
Rdson of the bottom MOSFET in the buck converter that
eliminates the need for a current sensing resistor. The
SC4614 is offered in a MSOP-10 package.
voltages
Internal LDO for optimum gate drive voltage
1.5A gate drive current
Adaptive non-overlapping gate drives provide
shoot-through protection for MOSFETs
Internal soft start
Hiccup mode short circuit protection
Power rail under voltage lockout
MSOP-10 package, fully RoHS and WEEE compliant
Applications
u
u
u
u
u
Embedded, low cost, high efficiency converters
Point of load power supplies
Set top box power supplies
PDP/TFT TVs
Consumer electronics
Typical Application Circuit
12V IN
+
1
2
3
4
5
BST
DH
OCS
PN
COMP
DL
FB
VCC
GND
DRV
10
1.5V OUT
9
1
8
2
7
6
+
SC4614
January 16, 2007
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SC4614
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
Parameter
Symbol
Maximum
Units
Input Supply Voltage
VCC
20
V
BST to GND
VBST
40
V
BST to PN
VBST_PN
10
V
PN to GND
VPN
-1 to 30
V
VPN_PULSE
-5
V
VDL
-1 to +10
V
VDL_PULSE
-3
V
VDH_PN
-1 to +10
V
VDH_PULSE
-3
V
VDRV
10
V
Operating Ambient Temperature Range
TA
-40 to 85
°C
Operating Junction Temperature
TJ
-40 to 125
°C
Thermal Resistance Junction to Ambient
θJA
136
°C/W
Thermal Resistance Junction to Case
θJC
45
°C/W
Lead Temperature (Soldering) 10s
TLEAD
300
°C
Storage Temperature
TSTG
-65 to 150
°C
PN to GND Negative Pulse (tpulse < 20ns)
DL to GND
DL to GND Negative Pulse (tpulse < 20ns)
DH to PN
DH to PN Negative Pulse (tpulse < 20ns)
DRV to GND
Electrical Characteristics
Unless specified: VCC = 5V to 18V; VFB = VO; VBST - VPN = 5V to 8.2V; TA = -40 to 85°C
Parameter
Symbol
Conditions
Min
Typ
Max
Units
18
V
7
mA
4
V
10
V
3
mA
General
VCC Supply Voltage
VCC
VCC Quiescent Current
IQVCC
VCC = 12V, VBST -VPN = 8.2V
VCC Under Voltage Lockout
UVVCC
VHYST = 100mV
BST to PN Supply Voltage
VBST_PN
BST Quiescent Current
4
5
4
IQBST
VCC = 12V, VBST -VPN = 8.2V
LDO Output
VDRV
8.6V < VCC < 18V
8.2
V
Dropout Voltage
VDROP
4V < VCC < 8.6V
0.4
V
Internal LDO
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SC4614
POWER MANAGEMENT
Electrical Characteristics
Unless specified: VCC = 5V to 18V; VFB = VO; VBST - VPN = 5V to 8.2V; TA = -40 to 85°C
Parameter
Symbol
Conditions
Min
Typ
Max
Units
VREF
TA = 25°C, VCC = 12V
0.495
0.500
0.505
V
Sw itching Regulator
Reference Voltage
Load Regulation
IO = 0.2 to 4A
0.4
%
Line Regulation
VCC = 10V to 14V
0.4
%
400
500
600
kHz
Operating Frequency
FS
Ramp Amplitude
Vm
0.8
V
DMAX
97
%
TON_MIN
125
ns
(2)
Maximum Duty Cycle (2)
Minimum On-Time
(2)
DH Rising/Falling Time
DL Rising/Falling Time
tSRC_DH
tSINK_DH
tSRC_DL
tSINK_DL
6V Swing at CL = 3.3nF
VBST-VPN = 8.2V
6V Swing at CL = 3.3nF
VDRV = 8.2V
DH, DL Nonoverlapping Time
41
27
29
42
ns
ns
30
ns
1.5
ms
Input Offset Voltage (2)
2
mV
Input Offset Current (2)
40
nA
Open Loop Gain
80
dB
Unity Gain Bandwidth (2)
10
MHz
Output Source Current
0.9
mA
Output Sink Current
0.9
mA
1.2
V/us
TA = 25°C, VCC = 12V
Soft Start Time
Voltage Error Amplifier
(2)
Slew Rate (2)
For CL=500pF Load
Notes:
(1) This device is ESD sensitive. Use of standard ESD handling precautions is required.
(2) Guaranteed by design, not tested in production.
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SC4614
POWER MANAGEMENT
Pin Configuration
Ordering Information
TOP VIEW
BST
1
10
DH
OCS
2
9
PN
COMP
3
8
DL
FB
4
7
VCC
GND
5
6
DRV
Part Numbers
P ackag e
SC4614MSTRT(1)(2)
MSOP-10
S C 4614E V B
Note:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
(2) Lead free product. This product is fully WEEE and
RoHS compliant.
(MSOP-10)
Pin Descriptions
Pin #
Pin Name
1
BST
Boost input for top gate drive bias.
2
OCS
Current limit setting. Connect resistors from this pin to DRV pin and to ground to program
the trip point of load current. Refer to Applications Information Section for details.
3
COMP
4
FB
5
GND
Chip ground.
6
DRV
Internal LDO output. Connect a 1uF ceramic capasitor from this pin to ground for
decoupling. This voltage is used for chip bias, including gate drivers.
7
VC C
Chip input power supply.
8
DL
Gate drive for bottom MOSFET.
9
PN
Phase node. Connect this pin to bottom N-MOSFET drain.
10
DH
Gate drive for top MOSFET.
 2005 Semtech Corp.
Pin Function
Error amplifier output for compensation.
Voltage feed back of sychronous buck converter.
4
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SC4614
POWER MANAGEMENT
Block Diagram
8.2V
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SC4614
POWER MANAGEMENT
Applications Information
To program a load trip point for short circuit protection, it
is recommended to connect a 3.3k resistor from the OCS
pin to the ground, and a resistor Rset from the OCS pin to
the DRV pin, as shown in Fig. 1.
THEOR
Y OF OPERA
TION
THEORY
OPERATION
The SC4614 is a high-speed, voltage mode PWM controller that provides the control and protection features
necessary for a synchronous buck converter.
As shown in the block diagram of the SC4614, the voltage-mode PWM controller consists of an error amplifier,
a 500kHz ramp generator, a PWM comparator, a RS latch
circuit, and two MOSFET drivers. The buck converter output voltage is fed back to the error amplifier negative
input and is regulated to a reference voltage level. The
error amplifier output is compared with the ramp to generate a PWM wave, which is amplified and used to drive
the MOSFETs in the buck converter. The PWM wave at
the phase node with the amplitude of Vin is filtered out
to get a DC output. The PWM controller works with softstart and fault monitoring circuitry to meet application
requirements.
12V
7
6
DRV
Rset
2
OCS
SC461 4
3.3k
GND
5
UVLO, Start Up and Shut Down
To initiate the SC4614, a supply voltage is applied to the
Vcc pin. The top gate (DH) and bottom gate (DL) are held
low until Vcc voltage exceeds UVLO (Under Voltage Lock
Out) threshold, typically 4.0V. Then the internal Soft-Start
(SS) capacitor begins to charge, the top gate remains
low, and the bottom gate is pulled high to turn on the
bottom MOSFET. When the SS voltage at the capacitor
reaches 0.4V, the top and bottom gates of PWM controller begin to switch. The switching regulator output is slowly
ramping up for a soft turn-on.
Fig. 1. Programming load trip point
350
325
Vpn (mV)
300
If the supply voltages at the Vcc pin falls below UVLO
threshold during a normal operation, the SS capacitor
begins to discharge. When the SS voltage reaches 0.4V,
the PWM controller controls the switching regulator output to ramp down slowly for a soft turn-off.
275
250
225
200
175
150
0
100
200
300
400
500
600
Rset (k -ohm)
Hiccup Mode Short Circuit Protection
The SC4614 uses low-side MOSFET Rdson sensing for
over current protection. In every switching cycle, after
the bottom MOSFET is on for 150ns, the SC4614 detects the phase node voltage and compares it with an
internal setting voltage. If the phase node is lower than
the setting voltage, an overcurrent condition occurs. The
SC4614 will discharge the internal SS capacitor and shutdown both outputs. After waiting for around 10 milliseconds, the SC4614 begins to charge the SS capacitor
again and initiates a fresh startup. The startup and shutdown cycle will repeat until the short circuit is removed.
This is called a hiccup mode short circuit protection.
 2005 Semtech Corp.
V CC
Fig. 2. Pull up resistor (Rset) vs. trip voltage Vpn
The resistor Rset can be found in Fig. 2 for a given phase
node voltage Vpn at the load trip point. This voltage is
the product of the inductor peak current at the load trip
point and the Rdson of the low-side MOSFET:
V pn = I peak ´ Rds _ on
The soft start time of the SC4614 is fixed at around
1.5ms. Therefore, the maximum soft start current is de6
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SC4614
POWER MANAGEMENT
Applications Information (Cont.)
termined by the output inductance and output capacitance. The values of output inductor and output bulk
capacitors have to be properly selected so that the soft
start peak current does not exceed the load trip point of
the short circuit protection.
duction losses of the top and bottom MOSFETs are given
by:
Internal LDO for Gate Drive
An internal LDO is designed in the SC4614 to lower the
12V supply voltage for gate drive. A 1uF external ceramic capacitor connected in between DRV pin to the
ground is needed to support the LDO. The LDO output is
connected to the low gate drive internally, and has to be
connected to the high gate drive through an external
bootstrap circuit. The LDO output voltage is set at 8.2V.
The manufacture data and bench tested results show
that, for low Rdson MOSFETs run at applied load current,
the optimum gate drive voltage is around 8.2V, where
the total power losses of power MOSFETs are minimized.
PC _ BOT = I O2 × Rdson × (1 - D )
PC _ TOP = I O2 × Rdson × D
If the requirement of total power losses for each MOSFET
is given, the above equations can be used to calculate
the values of Rdson and gate charge, then the devices
can be determined accordingly. The solution should ensure the MOSFET is within its maximum junction temperature at highest ambient temperature.
Output Capacitor
The output capacitors should be selected to meet both
output ripple and transient response criteria. The output
capacitor ESR causes output ripple VRIPPLE during the
inductor ripple current flowing in. To meet output ripple
criteria, the ESR value should be:
COMPONENT SELECTION
General design guideline of switching power supplies can
be applied to the component selection for the SC4614.
RESR <
Induct
or and MOSFET
Inductor
MOSFETss
The selection of inductor and MOSFETs should meet thermal requirements because they are power loss dominant
components. Pick an inductor with as high inductance
as possible without adding extra cost and size. The higher
inductance, the lower ripple current, the smaller core loss
and the higher efficiency will be. However, too high inductance slows down output transient response. It is recommended to choose the inductance that creates an
inductor ripple current of approximate 20% of maximum
load current. So choose inductor value from:
L=
The output capacitor ESR also causes output voltage transient VT during a transient load current IT flowing in. To
meet output transient criteria, the ESR value should be:
RESR <
VT
IT
To meet both criteria, the smaller one of above two ESRs
is required.
The output capacitor value also contributes to load transient response. Based on a worst case where the inductor energy 100% dumps to the output capacitor during
the load transient, the capacitance then can be calculated by:
V
5
× VO × (1 - O )
I O × f osc
VIN
The MOSFETs are selected by their Rdson, gate charge,
and package specifications. The SC4614 provides 1.5A
gate drive current and gives 50nC/1.5A=33ns switching
time for driving a 50nC gate charge MOSFET. The switching time ts contributes to the top MOSFET switching loss:
I T2
C > L× 2
VT
PS = I O ×VIN × t S × f OSC
Input Capacitor
The input capacitor should be chosen to handle the RMS
ripple current of a synchronous buck converter. This value
There is no significant switching loss for the bottom
MOSFET because of its zero voltage switching. The con 2005 Semtech Corp.
L × f OSC × VRIPPLE
V
VO × (1 - O )
VIN
7
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SC4614
POWER MANAGEMENT
Applications Information (Cont.)
is given by:
SC4614 AND MOSFETS
I RMS = (1 - D ) × I
2
IN
+ D × ( I o - I IN )
2
REF
where Io is the load current, IIN is the input average current, and D is the duty cycle. Choosing low ESR input
capacitors will help maximize ripple rating for a given size.
+
Vc
PWM
MODULAT OR
EA
FB
-
L
Vo
OUT
COMP
Zf
Bootstrap Circuit
The SC4614 uses an external bootstrap circuit to provide a voltage at the BST pin for the top MOSFET drive.
This voltage, referring to the Phase Node, is held up by a
bootstrap capacitor. Typically, it is recommended to use
a 1uF ceramic capacitor with 16V rating and a commonly
available diode IN4148 for the bootstrap circuit.
Zs
Co
Resr
Fig. 3. Block diagram of the control loop
Filters for Supply Power
For each pin of DRV and Vcc, it is recommended to use a
1uF/16V ceramic capacitor for decoupling. In addition,
place a small resistor (10 ohm) in between the Vcc pin
and the supply power for noise reduction.
The model is a second order system with a finite DC gain,
a complex pole pair at Fo, and an ESR zero at Fz, as
shown in Fig. 4. The locations of the poles and zero are
determined by:
CONTROL LOOP DESIGN
FO =
The goal of compensation is to shape the frequency response charateristics of the buck converter to achieve a
better DC accuracy and a faster transient response for
the output voltage, while maintaining the loop stability.
FZ =
The block diagram in Fig. 3 represents the control loop
of a buck converter designed with the SC4614. The control loop consists of a compensator, a PWM modulator,
and a LC filter.
1
LC
1
RESR C
The compensator in Fig. 3 includes an error amplifier and
impedance networks Zf and Zs. It is implemented by the
circuit in Fig. 5. The compensator provides an integrator,
double poles and double zeros. As shown in Fig. 4, the
integrator is used to boost the gain at low frequency.
Two zeros are introduced to compensate excessive phase
lag at the loop gain crossover due to the integrator
(-90deg) and complex pole pair (-180deg). Two high frequency poles are designed to compensate the ESR zero
and attenuate high frequency noise.
The LC filter and PWM modulator represent the small
signal model of the buck converter operating at fixed
switching frequency. The transfer function of the model
is given by:
VO VIN
1 + sRESRC
=
×
VC Vm 1 + sL / R + s 2 LC
where VIN is the power rail voltage, Vm is the amplitude
of the 500kHz ramp, and R is the equivalent load.
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SC4614
POWER MANAGEMENT
Applications Information (Cont.)
(2). Select the open loop crossover frequency Fc located
at 10% to 20% of the switching frequency. At Fc, find the
required DC gain.
60
Fp1
(3). Use the first compensator pole Fp1 to cancel the
ESR zero Fz.
Fp2
COM PENSATOR GAI N
30
GAIN (dB)
Fz1
LO
Fz2
OP
GA
IN
(4). Have the second compensator pole Fp2 at half the
switching frequency to attenuate the switching ripple and
high frequency noise.
Fo
0
CO
Fz
NV
ER
TE
RG
AI N
Fc
(5). Place the first compensator zero Fz1 at or below
50% of the power stage resonant frequency Fo.
-30
(6). Place the second compensator zero Fz2 at or below
the power stage resonant frequency Fo.
-60
100
1K
10K
100 K
1M
FR EQ UENCY (Hz )
A MathCAD program is available upon request for the
calculation of the compensation parameters.
Fig. 4. Bode plots for control loop design
LA
YOUT GUIDELINES
LAY
C2
C1
R2
C3
The switching regulator is a high di/dt power circuit. Its
Printed Circuit Board (PCB) layout is critical. A good layout can achieve an optimum circuit performance while
minimizing the component stress, resulting in better system reliability. During PCB layout, the SC4614 controller,
MOSFETs, inductor, and power decoupling capacitors have
to be considered as a unit.
R3
Vo
1
-
Vc
2
3
+
VREF
Rtop
Rbot
0.5V
The following guidelines are typically recommended for
using the SC4614 controller.
(1). Place a 4.7uF to 10uF ceramic capacitor close to
the drain of top MOSFET for the high frequency and high
current decoupling. The loop formed by the capacitor,
the top and bottom MOSFETs must be as small as possible. Keep the input bulk capacitors close to the drain
of the top MOSFETs.
Fig. 5. Compensation network
The top resistor Rtop of the voltage divider in Fig. 5 can
be chosen from 1k to 5k. Then the bottom resistor Rbot
is found from:
Rbot =
(2). Place the SC4614 over a quiet ground plane to avoid
pulsing current noise. Keep the ground return of the gate
drive short.
0.5V
× Rtop
VO - 0.5V
where 0.5V is the internal reference voltage of the
SC4614.
(3). Connect bypass capacitors as close as possible to
the decoupling pins (DRV and Vcc) to the ground pin GND.
The trace length of the decoupling capacitor on DRV pin
should be no more than 0.2” (5mm).
The other components of the compensator can be calculated using following design procedure:
(4). Locate the components of the bootstrap circuit close
to the SC4614.
(1). Plot the converter gain, including LC filter and PWM
modulator.
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SC4614
POWER MANAGEMENT
Applications Information (Cont.)
TTypical
ypical Application Schematics with 12V In
put
Input
12V
Rcc
2R2
C4
10uF
Q1
Rli mit
R4
3.3k
499k
0
IPD05N03
C15
U1
1
2
3
4
5
0
C8
10nF
R13
11.5k
BST
DH
OCS
PN
COMP
DL
FB
VCC
GND
DRV
SC4614
10
1uF
8
6
1.5V/15A
L1
1
1.2uH
R11
1R0
Q3
7
1800uF
0
D1
D1N4148
9
+ C3
2
R12
14.7k
IPD05N03
C18
C9
2.2nF
+ C5
1800uF
C7
+ C6
10uF
1800uF
C17
1uF
1uF
R8
301
C13
2.2nF
R15
7.32k
0
C10
680pF
0
Bill of Materials (12V Input)
Item
Quantity
Reference
Part
Vendor
1
1
C4
10uF/16V
Vishay
2
1
C7
10uF/6.3V
Vishay
3
1
C3
1800uF/16V
Rubycon, MBZ
4
2
C5,C6
1800uF/6.3V
Rubycon, MBZ
5
3
C15,C17,C18
1uF
Vishay
6
1
C9
2.2nF
Vishay
7
1
C13
2.2nF
Vishay
8
1
C8
10nF
Vishay
9
1
C10
680pF
Vishay
10
1
D1
D1N4148
Any
11
1
L1
1.2uH
Cooper Electr. Tech
12
2
Q3,Q1
IPD05N03
Infineon
13
1
Rcc
2R2
Vishay
14
1
Rlimit
3.3k
Vishay
15
1
R4
499k
Vishay
16
1
R8
301
Vishay
17
1
R11
1R0
Vishay
18
1
R12
14.7k
Vishay
19
1
R15
7.32k
Vishay
20
1
R13
11.5k
Vishay
21
1
U1
SC4614
SEMTECH
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SC4614
POWER MANAGEMENT
Applications Information (Cont.)
P er
eristics (12V In
put)
erfformance Charact
Characteristics
Input)
Start up
Efficiency (%) vs Load Current
90
85
80
12V Input (5V/DIV)
75
70
65
1.5V Output (1V/DIV)
60
1
3
5
7
9
11
13
15
X=5ms/DIV
Load Current (A)
Transient Response
Load Characteristics (Output vs Load Current)
1.6
1.4
1.5V Output Respo nse (100mV/DIV)
1.2
1.0
0.8
0.6
0.4
0.2
Step Load Current (10A/DIV)
0.0
0
5
10
15
20
X=20us/DIV
Load Current(A)
Gate Waveforms (Io=15A)
Short Circuit Protection
Output Short
DL (10V/DIV)
1.5V OUT (1V/DIV)
DH (10V/DIV)
PN (10V/DIV)
Output Current (10A/DIV)
X=5ms/DIV
X=50ns/DIV
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SC4614
POWER MANAGEMENT
Applications Information (Cont.)
TTypical
ypical Application Schematics with 25V In
put
Input
Vin=25V
Rcc
732
C4
10uF
Q1
Rli mit
R4
3.3k
499k
0
IRLR7821
C15
U1
1
2
3
4
5
0
C8
4.7nF
BST
DH
OCS
PN
COMP
DL
FB
VCC
GND
DRV
10
9
8
1800uF
0
1uF
D1
D1N4148
+ C3
5V /10A
L1
1
2
2.2uH
Q3
R11
1R0
R12
22k
7
6
SC4614
C17
1uF
C9
2.2nF
C7
10uF
+ C6
1800uF
IRLR7821
C18
1uF
R8
301
C13
2.2nF
R15
2.43k
0
C10
1nF
R13
22k
D2
0
BZX84B16LT1
0
Note: Zener diode D2 is required when Vin is 18V or higher.
Bill of Materials (25V Input)
Item
Quantity
Reference
Part
Vendor
1
1
C4
10uF/35V
Murata
2
1
C7
10uF/6.3V
Vishay
3
1
C3
1800uF/35V
Rubycon
4
1
C6
1500uF/6.3V
Rubycon, MBZ
5
3
C15,C17,C18
1uF
Vishay
6
1
C9
2.2nF
Vishay
7
1
C13
2.2nF
Vishay
8
1
C8
4.7nF
Vishay
9
1
C10
1nF
Vishay
10
1
D1
D1N4148
Any
11
1
D2
BZX84B16LT1
ON Semi
12
1
L1
2.2uH
Cooper Electr. Tech
13
2
Q3,Q1
IRLR7821
IR
14
1
Rcc
732
Vishay
15
1
Rlimit
3.3k
Vishay
16
1
R4
499k
Vishay
17
1
R8
301
Vishay
18
1
R11
1R0
Vishay
19
1
R12
22k
Vishay
20
1
R15
2.43k
Vishay
21
1
R13
22k
Vishay
22
1
U1
SC4614
SEMTECH
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SC4614
POWER MANAGEMENT
Applications Information (Cont.)
P er
eristics (25V In
put)
erfformance Charact
Characteristics
Input)
Start up
Efficiency (%) vs Load Current
92
90
88
25V Input (10V/DIV)
86
84
82
80
5V Output (2V/DIV)
78
76
1
2
3
4
5
6
7
8
9
10
X=5ms/DIV
Load Current (A)
Gate Waveforms (Io=10A)
Transient Response
5V Output Response (200mV/DIV)
DL (10V/DIV)
DH (10V/DIV)
PN (10V/DIV)
Step Load Current (10A/DIV)
X=100ns/DIV
 2005 Semtech Corp.
X=20us/DIV
13
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SC4614
POWER MANAGEMENT
Outline Drawing - MSOP-10
e
A
DIM
D
A
A1
A2
b
c
D
E1
E
e
L
L1
N
01
aaa
bbb
ccc
N
2X
E/2
ccc C
2X N/2 TIPS
E
E1
PIN 1
INDICATOR
1 2
B
DIMENSIONS
INCHES
MILLIMETERS
MIN NOM MAX MIN NOM MAX
.043
.000
.006
.030
.037
.011
.007
.003
.009
.114 .118 .122
.114 .118 .122
.193 BSC
.020 BSC
.016 .024 .032
(.037)
10
0°
8°
.004
.003
.010
1.10
0.00
0.15
0.75
0.95
0.17
0.27
0.08
0.23
2.90 3.00 3.10
2.90 3.00 3.10
4.90 BSC
0.50 BSC
0.40 0.60 0.80
(.95)
10
0°
8°
0.10
0.08
0.25
D
aaa C
A2
SEATING
PLANE
H
A
bxN
bbb
c
GAGE
PLANE
A1
C
C A-B D
0.25
L
(L1)
DETAIL
SEE DETAIL
SIDE VIEW
01
A
A
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2.
DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-
3.
DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
4.
REFERENCE JEDEC STD MO-187, VARIATION BA.
Land Pattern - MSOP-10
X
DIM
(C)
G
C
G
P
X
Y
Z
Z
Y
DIMENSIONS
INCHES
MILLIMETERS
(.161)
.098
.020
.011
.063
.224
(4.10)
2.50
0.50
0.30
1.60
5.70
P
NOTES:
1.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
 2005 Semtech Corp.
14
www.semtech.com