SC2612E Datasheet

SC2612E
500kHz Step-Down DC/DC Converter
POWER MANAGEMENT
Description
Features
u
u
u
u
u
u
The SC2612E is a voltage mode switcher designed for
low cost, “point of use” voltage conversion. SC2612E is
available with fixed switching frequencies of 500kHz.
The SC2612E has soft start and enable functions and is
short circuit protected. The output of the switcher may
be set anywhere between 0.8V and 75% of Vin. Short
circuit protection is disabled during start-up to allow the
output capacitors time to fully charge.
Operating frequency of 500kHz
Input supply of 4.5V to 15V
0.5A Drive current for up to 10A output
Output voltages down to 0.8V
Overcurrent protection and soft start
SO-8 package
Applications
u Graphics IC Power supplies
u Embedded, low cost, high efficiency converters
Typical Application Circuit
12V IN
5V IN
R1
C10
C1
C2
U2
2
7
8
C5
4
C7
VCC
COMP
BST
DH
SS/EN
DL
GND
FB
6
5
R2
3
R3
Q2
L1
1.5V OUT
1
Q3
R6
C3
SC2612E
C9
R9
R10
Revision: October 12, 2004
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SC2612E
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
Parameter
Symbol
Maximum
Units
VCC
18
V
VBST
20
V
VDLO, VDHI
-1 to +20
V
DH to GND Negative Pulse (tpulse < 10ns)
VDH_PULSE
-4.5
V
DL to GND Negative Pulse (tpulse < 20ns)
VDL_PULSE
-4.5
V
Operating Ambient Temperature Range
TA
0 to 70
°C
Operating Junction Temperature
TJ
125
°C
TSTG
-65 to 150
°C
TLEAD
300
°C
θJA
113
°C/W
Thermal Resistance Junction to Case
θJC
42
°C/W
ESD Rating (Human Body Model)
ESD
2
kV
VCC Supply Voltage
Boost Pin Voltage
DL to GND , DH to GND
(1)
(1)
Storage Temperature
Lead Temperature (Soldering) 10s
Thermal Resistance Junction to Ambient
(2)
Electrical Characteristics
Unless specified: VCC = 4.5V to 12V; VFB = VO; BST = Vcc+5V; TA = 0 to 70°C
Parameter
Symbol
Conditions
Min
Typ
Max
Units
15
V
10
mA
18
V
5
mA
VCC Supply Voltage
VCC
VCC Quiescent Current
IQVCC
BST Supply Voltage
VBST
BST Quiescent Current
IQBST
VCC Under Voltage Lockout
UVVCC
3.8
4.15
4.5
V
BST Under Voltage Lockout
UVBST
3.15
3.5
3.85
V
792
800
808
mV
0.7
V
Output Voltage
VOS
Overcurrent trip voltage
VITS
Load Regulation
4.5
VCC = 5.0V, VBST = 12.0V, SS/EN = 0V
5
4.5
VCC = 5.0V, VBST = 12.0V, SS/EN = 0V
IO = 10mA; VFB = VOS, TA = 25°C
0.4
IO = 0.2A to 4A
Line Regulation
Oscillator Frequency
fOSC
400
Oscillator Max Duty Cycle
δMAX
80
SS/EN Shutdown Voltage
VSS
0.3
SS/EN Charge current
ISS
Vss = 0.8V
1
%
±0.5
%
500
600
kHz
%
0.8
25
V
µA
Peak DH Sink/Source Current
BST - DH = 4.5V,
DH - GND = 3.3V
DH - GND = 1.5V
0.5
50
A
mA
Peak DL Sink/Source Current
BST - DL = 4.5V,
DL - GND = 3.3V
DL - GND = 1.5V
0.5
50
A
mA
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SC2612E
POWER MANAGEMENT
Electrical Characteristics
Unless specified: VCC = 4.5V to 12V; VFB = VO; BST = Vcc+5V; TA = 0 to 70°C
Parameter
Error Amplifier Transconductance
Symbol
(3)
Error Amplifier Gain (3)
Conditions
gm
A EA
RCOMP = open
Error Amplifier Source/Sink Current
Modulator Gain (3)
AM
V C C = 5V
Dead Time
Min
Typ
Max
Units
0.8
mS
45
dB
± 60
µA
19
dB
50
ns
Notes:
(1) See Gate Resistor selection recommendations.
(2) 1square inch of FR4, double sided, 1oz. minimum copper weight.
(3) Guaranteed by design, not tested in production.
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SC2612E
POWER MANAGEMENT
Pin Configuration
Ordering Information
TOP VIEW
FB
1
8
SS/EN
VCC
2
7
COMP
DL
3
6
BST
GND
4
5
DH
Part Numbers (1)
Frequency
P ackag e
SC2612ESTRT (2)
500kHz
SO-8
Note:
(1) Only available in tape and reel packaging. A reel contains
2500 devices.
(2) Lead free product. This product is fully WEEE and RoHS
compliant.
(SO-8)
Pin Descriptions
Pin #
Pin Name
1
FB
2
VC C
Pin Function
Switcher section feeedback input.
Chip Supply Input Voltage.
3
DL
4
GND
Switcher Low side FET drive output.
5
DH
Switcher High side FET drive output.
6
BST
Supply voltage for FET drives.
7
COMP
Output of the Switcher section voltage error amplifier.
8
SS/EN
Soft start and enable pin, controls the switcher output voltage ramp rate.
Analog and Power Ground, connect directly to ground plane, see layout guidelines.
Block Diagram
VCC
VREF
UVLO
+
LEVEL SHIFT AND
HIGH SIDE DRIVE
-
SHDN
Q
-
DH
R
+
FB
BST
UVLO
&
REF
S
-
SHOOT -T HRU
CONT ROL
+
COMP
VREF
R
Q
25uA
S
OSCILLAT OR
SS/EN
+
+
SSOVER
DL
GND
-
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SYNCHRONOUS
MOSFET DRIVE
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SC2612E
POWER MANAGEMENT
Theory of Operation
The SC2612E is a step down DC/DC controller designed
for minimum cost and size without sacrificing accuracy
and protection. Overcurrent protection is implemented
by a simple undervoltage detection scheme and is disabled until soft start has been completed to eliminate
false trips due to output capacitor charging. The SS/EN
pin is held low, as are the DH and DL pins, until the
undervoltage lockout points are exceeded. Once the VCC
and BST pins both rise above their undervoltage lockout
points, the SS capacitor begins to charge, controlling the
duty cycle of the switcher, and therefore slowly ramping
up the switcher output voltage. Once the SS capacitor is
charged, the current limit circuitry is enabled. If a short
circuit is applied , the output will be pulled down below
it’s trip point and shut down. The device may be restarted
by either cycling power, or momentarily pulling SS/EN low.
Component Selection
OUTPUT INDUCTOR - A good starting point for output
filter component selection is to choose an inductor value
that will give an inductor ripple current of approximately
20% of max. output current.
Inductor ripple current is given by:-
IL RIPPLE
æ V ö
VO × çç1 - O ÷÷
è VIN ø
=
L × fOSC
So choose inductor value from:æ V ö
5 × VO × çç1 - O ÷÷
è VIN ø
L=
IO × fOSC
OUTPUT CAP
ACIT
OR(S) - The output capacitors should
CAPA
CITOR(S)
be selected to meet output ripple and transient response
criteria. Output ripple voltage is caused by the inductor
ripple current flowing in the output capacitor’s ESR (There
is also a component due to the inductor ripple current
charging and discharging the output capacitor itself, but
this component is usually small and can often be ignored).
Given a maximum output voltage ripple requirement, ESR
is given by:-
RESR
æ V ö
VO × VRIPPLE × çç1 - O ÷÷
è VIN ø
<
L × fOSC
Output voltage transient excursions are a function of load
current transient levels, input and output voltages and
inductor and capacitor values.
Capacitance and RESR values to meet a required transient condition can be calculated from:RESR <
C>
VT
IT
L × IT2
2 × VT × VA
where
VA = VIN - VO for negative transients (load application)
and
VA = VO for positive transients (load release)
values for positive and negative transients must be calculated seperately and the worst case value chosen. For
Capacitor values, the calculated value should be doubled
to allow for duty cycle limitation and voltage drop issues.
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SC2612E
POWER MANAGEMENT
Calculate the filter double pole frequency (Fp(lc))
COMPENSA
TION COMPONENTS - Once the filter comCOMPENSATION
ponents have been determined, the compensation components can be calculated. The goal of compensation is
to modify the frequency response characteristics of the
error amplifier to ensure that the closed loop feedback
system has the highest gain and bandwidth possible while
maintaining stability.
A simplified stability criteria states that the open loop
gain of the converter should fall through 0dB at 20dB/
decade at a frequency no higher than 20-25% of the
switching frequency.
This objective is most simply met by generating asymptotic bode plots of the small signal response of the various sections of the converter.
Fp(lc ) =
and calculate ESR Zero frequency (Fz(esr))
Fz( esr ) =
Type 2 Example
As an example of type 2 compensation, we will use the
Evaluation board schematic.
MODULAT OR
+
EA
FB
-
L
OUT
VOUT
Vin=5V
SC2612E AND FETS
Ra
COMP
REF
Zf
Co
Zs
1
2p × Co × Re sr
Choose an open loop crossover frequency (Fco) no higher
than 20% of the switching frequency (Fs).
The proximity of Fz(esr) to the crossover frequency Fco
determines the type of compensation required, if
Fz(esr)>Fco/4, use type 3 compensation, otherwise use
type 2. Type 1 compensation is not appropriate and is
not discussed here.
SC2612E AND FETS
REF
1
2p LCo
Zp
Resr
MODULAT OR
+
EA
FB
-
3.3uH
OUT
VOUT
Rb
6.98k
COMP
3000uF
Cs
Cp
22mOhm
8.06k
Rs
It is convenient to split the converter into two sections,
the Error amp and compensation components being one
section and the Modulator, output filter and divider being the other.
First calculate the DC Filter+Modulator+Divider gain
The DC filter gain is always 0dB, the Modulator gain is
19dB at 5V in and is proportional to Vin, so modulator
gain at any input voltage is.
The total Filter+Modulator+Divider DC Gain is
æV ö
GMOD = 19 + 20 × Logç IN ÷
è 5 ø
Fp(lc ) =
the divider gain is given by
This is point B in Fig2.
æ R8
G DIV = 20 × Log çç
è R5 + R8
Fz(esr ) =
8.06
æ5ö
æ
ö
GFMD = 19 + 20 × Logç ÷ + 20 × Logç
÷ = 13.6dB
è5ø
è 6.98 + 8.06 ø
This is drawn as the line A-B in Fig2
ö
÷÷
ø
1
= 2.4kHz
2p × 3000 × 10 - 6 × 22 × 10 -3
This is point C in Fig2., the line joining B-C slopes at 40dB/decade, the line joining C-D slopes at -20dB/decade.
For 500kHz switching frequency, crossover is designed
for 100kHz.
Since Fz(esr)<<Fco/4 Type 2 compensation is appropriate.
So the total Filter+Modulator+Divider DC Gain is
æ RB ö
æV ö
÷÷
GFMD = 19 + 20 × Logç IN ÷ + 20 × Logçç
è 5 ø
è R A + RB ø
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1
1
=
» 1.6kHz
2p LCo 2p 3.3 × 10 -6 × 3000 × 10 -6
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SC2612E
POWER MANAGEMENT
Having plotted the line ABCD, and confirmed the type of
compensation necessary, compensation component values can be determined.
At Fco, the line ABCD shows a gain of -27.5dB and a slope
of -20dB/decade. In order for the total open loop gain to
be 0dB with a -20dB/decade slope at this frequency, the
compensated error amp gain at Fco must be +27.5dB
with a 0dB slope. This is the line FG on the plot below.
Since open loop DC gain should be as high as possible to
minimize errors, a zero is placed at F and to minimize
high frequency gain and switching interference a pole is
placed at G.
The zero at F should be no higher than Fco/4 and the
pole at G no lower than 4*Fco. The equations to set the
gain and the pole and zero locations are:
A
10 20
Rs =
where A = gain at Fco (in dB)
gm
Cs =
1
2p × Fz1 × Rs
Cp =
1
2p × Fp1 × Rs
For this example, this results in the following values.
27.5
10 20
Rs =
= 29.6kW » 30kW
0.8
Cs »
1
= 0.22nF
6 × 25 × 103 × 30 × 10 3
Cp »
1
= 14pF (unecessar y due to EA rolloff )
6 × 400 × 10 3 × 30 × 10 3
100
80
E
60
Compensated
Error Amp gain
Gain (dB)
40
G
F
H
20
A
Fz1
B
Fp1
C
0
Total open
loop gain
Fp(lc)
Fz(esr)
-20
Filter+modulator
+divider gain
Fco
-40
-60
100.0E+0
1.0E+3
10.0E+3
100.0E+3
D
1.0E+6
Frequency (Hz)
Fig2: Type 2 Error Amplifier Compensation
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SC2612E
POWER MANAGEMENT
Layout Guidelines
Careful attention to layout requirements are necessary
for successful implementation of the SC2612E PWM controller. High currents switching at high frequency are
present in the application and their effect on ground plane
voltage differentials must be understood and minimized.
1). The high power parts of the circuit should be laid out
first. A ground plane should be used, the number and
position of ground plane interruptions should be such as
to not unnecessarily compromise ground plane integrity.
Isolated or semi-isolated areas of the ground plane may
be deliberately introduced to constrain ground currents
to particular areas, for example the input capacitor and
bottom FET ground.
2). The loop formed by the Input Capacitor(s) (Cin), the
Top FET (Q1) and the Bottom FET (Q2) must be kept as
small as possible. This loop contains all the high current,
fast transition switching. Connections should be as wide
and as short as possible to minimize loop inductance.
Minimizing this loop area will a) reduce EMI, b) lower
ground injection currents, resulting in electrically “cleaner”
grounds for the rest of the system and c) minimize source
ringing, resulting in more reliable gate switching signals.
3). The connection between the junction of Q1, Q2 and
the output inductor should be a wide trace or copper
region. It should be as short as practical. Since this connection has fast voltage transitions, keeping this connection short will minimize EMI. The connection between
the output inductor and the output capacitors should be
a wide trace or copper area, there are no fast voltage or
current transitions in this connection and length is not
so important, however adding unnecessary impedance
will reduce efficiency.
12V IN
Vin
10
10uF
U1
2
7
8
0.1uF
4
VCC
BST
COMP
DH
SS/EN
DL
GND
FB
6
Q1
5
3
Vout
Cin
1
Q2
L
Cout
SC2612E
GND
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SC2612E
POWER MANAGEMENT
Layout Guidelines (Cont.)
4) The Output Capacitor(s) (Cout) should be located as
close to the load as possible, fast transient load currents are supplied by Cout only, and connections between
Cout and the load must be short, wide copper areas to
minimize inductance and resistance.
5) The SC2612E is best placed over a quiet ground plane
area, avoid pulse currents in the Cin, Q1, Q2 loop flowing
in this area. PGNDH and PGNDL should be returned to
the ground plane close to the package. The AGND pin
should be connected to the ground side of (one of) the
output capacitor(s). If this is not possible, the AGND pin
may be connected to the ground path between the Output Capacitor(s) and the Cin, Q1, Q2 loop. Under no circumstances should AGND be returned to a ground in-
side the Cin, Q1, Q2 loop.
6) Vcc for the SC2612E should be supplied from the 5V
supply through a 10Ω resistor, the Vcc pin should be
decoupled directly to AGND by a 0.1µF ceramic capacitor, trace lengths should be as short as possible.
Currents in Power Section
Vin
+
Vout
+
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SC2612E
POWER MANAGEMENT
Typical Characteristics
100%
1.500
95%
1.498
VIN = 5V
90%
12V
1.496
VO (V)
Efficiency (%)
IO = 2.00A; VBST = 18V
VBST = 12V for VIN = 5V
VBST = 18V for VIN = 12V
85%
1.494
80%
1.492
75%
1.490
70%
0
2
4
6
8
4
10
5
6
7
8
Typical Efficiency
10
11
12
Typical Line Regulation
0.0%
100%
80%
VBST = 12V for VIN = 5V
VBST = 18V for VIN = 12V
-0.5%
VIN = 12V
60%
VO (V)
Duty Cycle (%) (No Feedback)
9
VIN (V)
Output Current (A)
5V
-1.0%
40%
-1.5%
20%
-2.0%
0%
0.0
0.2
0.4
0.6
0.8
1.0
0
1.2
2
4
SS/EN Control of duty cycle
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8
10
IO (A)
SS/EN Voltage (V)
Typical Load Regulation
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SC2612E
POWER MANAGEMENT
Outline Drawing - SOIC-8
A
D
e
N
DIM
E1
1
E
2
ccc C
2X N/2 TIPS
.069
.053
.010
.004
.065
.049
.012
.020
.010
.007
.189 .193 .197
.150 .154 .157
.236 BSC
.050 BSC
.010
.020
.016 .028 .041
(.041)
8
8°
0°
.004
.010
.008
A
A1
A2
b
c
D
E1
E
e
h
L
L1
N
01
aaa
bbb
ccc
2X E/2
e/2
B
D
DIMENSIONS
MILLIMETERS
INCHES
MIN NOM MAX MIN NOM MAX
aaa C
h
A2 A
SEATING
PLANE
C
A1
bxN
bbb
1.75
1.35
0.25
0.10
1.65
1.25
0.31
0.51
0.25
0.17
4.80 4.90 5.00
3.80 3.90 4.00
6.00 BSC
1.27 BSC
0.25
0.50
0.40 0.72 1.04
(1.04)
8
0°
8°
0.10
0.25
0.20
h
H
C A-B D
c
GAGE
PLANE
0.25
SEE DETAIL
L
(L1)
A
DETAIL
SIDE VIEW
01
A
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2.
DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-
3.
DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
4.
REFERENCE JEDEC STD MS-012, VARIATION AA.
Land Pattern - SOIC-8
X
DIM
(C)
G
DIMENSIONS
INCHES
MILLIMETERS
C
G
P
X
Y
Z
Z
Y
(.205)
.118
.050
.024
.087
.291
(5.20)
3.00
1.27
0.60
2.20
7.40
P
NOTES:
1.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2.
REFERENCE IPC-SM-782A, RLP NO. 300A.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Rd., Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
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