SC2602L Datasheet

SC2602L
Synchronous Voltage Mode Controller
for Distributed Power Supply
POWER MANAGEMENT
Description
Features
The SC2602L is low-cost, full featured, synchronous voltage-mode controller designed for use in single ended
power supply applications where efficiency is of primary
concern. Synchronous operation allows for the elimination of heat sinks in many applications. The SC2602L is
ideal for implementing DC/DC converters needed to
power advanced microprocessors in low cost systems,
or in distributed power applications where efficiency is
important. Internal level-shift, high-side drive circuitry, and
preset shoot-through control, allows the use of inexpensive N-channel power MOSFETs.
‹
‹
‹
‹
‹
‹
‹
‹
Synchronous operation for high efficiency (95%)
R DS(ON) current sensing
Output voltage can be programmed as low as 0.8V
On-chip power good and OVP functions
Small size with minimum external components
Soft Start
Enable function
SO-14 package is fully WEEE and RoHS compliant
Applications
‹ Microprocessor core supply
‹ Low cost synchronous applications
‹ Voltage Regulator Modules (VRM)
‹ DDR termination supplies
‹ Networking power supplies
‹ Sequenced power supplies
SC2602L features include temperature compensated
voltage reference, triangle wave oscillator and current
sense comparator circuitry. Power good signaling, shutdown, and over voltage protection are also provided.
The SC2602L operates at a fixed 200kHz which is for
optimum compromise between efficiency, external component size, and cost.
Two SC2602L can be used together to sequence two
voltage regulators for power up in telecom systems. The
power good of the first SC2602L connected to the enable of the second SC2602L makes this possible.
Typical Application Circuit
V_pullup
5V IN
R1
R3
R2
C1
+
C3
U1
C5
C6
1
2
3
PWRGD
R4
4
5
OVP
6
D1
7
GND
C4
VCC
GND
PWRGD SS/SHDN
OVP
C2
COMP
OCSET
SENSE
PHASE
BSTH
DH
BSTL
PGND
DL
14
SS/SHDN
13
12
11
R5
C7
Q1
10
L1
12V IN
9
C8
Q2
2.5V OUT
R6
8
SC2602L
+
C10
C9
R7
GND
R8
Figure 1. Typical distributed power supply
Revision: January 05, 2006
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SC2602L
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may affect device
reliability.
Parameter
Symbol
Maximum
Units
VIN
-1.0 to 16 (20V Surge)
V
± 0.5
V
PHASE to GND(1)
-0.5 to 18 (20V Surge)
V
BST H to PHASE
16 (20V Surge)
V
VCC, BST L to GND
PGND to GND
T hermal Resistance Junction to Case
θJC
45
°C/W
T hermal Resistance Junction to Ambient
θJ A
115
°C/W
Operating T emperature Range
T
A
-40 to +85
°C
Maximum Junction T emperature
T
J
125
°C
ST G
-65 to +150
°C
LE A D
300
°C
2
kV
Storage T emperature Range
T
Lead T emperature (Soldering) 10 Sec.
T
ESD Rating (Human Body Model)
ESD
Note: (1) -1.5V to 20V for 25ns repetitive every cycle.
Electrical Characteristics
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC
Parameter
C onditions
Min
Typ
Max
U nits
Supply Voltage
V CC
4.2
12.6
V
Supply C urrent
E N = V CC
6
10
mA
Li ne Regulati on
VO = 2.5V
0.5
%
1.8
mS
50
dB
Pow er Supply
Error Amplifier
T ransconductance
G
m
Gai n (AOL)
Input Bi as
5
8
µA
Oscillator
Osci llator Frequency
Osci llator Max D uty C ycle
90
Internal Ramp Peak to Peak
200
kHz
95
%
1
V
MOSFET D rivers
D H Source/Si nk
BST H - D H = 4.5V,
D H - PHASE = 2V
1
A
D L Source/Si nk
BST L - D L = 4.5V.
D L - PGND . = 2V
1
A
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SC2602L
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC
Parameter
C onditions
Min
Typ
Max
U nits
PR OTEC TION
OVP T hreshold Voltage
OVP Source C urrent
20
VOVP = 3V
%
10
mA
Power Good T hreshold
88
112
%
D ead T i me
45
100
nS
2.0V < VOCSET < 12V
180
200
220
µA
0OC to 70OC
0.792
0.8
0.808
V
C harge C urrent
VSS = 1.5V
8.0
10
12
µA
D i scharge C urrent
VSS = 1.5V
Over C urrent Set (Isi nk)
R eference
Reference Voltage
Soft Start
1.5
µA
Pow er Good
Si nk C urrent C apabi li ty
Si nk 1mA
0.4
V
S hut D ow n
Shut D own T hreshold
0.6
V
Note:
(1) Specification refers to application circuit (Figure 1).
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SC2602L
POWER MANAGEMENT
Pin Configuration
Ordering Information
Top View
VCC
PWRGD
OVP
OCSET
PHASE
Device(2)
Frequency
Package(1)
GND
SC2602LST RT
200kHz
SO-14
SS / SHDN
COMP
S C 2602LE V B
Notes:
(1) Only available in tape and reel packaging. A reel contains
2500 devices.
(2) Lead free product. This product is fully WEEE and RoHS
compliant.
SENSE
BSTH
DH
BSTL
PGND
Evaluation Board
DL
(14-Pin SOIC)
Pin Descriptions
Pin #
Pin Name
1
VC C
2
PWRGD
3
OVP
4
OCSET
Set the converter over current trip point.
5
PHASE
Input from the phase node between the MOSFET s.
6
DH
7
PGND
8
DL
9
BST L
Bootstrap, low side driver.
10
BST H
Bootstrap, high side driver.
11
SENSE
Voltage sense input.
12
COMP
Compensation pin.
13
SS/SHDN
14
GND
Pin Function
Chip supply voltage.
Open collector output. Logic high indicates correct ouput voltage.
Over voltage protection output. Source at least 10mA when Vsense > 1.2 * VBG.
High side driver output.
Power ground.
Low side driver output.
Gate Drive return Ground for the 1.5V GMCH regulator. Connect to Source of bottom FET .
Signal ground.
Note:
(1) All logic level inputs and outputs are open collector TTL compatible.
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SC2602L
POWER MANAGEMENT
Block Diagram
VCC
200uA
Vbg
Over Current
+10%
Under
Voltage
-10%
PWRGD
OCSET
0.8V
+20%
VCC
Oscillator
OVP
One Shot
Error Amp
SENSE
PWM
Vbg
DRVH
BSTH
COMP
DH
S
VCC
Cross
Current
Control
0.8V
R
QB
10uA
SS/SHDN
GND
Fault
1.5uA
BSTL
DRVL
0.6V
PHASE
DL
PGND
Theory of Operation
Synchronous Buck Converter
The output rail is regulated by a synchronous, voltagemode pulse width modulated (PWM) controller. This
section has all the features required to build a high efficiency synchronous buck converter, including “Power
Good” flag, shut-down, and cycle-by-cycle current limit.
As SENSE increases, the output voltage of the error
amplifier decreases. This causes a reduction in the ontime of the high-side MOSFET connected to DH, hence
lowering the output voltage.
Under Voltage Lockout
The under voltage lockout circuit of the SC2602L assures that the high-side MOSFET driver outputs remain
in the off state whenever the supply voltage drops below
set parameters. Lockout occurs if VCC falls below 4.1V.
Normal operation resumes once VCC rises above 4.2V.
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier. The
external resistive divider reference voltage is derived from
an internal trimmed-bandgap voltage reference (See Fig.
1). The inverting input of the error amplifier receives its
voltage from the SENSE pin.
Over-Voltage Protection
The over-voltage protection pin (OVP) is high only when
the voltage at SENSE is 20% higher than the target value
programmed by the external resistor divider. The OVP
pin is internally connected to a PNP’s collector.
The internal oscillator uses an on-chip capacitor and
trimmed precision current sources to set the oscillation
frequency to 200kHz. The triangular output of the oscillator sets the reference voltage at the inverting input of
the comparator. The non-inverting input of the comparator receives it’s input voltage from the error amplifier.
When the oscillator output voltage drops below the error amplifier output voltage, the comparator output goes
high. This pulls DL low, turning off the low-side FET, and
DH is pulled high, turning on the high-side FET (once
the cross-current control allows it). When the oscillator
voltage rises back above the error amplifier output voltage, the comparator output goes low. This pulls DH low,
turning off the high-side FET, and DL is pulled high, turning on the low-side FET (once the cross-current control
allows it).
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Power Good
The power good function is to confirm that the regulator
outputs are within +/-10% of the programmed level.
PWRGD remains high as long as this condition is met.
PWRGD is connected to an internal open collector NPN
transistor.
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SC2602L
POWER MANAGEMENT
Applications Information (Cont.)
Soft Start
Initially, SS/SHDN sources 10µA of current to charge an
external capacitor. The outputs of the error amplifiers
are clamped to a voltage proportional to the voltage on
SS/SHDN. This limits the on-time of the high-side
MOSFETs, thus leading to a controlled ramp-up of the
output voltages.
An over-current condition occurs when the high-side drive
is turned on, but the PHASE node does not reach the
voltage level set at the OCSET pin. The PHASE node is
sampled only once per cycle during the valley of the triangular oscillator. Once an over-current occurs, the highside drive is turned off and the low-side drive turns on
and the SS/SHDN pin begins to sink 1.5µA. The softstart voltage will begin to decrease as the 1.5µA of current discharges the external capacitor. When the softstart voltage reaches 0.8V, the SS/SHDN pin will begin
to source 10µA and begin to charge the external capacitor causing the soft-start voltage to rise again. Again,
when the soft-start voltage reaches the level of the internal oscillator, switching will occur.
R DS(ON) Current Limiting
The current limit threshold is set by connecting an external resistor from the VCC supply to OCSET. The voltage drop across this resistor is due to the 200µA internal sink sets the voltage at the pin. This voltage is compared to the voltage at the PHASE node. This comparison is made only when the high-side drive is high to
avoid false current limit triggering due to uncontributing
measurements from the MOSFETs off-voltage. When
the voltage at PHASE is less than the voltage at OCSET,
an overcurrent condition occurs and the soft start cycle
is initiated. The synchronous switch turns off and SS/
SHDN starts to sink 1.5µA. When SS/SHDN reaches
0.8V, it then starts to source 10µA and a new cycle begins.
If the over-current condition is no longer present, normal operation will continue. If the over-current condition
is still present, the SS/SHDN pin will again begin to sink
1.5µA. This cycle will continue indefinitely until the overcurrent condition is removed.
In conclusion, below is shown a typical “12V Application
Circuit” which has a BSTH voltage derived by
bootstrapping input voltage to the PHASE node through
diode D1. This circuit is very useful in cases where only
input power of 12V is available.
Hiccup Mode
During power up, the SS/SHDN pin is internally pulled
low until VCC reaches the undervoltage lockout level of
4.2V. Once VCC has reached 4.2V, the SS/SHDN pin is
released and begins to source 10µA of current to the
external soft-start capacitor. As the soft-start voltage
rises, the output of the internal error amplifier is clamped
to this voltage. When the error signal reaches the level
of the internal triangular oscillator, which swings from
1V to 2V at a fixed frequency of 200kHz, switching occurs. As the error signal crosses over the oscillator signal, the duty cycle of the PWM signal continues to increase until the output comes into regulation. If an overcurrent condition has not occurred the soft-start voltage
will continue to rise and level off at about 2.2V.
 2005 Semtech Corp.
In order to prevent substrate glitching, a small-signal diode should be placed in close proximity to the chip with
cathode connected to PHASE and anode connected to
PGND.
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SC2602L
POWER MANAGEMENT
Application Circuit
Typical 12V Application Circuit with Bootstrapped BSTH
+5V
R2
C1
12V IN
R3
C2
0.1u
C4
10
1.0u
C5
PWRGD
C6
C7
0.1u
1.0u
U1
1
2
3
R4 1K
4
OVP
5
6
D2
7
1N4148
VCC
PWRGD SS/SHDN
COMP
OCSET
SENSE
PHASE
BSTH
DH
10u
0.1u
GND
OVP
D1
1N1418
BSTL
PGND
DL
14
+ C3
13
C8 1.0u
R5
C9
9.6K
36n
12
11
Q1
L1
10
4uH
9
Q2
R7
 2005 Semtech Corp.
3.3V OUT
R6
8
SC2602L
R8
GND
SS/SHDN
2.2
7
C11
+ C10
10u
1200u/6.3V
1.74K
5K
820u/16V
R1
GND
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SC2602L
POWER MANAGEMENT
Typical Characteristics
Output Ripple Voltage
Ch1: Vo_rpl
Gate Drive Waveforms
Ch1: Top FET
Ch2: Bottom FET
1. VIN = 5V; VO = 3.3V; IOUT = 12A
PIN Descriptions
Ch1: Vo_rpl
2. VIN = 5V; VOUT = 1.3V; IOUT = 12A
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Ch1: o
T p FET
Ch2: Bottom FET
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SC2602L
POWER MANAGEMENT
Typical Characteristics (Cont.)
Ch1: Vo_rpl
2. VIN = 5V; VOUT = 1.3V; IOUT = 12A
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Ch1: Top FET
Ch2: Bottom FET
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SC2602L
POWER MANAGEMENT
Typical Characteristics (Cont.)
Hiccup Mode
Ch1:
Ch2:
Ch3:
Ch4:
Vin
Vss
Top Gate
Vout
Vin = 5V
Vout = 3.3V
Vbst = 12V
Iout = S.C.
Start Up Mode
Ch1: Vin
Ch2: Vss
Ch3: Top Gate
Ch4: Vout
Vin = 5V
Vout = 3.3V
Iout = 2A
Vbst = 12V
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SC2602L
POWER MANAGEMENT
Gpwm
L
EA
R1
R
Vbg
1.25Vdc
0.5Vdc
0.8Vdc
The task here is to properly choose the compensation
network for a nicely shaped loop-gain Bode plot. The
following design procedures are recommended to accomplish the goal:
Rc
Vin
(1) Calculate the corner frequency of the output filter:
Ro
Co
C
R2
F o :=
Fig. 2. SC2602L small signal model.
The control model of SC2602L control loop small signal
can be depicted in Fig. 2. This model can also be used in
SPICE kind of simulator to generate loop gain Bode plots.
The bandgap reference is 0.8V and trimmed to +/-1%
accuracy. The desired output voltage can be achieved
by setting the resistive divider network, R1 and R2.
The error amplifier is transconductance type with fixed
gain of:
Gm
1.8. mA
V
The compensation network includes a resistor and a
capacitor in series, which terminates from the output of
the error amplifier to the ground.
This device uses voltage mode control with input voltage feed forward. The peak-to-peak ramp voltage is
proportional to the input voltage, which results in an excellent performance to reject input voltage variation. The
PWM gain is inversion of the ramp amplitude, and this
gain is given by:
G pwm
1
V ramp
where the ramp amplitude (peak-to-peak) is 1.0 volts
when input voltage is 12 volts.
The total control loop-gain can then be derived as
follows:
T( s) T o.
1 s. R. C .
s. R. C
L
Ro
2
s . L. C o. 1
F esr :=
1
2⋅ π⋅ R c⋅ C o
(3) Check that the ESR zero frequency is not too high.
F esr <
F sw
5
If this condition is not met, the compensation structure
may not provide loop stability. The solution is to add
some electrolytic capacitors to the output capacitor bank
to correct the output filter corner frequency and the ESR
zero frequency. In some cases, the filter inductance
may also need to be adjusted to shift the filter corner
frequency. It is not recommended to use only high frequency multi-layer ceramic capacitors for output filter.
(4) Choose the loop gain cross over frequency (0 dB
frequency). It is recommended that the crossover frequency is always less than one fifth of the switching
frequency :
F
F x_over ≤
sw
5
If the transient specification is not stringent, it is better to
choose a crossover frequency that is less than one tenth
of the switching frequency for good noise immunity. The
resistor in the compensation network can then be calculated as:
2
 F esr   F x_over   V o 
R :=
⋅
⋅
⋅
G pwm ⋅ V in⋅ G m  F o   F esr   V bg 
1
Rc
Ro
when
F o < F esr < F x_over
 V bg 
T o := G m⋅ G pwm ⋅ V in⋅ R⋅ 
 Vo 
 2005 Semtech Corp.
2⋅ π⋅ L⋅ C o
(2) Calculate the ESR zero frequency of the output filter
capacitor:
1 s. R c . C o
1 s. R c . C o
1
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SC2602L
POWER MANAGEMENT
Applications Information (Cont.)
Step 1. Output filter corner frequency
or
F o = 2.516 KHz
R :=
2
1
G pwm ⋅ V in⋅ G m
 F o   F x_over   V o 
⋅
⋅
 F esr   F o   V bg 
⋅
when
F esr < F o < F x_over
Step 2. ESR zero frequency:
F esr = 7.958 KHz
Step 3. Check the following condition:
(5) The compensation capacitor is determined by choosing the compensator zero to be about one fifth of the
output filter corner frequency:
5
Step 4. Choose crossover frequency and calculate
compensator R:
5
1
.
.
.
2 π R F
C
F sw
Which is satisfied in this case.
F o
F zero
F esr <
F x_over = 20 KHz
zero
(6) The final step is to generate the Bode plot, either by
using the simulation model in Fig. 2 or using the equations provided here with Mathcad. The phase margin
can then be checked using the Bode plot. Usually, this
design procedure ensures a healthy phase margin.
(7) An additional capacitor should be reserved at the
compensation pin to ground to have another high frequency pole.
An example is given below to demonstrate the procedure introduced above. The parameters of the power
supply are given as :
R = 4.8 KΩ
Step 5. Calculate the compensator C:
C = 65.886 nF
Step 6. Generate Bode plot and check the phase margin. In this case, the phase margin is about 85oC that
ensures the loop stability.
The parameters of the power supply are given as :
V in
12. V
Vo
3.3. V
12. A
Io
200. KHz
F sw
L
4 . µH
Co
1200. µF
Rc
0.02. Ω
0.8. V
V bg
V ramp
Gm
 2005 Semtech Corp.
1 .V
1.8. mA
V
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SC2602L
POWER MANAGEMENT
Applications Information (Cont.)
Loop Gain Mag (dB)
100
mag( i )
50
0
50
0.01
0.1
1
10
F
100
3
1 .10
100
1 .10
i
kHz
Loop Gain Phase (Degree)
0
45
phase( i )
90
135
180
0.01
0.1
1
10
F
3
i
kHz
Bode plot of the control loop
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SC2602L
POWER MANAGEMENT
Outline Drawing - S0-14
A
DIM
D
e
2X
E/2
E1 E
ccc C
2X N/2 TIPS
1
2
.053
.069
.004
.010
.049
.065
.012
.020
.007
.010
.337 .341 .344
.150 .154 .157
.236 BSC
.050 BSC
.010
.020
.016 .028 .041
(.041)
14
0°
8°
.004
.010
.008
A
A1
A2
b
c
D
E1
E
e
h
L
L1
N
01
aaa
bbb
ccc
N
3
B
D
DIMENSIONS
INCHES
MILLIMETERS
MIN NOM MAX MIN NOM MAX
1.35
1.75
0.10
0.25
1.25
1.65
0.31
0.51
0.17
0.25
8.55 8.65 8.75
3.80 3.90 4.00
6.00 BSC
1.27 BSC
0.25
0.50
0.40 0.72 1.04
(1.04)
14
0°
8°
0.10
0.25
0.20
aaa C
h
A2 A
SEATING
PLANE
C
h
A1
bxN
bbb
H
C A-B D
c
GAGE
PLANE
0.25
L
(L1)
A
SEE DETAIL
DETAIL
SIDE VIEW
01
A
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS
-A- AND
-B- TO BE DETERMINED AT DATUM PLANE
-H-
3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
4. REFERENCE JEDEC STD MS-012, VARIATION AB.
Land Pattern - S0-14
X
DIM
(C)
G
C
G
P
X
Y
Z
Z
Y
DIMENSIONS
INCHES
MILLIMETERS
(.205)
.118
.050
.024
.087
.291
(5.20)
3.00
1.27
0.60
2.20
7.40
P
NOTES:
1.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2. REFERENCE IPC-SM-782A, RLP NO. 302A.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
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