SEMTECH SC1102ASTR

SC1102/SC1102A
Synchronous Voltage Mode Controller
for Distributed Power Supply Applications
POWER MANAGEMENT
Description
Features
The SC1102 and SC1102A are low-cost, full featured,
synchronous voltage-mode controllers designed for use
in single ended power supply applications where efficiency
is of primary concern. Synchronous operation allows for
the elimination of heat sinks in many applications. The
SC1102s are ideal for implementing DC/DC converters
needed to power advanced microprocessors in low cost
systems, or in distributed power applications where efficiency is important. Internal level-shift, high-side drive
circuitry, and preset shoot-thru control, allows the use of
inexpensive N-channel power switches.
‹
‹
‹
‹
‹
‹
‹
‹
1.265V reference available
Synchronous operation for high efficiency (95%)
RDS(ON) current sensing
On-chip power good and OVP functions
Small size with minimum external components
Soft Start
Enable function
14 Pin SOIC lead free package available. Fully
WEEE and RoHS compliant
Applications
‹ Microprocessor core supply
SC1102s features include temperature compensated
voltage reference, triangle wave oscillator and current
sense comparator circuitry. Power good signaling, shutdown, and over voltage protection are also provided.
The SC1102 operates at a fixed frequency of 200kHz
and the SC1102A at 500kHz, providing a choice for optimum compromise between efficiency, external component size, and cost.
‹ Low cost synchronous applications
‹ Voltage Regulator Modules (VRM)
‹ DDR termination supplies
‹ Networking power supplies
‹ Sequenced power supplies
Two SC1102s can be used together to sequence power
up of telecom systems. The power good of the first
SC1102 connected to the enable of the second SC1102
makes this possible.
Typical Application Circuit
Typical Distribut
ed P
o w er Supply
Distributed
Po
+5V
+
R1
1k
R2
R4
10
C1
opt.
C2
0.1
1
VCC
GND
R3
1k
OVP
2
PWRGD
3
OVP
4
C7
680/6.3V
C8
680/6.3V
SS/SHDN
13
VREF
12
OCSET
SENSE
11
5
PHASE
BSTH
10
6
DRVH
BSTL
9
Vin 5V
_
14
PWRGD
0.1
C6
680/6.3V
C5
10.0
U1
SC1102
C3
0.1
SHDN
VREF
R8
124*
R7
127
D1
MBR0520
+12V
C4
1.0
7
PGND
DRVL
8
Q1
STP40NE
R5
3.9
L1
2uH
+
Q2
STP40NE
C9
180/4V
R6
2.2
C11
180/4V
C12
180/4V
C13
180/4V
Vout=2.5V*
_
NOTE:
Figure 1.
Revision: January 5, 2006
C10
180/4V
*) Vout = 1.265 x (1+R8/R7)
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SC1102/SC1102A
POWER MANAGEMENT
Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may affect device
reliability.
Parameter
Symbol
Maximum
Units
VIN
-1.0 to 14
V
± 0.5
V
PHASE to GND (1)
-0.5 to 18
V
BSTH to PHASE
14
V
VCC, BSTL to GND
PGND to GND
Thermal Resistance Junction to Case
θJ C
45
°C/W
Thermal Resistance Junction to Ambient
θJ A
115
°C/W
Operating Temperature Range
TA
0 to 70
°C
Maximum Junction Temperature
TJ
125
°C
Storage Temperature Range
TSTG
-65 to +150
°C
Lead Temperature (Soldering) 10 Sec.
TLEAD
300
°C
Note: (1) -1.5V to 20V for 25ns repetitive every cycle.
Electrical Characteristics
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; FB = VO; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC
Parameter
Conditions
Min
Typ
Max
Units
Supply Voltage
VC C
4.2
12.6
V
Supply Current
EN = VC C
6
10
mA
Line Regulation
VO = 2.5V
0.5
%
Gain (AOL)
35
dB
Input Bias
5
8
µA
kHz
Pow er Supply
Error Amplifier
Oscillator
Oscillator Frequency
SC1102
170
200
230
SC1102A
425
500
575
90
95
Oscillator Max Duty Cycle
%
MOSFET Drivers
DH Source/Sink
BSTH - DH = 4.5V,
DH- PHASE = 2V
1
A
DL Source/Sink
BSTL - DL = 4.5V.
DL - PGND. = 2V
1
A
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SC1102/SC1102A
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; FB = VO; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC
Parameter
Conditions
Min
Typ
Max
Units
PROTECTION
OVP Threshold Voltage
OVP Source Current
20
VOVP = 3V
%
10
mA
Power Good Threshold
88
112
%
Dead Time
45
100
ns
Over current Set Isink
2.0V ≤ VOCSET ≤ 12V
180
200
220
µA
0°C to 70°C
1.252
1.265
1.278
V
+1
%
12
µA
Reference
Reference Voltage
Accuracy
-1
Soft Start
Charge Current
VSS = 1.5V
Discharge Current
VSS = 1.5V
8.0
10
1.5
µA
NOTES:
(1) Specification refers to application circuit (Figure 1).
(2) This device is ESD sensitive. Use of standard ESD handling precautions is required.
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SC1102/SC1102A
POWER MANAGEMENT
Pin Configuration
Ordering Information
Device
Top View
(1)
Frequency
P ackag e
SC1102CS.TR
SC1102CSTRT(2)
200kHz
SO-14
SC1102ASTR
SC1102ASTRT(2)
SC1102EVB
Evaluation Board
Notes:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
(2) Lead free product. This product is fully WEEE and
RoHS compliant.
(14-Pin SOIC)
Pin Descriptions
Pin #
500kHz
Pin Name
Pin Function
1
VC C
Chip supply voltage
2
PWRGD
Logic high indicates correct output voltage
3
OVP
Over voltage protection.
4
OCSET
Sets the converter overcurrent trip point
5
PHASE
Input from the phase node between the MOSFET’S
6
DH
High side driver output
7
PGND
Power ground
8
DL
Low side driver output
9
BSTL
Bootstrap, low side driver.
10
BSTH
Bootstrap, high side driver.
11
SENSE
Voltage sense input
12
VREF
Buffered band gap voltage reference.
13
SS/SHDN
Soft start. A capacitor to ground sets the slow start time.
14
GND
Signal ground
NOTE:
(1) All logic level inputs and outputs are open collector TTL compatible.
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SC1102/SC1102A
POWER MANAGEMENT
Block Diagram
Applications Information - Theory of Operation
low, turning off the high-side FET, and DL is pulled high,
turning on the low-side FET (once the cross-current control allows it).
Synchronous Buck Converter
Primary VCORE power is provided by a synchronous, voltage-mode pulse width modulated (PWM) controller. This
section has all the features required to build a high efficiency synchronous buck converter, including “Power
Good” flag, shut-down, and cycle-by-cycle current limit.
As SENSE increases, the output voltage of the error
amplifier decreases. This causes a reduction in the ontime of the high-side MOSFET connected to DH, hence
lowering the output voltage.
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier. The
external resistive divider reference voltage is derived from
an internal trimmed-bandgap voltage reference (See Fig.
Under Voltage Lockout
The under voltage lockout circuit of the SC1102 assures
that the high-side MOSFET driver outputs remain in the
off state whenever the supply voltage drops below set
parameters. Lockout occurs if VCC falls below 4.1V. Normal operation resumes once VCC rises above 4.2V.
1). The inverting input of the error amplifier receives its
voltage from the SENSE pin.
The internal oscillator uses an on-chip capacitor and
trimmed precision current sources to set the oscillation
frequency to 200kHz/500kHz. The triangular output of
the oscillator sets the reference voltage at the inverting
input of the comparator. The non-inverting input of the
comparator receives it’s input voltage from the error amplifier. When the oscillator output voltage drops below
the error amplifier output voltage, the comparator output goes high. This pulls DL low, turning off the low-side
FET, and DH is pulled high, turning on the high-side FET
(once the cross-current control allows it). When the oscillator voltage rises back above the error amplifier output
voltage, the comparator output goes low. This pulls DH
 2006 Semtech Corp.
Over-Voltage Protection
The over-voltage protection pin (OVP) is high only when
the voltage at SENSE is 20% higher than the target value
programmed by the external resistor divider. The OVP pin
is internally connected to a PNP’s collector.
Power Good
The power good function is to confirm that the regulator
outputs are within +/-10% of the programmed level.
PWRGD remains high as long as this condition is met.
PWRGD is connected to an internal open collector NPN
transistor.
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SC1102/SC1102A
POWER MANAGEMENT
Applications Information (Cont.)
Soft Start
Initially, SS/SHDN sources 10µA of current to charge an
external capacitor. The outputs of the error amplifiers
are clamped to a voltage proportional to the voltage on
SS/SHDN. This limits the on-time of the high-side
MOSFETs, thus leading to a controlled ramp-up of the
output voltages.
An over-current condition occurs when the high-side drive
is turned on, but the PHASE node does not reach the
voltage level set at the OCSET pin. The PHASE node is
sampled only once per cycle during the valley of the triangular oscillator. Once an over-current occurs, the highside drive is turned off and the low-side drive turns on
and the SS/SHDN pin begins to sink 2uA. The soft-start
voltage will begin to decrease as the 2uA of current discharges the external capacitor. When the soft-start voltage reaches 0.8V, the SS/SHDN pin will begin to source
10uA and begin to charge the external capacitor causing
the soft-start voltage to rise again. Again, when the softstart voltage reaches the level of the internal oscillator,
switching will occur.
RDS(ON) Current Limiting
The current limit threshold is set by connecting an external resistor from the VCC supply to OCSET. The voltage
drop across this resistor is due to the 200µA internal
sink sets the voltage at the pin. This voltage is compared
to the voltage at the PHASE node. This comparison is
made only when the high-side drive is high to avoid false
current limit triggering due to uncontributing measurements from the MOSFETs off-voltage. When the voltage
at PHASE is less than the voltage at OCSET, an overcurrent
condition occurs and the soft start cycle is initiated. The
synchronous switch turns off and SS/SHDN starts to
sink 2µA. When SS/SHDN reaches 0.8V, it then starts
to source 10µA and a new cycle begins.
If the over-current condition is no longer present, normal
operation will continue. If the over-current condition is
still present, the SS/SHDN pin will again begin to sink
2uA. This cycle will continue indefinitely until the overcurrent condition is removed.
In conclusion, below is shown a typical “12V Application
Circuit” which has a BSTH voltage derived by bootstrapping
input voltage to the PHASE node through diode D1. This
circuit is very useful in cases where only input power of
12V is available.
Hiccup Mode
During power up, the SS/SHDN pin is internally pulled
low until VCC reaches the undervoltage lockout level of
4.2V. Once VCC has reached 4.2V, the SS/SHDN pin is
released and begins to source 10µA of current to the
external soft-start capacitor. As the soft-start voltage
rises, the output of the internal error amplifier is clamped
to this voltage. When the error signal reaches the level
of the internal triangular oscillator, which swings from 1V
to 2V at a fixed frequency of 200kHz/500kHz, switching
occurs. As the error signal crosses over the oscillator
signal, the duty cycle of the PWM signal continues to increase until the output comes into regulation. If an overcurrent condition has not occurred the soft-start voltage
will continue to rise and level off at about 2.2V.
 2006 Semtech Corp.
In order to prevent substrate glitching, a small-signal diode should be placed in close proximity to the chip with
cathode connected to PHASE and anode connected to
PGND.
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SC1102/SC1102A
POWER MANAGEMENT
Application Circuit
Typical 12V Application Circuit with Bootstrapped BSTH
+5V
+
R1
1k
R2
1.74k
C1
opt.
R4
10
C2
0.1
C5
10.0
U1
SC1102
1
VCC
GND
OVP
R3
1k
2
PWRGD
3
OVP
4
OCSET
SS/SHDN
13
VREF
12
SENSE
11
C7
270/16V
C8
270/16V
D2
MBRA130
14
PWRGD
C6
270/16V
C3
0.1
Vin 12V
_
SHDN
VREF
R9
205*
R8
127
5
D1
MBR0520
6
PHASE
BSTH
DRVH
BSTL
PGND
DRVL
10
9
1.0
7
8
Q1
STP40NE
C4
R5
3.9
Q2
STP40NE
R6
2.2
C9
1.0
L1
4uH
+
D3
MBRD1035
Optional
C10
180/4V
C11
180/4V
C12
180/4V
C13
180/4V
C14
180/4V
Vout=3.3V*
_
NOTE:
*) Vout = 1.265 x (1+R9/R8)
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SC1102/SC1102A
POWER MANAGEMENT
Typical Characteristics
Wave forms are shown for SC1102 and are similiar for
SC1102A but at a higher frequency.
Output Ripple Voltage
Ch1: Vo_rpl
Gate Drive Waveforms
Ch1: Top FET
Ch2: Bottom FET
1. VIN = 5V; VO = 3.3V; IOUT = 12A
PIN Descriptions
Ch1: Vo_rpl
2. VIN = 5V; VOUT = 1.3V; IOUT = 12A
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Ch1: Top FET
Ch2: Bottom FET
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SC1102/SC1102A
POWER MANAGEMENT
Typical Characteristics (Cont.)
Ch1: Vo_rpl
2. VIN = 5V; VOUT = 1.3V; IOUT = 12A
Ch1: Top FET
Ch2: Bottom FET
Error Amplifier, Gain and Phase
40
180
PIN Descriptions
35
135
30
20
90
15
Gain
10
45
Phase
Phase (deg)
Gain (dB)
25
5
0
0
-5
-10
100.0E+0
1.0E+3
10.0E+3
100.0E+3
1.0E+6
-45
10.0E+6
Frequency (Hz)
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SC1102/SC1102A
POWER MANAGEMENT
Typical Characteristics (Cont.)
Hiccup Mode
Ch1:
Ch2:
Ch3:
Ch4:
Vin
Vss
Top Gate
Vout
Vin = 5V
Vout = 3.3V
Vbst = 12V
Iout = S.C.
Start Up Mode
Ch1: Vin
Ch2: Vss
Ch3: Top Gate
Ch4: Vout
Vin = 5V
Vout = 3.3V
Iout = 2A
Vbst = 12V
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OVP
PWRGD
R1
C1
+5V
R2
C2
Vbias
R3
C3
11
D3
7
6
5
4
3
2
1
R4
PGND
DRVH
PHASE
OCSET
OVP
PWRGD
VCC
U1
DRVL
BSTL
BSTH
SENSE
VREF
SS/SHDN
GND
8
9
10
11
12
13
14
C16
VREF
C4
C17
SHDN
D5
D2
R18
R15
R17
R16
R5
C27
Q2
Q3
Q1
R7
C28
C13
C19
R19
C18
R11
R8
D4
L2
R12
C5
C26
Q4
C20
R10
R13
C6
D1
C21
R14
C15
C7
L1
C22
C23
C8
C9
C24
C10
C25
_
Vin
+
_
Vout
+
SC1102/SC1102A
POWER MANAGEMENT
Evaluation Board Schematic
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SC1102/SC1102A
POWER MANAGEMENT
Outline Drawing - S0IC - 14
A
2X
D
e
N
DIM
A
A1
A2
b
c
D
E1
E
e
h
L
L1
N
01
aaa
bbb
ccc
E/2
E1 E
ccc C 1
2X N/2 TIPS
2
3
B
D
DIMENSIONS
INCHES
MILLIMETERS
MIN NOM MAX MIN NOM MAX
1.35
1.75
0.25
0.10
1.65
1.25
0.31
0.51
0.25
0.17
8.55 8.65 8.75
3.80 3.90 4.00
6.00 BSC
1.27 BSC
0.25
0.50
0.40 0.72 1.04
(1.04)
14
0°
8°
0.10
0.25
0.20
.053
.069
.010
.004
.065
.049
.020
.012
.007
.010
.337 .341 .344
.150 .154 .157
.236 BSC
.050 BSC
.010
.020
.016 .028 .041
(.041)
14
0°
8°
.004
.010
.008
aaa C
h
A2 A
SEATING
PLANE
C
bxN
bbb
A1
h
H
C A-B D
c
GAGE
PLANE
0.25
SIDE VIEW
SEE DETAIL
L
(L1)
A
DETAIL
01
A
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS
OR GATE BURRS.
4. REFERENCE JEDEC STD MS-012, VARIATION AB.
Land Pattern - SOIC - 14
X
DIM
(C)
G
C
G
P
X
Y
Z
Z
Y
DIMENSIONS
INCHES
MILLIMETERS
(.205)
.118
.050
.024
.087
.291
(5.20)
3.00
1.27
0.60
2.20
7.40
P
NOTES:
1.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
2.
REFERENCE IPC-SM-782A, RLP NO. 302A.
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
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