SEMTECH SC1110TSTRT

SC1110
Sink and Source DC/DC Controller for
Termination Power Supply Applications
POWER MANAGEMENT
Description
Features
The SC1110 is a low-cost, full featured, synchronous
voltage-mode controller designed to generate
termination voltage in double data rate (DDR) memory
systems and other applications where wide data bus
need to be actively terminated. Synchronous control of
the MOSFET half bridge allows power flowing
bi-directionally. The termination voltage can be tightly
regulated to track the chipset voltage, i.e. to be exactly
50% of that at all times.
‹ Generates termination voltages for active termination schemes
‹ 1% set point accuracy
‹ For ±7A output current, transient regulation is
‹
‹
‹
The SC1110 is ideal for low cost implementation of
termination voltage supplies. SC1110 features include
temperature compensated voltage reference, triangle
wave oscillator and current sense comparator circuitry,
and allows the use of inexpensive N-channel power
MOSFETs.
‹
‹
‹
The SC1110 operates at a fixed 250kHz, providing an
optimum compromise between efficiency, transient
performance, external component size, and cost.
better than ±80mV
VREFIN pin available for external 50% resistive divider
to allow termination voltage track of the chip set
voltage
Buffered VREFOUT for system usage
RDSON sensing for over current protection in hiccup
mode
Soft start and logic input enabling
250kHz switching for best transient and efficiency
performance
Gate drive capable for 0.5A sourcing and sinking
Applications
‹ For DDR memory systems
‹ For active termination schemes in high speed logic
systems
Typical Application Circuit
+5Vcc
REFOUT
+
R1
5k
C1
0.01
R2
1.24k
C2
0.1
R3
10
U1
SC1110
1
VCC
2
R4
1k
REFOUT
14
SS/ENBL
REFIN
13
3
OCSET
SENSE
12
4
PWRGD
COMP
11
C7
1.0
C4
0.022
C8,9
2 x 10uF
C10,11
2 x 560uF
Vin 2.5V
_
SS/ENBL
C3
0.1
R5
1k
PWRGD
C25
0.1
5
R6
4.7k
C5
0.047
10
GND
BSTL
6
PHASE
BSTH
9
7
DL
DH
8
D1
MBRM120
R7
2.2
R8
2.2
Q1
Si9426DY
Q2
Si9426DY
C10-14: Sanyo, 4SP560M
C8,9,15-24: TDK, CC3216AX5R0J106K
L1: Panasonic, ETQP6F0R8L or Falco, QPIP1205-809-3
Q1,Q2 options: Si9426DY, FDS6890A, IRF7401
D1: ON Semi (Motorola)
Revision: July 20, 2004
1
C6
1.0
L1
800 nH
+
C12-14
3 x 560uF
C15-24
10 x 10uF
Vout = 1.25V @ 7A
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SC1110
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Absolute Maximum Ratings
Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified
in the Electrical Characteristics section is not implied.
Parameter
Symbol
Maximum
Units
VIN
-0.5 to 14
V
PGND to GND
+0.5
V
PHASE to GND
-0.3 to 18
V
BSTH to PHASE
14
V
VCC, BSTL to GND
Thermal Impedance Junction to Case
θJC
45
°C/W
Thermal Resistance Junction to Ambient
θJ A
115
°C/W
Operating Temperature Range
TA
0 to 70
°C
Storage Temperature Range
TSTG
-65 to +150
°C
Lead Temperature (Soldering) 10 Sec.
TLEAD
300
°C
ESD Rating (Human Body Model)
V ESD
2
kV
Electrical Characteristics
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; FB = VO; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC
Parameter
Conditions
Min
VCC
4.4
Typ
Max
Units
12.6
V
12
mA
Pow er Supply
Supply Voltage
Supply Current
Line Regulation
8
VO = 2.5V ± 0.5V, VO = VIN/2 @ 0A
0.5
%
Turn-On Threshold
4.15
V
Turn-Off Threshold
3.95
V
Transconductance
2
mS
Open Loop DC Gain
50
dB
500
kHz
± 250
µA
Under Voltage Lockout
Error Amplifier
Bandwidth - 3dB
(Unity gain crossover 70MHz)
COMP Source Capability
Input Bias
2
5
µA
275
kHz
Oscillator
Oscillator Frequency
225
250
Oscillator Max Duty Cycle
90
95
%
1
V
Ramp Height
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SC1110
POWER MANAGEMENT
Electrical Characteristics (Cont.)
Unless specified: VCC = 4.75V to 12.6V; GND = PGND = 0V; FB = VO; VBSTL = 12V; VBSTH-PHASE = 12V; TJ = 25oC
Parameter
Conditions
Min
Typ
Max
Units
Timing
Minimum Off-Time
Dead Time
200
ns
Guaranteed by characterization
80
ns
BSTH - DH = 4.5V, DH - PHASE = 3.0V
DH - PHASE = 1.5V
0.5
A
MOSFET Drivers
Peak DH Sink/Source Current
0.1
Peak DL Sink/Source Current
BSTL - DL = 4.5V, DL - GND = 3.0V
DL - GND = 1.5V
0.5
A
VOCSET = 2.2V
180
200
220
µA
Charge Current
VSS = 1.5V
8
10
12
µA
Discharge Current
VSS = 1.5V
1
2
3
µA
0.1
Protection
Overcurrent Set Isource
Soft Start
Pow er Good
Upper Threshold
112
%
Lower Threshold
88
%
PWRGD Voltage Low
IPWRGD = 2mA
0.5
V
Reference
REFOUT Source Current
Offset
3
REFIN = 1.25V
-5
mA
5
mV
0.65
V
Enable
Threshold
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0.55
3
0.60
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SC1110
POWER MANAGEMENT
Timing Diagrams
SIMULA
TION W
AVEF
ORMS
SIMULATION
WA
VEFORMS
2.5V and 1.25V ramp up
Output current of the VTT supply
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SC1110
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Pin Configuration
Ordering Information
Device
Package(1)(2)
Temp Range (TJ)
SC1110CSTRT
SO-14
0° to 125°C
SC1110TSTRT
TSSOP-14
(1)
Notes:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
(2) Lead free product.
(14 Pin SOIC or TSSOP)
Pin Descriptions
Pin #
Pin Name
Pin Function
1
VC C
2
SS/ENBL
3
OCSET
Current limit set point.
4
PWRGD
Logic high indicates correct output.
5
GND
6
PHASE
7
DL
Low side driver output.
8
DH
High side driver output.
9
BSTH
High side driver supply.
10
BSTL
Low side driver supply.
11
COMP
Error amplifier output, compensation.
12
SENSE
Error amplifier negative input.
13
REFIN
Error amplifier positive input.
14
REFOUT
Chip Supply Voltage.
Soft start/Enable.
Ground.
Phase node connection between MOSFETs.
Buffered reference voltage.
NOTE:
(1) All logic level inputs and outputs are open collector TTL compatible.
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Block Diagram
Applications Information
fier. When the oscillator output voltage drops below the
error amplifier output voltage, the comparator output
goes high. This pulls DL low, turning off the low-side FET,
and DH is pulled high, turning on the high-side FET (once
the cross-current control allows it). When the oscillator
voltage rises back above the error amplifier output voltage, the comparator output goes low. This pulls DH low,
turning off the high-side FET, and DL is pulled high, turning on the low-side FET (once the cross-current control
allows it).
THEORY OF OPERATION
Synchronous Buck Converter
VTERMINATION power is provided by a synchronous, voltagemode pulse width modulated (PWM) controller. This section has all the features required to build a high efficiency
synchronous buck converter for termination of power
application.
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier. The
external resistive divider generates reference voltage for
the error amplifier from the chipset voltage which is
usually 2.5V. The inverting input of the error amplifier
receives its voltage from the SENSE pin.
As SENSE increases, the output voltage of the error
amplifier decreases. This causes a reduction in the ontime of the high-side MOSFET connected to DH, hence
lowering the output voltage.
The internal oscillator uses an on-chip capacitor and
trimmed precision current sources to set the oscillation
frequency to 250kHz. The triangular output of the oscillator sets the reference voltage at the inverting input of
the PWM comparator. The non-inverting input of the comparator receives it’s input voltage from the error ampli 2004 Semtech Corp.
Under Voltage Lockout
The under voltage lockout circuit of the SC1110 assures
that both the high-side MOSFET driver outputs remain in
the off state whenever the supply voltage drops below
set parameters. Lockout occurs if VCC falls below 4.1V.
Normal operation resumes once VCC rises above 4.2V.
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SC1110
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Applications Information
synchronous switcher turns off and SS/ENABLE starts
to sink 2µA. When SS/ENABLE reaches 0.8V, it then
starts to source 10µA and a new cycle begins.
Soft Start
Initially, SS/ENABLE sources 10µA of current to charge
an external capacitor. The outputs of the error amplifiers
are clamped to a voltage proportional to the voltage on
SS/ENABLE. This limits the on-time of the high-side
MOSFETs, thus leading to a controlled ramp-up of the
output voltages.
Hiccup Mode
During power up, the SS/ENABLE pin is internally pulled
low until VCC reaches the undervoltage lockout level of
4.2V. Once VCC has reached 4.2V, the SS/ENABLE pin is
released and begins to source 10µA of current to the
external soft-start capacitor. As the soft-start voltage
rises, the output of the internal error amplifier is clamped
to this voltage. When the error signal reaches the level
of the internal triangular oscillator, which swings from 1V
to 2V at a fixed frequency of 250 kHz, switching occurs.
As the error signal crosses over the oscillator signal, the
duty cycle of the PWM signal continues to increase until
the output comes into regulation. If an over-current condition has not occurred the soft-start voltage will continue to rise and level off at about 2.2V.
RDS(ON) Current Limiting
The current limit threshold is set by connecting an external resistor from the VCC supply to OCSET. The voltage
drop across this resistor is due to the 200µA internal
sink sets the voltage at the pin. This voltage is compared
to the voltage at the PHASE node. This comparison is
made only when the high-side drive is high to avoid false
current limit triggering due to uncontributing measurements from the MOSFET’s off-voltage. When the voltage
at PHASE is less than the voltage at OCSET, an overcurrent
condition occurs and the soft start cycle is initiated. The
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Typical Characteristics
CH1: Vout_ripple
CH2: Phase node
Vin = 2.5V
Vout = 1.25V
Iout = 7A
95%
Efficiency
90%
85%
80%
75%
70%
65%
60%
0
1
2
3
4
5
6
7
8
9
8
9
10
11
12
Current, A
1.0%
Regulation
0.5%
0.0%
-0.5%
-1.0%
0
1
2
3
4
5
6
7
10
11
12
Current, A
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SC1110
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Evaluation Board
Top View
Bottom View
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SC1110
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Evaluation Board (Cont.)
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Top Copper
Bottom Copper
Midlayer 1
Midlayer 2
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SC1110
POWER MANAGEMENT
Outline Drawing - SO-14
Land Pattern - SO-14
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SC1110
POWER MANAGEMENT
Outline Drawing - TSSOP-14
Land Pattern - TSSOP-14
Contact Information
Semtech Corporation
Power Management Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805)498-2111 FAX (805)498-3804
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