PIC16(L)F1782/1783 Family Silicon Errata and Data Sheet Clarification

PIC16(L)F1782/1783
PIC16(L)F1782/1783 Family
Silicon Errata and Data Sheet Clarification
The PIC16(L)F1782/1783 family devices that you have
received conform functionally to the current Device
Data Sheet (DS41579D), except for the anomalies
described in this document.
For example, to identify the silicon revision level
using MPLAB IDE in conjunction with a hardware
debugger:
1.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
2.
3.
The errata described in this document will be addressed
in future revisions of the PIC16(L)F1782/1783 silicon.
4.
Note:
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 apply to the current silicon
revision (B4).
5.
Data Sheet clarifications and corrections start on page
10, following the discussion of silicon issues.
The silicon revision level can be identified using the
current version of MPLAB® IDE and Microchip’s
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
TABLE 1:
Using the appropriate interface, connect the
device to the hardware debugger.
Open an MPLAB IDE project.
Configure the MPLAB IDE project for the
appropriate device and hardware debugger.
Based on the version of MPLAB IDE you are
using, do one of the following:
a) For MPLAB IDE 8, select Programmer >
Reconnect.
b) For MPLAB X IDE, select Window >
Dashboard and click the Refresh Debug
Tool Status icon (
).
Depending on the development tool used, the
part number and Device Revision ID value
appear in the Output window.
Note:
If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
The DEVREV values for the various PIC16(L)F1782/
1783 silicon revisions are shown in Table 1.
SILICON DEVREV VALUES
DEVICE ID<13:0>(1),(2)
Part Number
DEV<8:0>
REV<4:0> Silicon Revision
B2
B4
PIC16F1782
01 0111 000
0 0110
0 1000
PIC16LF1782
01 0111 001
0 0110
0 1000
PIC16F1783
01 0110 010
0 0110
0 1000
PIC16LF1783
01 0111 010
0 0110
0 1000
Note 1:
2:
The Device ID is located in the configuration memory at address 8006h.
Refer to the “PIC16(L)F178X Memory Programming Specification” (DS41457) for detailed information on
Device and Revision IDs for your specific device.
 2012-2014 Microchip Technology Inc.
DS80000541D-page 1
PIC16(L)F1782/1783
TABLE 2:
SILICON ISSUE SUMMARY
Module
Feature
Item
Number
Affected Revisions(1)
Issue Summary
B2
B4
ADC
FOSC/2
1.1
FOSC/2 not functional.
X
ADC
Offset
1.2
Time between conversions affects
offset.
X
ADC
INL (12-bit mode)
1.3
INL is ±4 LSb.
X
ADC
FRC
1.4
ADC not functional if using FRC with
FOSC<2 MHz.
X
Op Amp
Offset
2.1
Offset increases when Common
mode <200 mV.
X
Comparator
Low-Power mode
3.1
Improper Low-Power mode
operation.
X
Comparator
Typical Offset
Performance
mode
3.2
Normal Speed mode.
X
Data EEPROM
Endurance
4.1
Limited to 10k cycles, VDD <2.3V,
PIC16LF1782/1783.
X
HF Internal Oscillator Clock Switching
5.1
Clock switching can cause a single
corrupted instruction.
X
PSMC
Rising Edge Input
6.1
Period and falling edge race
condition.
X
PSMC
Auto-shutdown
6.2
Failure to auto-restart after shutdown
from comparator.
X
Low-Dropout (LDO)
Voltage Regulator
Low-Power Sleep
7.1
Unexpected Resets may occur at
ambient temperatures below 0C.
X
X
FVR
FVR Module
8.1
Use of FVR module can cause
device to Reset.
X
X
PFM
PFM Self-Write
9.1
PFM self-write will not work
depending on clock selection.
Note 1:
X
X
X
Only those issues indicated in the last column apply to the current silicon revision.
DS80000541D-page 2
 2012-2014 Microchip Technology Inc.
PIC16(L)F1782/1783
Silicon Errata Issues
Note:
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (B4).
1. Module: ADC
1.1 Operation with FOSC/2
The ADC is not functional when the ADCS<2:0>
bits of ADCON1 select the FOSC/2 frequency.
Work around
Use the FRC selection which provides a valid TAD
time, regardless of the system clock frequency.
Affected Silicon Revisions
B2
B4
X
1.2 ADC Offset
The offset error exceeds the data sheet
specification when the time between conversions
is greater than 100 us.
Work around
The time dependent error is insignificant when the
time between conversions is less than 100 us.
When the time between conversions is greater
than 100 us, take two back-to-back ADC
conversions and discard the results of the first
conversion.
Affected Silicon Revisions
B2
B4
X
 2012-2014 Microchip Technology Inc.
DS80000541D-page 3
PIC16(L)F1782/1783
1.3 ADC INL (12-bit mode)
The ADC linearity is ±4 LSb for the 12-bit mode.
Below are typical INL graphs in 12-bit mode (See
Figure 1 and Figure 2).
Work around
None.
Affected Silicon Revisions
B2
B4
X
FIGURE 1:
ADC 12-BIT MODE, SINGLE-ENDED INL, VDD = 3.0V, TAD = 4 us, 25°C,
TYPICAL MEASURED VALUES
0.5
0.0
INL (LSB)
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
0
512
1024
1536
2048
2560
3072
3584
4096
Output Code
FIGURE 2:
ADC 12-BIT MODE, SINGLE-ENDED INL, VDD = 5.5V, TAD = 4 us, 25°C,
TYPICAL MEASURED VALUES
0.5
0.0
-0.5
INL (LSB)
-1.0
-1.5
-2.0
-2.5
-3.0
-3.5
-4.0
-4.5
0
512
1024
1536
2048
2560
3072
3584
4096
Output Code
DS80000541D-page 4
 2012-2014 Microchip Technology Inc.
PIC16(L)F1782/1783
1.4 Incorrect Readings if using FOSC<2 MHz
The ADC is not functional if using FRC with FOSC
frequencies less than 2 MHz.
Work around
Use frequencies greater than 2 MHz for correct
ADC functionality.
Affected Silicon Revisions
B2
B4
X
2. Module: Op Amp
2.1 Offset at Low Common Mode
The op amp offset at Common mode input
voltages below 200 mV increases with respect to
temperature. Below are typical graphs showing
the increase in offset (See Figure 3, Figure 4 and
Figure 5).
Work around
None.
Affected Silicon Revisions
B2
B4
X
FIGURE 3:
OP AMP TYPICAL OFFSET VOLTAGE AT 25°C,
HIGH GBWP MODE (OPAxSP = 1), VDD = 3.6V, 0V CMV 5.5V
20
Offset Voltage (mV)
15
10
5
0
-5
-10
0
0.5
1
1.5
2
2.5
3
3.5
4
COMMON MODE VOLTAGE (V)
 2012-2014 Microchip Technology Inc.
DS80000541D-page 5
PIC16(L)F1782/1783
FIGURE 4:
OP AMP TYPICAL OFFSET VOLTAGE AT LOW VCM, 85°C,
HIGH GBWP MODE (OPAxSP = 1), VDD = 3.6V, 0V CMV 0.5V
20
Offset Voltage (mV)
0
-20
-40
-60
-80
-100
0
0.1
0.2
0.3
0.4
0.5
COMMON MODE VOLTAGE (V)
FIGURE 5:
OP AMP TYPICAL OFFSET VOLTAGE AT 85°C,
HIGH GBWP MODE (OPAxSP = 1), VDD = 3.6V, 0.5V CMV 3.5V
10
8
Offset Voltage (mV)
6
4
2
0
-2
-4
-6
-8
-10
0.5
1
1.5
2
2.5
3
3.5
COMMON MODE VOLTAGE (V)
DS80000541D-page 6
 2012-2014 Microchip Technology Inc.
PIC16(L)F1782/1783
3. Module: Comparator
3.2 Typical Offset Performance
CMRR performance for the range of VSS + 1V to
VDD - 1V is better than specified in the data
sheet.
3.1 No Low-Power, No Low-Speed Mode
The comparator operation in Low-Power, LowSpeed mode (CxSP = 0) may not perform properly.
Work around
Work around
See Figure 6 and Figure 7.
Use the comparator in High Power mode.
Affected Silicon Revisions
Affected Silicon Revisions
B2
B4
X
X
FIGURE 6:
B2
B4
X
COMPARATOR INPUT OFFSET, TYPICAL MEASURED VALUES,
NORMAL SPEED MODE (CxSP = 1), VDD = 5.5V, PIC16F1782/1783 ONLY
20
15
10
Measured Max
Offset Voltage (mV)
5
0
-5
Measured Min
-10
-15
-20
-25
-30
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Common Mode Voltage (V)
 2012-2014 Microchip Technology Inc.
DS80000541D-page 7
PIC16(L)F1782/1783
FIGURE 7:
COMPARATOR INPUT OFFSET, TYPICAL MEASURED VALUES,
NORMAL SPEED MODE (CxSP = 1), VDD = 3.2V
20
15
Measured Max
Offset Voltage (mV)
10
5
0
-5
Measured Min
-10
-15
-20
-25
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Common Mode Voltage (V)
4. Module: Data EEPROM
5. Module: HF Internal Oscillator
4.1 Endurance of the Data EEPROM is 10k
5.1 Clock Switching
The write/erase endurance of the data EE memory
is limited to 10k cycles when VDD <2.3V. This
errata applies to the PIC16LF1782/1783 only.
Work around
Use an error correction method that stores data in
multiple locations.
Affected Silicon Revisions
B2
B4
X
When switching clock sources between INTOSC
clock source and an external clock source, one
corrupted instruction may be executed after the
switch occurs.
This issue affects Two-Speed Start-up operation.
Work around
When switching from an external oscillator clock
source, first switch to 16 MHz HFINTOSC. Once
running at 16 MHz HFINTOSC, configure IRCF to
run at desired internal oscillator frequency.
When switching from an internal oscillator
(INTOSC) to an external oscillator clock source,
first switch to HFINTOSC High-Power mode (8
MHz or 16 MHz). Once running from HFINTOSC,
switch to the external oscillator clock source.
Affected Silicon Revisions
B2
B4
X
DS80000541D-page 8
 2012-2014 Microchip Technology Inc.
PIC16(L)F1782/1783
6. Module: PSMC
Work around
6.1 Rising Edge Inhibit
For applications that operate at ambient
temperatures below 0C, use the LDO voltage
regulator in Normal-Power mode (VREGPM = 0).
When the period and falling edge sources are from
the same asynchronous input, then a race
condition may occur where the period is detected
before the falling edge. When this occurs, then the
falling edge properly terminates the cycle but
subsequent rising edge inputs are ignored.
Work around
To configure the PSMC for fixed off-time and
variable frequency, set the following:
• Period = Asynchronous feedback
• Rising Event = Synchronous @
PSMCxPH = 0
• Falling Event = Synchronous @
PSMCxDC = Off Time
• Output inverted so drive time is from falling
event to period event.
Affected Silicon Revisions
B2
B4
X
X
Affected Silicon Revisions
B2
B4
X
X
8. Module: FVR
8.1 FVR Module
When using the FVR module, if the gain amplifier
outputs are set via the CDAFVR or ADFVR bits in
FVRCON while the module is disabled (FVREN =
0), the internal oscillator frequency may shift,
device current consumption can increase, and a
Brown-out Reset may occur. Additionally, after the
FVREN is enabled, a switch from 4x to 1x can also
cause a Reset.
Work around
6.2 Auto-Restart
When auto-shutdown is configured for auto-restart
and the shutdown source is a comparator, then
auto-restart may fail to occur after the shutdown
condition ceases.
Set the FVREN bit of FVRCON to enable the
module prior to adjusting the amplifier output
selections with the CDAFVR and ADFVR bits.
Always set the amplifier output selections to off
(‘00’) before disabling the FVR module.
When switching from 4x to 1x, first switch from 4x
to 2x and then from 2x to 1x.
Affected Silicon Revisions
Work around
Enable the zero-latency filter of the comparator
used for auto-shutdown.
B2
B4
X
X
Affected Silicon Revisions
B2
9. Module: PFM Self-Writes
B4
9.1 PFM
X
7. Module: Low-Dropout (LDO) Voltage
Regulator
7.1 Low-Power Sleep mode
temperatures below 0C
at
ambient
Under the following conditions:
• ambient temperatures below 0C
• while in Sleep mode
• VREGCON configured for Low-Power Sleep
mode (VREGPM = 1)
On very rare occasions, the LDO voltage will drop
below the minimum VDD, causing unexpected
device Resets.
 2012-2014 Microchip Technology Inc.
Writes to the PFM will not execute if the device’s
clock source is HS, ECH, or the Internal oscillator
is at either 8 MHz or 16 MHz. The DFM is
unaffected.
Work around
To write to the PFM, the clock source must be one
of the following settings: Internal oscillator set to 4
MHz or lower, ECM, ECL, XT, External RC, LP or
T1OSC.
Affected Silicon Revisions
B2
B4
X
DS80000541D-page 9
PIC16(L)F1782/1783
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS41579D):
Note:
Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
None.
DS80000541D-page 10
 2012-2014 Microchip Technology Inc.
PIC16(L)F1782/1783
APPENDIX A:
DOCUMENT
REVISION HISTORY
Rev A Document (03/2012)
Initial release of this document.
Rev B Document (07/2012)
Added MPLAB X IDE; Added Silicon Revision B4;
Updated Module 6.1; Added Modules 6.2, 7, 8 and 9.
Rev C Document (09/2012)
Removed Silicon Revision B4 from Module 4, Data
EEPROM.
Rev D Document (05/2014)
Added Module 1.4; Other minor corrections.
 2012-2014 Microchip Technology Inc.
DS80000541D-page 11
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2012-2014, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-63276-209-2
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS80000541D-page 12
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
 2012-2014 Microchip Technology Inc.
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2943-5100
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Austin, TX
Tel: 512-257-3370
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Novi, MI
Tel: 248-848-4000
Houston, TX
Tel: 281-894-5983
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
New York, NY
Tel: 631-435-6000
San Jose, CA
Tel: 408-735-9110
Canada - Toronto
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
China - Hangzhou
Tel: 86-571-8792-8115
Fax: 86-571-8792-8116
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
India - Pune
Tel: 91-20-3019-1500
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany - Dusseldorf
Tel: 49-2129-3766400
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Pforzheim
Tel: 49-7231-424750
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Italy - Venice
Tel: 39-049-7625286
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Poland - Warsaw
Tel: 48-22-3325737
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
Taiwan - Kaohsiung
Tel: 886-7-213-7830
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
 2012-2014 Microchip Technology Inc.
03/25/14
DS80000541D-page 13