PIC16F785/HV785 PIC16F785/HV785 Silicon Errata and Data Sheet Clarification The PIC16F785/HV785 device that you have received conform functionally to the current Device Data Sheet (DS41249E), except for the anomalies described in this document. The silicon issues discussed in the following pages are for silicon revisions with the Device and Revision IDs listed in Table 1. The silicon issues are summarized in Table 2. The errata described in this document will be addressed in future revisions of the PIC16F785/HV785. Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated in the last column of Table 2 apply to the current silicon revision. Data Sheet clarifications and corrections start on page 5, following the discussion of silicon issues. The silicon revision level can be identified using the current version of MPLAB® IDE and Microchip’s programmers, debuggers, and emulation tools, which are available at the Microchip corporate web site (www.microchip.com). TABLE 1: For example, to identify the silicon revision level using MPLAB IDE in conjunction with MPLAB ICD 2 or PICkit™ 3: 1. 2. 3. 4. Using the appropriate interface, connect the device to the MPLAB ICD 2 programmer/ debugger or PICkit™ 3. From the main menu in MPLAB IDE, select Configure>Select Device, and then select the target part number in the dialog box. Select the MPLAB hardware tool (Debugger>Select Tool). Perform a “Connect” operation to the device (Debugger>Connect). Depending on the development tool used, the part number and Device Revision ID value appear in the Output window. Note: If you are unable to extract the silicon revision level, please contact your local Microchip sales office for assistance. The DEVREV values for the various PIC16F785/HV785 silicon revisions are shown in Table 1. SILICON DEVREV VALUES Part Number Device ID(1) Revision ID for Silicon Revision(2) A2 A3 PIC16F785 01 0010 001x xxxx 2 3 PIC16HV785 01 0010 000x xxxx 2 3 Note 1: 2: The Device IDs (DEVID and DEVREV) are located at the last two implemented addresses of configuration memory space. They are shown in hexadecimal in the format “DEVID DEVREV”. Refer to the “PIC16F785/HV785 Memory Programming Specification” (DS41237) for detailed information on Device and Revision IDs for your specific device. © 2009 Microchip Technology Inc. DS80234E-page 1 PIC16F785/HV785 TABLE 2: SILICON ISSUE SUMMARY PIC16F785/HV785 Module Feature Item Number Issue Summary Affected Revisions(1) A2 A3 Two-Phase PWM Complementary Mode 1. Complementary Mode X X Two-Phase PWM Two-Phase PWM 2. PWM may freeze on shut-down X X Capture/Compare/PWM Capture 3. First capture may happen early X X Capture/Compare/PWM I/O 4. Pin RC5 reads low X X Note 1: Only those issues indicated in the last column apply to the current silicon revision. DS80234E-page 2 © 2009 Microchip Technology Inc. PIC16F785/HV785 Silicon Errata Issues Note: This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated by the shaded column in the following tables apply to the current silicon revision (A4). 1. Module: Two-Phase PWM (Complementary Mode) The Complementary mode is not supported due to the nature and extent of the Complementary mode anomalies. Complementary mode should be used for evaluation purposes only. 1. Duty cycle by comparator feedback (COMOD = X1) is not supported. 2. When the duty cycle is determined by the difference between the PH1 and PH2 phase delays (CMOD = 10), both outputs can sometimes hang low if the duty cycle is less than 20 ns or greater than the phase switching dead time. The hang condition can only be cleared by setting the dead time to zero. 3. Maximum phase switching dead time is limited by the PWM clock frequency (pwm_clock). At a pwm_clock frequency of 20 MHz, the maximum dead time is about 35 ns. At a pwm_clock frequency of 10 MHz, the maximum dead time is about 80 ns. The relationship between maximum dead time and pwm_clock frequency is approximately linear. 4. The shutdown condition will correctly force PH1 false (low output at PH1 flop before the inverting XOR gate). PH2 will be incorrectly forced true (high output at PH2 flop before inverting XOR gate). 5. If the dead time is not zero and PWMPH1<4:0> = PWMPH2<4:0> then both phase outputs will be driven false (PH1 and PH2 low before inverting XOR gate). If the dead time is zero and PWMPH1<4:0> = PWMPH2<4:0>, then phase 1 will be driven true (PH2 high) for all but one pwm_clock cycles every PWM period. 2. Module: Two-Phase PWM (Two-Phase Mode) 1. If the PWMASE bit is set when the PASEN bit is cleared, then the PWMASE bit will be stuck high and the PWM will be frozen in shutdown. Shutdown can only be cleared by first setting the PASEN bit high then clearing the shutdown condition (RA2/INT input must be high) so the PWMASE bit can be cleared. 2. In normal two-phase operation when the output is inverted, the leading edge is delayed by about 10 ns and the trailing edge occurs about 7 ns early. When the phase delay is set to maximum, the leading edge is delayed about 8 ns. The net result of these two phenomena is that at 20 MHz FOSC, a blanked inverted output at maximum phase delay will not be generated. Work around None. Affected Silicon Revisions A2 A3 X X 3. Module: Capture/Compare/PWM (CCP) The first capture will occur one edge too early if the RC5/CCP1 input is high when selecting the CCP mode to capture either every 4th edge (CCP1CON<3:0> = 0110) or every 16th edge (CCP1CON<3:0> = 0111). Subsequent captures will occur properly. Work around None. Affected Silicon Revisions A2 A3 X X Work around None. Affected Silicon Revisions A2 A3 X X © 2009 Microchip Technology Inc. DS80234E-page 3 PIC16F785/HV785 4. Module: Capture/Compare/PWM (CCP) Reading bit 5 of PORTC (RC5/CCP1) always returns a ‘0’ when the CCP module is configured for any of the four capture modes (CCP1CON<3:0> = 01XX). This condition is true when the RC5/CCP1 pin is configured as either an input (TRISC<5> = 1) or output (TRISC<5> = 0). When configured as an output, the ability to set the RC5/CCP1 pin high or low works normally although reading the pin status always returns ‘0’. Work around None. Affected Silicon Revisions A2 A3 X X DS80234E-page 4 © 2009 Microchip Technology Inc. PIC16F785/HV785 Data Sheet Clarifications The following typographic corrections and clarifications are to be noted for the latest version of the device data sheet (DS41249E): Note: Corrections are shown in bold. Where possible, the original bold text formatting has been removed for clarity. 1. Module: Electrical Characteristics Corrections to Table 19-15, Param. No. A20/A20A. TABLE 19-15: PIC16F785/HV785 A/D CONVERTER CHARACTERISTICS: Param No. A01 Sym. Characteristic Min. Typ† Max. Units bit NR Resolution — — 10 bits Conditions A03 EIL Integral Error — — ±1 LSb VREF = 5.0V (external) A04 EDL Differential Error — — ±1 LSb No missing codes to 10 bits VREF = 5.0V (external) A06 EOFF Offset Error A07 EGN A20 — — ±1 LSb VREF = 5.0V (external) Gain Error — — ±1 LSb VREF = 5.0V (external) VREF Reference Voltage 2.2(4) — VDD V 2.5 — VDD V VSS — VREF(5) V A20A A25 VAIN Analog Input Voltage A30 ZAIN Recommended Impedance of Analog Voltage Source — — 10 kΩ A50 IREF VREF Input Current*(3) 10 — 1000 μA — — 50 μA Absolute minimum to ensure 1 LSB accuracy. During VAIN acquisition. Based on differential of VHOLD to VAIN. Transient during A/D conversion cycle. * These parameters are characterized but not tested. † Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Total Absolute Error includes Integral, Differential, Offset and Gain Errors. 2: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes. 3: VREF current is from external VREF or VDD pin, whichever is selected as reference input. 4: Only limited when VDD is at or below 2.5V. If VDD is above 2.5V, VREF is allowed to go as low as 1.0V. 5: Analog input voltages are allowed up to VDD, however the conversion accuracy is limited to VSS to VREF. © 2009 Microchip Technology Inc. DS80234E-page 5 PIC16F785/HV785 2. Module: A/D Converter Corrections to Equation 12-1. EQUATION 12-1: Assumptions: ACQUISITION TIME EXAMPLE Temperature = 50°C and external impedance of 10k Ω 5.0V V DD T ACQ = Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient = T AMP + Tc + T COFF = 5µs + Tc + [ ( Temperature - 25°C ) ( 0.05µs/°C ) ] The value for Tc can be approximated with the following equations: 1 V AP P LIED ⎛⎝ 1 – ------------⎞⎠ = V C HOLD 2047 ;[1] Vchold charged to within 1/2 lsb –T C ----------⎞ ⎛ RC V A PP LIED ⎜ 1 – e ⎟ = V CHOLD ⎝ ⎠ ;[2] Vchold charge response to Vapplied – Tc ---------⎞ ⎛ RC 1 V A PP LIE D ⎜ 1 – e ⎟ = V AP P LI ED ⎛⎝ 1 – ------------⎞⎠ 2047 ⎝ ⎠ ;Combining [1] and [2] Solving for Tc: T c = – C HOLD ( Ric + Rss + Rs ) ln(1/2047) = – 12pF ( 1k Ω + 7k Ω + 10k Ω ) ln(0.0004885) = 1.64 µs Therefore: Tacq = 5µs + 1.64µs + [ ( 50°C- 25°C ) ( 0.05µs/°C ) ] = DS80234E-page 6 7.89 µs © 2009 Microchip Technology Inc. PIC16F785/HV785 3. Module: A/D Converter Corrections to Figure 12-4. FIGURE 12-4: ANALOG INPUT MODEL VDD RS ANx CPIN 5 pF VA VT = 0.6V VT = 0.6V RIC ≤ 1k Sampling Switch SS RSS CHOLD = DAC capacitance = 12 pF ILEAKAGE ± 500 nA VSS 6V 5V VDD 4V 3V 2V Legend: CPIN = VT = I LEAKAGE = RIC = SS = CHOLD = Input Capacitance Threshold Voltage Leakage current at the pin due to various junctions Interconnect Resistance Sampling Switch Sample/Hold Capacitance (from DAC) © 2009 Microchip Technology Inc. RSS 5 6 7 8 9 10 11 Sampling Switch (kΩ) DS80234E-page 7 PIC16F785/HV785 APPENDIX A: DOCUMENT REVISION HISTORY Rev A Document (7/2007) First release of document. Added Module 1, “TwoPhase PWM” and Module 2, “Two-Phase Mode”. Rev B Document (5/2005) Added item #5 and #6 to Module 1, “Two-Phase PWM (Complementary mode)”. Rev C Document (7/2005) Clarifications/Corrections to the Data Sheet: Added Module 1, New 4x4 QFN Package added. Rev D Document (12/2005) Added Modules 3 and 4, “Capture/Compare/PWM (CCP)”. Rev E Document (08/2009) Updated document to new format. Updated Table 1 and Table 2. Data Sheet Clarifications: Deleted Module 1: New 4x4 QFN Package; Added Module 1: Electrical Characteristics (Table 19-15); Added Module 2: A/D Converter (Equation 12-1); Added Module 3: A/D Converter (Figure 12-4). DS80234E-page 8 © 2009 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2009, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2009 Microchip Technology Inc. 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