NCS2554 Four-Channel Video Driver with SD Reconstruction Filters The NCS2554 is a 4−channel high speed video driver with 6th order Butterworth Reconstruction filters on each channel. A first set of 3−channel has Standard Definition (SD) filters, one per channel. A fourth channel offers an extra filter driver for driving Cvbs−type video signal. The NCS2554 is in fact a combination of a triple SD video driver for YPbPr plus a single Cvbs video driver. It is designed to be compatible with Digital−to−Analog Converters (DAC) embedded in most video processors. To further reduce power consumption, 2 enable pins are provided one for the triple driver and another one for the single driver. All channels can accept DC− or AC−coupled signals. In case of AC−coupled inputs, the internal clamps are enabled. The outputs can drive both AC and DC coupled 150 W loads. Features • 4−Channel with per Channel a Selectable Sixth−Order Butterworth • • • • • • • • • • • 8 MHz Filter Transparent Clamp Internal Fixed Gain: 6 dB $0.2 Integrated Level Shifter AC− or DC−Coupled Inputs and Outputs Low Quiescent Current Shutdown Current 42 mA Typical (Disabled) Each channel Capable to Drive 2 by 150 W Loads Wide Operating Supply Voltage Range: +4.7 V to +5.3 V Robust ESD protection 8 kV TSSOP−14 Package This is a Pb−Free Device 14 14 1 TSSOP−14 TBD SUFFIX CASE 948G 1 NCS 2554 ALYWG G NCS2554 = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package CVBS_IN 1 14 CVBS_OUT CVBS_EN 2 13 GND VCC 3 12 GND NC 4 11 SD_EN SD_IN1 5 10 SD_OUT1 SD_IN2 6 9 SD_OUT2 SD_IN3 7 8 SD_OUT3 (Top View) ORDERING INFORMATION Device • Set Top Box Decoder • DVD Player / Recorder • SDTV January, 2010 − Rev. 1 MARKING DIAGRAM PINOUT Typical Application © Semiconductor Components Industries, LLC, 2010 http://onsemi.com NCS2554DTBR2G Package Shipping† TSSOP−14 (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 1 Publication Order Number: NCS2554/D NCS2554 CVBS_IN 1 6dB Transparent Clamp 14 CVBS_OUT 13 GND 12 GND 11 SD_EN 6dB 10 SD_OUT1 6dB 9 SD_OUT2 6dB 8 SD_OUT3 6th Order, 8 MHz Filter CVBS_EN 2 250 kW GND VCC 3 NC 4 SD_IN1 5 250 kW Transparent Clamp 6th Order, 8 MHz Filter SD_IN2 6 Transparent Clamp 6th Order, 8 MHz Filter SD_IN3 7 Transparent Clamp 6th Order, 8 MHz Filter Figure 1. NCS2554 Block Diagram http://onsemi.com 2 NCS2554 PIN DESCRIPTION Pin No. Name Type 1 CVBS_IN Input Video Input for Video Signal featuring a frequency bandwidth compatible with NTSC / PAL / SECAM Video (8 MHz) − Cvbs Channel Description 2 CVBS_EN Input Cvbs Channel Enable /Disable Function: Low = Enable, High = Disable. When left open the default state is Enable. 3 VCC Power 4 NC Input Not Connected 5 SD_IN1 Input Selectable SD Video Input 1 − SD Channel 1 6 SD_IN2 Input Selectable SD Video Input 2 − SD Channel 2 7 SD_IN3 Input Selectable SD Video Input 3 − SD Channel 3 8 SD_OUT3 Output SD Video Output 3 − SD Channel 3 9 SD_OUT2 Output SD Video Output 2 − SD Channel 2 10 SD_OUT1 Output SD Video Output 1 − SD Channel 1 11 SD_EN Input 12 GND Ground Ground 13 GND Ground Ground 14 CVBS_OUT Output Cvbs Video Output – Cvbs Channel Power Supply / 4.7 V to 5.3 V SD Channel Enable/Disable Function: Low = Enable, High = Disable. When left open the default state is Enable. ATTRIBUTES Characteristic Value Moisture Sensitivity (Note 1) Flammability Rating Level 1 Oxygen Index: 28 to 34 1. For additional information, see Application Note AND8003/D http://onsemi.com 3 UL 94 V−0 @ 0.125 in. NCS2554 MAXIMUM RATINGS Rating Symbol Value Unit VCC −0.3 v VCC v 5.5 Vdc Input Voltage Range VI −0.3 v VI v VCC Vdc Input Differential Voltage Range VID −0.3 v VI v VCC Vdc Power Supply Voltages Output Current (Indefinitely) per Channel IO 40 mA Maximum Junction Temperature (Note 2) TJ 150 °C Operating Ambient Temperature TA −40 to +85 °C Storage Temperature Range Tstg −60 to +150 °C Thermal Resistance, Junction−to−Air RqJA 125 °C/W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded. 1800 The maximum power that can be safely dissipated is limited by the associated rise in junction temperature. For the plastic packages, the maximum safe junction temperature is 150°C. If the maximum is exceeded momentarily, proper circuit operation will be restored as soon as the die temperature is reduced. Leaving the device in the “overheated” condition for an extended period can result in device burnout. To ensure proper operation, it is important to observe the derating curves. 1600 POWER DISSIPATION (mV) Maximum Power Dissipation 1400 1200 1000 800 600 400 200 0 −40 −30−20−10 0 10 20 30 40 50 60 70 80 90100 TEMPERATURE (°C) Figure 2. Power Dissipation vs Temperature http://onsemi.com 4 NCS2554 DC ELECTRICAL CHARACTERISTICS (VCC = +5.0 V, Rsource = 37.5 W, TA = 25°C, inputs AC−coupled with 0.1 mF, all outputs AC−coupled with 220 mF into 150 W referenced to 400 kHz; unless otherwise specified) Symbol Characteristics Conditions Min Typ Max Unit 4.7 5.0 5.3 V 40 55 mA 42 60 mA GND 1.4 VPP POWER SUPPLY VCC Supply Voltage Range ICC Supply Current ISD Shutdown Current (CVBS_EN and SD_EN High) SD Channels Selected + Cvbs DC PERFORMANCE Vi Input Common Mode Voltage Range VIL Input Low Level for the Control Pins (2, 11) 0 0.8 V VIH Input High Level for the Control Pins (2, 11) 2.4 VCC V Rpd Pulldown Resistors on Pins CVBS_EN and SD_EN 250 kW OUTPUT CHARACTERISTICS VOH Output Voltage High Level 2.8 V VOL Output Voltage Low Level 200 mV IO Output Current 40 mA AC ELECTRICAL CHARACTERISTICS FOR STANDARD DEFINITION CHANNELS (pin numbers (1, 14) (5, 10), (6, 9), (7, 8)) (VCC = +5.0 V, Vin = 1 VPP, Rsource = 37.5 W, TA = 25°C, inputs AC−coupled with 0.1 mF, all outputs AC−coupled with 220 mF into 150 W referenced to 400 kHz; unless otherwise specified) Symbol Characteristics Conditions Vin = 1 V − All SD Channels Min Typ Max 5.8 6.0 6.2 Unit AVSD Voltage Gain BWSD Low Pass Filter Bandwidth (Note 4) ARSD Stop−band Attenuation (Notes 4 and 5) dGSD Differential Gain Error dFSD Differential Phase Error 0.7 ° THD Total Harmonic Distortion Vout = 1.4 VPP @ 3.58 MHz 0.35 % XSD Channel−to−Channel Crosstalk @ 1 MHz and Vin = 1.4 VPP −57 dB SNRSD Signal−to−Noise Ratio NTC−7 Test Signal, 100 kHz to 4.2 MHz (Note 3) 72 dB DtSD Propagation Delay @ 4.5 MHz 70 ns DGDSD Group Delay Variation 100 kHz to 8 MHz 20 ns −1 dB −3 dB 5.5 6.5 7.2 8.0 @ 27 MHz 43 50 dB 0.7 % 3. SNR = 20 x log (714 mV / RMS noise) 4. 100% of Tested ICs fit the bandwidth and attenuation tolerance at 25°C. 5. Guaranteed by characterization. http://onsemi.com 5 dB MHz NCS2554 TYPICAL CHARACTERISTICS 30 0.4 20 0.35 10 0.3 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) VCC = +5.0 V, Vin = 1 VPP, Rsource = 37.5 W, TA = 25°C, Inputs AC−coupled with 0.1 mF, All Outputs AC−coupled with 220 mF into 150 W Referenced to 400 kHz; unless otherwise specified 0 −10 −20 −30 −1 dB @ 6.7 MHz −3 dB @ 8.1 MHz −53 dB @ 27 MHz −40 −50 1M 10M 0.2 0.15 0.1 0.5 0 −0.1 100k 100M 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 3. SD Normalized Frequency Response Figure 4. SD Passband Flatness −40 30 −45 20 −51.8 dB @ 6.85 MHz −50 GROUP DELAY (ns) 10 −55 GAIN (dB) 0.25 −0.5 −60 −70 100k 0.226 dB @ 3.6 MHz −60 −65 −70 −79 dB @ 50 kHz −75 −80 0 −10 −20 20.7 ns @ 7 MHz −30 −40 −50 −60 −85 −90 20k 100k 1M −70 400k 10M 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 5. SD Channel−to−Channel Crosstalk Figure 6. SD Normalized Group Delay Output Input Output 70 ns 200 mV Input 0.7 VPP Figure 7. SD Propagation Delay Figure 8. SD Small Signal Response http://onsemi.com 6 20M NCS2554 TYPICAL CHARACTERISTICS VCC = +5.0 V, Vin = 1 VPP, Rsource = 37.5 W, TA = 25°C, Inputs AC−coupled with 0.1 mF, All Outputs AC−coupled with 220 mF into 150 W Referenced to 400 kHz; unless otherwise specified 0 −10 Output Input −20 PSRR (dB) −30 −40 −50 −60 −70 1 VPP −80 −90 −100 20 1M FREQUENCY (Hz) 50M Figure 10. SD VCC PSRR vs. Frequency 20 60 10 50 0 40 −10 30 −20 20 −30 10 −40 0 −50 −10 −60 −20 −70 −30 −80 400k 10M 1M (Hz) NORMALIZED GROUP DELAY (ns) NORMALIZED GAIN (dB) Figure 9. SD Large Signal Response 100k −40 50M 10M Figure 11. SD Frequency Response and Group Delay 0.9 0.9 0.75 0.76 0.68 0.7 0.6 0.5 0..4 0.31 0.3 0.8 DIFFERENTIAL PHASE (°) DIFFERENTIAL GAIN (%) 0.8 0.77 0.2 0.1 0 0.75 0.7 0.65 0.6 0.5 0..4 0.36 0.3 0.2 0.14 0.07 0.1 0 1 2 3 4 5 0 6 1 2 3 4 5 HARMONIC HARMONIC Figure 12. SD Differential Gain Figure 13. SD Differential Phase http://onsemi.com 7 6 NCS2554 APPLICATIONS INFORMATION employed shifting up the output voltage by adding an offset The NCS2554 quad video driver has been optimized for of 200 mV. This prevents sync pulse clipping and allows Standard video applications covering the requirements of the standards Composite video (Cvbs), S−Video, DC−coupled output to the 150 W video load. In addition, the Component Video (480i/525i, 576i/625i) and related NCS2554 integrates a 6th order Butterworth filter for each. (RGB). The three SD channels have 8 MHz filters for This allows rejection of the aliases or unwanted covering standard definition−like video applications. over-sampling effects produced by the video DAC. In the regular mode of operation each channel provides an Similarly for the case of DVD recorders which use an ADC, internal voltage−to−voltage gain of 2 from input to output. this anti−aliasing filter (reconstruction filter) will avoid This effectively reduces the number of external components picture quality issue and will aide filtration of parasitic required as compared to discrete approached implemented signals caused by EMI interference. with stand alone op amps. An internal level shifter is +5V 10 mF 0.1 mF 1 Rs 2 CVBS EN Video Processor 3 4 0.1 mF Y/G Pb / B Pr / R Rs Rs Rs 0.1 mF 0.1 mF 5 6 7 CVBS_IN CVBS_OUT CVBS_EN GND VCC GND NC SD_IN1 SD_IN2 SD_IN3 14 75 W 220 mF 75 W Cable 75 W CVBS 13 12 NCS2554 0.1 mF CVBS SD_EN 11 SD_OUT1 10 SD_OUT2 SD_OUT3 9 8 75 W 220 mF 75 W Cable 75 W 220 mF 75 W Cable 75 W 75 W 220 mF 75 W Cable 75 W TV Y/G Pb / B Pr / R 75 W SD_EN Figure 14. AC−Coupled Configuration at the Input and Output some cases it may be necessary to increase the nominal 220 mF capacitor value. A built−in diode−like clamp is used into the chip for each channel to support the AC−coupled mode of operation. The clamp is active when the input signal goes below 0 V. The built−in clamp and level shifter allow the device to operate in different configuration modes depending on the DAC output signal level and the input common mode voltage of the video driver. When the configuration is DC−Coupled at the Inputs and Outputs the 0.1 mF and 220 mF coupling capacitors are no longer used, and the clamps are in that case inactive; this configuration provides a low cost solution which can be implemented with few external components (Figure 15). The input is AC−coupled when either the input−signal amplitude goes over the range 0 V to 1.4 V or the video source requires such a coupling. In some circumstances it may be necessary to auto−bias signals with the addition of a pullup and pulldown resistors or only pullup resistor (Typical 7.5 MW combined with the internal 800 kW pulldown) making the clamp inactive. The output AC−coupling configuration is advantageous for eliminating DC ground loop with the drawback of making the device more sensitive to video line or field tilt issues in the case of a too low output coupling capacitor. In Shutdown Mode If the enable pins are left open by default the circuit will be enabled. The Enable pin offers a shutdown function, so the NCS2554 can consequently be disabled when not used. The NCS2554’s quiescent current reduces to 42 mA typical during shutdown mode. DC−Coupled Output The outputs of the NCS2554 can be DC−coupled to a 150 W load (Figure 15). This has the advantage of eliminating the AC−coupling capacitors at the output by reducing the number of external components and saving space on the board. This can be a key advantage for some applications with limited space. The problems of field tilt effects on the video signal are also eliminated providing the best video quality with optimal dynamic or peak−to−peak amplitude of the video signal allowing operating thanks to the built−in level shifter without risk of signal clipping. In this coupling configuration the average output voltage is higher than 0 V and the power consumption can be a little higher than with an AC−coupled configuration. http://onsemi.com 8 NCS2554 +5V 10 mF 0.1 mF 1 Rs 2 CVBS EN Video Processor 3 4 Y/G Pb / B Pr / R 5 Rs 6 Rs 7 Rs CVBS_IN CVBS_OUT CVBS_EN GND VCC GND NCS2554 CVBS NC SD_EN 14 SD_OUT2 SD_IN2 SD_OUT3 SD_IN3 75 W CVBS 13 12 11 SD_OUT1 10 SD_IN1 75 W Cable 75 W 9 8 75 W 75 W Cable 75 W 75 W Cable 75 W 75 W 75 W Cable 75 W TV Y/G Pb / B Pr / R 75 W SD_EN Figure 15. DC−Coupled Input and Output Configuration +5V 10 mF 75 W 220 mF 75 W Cable Other Display 0.1 mF 1 Rs 2 CVBS EN Video Processor 3 4 Y/G Pb / B Pr / R Rs 5 6 Rs Rs 7 CVBS_IN CVBS_OUT CVBS_EN VCC NC SD_IN1 SD_IN2 SD_IN3 GND CVBS2 14 13 75 W 220 mF 75 W Cable 75 W CVBS1 12 NCS2554 CVBS 75 W GND SD_EN 11 SD_OUT1 10 SD_OUT2 SD_OUT3 9 8 75 W 220 mF 75 W Cable 75 W 220 mF 75 W Cable 75 W 220 mF 75 W Cable 75 W TV Y/G Pb / B 75 W Pr / R 75 W SD_EN Figure 16. Typical Application http://onsemi.com 9 NCS2554 +5V 10 mF 75 W CVBS 1 Rs 2 CVBS EN Video Processor 3 4 0.1 mF Y/G Pb / B Pr / R Rs Rs Rs 0.1 mF 0.1 mF 75 W 75 W Cable CVBS1 0.1 mF 5 6 7 CVBS_IN CVBS_OUT CVBS_EN GND VCC GND 14 75 W 13 220 mF 75 W 75 W Cable CVBS2 12 NC NCS2554 0.1 mF 220 mF SD_EN 11 SD_IN1 SD_OUT1 10 SD_IN2 SD_OUT2 SD_IN3 SD_OUT3 75 W 220 mF 75 W 220 mF 9 75 W 220 mF 8 75 W Cable 75 W Cable 75 W Cable Y / G1 TV 75 W Pb / B1 75 W Pr / R1 75 W SD_EN 75 W 75 W 75 W 220 mF 220 mF 220 mF 75 W Cable 75 W Cable 75 W Cable Y / G2 TV 75 W Pb / B2 75 W Pr / R2 75 W Figure 17. NCS2554 Driving 2 SCARTS Simultaneously Video Driving Capability with a particular attention with ESD structure able to sustain a typical value of 8 kV. This parameter is particularly important for video drivers which usually constitute the last stage in the video chain before the video output connector. The test method used follow the IEC61000−4−2 methodology. More details can be provided if requested. With an output current capability of 40 mA the NCS2554 was designed to be able to drive at least 2 video display loads in parallel. This type of application is illustrated Figure 16. Figure 18 (multiburst) and Figure 19 (linearity) show that the video signal can efficiently drive a 75 W equivalent load and not degrade the video performance. ESD Protection All the device pins are protected against electrostatic discharge at a level of 8 kV. This feature has been considered Figure 18. Multiburst Test with Two 150 Loads Figure 19. Linearity Test with Two 150 Loads http://onsemi.com 10 NCS2554 PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U T U M V S S S N 2X 14 L/2 0.25 (0.010) 8 M B −U− L PIN 1 IDENT. N F 7 1 0.15 (0.006) T U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. S DETAIL E ÇÇÇ ÇÇÇ ÉÉÉ ÇÇÇ ÉÉÉ K A −V− K1 J J1 DIM A B C D F G H J J1 K K1 L M SECTION N−N −W− C 0.10 (0.004) −T− SEATING PLANE D H G DETAIL E MILLIMETERS INCHES MIN MAX MIN MAX 4.90 5.10 0.193 0.200 4.30 4.50 0.169 0.177 −−− 1.20 −−− 0.047 0.05 0.15 0.002 0.006 0.50 0.75 0.020 0.030 0.65 BSC 0.026 BSC 0.50 0.60 0.020 0.024 0.09 0.20 0.004 0.008 0.09 0.16 0.004 0.006 0.19 0.30 0.007 0.012 0.19 0.25 0.007 0.010 6.40 BSC 0.252 BSC 0_ 8_ 0_ 8_ SOLDERING FOOTPRINT* 7.06 1 0.65 PITCH 14X 0.36 14X 1.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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