NCS2564 D

NCS2564
Four-Channel Video Driver
with Selectable SD / HD
Reconstruction Filters
The NCS2564 is a 4−channel high speed video driver with 6th order
Butterworth Reconstruction filters on each channel. A first set of
3−channel has selectable Standard Definition (SD) / High Definition
(HD) filters, one per channel. A fourth channel offers an extra filter
driver for driving CVBS−type video signal. The NCS2564 is in fact a
combination of a triple SD/HD video driver plus a single CVBS video
driver.
It is designed to be compatible with Digital−to−Analog Converters
(DAC) embedded in most video processors.
To further reduce power consumption, 2 enable pins are provided
one for the triple driver and another one for the single driver. One pin
allows selecting the filter frequency of the triple driver. All channels
can accept DC− or AC−coupled signals. In case of AC−coupled inputs,
the internal clamps are enabled. The outputs can drive both AC and
DC coupled 150 W loads.
Features
• 3−Channel with per Channel a Selectable Sixth−Order Butterworth
•
•
•
•
•
•
•
•
•
•
•
•
8/34 MHz Filter
One CVBS Driver Including 6th Order Butterworth 8 MHz Filter
Transparent Clamp
Internal Fixed Gain: 6 dB $0.2
Integrated Level Shifter
AC− or DC−Coupled Inputs and Outputs
Low Quiescent Current
Shutdown Current 42 mA Typical (Disabled)
Each channel Capable to Drive 2 by 150 W Loads
Wide Operating Supply Voltage Range: +4.7 V to +5.3 V
8 kV ESD Protection (IEC61000−4−2 Compatible)
TSSOP−14 Package
These are Pb−Free Devices
Typical Application
April, 2011 − Rev. 6
MARKING
DIAGRAM
14
14
1
TSSOP−14
TBD SUFFIX
CASE 948G
1
NCS
2564
ALYWG
G
NCS2564 = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
PINOUT
CVBS_IN
1
14
CVBS_OUT
CVBS_EN
2
13
GND
VCC
3
12
GND
4
11
SD/HD_EN
SD/HD_IN1
5
10
SD/HD_OUT1
SD/HD_IN2
6
9
SD/HD_OUT2
SD/HD_IN3
7
8
SD/HD_OUT3
SD/HD
(Top View)
ORDERING INFORMATION
Device
NCS2564DTBR2G
Package
Shipping†
TSSOP−14
(Pb−Free)
2500 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
• Set Top Box Decoder
• DVD Player / Recorder
• HDTV
© Semiconductor Components Industries, LLC, 2011
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1
Publication Order Number:
NCS2564/D
NCS2564
CVBS_IN
1
6dB
Transparent Clamp
14
CVBS_OUT
13
GND
12
GND
11
SD/HD_EN
6dB
10
SD/HD_OUT1
6dB
9
SD/HD_OUT2
6dB
8
SD/HD_OUT3
6th Order, 8 MHz Filter
CVBS_EN
2
250 kW
GND
VCC
3
SD/HD
4
SD/HD_IN1
5
250 kW
Transparent Clamp
6th Order,
Selectable 8/34 MHz Filter
SD/HD_IN2
6
Transparent Clamp
6th Order,
Selectable 8/34 MHz Filter
SD/HD_IN3
7
Transparent Clamp
6th Order,
Selectable 8/34 MHz Filter
Figure 1. NCS2564 Block Diagram
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2
NCS2564
PIN DESCRIPTION
Pin No.
Name
Type
1
CVBS_IN
Input
Video Input for Video Signal featuring a frequency bandwidth compatible with NTSC /
PAL / SECAM Video (8 MHz) − CVBS Channel
Description
2
CVBS_EN
Input
CVBS Channel Enable /Disable Function: Low = Enable, High = Disable. When left open
the default state is Enable.
3
VCC
Power
4
SD/HD
Input
Pin of selection enabling the Standard Definition or High Definition Filters (8 MHz /
34 MHz) for channels SD/HD − when Low SD filters are selected, when High HD filters
are selected.
5
SD/HD_IN1
Input
Selectable SD or HD Video Input 1 − SD/HD Channel 1
6
SD/HD_IN2
Input
Selectable SD or HD Video Input 2 − SD/HD Channel 2
7
SD/HD_IN3
Input
Selectable SD or HD Video Input 3 − SD/HD Channel 3
8
SD/HD_OUT3
Output
SD/HD Video Output 3 − SD/HD Channel 3
9
SD/HD_OUT2
Output
SD/HD Video Output 2 − SD/HD Channel 2
10
SD/HD_OUT1
Output
SD/HD Video Output 1 − SD/HD Channel 1
11
SD/HD_EN
Input
12
GND
Ground
Ground
13
GND
Ground
Ground
14
CVBS_OUT
Output
CVBS Video Output – CVBS Channel
Power Supply / 4.7 V to 5.3 V
SD/HD Channel Enable/Disable Function: Low = Enable, High = Disable. When left open
the default state is Enable.
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NCS2564
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltages
VCC
−0.3 v VCC v 5.5
Vdc
I/O Voltage Range
VIO
−0.3 v VI v VCC
Vdc
Input Differential Voltage Range
VID
−0.3 v VI v VCC
Vdc
Output Current (Indefinitely) per Channel
IO
40
mA
Maximum Junction Temperature (Note 1)
TJ
150
°C
Operating Ambient Temperature
TA
−40 to +85
°C
Storage Temperature Range
Tstg
−60 to +150
°C
Thermal Resistance, Junction−to−Air
RqJA
125
°C/W
ESD Protection Voltage (IEC61000−4−2)
Vesd
>8000
V
ESD HBM − Human Body Model
HBM
4000
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded.
1800
The maximum power that can be safely dissipated is
limited by the associated rise in junction temperature. For
the plastic packages, the maximum safe junction
temperature is 150°C. If the maximum is exceeded
momentarily, proper circuit operation will be restored as
soon as the die temperature is reduced. Leaving the device
in the “overheated” condition for an extended period can
result in device burnout. To ensure proper operation, it is
important to observe the derating curves.
1600
POWER DISSIPATION (mV)
Maximum Power Dissipation
1400
1200
1000
800
600
400
200
0
−40 −30−20−10
0 10 20 30 40 50 60 70 80 90100
TEMPERATURE (°C)
Figure 2. Power Dissipation vs Temperature
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NCS2564
DC ELECTRICAL CHARACTERISTICS (VCC = +5.0 V, Rsource = 37.5 W, TA = 25°C, inputs AC−coupled with 0.1 mF, all outputs
AC−coupled with 220 mF into 150 W referenced to 400 kHz; unless otherwise specified)
Symbol
Characteristics
Conditions
Min
Typ
Max
Unit
4.7
5.0
5.3
V
40
50
55
70
mA
42
60
mA
POWER SUPPLY
VCC
Supply Voltage Range
ICC
Supply Current
ISD
Shutdown Current (CVBS_EN and SD/HD_EN High)
SD Channels Selected + Cvbs
HD Channels Selected + Cvbs
DC PERFORMANCE
Vi
Input Common Mode Voltage Range
GND
1.4
VPP
VIL
Input Low Level for the Control Pins (2, 4, 11)
0
0.8
V
VIH
Input High Level for the Control Pins (2, 4, 11)
2.4
VCC
V
Rpd
Pulldown Resistors on Pins CVBS_EN and SD/HD_EN
250
kW
OUTPUT CHARACTERISTICS
VOH
Output Voltage High Level
2.8
V
VOL
Output Voltage Low Level
200
mV
IO
Output Current
40
mA
AC ELECTRICAL CHARACTERISTICS FOR STANDARD DEFINITION CHANNELS (pin numbers (1, 14) (5, 10), (6, 9), (7,
8)) (VCC = +5.0 V, Vin = 1 VPP, Rsource = 37.5 W, TA = 25°C, inputs AC−coupled with 0.1 mF, all outputs AC−coupled with 220 mF into
150 W referenced to 400 kHz; unless otherwise specified, SD/HD = Low)
Characteristics
Symbol
Conditions
Min
Typ
Max
Unit
Vin = 1 V − All SD Channels
5.8
6.0
6.2
dB
−1 dB
−3 dB
5.5
6.5
7.2
8.0
@ 27 MHz
43
50
dB
AVSD
Voltage Gain
BWSD
Low Pass Filter Bandwidth (Note 3)
ARSD
Stop−band Attenuation (Notes 3 and 4)
dGSD
Differential Gain Error
0.7
%
dFSD
Differential Phase Error
0.7
°
THD
Total Harmonic Distortion
Vout = 1.4 VPP @ 3.58 MHz
0.35
%
XSD
Channel−to−Channel Crosstalk
@ 1 MHz and Vin = 1.4 VPP
−57
dB
SNRSD
Signal−to−Noise Ratio
NTC−7 Test Signal, 100 kHz
to 4.2 MHz (Note 2)
72
dB
DtSD
Propagation Delay
@ 4.5 MHz
70
ns
DGDSD
Group Delay Variation
100 kHz to 8 MHz
20
ns
2. SNR = 20 x log (714 mV / RMS noise)
3. 100% of Tested ICs fit the bandwidth and attenuation tolerance at 25°C.
4. Guaranteed by characterization.
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5
MHz
NCS2564
AC ELECTRICAL CHARACTERISTICS FOR HIGH DEFINITION CHANNELS (pin numbers (5, 10) (6, 9), (7, 8))
(VCC = +5.0 V, Vin = 1 VPP, Rsource = 37.5 W, TA = 25°C, inputs AC−coupled with 0.1 mF, all outputs AC−coupled with 220 mF into 150 W
referenced to 400 kHz; unless otherwise specified, SD/HD = High)
Min
Typ
Max
Unit
AVHD
Voltage Gain
Characteristics
Vin = 1 V − All HD Channels
5.8
6.0
6.2
dB
BWHD
Low Pass Filter Bandwidth
−1 dB (Note 6)
−3 dB (Note 7)
26
30
31
34
MHz
ARHD
Stop−band Attenuation
@ 44.25 MHz (Note 7)
@ 74.25 MHz (Note 6)
33
15
42
dB
THDHD
Total Harmonic Distortion
Vout = 1.4 VPP @ 10 MHz
Vout = 1.4 VPP @ 15 MHz
Vout = 1.4 VPP @ 20 MHz
0.4
0.6
0.8
%
XHD
Channel−to−Channel Crosstalk
@ 1 MHz and Vin = 1.4 VPP
−60
dB
SNRHD
Signal−to−Noise Ratio
White Signal, 100 kHz to 30 MHz,
(Note 5)
72
dB
DtHD
Propagation Delay
25
ns
DGDHD
Group Delay Variation from 100 kHz to
30 MHz
10
ns
Symbol
Conditions
5. SNR = 20 x log (714 mV / RMS noise)
6. Guaranteed by Characterization.
7. 100% of Tested ICs fit the bandwidth and attenuation tolerance at 25°C.
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NCS2564
TYPICAL CHARACTERISTICS
30
30
20
20
10
10
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
VCC = +5.0 V, Vin = 1 VPP, Rsource = 37.5 W, TA = 25°C, Inputs AC−coupled with 0.1 mF, All Outputs AC−coupled with 220 mF into 150 W
Referenced to 400 kHz; unless otherwise specified
0
−10
−20
−30
−1 dB @ 6.7 MHz
−3 dB @ 8.1 MHz
−53 dB @ 27 MHz
−40
−50
−70
100k
1M
−30
−1 dB @ 31 MHz
−3 dB @ 33 MHz
−16 dB @ 44.25 MHz
−37 dB @ 74.25 MHz
−40
−50
10M
−70
100k
100M
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 3. SD Normalized Frequency Response
Figure 4. HD Normalized Frequency Response
0.4
1.4
0.35
1.2
0.226 dB @ 3.6 MHz
0.3
NORMALIZED GAIN (dB)
NORMALIZED GAIN (dB)
−20
−60
−60
0.25
0.2
0.15
0.1
0.5
0
−0.1
100k
1M
1.0
0.8
0.6
0.4
0.2
0
−0.4
100k
10M
Figure 5. SD Passband Flatness
Figure 6. HD Passband Flatness
30M
−20
−25
−51.8 dB @ 6.85 MHz
−30
−55
−35
−60
−40
GAIN (dB)
−50
−79 dB @ 50 kHz
−50
−55
−80
−60
−85
−65
100k
1M
−70
20
10M
−37.6 dB @ 25 MHz
−45
−75
−90
20k
10M
FREQUENCY (Hz)
−45
−70
1M
FREQUENCY (Hz)
−40
−65
1.035 dB @ 18.7 MHz
−0.2
−0.5
GAIN (dB)
0
−10
−67 dB @ 50 kHz
100k
1M
10M
50M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 7. SD Channel−to−Channel Crosstalk
Figure 8. HD Channel−to−Channel Crosstalk
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NCS2564
TYPICAL CHARACTERISTICS
30
15
20
10
10
5
GROUP DELAY (ns)
GROUP DELAY (ns)
VCC = +5.0 V, Vin = 1 VPP, Rsource = 37.5 W, TA = 25°C, Inputs AC−coupled with 0.1 mF, All Outputs AC−coupled with 220 mF into 150 W
Referenced to 400 kHz; unless otherwise specified
0
−10
20.7 ns @ 7 MHz
−20
−30
−40
−50
−60
0
−5
9.1 ns @ 24.1 MHz
−10
−15
−20
−25
−30
−70
400k
1M
10M
−35
400k
20M
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 9. SD Normalized Group Delay
Figure 10. HD Normalized Group Delay
Output
0.7 VPP
25 ns
70 ns
Output
0.7 VPP
Input
Figure 11. SD Propagation Delay
Input
Input
Figure 12. HD Propagation Delay
Input
Output
Output
200 mV
200 mV
Figure 13. SD Small Signal Response
Figure 14. HD Small Signal Response
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NCS2564
TYPICAL CHARACTERISTICS
VCC = +5.0 V, Vin = 1 VPP, Rsource = 37.5 W, TA = 25°C, Inputs AC−coupled with 0.1 mF, All Outputs AC−coupled with 220 mF into 150 W
Referenced to 400 kHz; unless otherwise specified
Output
Input
Output
Input
1 VPP
1 VPP
Figure 15. SD Large Signal Response
Figure 16. HD Large Signal Response
0
−10
−20
PSRR (dB)
−30
−40
−50
−60
−70
−80
−90
−100
20
100k
1M
FREQUENCY (Hz)
10M
Figure 17. SD and HD VCC PSRR vs.
Frequency
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50M
NCS2564
TYPICAL CHARACTERISTICS
20
60
10
50
0
40
−10
30
−20
20
−30
10
−40
0
−50
−10
−60
−20
−70
−30
−80
400k
1M
−40
50M
10M
(Hz)
NORMALIZED GROUP DELAY (ns)
NORMALIZED GAIN (dB)
VCC = +5.0 V, Vin = 1 VPP, Rsource = 37.5 W, TA = 25°C, Inputs AC−coupled with 0.1 mF, All Outputs AC−coupled with 220 mF into 150 W
Referenced to 400 kHz; unless otherwise specified
20
35
10
30
0
25
−10
20
−20
15
−30
10
−40
5
−50
0
−60
−5
−70
−10
−80
400k
−15
1M
(Hz)
10M
NORMALIZED GROUP DELAY (ns)
NORMALIZED GAIN (dB)
Figure 18. SD Frequency Response and Group
Delay
100M
Figure 19. HD Frequency Response and
Group Delay
0.9
0.9
0.75
0.76
0.77
0.68
0.7
0.6
0.5
0..4
0.31
0.3
0.8
DIFFERENTIAL PHASE (°)
DIFFERENTIAL GAIN (%)
0.8
0.2
0.1
0
0.75
0.7
0.65
0.6
0.5
0..4
0.36
0.3
0.2
0.14
0.07
0.1
0
1
2
3
4
5
0
6
1
2
3
4
5
HARMONIC
HARMONIC
Figure 20. SD Differential Gain
Figure 21. SD Differential Phase
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6
NCS2564
APPLICATIONS INFORMATION
required as compared to discrete approached implemented
The NCS2564 quad video driver has been optimized for
with stand alone op amps. An internal level shifter is
Standard and High Definition video applications covering
employed shifting up the output voltage by adding an offset
the requirements of the standards Composite video (CVBS),
of 200 mV. This prevents sync pulse clipping and allows
S−Video, Component Video (480i/525i, 576i/625i,
720p/1080i) and related (RGB). The three SD/HD channels
DC−coupled output to the 150 W video load. In addition, the
have selectable filters (8 MHz and 34 MHz) for covering
NCS2564 integrates a 6th order Butterworth filter for each.
either standard definition−like video applications or High
This allows rejection of the aliases or unwanted
Definition video applications. These frequencies are
over-sampling effects produced by the video DAC.
selectable using the pin SD/HD.
Similarly for the case of DVD recorders which use an ADC,
In the regular mode of operation each channel provides an
this anti−aliasing filter (reconstruction filter) will avoid
internal voltage−to−voltage gain of 2 from input to output.
picture quality issue and will aide filtration of parasitic
This effectively reduces the number of external components
signals caused by EMI interference.
+5V
10 mF
0.1 mF
1
Rs
2
CVBS EN
Video Processor
3
4
SD/HD SEL
0.1 mF
Y/G
Pb / B
Pr / R
Rs
Rs
Rs
0.1 mF
0.1 mF
5
6
7
CVBS_IN
CVBS_OUT
CVBS_EN
GND
VCC
GND
SD/HD
NCS2564
0.1 mF
CVBS
SD/HD_EN
14
SD/HD IN3 SD/HD OUT3
220 mF
75 W Cable
75 W
CVBS
13
12
11
SD/HD IN1 SD/HD OUT1 10
SD/HD IN2 SD/HD OUT2
75 W
9
8
75 W
220 mF
75 W Cable
75 W
220 mF
75 W Cable
75 W
75 W
220 mF
75 W Cable
75 W
TV
Y/G
Pb / B
Pr / R
75 W
SD/HD EN
Figure 22. AC−Coupled Configuration at the Input and Output
some cases it may be necessary to increase the nominal
220 mF capacitor value.
A built−in diode−like clamp is used into the chip for each
channel to support the AC−coupled mode of operation. The
clamp is active when the input signal goes below 0 V.
The built−in clamp and level shifter allow the device to
operate in different configuration modes depending on the
DAC output signal level and the input common mode
voltage of the video driver. When the configuration is
DC−Coupled at the Inputs and Outputs the 0.1 mF and
220 mF coupling capacitors are no longer used, and the
clamps are in that case inactive; this configuration provides
a low cost solution which can be implemented with few
external components (Figure 23).
The input is AC−coupled when either the input−signal
amplitude goes over the range 0 V to 1.4 V or the video
source requires such a coupling. In some circumstances it
may be necessary to auto−bias signals with the addition of
a pullup and pulldown resistors or only pullup resistor
(Typical 7.5 MW combined with the internal 800 kW
pulldown) making the clamp inactive.
The output AC−coupling configuration is advantageous
for eliminating DC ground loop with the drawback of
making the device more sensitive to video line or field tilt
issues in the case of a too low output coupling capacitor. In
Shutdown Mode
If the enable pins are left open by default the circuit will
be enabled. The Enable pin offers a shutdown function, so
the NCS2564 can consequently be disabled when not used.
The NCS2564’s quiescent current reduces to 42 mA typical
during shutdown mode.
DC−Coupled Output
The outputs of the NCS2564 can be DC−coupled to a
150 W load (Figure 23). This has the advantage of
eliminating the AC−coupling capacitors at the output by
reducing the number of external components and saving
space on the board. This can be a key advantage for some
applications with limited space.
The problems of field tilt effects on the video signal are
also eliminated providing the best video quality with
optimal dynamic or peak−to−peak amplitude of the video
signal allowing operating thanks to the built−in level shifter
without risk of signal clipping. In this coupling
configuration the average output voltage is higher than 0 V
and the power consumption can be a little higher than with
an AC−coupled configuration.
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NCS2564
+5V
10 mF
0.1 mF
1
Rs
2
CVBS EN
Video Processor
3
4
SD/HD SEL
Y/G
Pb / B
Pr / R
5
Rs
6
Rs
7
Rs
CVBS_IN
CVBS_OUT
CVBS_EN
GND
VCC
GND
NCS2564
CVBS
SD/HD
SD/HD_EN
14
SD/HD IN3 SD/HD OUT3
75 W
CVBS
13
12
11
SD/HD IN1 SD/HD OUT1 10
SD/HD IN2 SD/HD OUT2
75 W Cable
75 W
9
8
75 W
75 W Cable
75 W
75 W Cable
75 W
75 W
75 W Cable
75 W
TV
Y/G
Pb / B
Pr / R
75 W
SD/HD EN
Figure 23. DC−Coupled Input and Output Configuration
+5V
10 mF
75 W
220 mF
75 W Cable
Other Display
0.1 mF
1
Rs
2
CVBS EN
Video Processor
3
4
SD/HD SEL
Y/G
Pb / B
Pr / R
Rs
5
6
Rs
Rs
7
CVBS_IN
CVBS_OUT
CVBS_EN
VCC
SD/HD
NCS2564
CVBS
75 W
GND
GND
SD/HD_EN
14
13
SD/HD IN3 SD/HD OUT3
75 W
220 mF
75 W Cable
75 W
CVBS1
12
11
SD/HD IN1 SD/HD OUT1 10
SD/HD IN2 SD/HD OUT2
9
8
75 W
220 mF
75 W Cable
75 W
220 mF
75 W Cable
75 W
220 mF
75 W Cable
75 W
TV
Y/G
Pb / B
75 W
Pr / R
75 W
SD/HD EN
Figure 24. Typical Application
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CVBS2
NCS2564
+5V
10 mF
75 W
CVBS
1
Rs
2
CVBS EN
Video Processor
3
4
SD/HD SEL
0.1 mF
Y/G
Pb / B
Pr / R
Rs
Rs
Rs
0.1 mF
0.1 mF
75 W
75 W Cable
CVBS1
0.1 mF
5
6
7
CVBS_IN
CVBS_OUT
CVBS_EN
GND
VCC
GND
14
13
75 W
220 mF
75 W
75 W Cable
CVBS2
12
SD/HD
NCS2564
0.1 mF
220 mF
SD/HD_EN
SD/HD IN1 SD/HD OUT1
SD/HD IN2 SD/HD OUT2
SD/HD IN3 SD/HD OUT3
11
10
9
8
SD/HD EN
75 W 220 mF
75 W 220 mF
75 W 220 mF
75 W Cable
75 W Cable
75 W Cable
Y / G1
TV
75 W
Pb / B1
75 W
Pr / R1
75 W
75 W
75 W
75 W
220 mF
220 mF
220 mF
75 W Cable
75 W Cable
75 W Cable
Y / G2
TV
75 W
Pb / B2
75 W
75 W
Figure 25. NCS2564 Driving 2 SCARTS Simultaneously
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13
Pr / R2
NCS2564
Video Driving Capability
ESD Protection
With an output current capability of 40 mA the NCS2564
was designed to be able to drive at least 2 video display loads
in parallel. This type of application is illustrated Figure 24.
Figure 26 (multiburst) and Figure 27 (linearity) show that
the video signal can efficiently drive a 75 W equivalent load
and not degrade the video performance.
All the device pins are protected against electrostatic
discharge at a level of 4 kV HBM and 8 kV according to
IEC61000−4−2. This feature has been considered with a
particular attention with ESD structure able to sustain the
typical values requested by the systems like Set Top Boxes
or Blue−Ray players. This parameter is particularly
important for video driver which usually constitutes the last
stage in the video chain before the video output connector.
The IEC61000−4−2 standard has been used to test our
devices in the real application environment. Test
methodology can be provided on request.
Figure 26. Multiburst Test with Two 150 Loads
Figure 27. Linearity Test with Two 150 Loads
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14
NCS2564
PACKAGE DIMENSIONS
TSSOP−14
CASE 948G−01
ISSUE B
14X K REF
0.10 (0.004)
0.15 (0.006) T U
T U
M
V
S
S
N
2X
14
L/2
0.25 (0.010)
8
M
B
−U−
L
PIN 1
IDENT.
N
F
7
1
0.15 (0.006) T U
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
S
S
DETAIL E
K
A
−V−
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
K1
J J1
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
SECTION N−N
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
H
G
DETAIL E
MILLIMETERS
INCHES
MIN
MAX
MIN MAX
4.90
5.10 0.193 0.200
4.30
4.50 0.169 0.177
−−−
1.20
−−− 0.047
0.05
0.15 0.002 0.006
0.50
0.75 0.020 0.030
0.65 BSC
0.026 BSC
0.50
0.60 0.020 0.024
0.09
0.20 0.004 0.008
0.09
0.16 0.004 0.006
0.19
0.30 0.007 0.012
0.19
0.25 0.007 0.010
6.40 BSC
0.252 BSC
0_
8_
0_
8_
SOLDERING FOOTPRINT*
7.06
1
0.65
PITCH
14X
0.36
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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NCS2564/D