Audio Power Amplifier, 1.3 W, with Fast Turn-On Time

NCP2990
1.3 Watt Audio Power
Amplifier with Fast Turn On
Time
The NCP2990 is an audio power amplifier designed for portable
communication device applications such as mobile phone
applications. The NCP2990 is capable of delivering 1.3 W of
continuous average power to an 8.0 BTL load from a 5.0 V power
supply, and 1.0 W to a 4.0 BTL load from a 3.6 V power supply.
The NCP2990 provides high quality audio while requiring few
external components and minimal power consumption. It features a
low−power consumption shutdown mode, which is achieved by
driving the SHUTDOWN pin with logic low.
The NCP2990 contains circuitry to prevent from “pop and click”
noise that would otherwise occur during turn−on and turn−off
transitions. It is a zero pop noise device when a single ended audio
input is used.
For maximum flexibility, the NCP2990 provides an externally
controlled gain (with resistors), as well as an externally controlled
turn−on time (with the bypass capacitor). When using a 1 F bypass
capacitor, it offers 60 ms wake up time.
Due to its superior PSRR, it can be directly connected to the
battery, saving the use of an LDO.
This device is available in a 9−Pin Flip−Chip CSP (Lead−Free).
Features
•
•
•
•
•
•
•
•
•
•
1.3 W to an 8.0 BTL Load from a 5.0 V Power Supply
Superior PSRR: Direct Connection to the Battery
Zero Pop Noise Signature with a Single Ended Audio Input
Ultra Low Current Shutdown Mode: 10 nA
2.2 V−5.5 V Operation
External Gain Configuration Capability
External Turn−on Time Configuration Capability:
60 ms (1 F Bypass Capacitor)
Up to 1.0 nF Capacitive Load Driving Capability
Thermal Overload Protection Circuitry
This is a Pb−Free Device*
http://onsemi.com
MARKING
DIAGRAMS
9−Pin Flip−Chip CSP
FC SUFFIX
1
CASE 499E
A3
MBAG
AYWW
C1
A1
MBA
A
Y
WW
G
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
9−Pin Flip−Chip CSP
A1
A2
A3
INM
OUTA
INP
B1
B2
B3
VM_P
VM
Vp
C1
C2
C3
BYPASS
OUTB SHUTDOWN
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
Typical Applications
• Portable Electronic Devices
• PDAs
• Wireless Phones
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2007
January, 2007 − Rev.1
1
Publication Order Number:
NCP2990/D
NCP2990
Rf
20 k
Vp
1 F
Cs
AUDIO
INPUT
Ci
Ri
INM
47 nF
20 k
INP
−
+
Vp
Vp
−
+
BYPASS
Cbypass
R1
20 k
8
R2
20 k
OUTB
1 F
SHUTDOWN
VIH
OUTA
SHUTDOWN
CONTROL
VM_P
VM
VIL
Figure 1. Typical Audio Amplifier Application Circuit with Single Ended Input
http://onsemi.com
2
NCP2990
PIN DESCRIPTION
Pin
Type
Symbol
Description
A1
I
INM
A2
O
OUTA
A3
I
INP
B1
I
VM_P
B2
I
VM
Core Analog Ground.
B3
I
Vp
Positive analog supply of the cell. Range: 2.2 V−5.5 V.
C1
I
BYPASS
C2
O
OUTB
C3
I
SHUTDOWN
Negative input of the first amplifier, receives the audio input signal. Connected to the
feedback resistor Rf and to the input resistor Rin.
Negative output of the NCP2990. Connected to the load and to the feedback resistor Rf.
Positive input of the first amplifier, receives the common mode voltage.
Power Analog Ground.
Bypass capacitor pin which provides the common mode voltage (Vp/2).
Positive output of the NCP2990. Connected to the load.
The device enters in shutdown mode when a low level is applied on this pin.
MAXIMUM RATINGS (Note 1)
Rating
Symbol
Value
Unit
Vp
6.0
V
Op Vp
2.2 to 5.5 V
2.0 V = Functional Only
−
Input Voltage
Vin
−0.3 to Vcc +0.3
V
Max Output Current
Iout
500
mA
Power Dissipation (Note 2)
Pd
Internally Limited
−
Operating Ambient Temperature
TA
−40 to +85
°C
Max Junction Temperature
TJ
150
°C
Storage Temperature Range
Tstg
−65 to +150
°C
Thermal Resistance Junction−to−Air
RJA
(Note 3)
°C/W
−
8000
>250
V
Supply Voltage
Operating Supply Voltage
ESD Protection
Human Body Model (HBM) (Note 4)
Machine Model (MM) (Note 5)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = +25°C.
2. The thermal shutdown set to 160°C (typical) avoids irreversible damage on the device due to power dissipation.
3. The RJA is highly dependent of the PCB Heatsink area. For example, RJA can equal 195°C/W with 50 mm2 total area and also 135°C/W with
500 mm2. For further information see page 10. The bumps have the same thermal resistance and all need to be connected to optimize the power
dissipation.
4. Human Body Model, 100 pF discharge through a 1.5 k resistor following specification JESD22/A114.
5. Machine Model, 200 pF discharged through all pins following specification JESD22/A115.
http://onsemi.com
3
NCP2990
ELECTRICAL CHARACTERISTICS Limits apply for TA between −40°C to +85°C (Unless otherwise noted).
Characteristic
Supply Quiescent Current
Common Mode Voltage
Shutdown Current
Symbol
Conditions
Min
(Note 6)
Typ
Idd
Vp = 2.6 V, No Load
Vp = 5.0 V, No Load
−
−
Vp = 2.6 V, 8 Vp = 5.0 V, 8 Vcm
Max
(Note 6)
Unit
1.5
1.7
4
mA
−
−
1.7
1.9
5.5
−
−
Vp/2
−
V
−
0.02
0.3
A
−
1.2
−
−
V
ISD
Shutdown Voltage High
VSDIH
Shutdown Voltage Low
VSDIL
−
−
−
0.4
V
Turning On Time (Note 8)
TWU
Cby = 1 F
−
60
−
ms
Turning Off Time
TOFF
−
−
1.0
−
s
Output Impedance in Shutdown Mode
Output Swing
Rms Output Power
ZSD
−
−
10
−
k
Vloadpeak
Vp = 2.6 V, RL = 8.0 Vp = 5.0 V, RL = 8.0 (Note 7)
TA = +25°C
TA = −40°C to +85°C
1.6
2.20
−
−
V
4.0
3.85
4.50
−
0.40
−
W
PO
Vp = 2.6 V, RL = 4.0 THD + N < 0.1%
Vp = 2.6 V, RL = 8.0 THD + N < 0.1%
Vp = 5.0 V, RL = 8.0 THD + N < 0.1%
0.30
−
PDmax
Vp = 5.0 V, RL = 8.0 −
Output Offset Voltage
VOS
Vp = 2.6 V
Vp = 5.0 V
−30
Signal−to−Noise Ratio
SNR
Vp = 2.6 V, G = 2.0
10 Hz < F < 20 kHz
Vp = 5.0 V, G = 10
10 Hz < F < 20 kHz
−
−
Maximum Power Dissipation (Note 8)
Positive Supply Rejection Ratio
Efficiency
Thermal Shutdown Temperature (Note 9)
Total Harmonic Distortion
6.
7.
8.
9.
PSRR V+
−
0.65
W
30
mV
84
−
dB
77
−
G = 2.0, RL = 8.0 Vpripple_pp = 200 mV
Cby = 1.0 F
Input Terminated with 10 F = 217 Hz
Vp = 4.2 V
Vp = 3.6 V
Vp = 3.0 V
−
−
−
−74
−72
−73
−
−
−
F = 1.0 kHz
Vp = 4.2 V
Vp = 3.6 V
Vp = 3.0 V
−
−
−
−80
−76
−77
−
−
−
Vp = 2.6 V, Porms = 320 mW
Vp = 5.0 V, Porms = 1.0 W
−
−
48
63
−
−
%
140
160
180
°C
Vp = 2.6, F = 1.0 kHz
RL = 4.0 AV = 2.0
PO = 0.32 W
−
−
−
−
0.04
−
−
−
−
%
Vp = 5.0 V, F = 1.0 kHz
RL = 8.0 AV = 2.0
PO = 1.0 W
−
−
−
−
0.02
−
−
−
−
Tsd
THD
−
1.20
Min/Max limits are guaranteed by design, test or statistical analysis.
This parameter is guaranteed but not tested in production in case of a 5.0 V power supply.
See page 9 for a theoretical approach of this parameter.
For this parameter, the Min/Max values are given for information.
http://onsemi.com
4
dB
NCP2990
TYPICAL PERFORMANCE CHARACTERISTICS
10
10
VP = 3.0 V
RL = 8 f = 1 kHz
1
THD + N (%)
THD + N (%)
VP = 2.5 V
RL = 8 f = 1 kHz
0.1
0.01
0
50
100
150
200
250
300
1
0.1
0.01
350
0
100
200
POUT (mW)
Figure 2. THD+N versus Output Power
1
THD + N (%)
THD + N (%)
VP = 4.2 V
RL = 8 f = 1 kHz
0.1
100
200
300
400
500
600
700
1
0.1
0.01
800
0
200
400
POUT (mW)
600
800
1000
POUT (mW)
Figure 4. THD+N versus Output Power
Figure 5. THD+N versus Output Power
10
10
VP = 5.0 V
RL = 8 f = 1 kHz
VP = 2.5 V
RL = 4 f = 1 kHz
1
THD + N (%)
THD + N (%)
500
10
VP = 3.6 V
RL = 8 f = 1 kHz
0.1
0.01
0
400
Figure 3. THD+N versus Output Power
10
0.01
0
300
POUT (mW)
200
400
600
800
1000 1200
1
0.1
0.01
1400 1600
0
POUT (mW)
100
200
300
400
500
POUT (mW)
Figure 6. THD+N versus Output Power
Figure 7. THD+N versus Output Power
http://onsemi.com
5
NCP2990
TYPICAL PERFORMANCE CHARACTERISTICS
1600
VP = 2.5 V
RL = 8 POUT = 100 mW
1200
THD+N (%)
OUTPUT POWER (mW)
1400
1
RL = 8 f = 1 kHz
THD+N = 10%
1000
800
THD+N = 1%
0.1
600
400
200
2.5
3
3.5
4
4.5
0.01
100
5
1000
POWER SUPPLY (V)
Figure 8. Output Power versus Power Supply
Figure 9. THD+N versus Frequency
1
1
VP = 5.0 V
RL = 8 POUT = 500 mW
THD+N (%)
THD+N (%)
VP = 3.0 V
RL = 8 POUT = 250 mW
0.1
0.01
100
1000
10000
0.1
0.01
100
1000
FREQUENCY (Hz)
Figure 11. THD+N versus Frequency
−40
−20
VP = 3.6 V
RL = 8 Input to GND
RIN = 22 k, RF = 22 k
CBYP = 220 nF
VP = 3.6 V
RL = 8 Input to GND
RIN = 22 k, RF = 110 k
−30 CBYP = 100 nF
PSSR (dB)
PSSR (dB)
CBYP = 100 nF
−40
220 nF
440 nF
−50
1.0 F
2.2 F
CBYP = 1.0 F
−80
10
10000
FREQUENCY (Hz)
Figure 10. THD+N versus Frequency
−60
10000
FREQUENCY (Hz)
−60
100
1000
10000
−70
10
FREQUENCY (Hz)
100
1 000
10000
FREQUENCY (Hz)
Figure 12. PSRR versus Frequency and
CBYP @ VP = 3.6 V, AV = 2
Figure 13. PSRR versus Frequency and CBYP
@ VP = 3.6 V, AV = 10
http://onsemi.com
6
NCP2990
TYPICAL PERFORMANCE CHARACTERISTICS
−40
−40
AV = 10
−50
PSSR (dB)
PSSR (dB)
−50
VP = 3.0 V
RL = 8 Input to GND
AV = 4
−60
VP = 3.6 V
RL = 8 Input to GND
AV = 10
−60
−70
AV = 4
−70
AV = 2
AV = 2
−80
10
100
1000
−80
10
10000
100
Figure 15. PSRR versus Frequency and
Gain @ VP = 3.6 V
80
−20
VP = 4.2 V
RL = 8 Input to GND
70
60
AV = 4
50
TON (ms)
AV = 10
−50
−60
−70
40
30
AV = 2
−80
20
−90
10
100
1000
0
−40
10000
−20
FREQUENCY (Hz)
0
20
60
80
100
Figure 17. Turn On Time versus
Room Temperature @ VBAT = 3.6 V,
CBYP = 1 mF, CIN = 100 nF, RIN = 22 k, RF = 110 k
120
100
80
60
40
20
0
0
40
ROOM TEMPERATURE (°C)
Figure 16. PSRR versus Frequency and
Gain @ VP = 4.2 V
TON (ms)
PSSR (dB)
−40
−100
10
10000
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 14. PSRR versus Frequency and
Gain @ VP = 3.0 V
−30
1000
0.5
1
1.5
2
2.5
CBYP (F)
Figure 18. Turn On Time versus CBYP @ VBAT = 3.6 V, TA = +255C,
CIN = 100 nF, RIN = 22 k, RF = 110 k
http://onsemi.com
7
NCP2990
TYPICAL PERFORMANCE CHARACTERISTICS
0.3
PD, POWER DISSIPATION (W)
PD, POWER DISSIPATION (W)
0.7
0.6
0.5
0.4
Vp = 5 V
RL = 8 F = 1 kHz
THD + N < 0.1%
0.3
0.2
0.1
0.25
0.2
0.15
Vp = 3.3 V
RL = 8 F = 1 kHz
THD + N < 0.1%
0.1
0.05
0
0
0
0.2
0.4
0.6
0.8
1
0
1.2
0.1
0.2
Pout, OUTPUT POWER (W)
0.5
0.4
PD, POWER DISSIPATION (W)
0.25
PD, POWER DISSIPATION (W)
0.4
Figure 20. Power Dissipation versus Output
Power
Figure 19. Power Dissipation versus Output
Power
0.2
0.15
Vp = 3 V
RL = 8 F = 1 kHz
THD + N < 0.1%
0.1
0.05
0.35
RL = 4 0.3
0.25
0.2
RL = 8 0.15
0.1
Vp = 2.6 V
F = 1 kHz
THD + N < 0.1%
0.05
0
0
0
0.1
0.2
0.3
0
0.4
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
Pout, OUTPUT POWER (W)
Pout, OUTPUT POWER (W)
Figure 21. Power Dissipation versus Output
Power
Figure 22. Power Dissipation versus Output
Power
180
DIE TEMPERATURE (°C) @
AMBIENT TEMPERATURE 25°C
700
PD, POWER DISSIPATION (mW)
0.3
Pout, OUTPUT POWER (W)
PCB Heatsink Area
600
200 mm2
500
50 mm2
500 mm2
400
300
200
PDmax = 633 mW
for Vp = 5 V,
RL = 8 100
0
0
20
40
Maximum Die Temperature 150°C
RL = 8 160
140
Vp = 5 V
120
Vp = 4.2 V
100
80
Vp = 3.3 V
60
Vp = 2.6 V
40
60
80
100
120
140
160
50
TA, AMBIENT TEMPERATURE (°C)
100
150
200
PCB HEATSINK AREA
Figure 23. Power Derating − 9−Pin Flip−Chip CSP
250
(mm2)
Figure 24. Maximum Die Temperature versus
PCB Heatsink Area
http://onsemi.com
8
300
NCP2990
APPLICATION INFORMATION
Detailed Description
Shutdown Function
The NCP2990 audio amplifier can operate under 2.6 V
until 5.5 V power supply. With less than 1% THD + N, it
can deliver up to 1.2 W RMS output power to an 8.0 load
(VP = 5.0 V). If application allows to reach 10% THD + N,
then 1.6 W can be provided using a 5.0 V power supply.
The structure of the NCP2990 is basically composed of
two identical internal power amplifiers; the first one is
externally configurable with gain−setting resistors Rin and
Rf (the closed−loop gain is fixed by the ratios of these
resistors) and the second is internally fixed in an inverting
unity−gain configuration by two resistors of 20 k. So the
load is driven differentially through OUTA and OUTB
outputs. This configuration eliminates the need for an
output coupling capacitor.
The device enters shutdown mode when shutdown signal
is low. During the shutdown mode, the DC quiescent
current of the circuit does not exceed 100 nA. In this
configuration, the output impedance is 10 k on each
output.
Current Limit Circuit
The maximum output power of the circuit (Porms =
1.0 W, Vp = 5.0 V, RL = 8.0 ) requires a peak current in
the load of 500 mA.
In order to limit the excessive power dissipation in the
load when a short−circuit occurs, the current limit in the
load is fixed to 800 mA. The current in the four output MOS
transistors are real−time controlled, and when one current
exceeds 800 mA, the gate voltage of the MOS transistor is
clipped and no more current can be delivered.
Internal Power Amplifier
The output PMOS and NMOS transistors of the amplifier
were designed to deliver the output power of the
specifications without clipping. The channel resistance
(Ron) of the NMOS and PMOS transistors does not exceed
0.6 when they drive current.
The structure of the internal power amplifier is
composed of three symmetrical gain stages, first and
medium gain stages are transconductance gain stages to
obtain maximum bandwidth and DC gain.
Thermal Overload Protection
Internal amplifiers are switched off when the
temperature exceeds 160°C, and will be switched on again
only when the temperature decreases fewer than 140°C.
The NCP2990 is unity−gain stable and requires no
external components besides gain−setting resistors, an
input coupling capacitor and a proper bypassing capacitor
in the typical application.
The first amplifier is externally configurable (Rf and
Rin), while the second is fixed in an inverting unity gain
configuration.
The differential−ended amplifier presents two major
advantages:
− The possible output power is four times larger (the
output swing is doubled) as compared to a single−ended
amplifier under the same conditions.
− Output pins (OUTA and OUTB) are biased at the same
potential Vp/2, this eliminates the need for an output
coupling capacitor required with a single−ended
amplifier configuration.
The differential closed loop−gain of the amplifier is
Turn−On and Turn−Off Transitions
A cycle with a turn−on and turn−off transition is
illustrated with plots that show both single ended signals on
the previous page.
In order to eliminate “pop and click” noises during
transitions, output power in the load must be slowly
established or cut. When logic high is applied to the
shutdown pin, the bypass voltage begins to rise
exponentially and once the output DC level is around the
common mode voltage, the gain is established
instantaneously. This way to turn−on the device is
optimized in terms of rejection of “pop and click” noises.
The device has the same behavior when it is turned−off
by a logic low on the shutdown pin. During the shutdown
mode, amplifier outputs are connected to the ground using
a 10 k pulldown resistor.
When a shutdown low level is applied, with 1 F bypass
capacitor, it takes 65 ms before the DC output level is tied
to Ground on each output. However, no audio signal will be
provided to the BTL load instantaneously after the falling
edge on the shutdown pin.
With 1 F bypass capacitor, turn on time is set to 60 ms.
Refer to Figures 17 and 18 for a complete study of this
parameter. This fast turn on time added to a very low
shutdown current saves battery life and brings flexibility
when designing the audio section of the final application.
NCP2990 is a zero pop noise device when using a
single−ended audio input.
given by Avd + 2 *
V
Rf
+ orms .
Rin
Vinrms
Output power delivered to the load is given by
Porms +
(Vopeak)2
(Vopeak is the peak differential
2 * RL
output voltage).
When choosing gain configuration to obtain the desired
output power, check that the amplifier is not current limited
or clipped.
The maximum current which can be delivered to the load
is 500 mA Iopeak +
http://onsemi.com
9
Vopeak
.
RL
NCP2990
Gain−Setting Resistor Selection (Rin and Rf)
high−pass filter with Rin, the cut−off frequency is given by
Rin and Rf set the closed−loop gain of the amplifier.
In order to optimize device and system performance, the
NCP2990 should be used in low gain configurations.
The low gain configuration minimizes THD + noise
values and maximizes the signal to noise ratio, and the
amplifier can still be used without running into the
bandwidth limitations.
A closed loop gain in the range from 2 to 5 is
recommended to optimize overall system performance.
An input resistor (Rin) value of 22 k is realistic in most
of applications, and doesn’t require the use of a too large
capacitor Cin.
fc +
1
.
2 * * Rin * Cin
The size of the capacitor must be large enough to couple
in low frequencies without severe attenuation.
An input capacitor value between 33 nF and 220 nF
performs well in many applications (With Rin = 22 K).
Bypass Capacitor Selection (Cby)
The bypass capacitor Cby provides half−supply filtering
and determines how fast the NCP2990 turns on. With a
single−ended audio input, the amplifier will be a zero pop
noise device no matter the bypass capacitor.
Input Capacitor Selection (Cin)
The input coupling capacitor blocks the DC voltage at
the amplifier input terminal. This capacitor creates a
R2
20 k
C2*
1 F
J12
AUDIO
INPUT
C1
R1
INM
−
+
INP
100 nF 20 k
J3*
J11
C4
Vp
20 k
Vp
Vp
BYPASS
C3
J6
TP1*
OUTA
8
−
+
20 k
OUTB
J5
1 F
TP2* TP3*
SHUTDOWN
Vp OUTA OUTB
J8
150 k
R3
SHUTDOWN
CONTROL
VM_P
J7
VM
*C2, TP1, TP2, and TP3: Not Mounted
Figure 25. Schematic of the NCP2990 Demonstration Board
http://onsemi.com
10
NCP2990
Figure 26. Demonstration Board for 9−Pin Flip−Chip CSP Device − Silkscreen Layers
http://onsemi.com
11
NCP2990
BILL OF MATERIAL
Item
Part Description
Ref.
PCB
Footprint
Manufacturer
Manufacturer Reference
1
NCP2990 Audio Amplifier
−
−
ON Semiconductor
NCP2990
2
SMD Resistor 20 K
R1, R2
0805
Panasonic
ERJ−6GEYJ203V
4
SMD Resistor 150 K
R3
0805
Panasonic
ERJ−6GEYJ203V
5
Ceramic Capacitor 47 nF 100 V X7R
C1
0805
TDK
C2012X7R2A473K
6
Ceramic Capacitor 1.0 F 10 V X7R
C3, C4
0805
TDK
C2012X7R1A105K
7
Jumper Header Vertical Mount, 2 positions, 100 mils
J2, J6, J18
100 mils
Tyco Electronics / AMP
5−826629−0
8
I/O Connector, 2 positions
J1, J5
200 mils
Phoenix Contact
1757242
9
Jumper Connector
J7
400 mils
Harwin
D3082−B01
10
Not Mounted
C2, TP1,
TP2, TP3
−
−
−
ORDERING INFORMATION
Device
NCP2990FCT2G
Marking
Package
Shipping†
MBA
9−Pin Flip−Chip CSP
(Pb−Free)
3000/Tape and Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
12
NCP2990
PACKAGE DIMENSIONS
9 PIN FLIP−CHIP
CASE 499E−01
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
−A−
4X
D
0.10 C
−B−
DIM
A
A1
A2
D
E
b
e
D1
E1
E
TOP VIEW
A
0.10 C
0.05 C
−C−
MILLIMETERS
MIN
MAX
0.540
0.660
0.210
0.270
0.330
0.390
1.450 BSC
1.450 BSC
0.290
0.340
0.500 BSC
1.000 BSC
1.000 BSC
A2
A1
SIDE VIEW
SEATING
PLANE
D1
e
C
B
e
E1
A
9X
b
1
2
3
0.05 C A B
0.03 C
BOTTOM VIEW
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
13
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP2990/D