Precision Instrumentation Amplifier AD8221-EP Enhanced Product FEATURES TYPICAL CONNECTION DIAGRAM ENHANCED PRODUCT FEATURES Supports defense and aerospace applications (AQEC standard) Military temperature range (−55°C to +125°C) Controlled manufacturing baseline One assembly/test site One fabrication site Enhanced product change notification Qualification data available on request APPLICATIONS AD8221-EP –IN 1 8 +VS RG 2 7 VOUT RG 3 6 REF +IN 4 5 –VS TOP VIEW 03149-001 Specified from −55°C to +125°C 0.9 μV/°C maximum input offset average TC 10 ppm/°C maximum gain vs. temperature (G = 1) Excellent ac specifications 80 dB minimum CMRR at 10 kHz (G = 1) –3 dB bandwidth: 825 kHz typical (G = 1) 2 V/μs typical slew rate Low noise 8 nV/√Hz, at 1 kHz, maximum input voltage noise 0.25 μV p-p RTI (G = 100 to 1000) High accuracy dc performance 80 dB minimum CMRR DC to 60 Hz (G = 1) 70 μV maximum input offset voltage 2 nA maximum input bias current Wide power supply range: ±2.3 V to ±18 V Available in space-saving MSOP Gain set with 1 external resistor (gain range 1 to 1000) Figure 1. GENERAL DESCRIPTION The AD8221-EP is a gain programmable, high performance instrumentation amplifier that delivers the industry’s highest CMRR over frequency in its class. The CMRR of instrumentation amplifiers on the market today falls off at 200 Hz. In contrast, the AD8221-EP maintains a minimum CMRR of 80 dB to 10 kHz at G = 1. High CMRR over frequency allows the AD8221-EP to reject wideband interference and line harmonics, greatly simplifying filter requirements. Possible applications include precision data acquisition, biomedical analysis, and aerospace instrumentation. Low voltage offset, low offset drift, low gain drift, high gain accuracy, and high CMRR make this device an excellent choice in applications that demand the best dc performance possible, such as bridge signal conditioning. Programmable gain affords the user design flexibility. A single resistor sets the gain from 1 to 1000. The AD8221-EP operates on both single and dual supplies and is well suited for applications where ±10 V input voltages are encountered. The AD8221-EP is specified over the −55°C to +125°C military temperature range. It is available in an 8-lead MSOP package. Bridge amplifiers Precision data acquisition systems Strain gages Transducer interfaces Additional application and technical information can be found in the AD8221 data sheet. 120 110 AD8221-EP CMRR (dB) 100 90 COMPETITOR 1 80 70 60 COMPETITOR 2 50 10 100 1k 10k FREQUENCY (Hz) 100k 13702-002 40 Figure 2. Typical CMRR vs. Frequency for G = 1 Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD8221-EP Enhanced Product TABLE OF CONTENTS Features .............................................................................................. 1 Thermal Characteristics ...............................................................5 Enhanced Product Features ............................................................ 1 ESD Caution...................................................................................5 Applications ....................................................................................... 1 Pin Configuration and Function Descriptions..............................6 Typical Connection Diagram .......................................................... 1 Typical Performance Characteristics ..............................................7 General Description ......................................................................... 1 Outline Dimensions ....................................................................... 14 Revision History ............................................................................... 2 Ordering Guide .......................................................................... 14 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 REVISION HISTORY 4/16—Revision 0: Initial Version Rev. 0 | Page 2 of 14 Enhanced Product AD8221-EP SPECIFICATIONS VS = ±15 V, VREF = 0 V, TA = 25°C, G = 1, RL = 2 kΩ, unless otherwise noted. Table 1. Parameter COMMON-MODE REJECTION RATIO (CMRR) CMRR DC to 60 Hz with 1 kΩ Source Imbalance G=1 G = 10 G = 100 G = 1000 CMRR at 10 kHz G=1 G = 10 G = 100 G = 1000 NOISE Voltage Noise, 1 kHz Input Voltage Noise, eNI Output Voltage Noise, eNO Referred to Input (RTI) G=1 G = 10 G = 100 to 1000 Current Noise VOLTAGE OFFSET1 Input Offset, VOSI Over Temperature Average Temperature Coefficient (TC) Output Offset, VOSO Over Temperature Average TC Offset RTI vs. Supply (PSR) G=1 G = 10 G = 100 G = 1000 INPUT CURRENT Input Bias Current Over Temperature Average TC Input Offset Current Over Temperature Average TC REFERENCE INPUT RIN IIN Voltage Range Gain to Output Test Conditions/Comments Min Typ Max Unit VCM = −10 V to +10 V 80 100 120 130 dB dB dB dB 80 90 100 100 dB dB dB dB VCM = –10 V to +10 V RTI noise = √eNI2 + (eNO/G)2 VIN+, VIN−, VREF = 0 8 75 nV/√Hz nV/√Hz f = 0.1 Hz to 10 Hz 2 0.5 0.25 40 6 f = 1 kHz f = 0.1 Hz to 10 Hz VS = ±5 V to ±15 V TA = −55°C to +125°C μV p-p μV p-p μV p-p fA/√Hz pA p-p 70 150 0.9 600 1.2 9 VS = ±5 V to ±15 V TA = −55°C to +125°C μV μV μV/°C μV mV μV/°C VS = ±2.3 V to ±18 V 90 100 120 120 100 120 140 140 0.5 TA = −55°C to +125°C 11 0.3 TA = −55°C to +125°C dB dB dB dB 2 3.75 1 2.25 7 20 50 VIN+, VIN−, VREF = 0 −VS 1 ± 0.0001 Rev. 0 | Page 3 of 14 60 +VS nA nA pA/°C nA nA pA/°C kΩ μA V V/V AD8221-EP Parameter POWER SUPPLY Operating Range Quiescent Current Over Temperature DYNAMIC RESPONSE Small Signal −3 dB Bandwidth G=1 G = 10 G = 100 G = 1000 Settling Time 0.01% G = 1 to 100 G = 1000 Settling Time 0.001% G = 1 to 100 G = 1000 Slew Rate GAIN Gain Range Gain Error G=1 G = 10 G = 100 G = 1000 Gain Nonlinearity G = 1 to 10 G = 100 G = 1000 G = 1 to 100 Gain vs. Temperature G=1 G > 12 INPUT Input Impedance Differential Common Mode Input Operating Voltage Range3 Over Temperature Input Operating Voltage Range Over Temperature OUTPUT Output Swing Over Temperature Output Swing Over Temperature Short-Circuit Current TEMPERATURE RANGE Specified Performance Enhanced Product Test Conditions/Comments Min VS = ±2.3 V to ±18 V ±2.3 TA = −55°C to +125°C Typ Max Unit 0.9 1 ±18 1 1.2 V mA mA 825 562 100 14.7 kHz kHz kHz kHz 10 80 μs μs 13 110 2 2.5 μs μs V/μs V/μs 10 V step 10 V step G=1 G = 5 to 100 G = 1 + (49.4 kΩ/RG) 1.5 2 1 1000 V/V 0.1 0.3 0.3 0.3 % % % % 5 7 10 15 15 20 50 100 ppm ppm ppm ppm 3 10 –50 ppm/°C ppm/°C –VS + 1.9 –VS + 2.0 –VS + 1.9 –VS + 2.0 +VS − 1.1 +VS − 1.2 +VS − 1.2 +VS − 1.3 GΩ||pF GΩ||pF V V V V –VS + 1.1 –VS + 1.4 –VS + 1.2 –VS + 1.6 +VS − 1.2 +VS − 1.3 +VS − 1.4 +VS − 1.5 V V V V mA +125 °C VOUT ± 10 V VOUT = −10 V to +10 V RL = 10 kΩ RL = 10 kΩ RL = 10 kΩ RL = 2 kΩ 100||2 100||2 VS = ±2.3 V to ±5 V TA = −55°C to +125°C VS = ±5 V to ±18 V TA = −55°C to +125°C RL = 10 kΩ VS = ±2.3 V to ±5 V TA = −55°C to +125°C VS = ±5 V to ±18 V TA = −55°C to +125°C 18 −55 1 Total RTI VOS = (VOSI) + (VOSO/G). Does not include the effects of external resistor RG. 3 One input grounded. G = 1. 2 Rev. 0 | Page 4 of 14 Enhanced Product AD8221-EP ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS Table 2. Parameter Supply Voltage Internal Power Dissipation Output Short-Circuit Current Input Voltage (Common-Mode) Differential Input Voltage Storage Temperature Range Operating Temperature Range Specification for a device in free air. Rating ±18 V 200 mW Indefinite ±VS ±VS −65°C to +150°C −55°C to +125°C Table 3. Package 8-Lead MSOP, 4-Layer JEDEC Board ESD CAUTION Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Rev. 0 | Page 5 of 14 θJA 135 Unit °C/W AD8221-EP Enhanced Product AD8221-EP –IN 1 8 +VS RG 2 7 VOUT RG 3 6 REF +IN 4 5 –VS TOP VIEW (Not to Scale) 13702-103 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 2, 3 4 5 6 7 8 Mnemonic −IN RG +IN −VS REF VOUT +VS Description Negative Input Terminal. Gain Setting Terminal. Place resistor across the RG pins to set the gain. G = 1 + (49.4 kΩ/RG). Positive Input Terminal. Negative Power Supply Terminal. Reference Voltage Terminal. Drive this terminal with a low impedance voltage source to level-shift the output. Output Terminal. Positive Power Supply Terminal. Rev. 0 | Page 6 of 14 Enhanced Product AD8221-EP TYPICAL PERFORMANCE CHARACTERISTICS T = 25°C, VS = ±15 V, RL = 10 kΩ, unless otherwise noted. 1600 3500 1400 3000 1200 2500 UNITS UNITS 1000 800 2000 1500 600 1000 400 –100 –50 0 50 100 150 CMR (µV/V) 0 –0.9 13702-003 0 –150 –0.3 0 0.3 0.6 0.9 INPUT OFFSET CURRENT (nA) Figure 7. Typical Distribution of Input Offset Current Figure 4. Typical Distribution for CMR (G = 1) 15 INPUT COMMON-MODE VOLTAGE (V) 2100 1800 1500 1200 900 600 300 –40 –20 0 20 40 60 INPUT OFFSET VOLTAGE (µV) VS = ±15V 5 0 VS = ±5V –5 –10 –15 –15 13702-004 0 –60 10 –10 –5 0 5 10 15 OUTPUT VOLTAGE (V) 13702-007 2400 UNITS –0.6 13702-006 500 200 Figure 8. Input Common-Mode Voltage vs. Output Voltage, G = 1 Figure 5. Typical Distribution of Input Offset Voltage 15 INPUT COMMON-MODE VOLTAGE (V) 3000 2500 1500 1000 VS = ±15V 5 0 VS = ±5V –5 –10 0 –1.5 –15 –15 –1.0 –0.5 0 0.5 1.0 INPUT BIAS CURRENT (nA) 1.5 Figure 6. Typical Distribution of Input Bias Current Rev. 0 | Page 7 of 14 –10 –5 0 5 OUTPUT VOLTAGE (V) 10 15 13702-008 500 13702-005 UNITS 2000 10 Figure 9. Input Common-Mode Voltage vs. Output Voltage, G = 100 AD8221-EP Enhanced Product 0.80 180 0.75 160 0.70 140 0.60 VS = ±5V 0.55 120 GAIN = 10 100 GAIN = 1 60 0.45 40 –10 –5 0 5 10 15 COMMON-MODE VOLTAGE (V) 20 0.1 1 100 1k 10k 100k 1M Figure 13. Positive PSRR vs. Frequency, RTI (G = 1 to 1000) 2.00 180 1.75 160 1.50 140 1.25 1.00 0.75 GAIN = 100 120 GAIN = 10 100 GAIN = 1 80 0.50 60 0.25 40 0 0.01 0.1 1 10 WARM-UP TIME (min) 20 0.1 100 1k 10k 100k 1M Figure 14. Negative PSRR vs. Frequency, RTI (G = 1 to 1000) 5 70 VS = ±15V GAIN = 1000 60 3 50 2 40 INPUT BIAS CURRENT –1 20 10 –2 0 –3 –10 –4 –20 5 20 35 50 65 TEMPERATURE (°C) 80 95 110 125 GAIN = 1 –30 100 13702-011 –5 –55 –40 –25 –10 GAIN = 10 1k 10k 100k 1M FREQUENCY (Hz) Figure 12. Input Offset Current and Input Bias Current vs. Temperature Rev. 0 | Page 8 of 14 Figure 15. Gain vs. Frequency 10M 13702-015 INPUT OFFSET CURRENT GAIN = 100 30 GAIN (dB) 1 0 10 FREQUENCY (Hz) Figure 11. Change in Input Offset Voltage vs. Warm-Up Time 4 1 13702-013 NEGATIVE PSRR (dB) GAIN = 1000 13702-010 CHANGE IN INPUT OFFSET VOLTAGE (µV) 10 FREQUENCY (Hz) Figure 10. Input Bias Current (IBIAS) vs. Common-Mode Voltage (CMV) INPUT CURRENT (nA) GAIN = 1000 80 0.50 0.40 –15 GAIN = 100 13702-012 POSITIVE PSRR (dB) VS = ±15V 0.65 13702-009 INPUT BIAS CURRENT (nA) GAIN = 1000 Enhanced Product 160 INPUT VOLTAGE LIMIT (V) REFERRED TO SUPPLY VOLTAGES –0.4 GAIN = 100 120 GAIN = 10 100 –0 +VS GAIN = 1000 140 CMRR (dB) AD8221-EP GAIN = 1 80 60 –0.8 –1.2 –1.6 –2.0 –2.4 +2.4 +2.0 +1.6 +1.2 +0.8 +0.4 10 100 1k 10k 100k 1M FREQUENCY (Hz) +0 –0.4 GAIN = 100 –0.8 100 GAIN = 1 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES GAIN = 1000 GAIN = 10 80 60 15 RL = 10kΩ –1.2 RL = 2kΩ –1.6 –2.0 +2.0 +1.6 RL = 2kΩ +1.2 +0.8 RL = 10kΩ +0.4 –VS 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) +0 13702-017 40 0.1 20 –0 +VS 120 10 Figure 19. Input Voltage Limit vs. Supply Voltage, G = 1 160 CMRR (dB) 5 SUPPLY VOLTAGE ( ±V) Figure 16. CMRR vs. Frequency, RTI 140 0 0 5 10 15 20 SUPPLY VOLTAGE (±V) 13702-020 1 13702-019 –VS 13702-016 40 0.1 Figure 20. Output Voltage Swing vs. Supply Voltage, G = 1 Figure 17. CMRR vs. Frequency, RTI, 1 kΩ Source Imbalance 30 100 VS = ±15V OUTPUT VOLTAGE SWING (V p-p) 80 60 20 0 –20 –40 –60 20 10 0 5 20 35 50 65 80 TEMPERATURE (°C) 95 110 125 1 10 100 1k 10k LOAD RESISTANCE (Ω) Figure 21. Output Voltage Swing vs. Load Resistance Figure 18. CMR vs. Temperature Rev. 0 | Page 9 of 14 13702-021 –80 –100 –55 –40 –25 –10 13702-018 CMR (µV/V) 40 AD8221-EP Enhanced Product +VS –0 VS = ±15V OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES –1 SOURCING ERROR (100ppm/DIV) –2 –3 +3 +2 SINKING 1 2 3 4 5 6 7 8 9 10 11 12 OUTPUT CURRENT (mA) –10 Figure 22. Output Voltage Swing vs. Output Current, G = 1 –6 –4 –2 0 2 4 OUTPUT VOLTAGE (V) 6 8 10 Figure 23. Gain Nonlinearity, G = 1, RL = 10 kΩ VOLTAGE NOISE SPECTRAL DENSITY RTI (nV/√Hz) 13702-023 ERROR (1ppm/DIV) –8 –6 –4 –2 0 2 4 OUTPUT VOLTAGE (V) 6 8 10 Figure 25. Gain Nonlinearity, G = 1000, RL = 10 kΩ VS = ±15V –10 –8 1k GAIN = 1 100 GAIN = 10 GAIN = 100 10 GAIN = 1000 GAIN = 1000 BW LIMIT 1 1 10 100 1k 10k 100k FREQUENCY (Hz) 13702-026 0 13702-022 –VS +0 13702-025 +1 Figure 26. Voltage Noise Spectral Density vs. Frequency (G = 1 to 1000) –8 –6 –4 –2 0 2 4 OUTPUT VOLTAGE (V) 6 8 10 2µV/DIV 1s/DIV Figure 27. 0.1 Hz to 10 Hz RTI Voltage Noise (G = 1) Figure 24. Gain Nonlinearity, G = 100, RL = 10 kΩ Rev. 0 | Page 10 of 14 13702-027 –10 13702-024 ERROR (10ppm/DIV) VS = ±15V Enhanced Product AD8221-EP 30 VS = ±15V OUTPUT VOLTAGE (V p-p) 25 20 GAIN = 1 GAIN = 10, 100, 1000 15 10 1s/DIV 0 1k 10k 100k 13702-031 0.1µV/DIV 13702-028 5 1M FREQUENCY (Hz) Figure 31. Large Signal Frequency Response 1k 5V/DIV 100 1 10 100 1k 10k FREQUENCY (Hz) Figure 29. Current Noise Spectral Density vs. Frequency 20µs/DIV 13702-032 10 7.9µs TO 0.01% 8.5µs TO 0.001% 13702-029 0.002%/DIV Figure 32. Large Signal Pulse Response and Settling Time (G = 1), 0.002%/DIV 5V/DIV 5pA/DIV 1s/DIV Figure 30. 0.1 Hz to 10 Hz Current Noise 4.9µs TO 0.01% 5.6µs TO 0.001% 20µs/DIV Figure 33. Large Signal Pulse Response and Settling Time (G = 10), 0.002%/DIV Rev. 0 | Page 11 of 14 13702-033 0.002%/DIV 13702-030 CURRENT NOISE SPECTRAL DENSITY RTI (fA/√Hz) Figure 28. 0.1 Hz to 10 Hz RTI Voltage Noise (G = 1000) AD8221-EP Enhanced Product 5V/DIV 0.002%/DIV 10.3µs TO 0.01% 13.4µs TO 0.001% 20µs/DIV Figure 34. Large Signal Pulse Response and Settling Time (G = 100), 0.002%/DIV 4µs/DIV 13702-037 13702-034 20mV/DIV Figure 37. Small Signal Response, G = 10, RL = 2 kΩ, CL = 100 pF 5V/DIV 0.002%/DIV 83µs TO 0.01% 112µs TO 0.001% 10µs/DIV Figure 35. Large Signal Pulse Response and Settling Time (G = 1000), 0.002%/DIV 13702-038 200µs/DIV 13702-035 20mV/DIV Figure 38. Small Signal Response, G = 100, RL = 2 kΩ, CL = 100 pF 13702-036 4µs/DIV 100µs/DIV 13702-039 20mV/DIV 20mV/DIV Figure 39. Small Signal Response, G = 1000, RL = 2 kΩ, CL = 100 pF Figure 36. Small Signal Response, G = 1, RL = 2 kΩ, CL = 100 pF Rev. 0 | Page 12 of 14 Enhanced Product AD8221-EP 1000 SETTLING TIME (µs) 10 SETTLED TO 0.001% SETTLED TO 0.01% 5 100 SETTLED TO 0.001% 10 0 0 5 10 15 20 OUTPUT VOLTAGE STEP SIZE (V) Figure 40. Settling Time vs. Output Voltage Step Size (G = 1) 1 1 10 100 GAIN Figure 41. Settling Time vs. Gain for a 10 V Step Rev. 0 | Page 13 of 14 1000 13702-041 SETTLED TO 0.01% 13702-040 SETTLING TIME (µs) 15 AD8221-EP Enhanced Product OUTLINE DIMENSIONS 3.20 3.00 2.80 8 3.20 3.00 2.80 5.15 4.90 4.65 5 1 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 0.85 0.75 15° MAX 1.10 MAX 0.40 0.25 6° 0° 0.23 0.09 0.80 0.55 0.40 COMPLIANT TO JEDEC STANDARDS MO-187-AA 10-07-2009-B 0.15 0.05 COPLANARITY 0.10 Figure 42. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters ORDERING GUIDE Model1 AD8221TRMZ-EP AD8221TRMZ-EP-R7 1 Temperature Range –55°C to +125°C –55°C to +125°C Package Description 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] Z = RoHS Compliant Part. ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13702-0-4/16(0) Rev. 0 | Page 14 of 14 Package Option RM-8 RM-8 Branding Y67 Y67