NVMFS4C01N D

NVMFS4C01N
Power MOSFET
30 V, 0.67 mW, 370 A, Single N−Channel,
Logic Level, SO−8FL
Features
•
•
•
•
•
•
Small Footprint (5x6 mm) for Compact Design
Low RDS(on) to Minimize Conduction Losses
Low QG and Capacitance to Minimize Driver Losses
NVMFS4C01NWF − Wettable Flanks Option for Enhanced Optical
Inspection
AEC−Q101 Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
V(BR)DSS
RDS(ON) MAX
ID MAX
0.67 mW @ 10 V
30 V
370 A
0.95 mW @ 4.5 V
D (5)
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
"20
V
TC = 25°C
ID
370
A
TC = 25°C
PD
161
W
TA = 25°C
ID
57
A
Parameter
Continuous Drain Current RqJC (Notes 1, 3)
Power Dissipation
RqJC (Notes 1, 3)
Continuous Drain Current RqJA (Notes 1, 2,
3)
Steady
State
MARKING
DIAGRAM
D
1
TA = 25°C
PD
3.84
W
TA = 25°C, tp = 10 ms
IDM
900
A
TJ, Tstg
−55 to
175
°C
IS
110
A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 35 A)
EAS
862
mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL
260
°C
Pulsed Drain Current
S (1,2,3)
N−CHANNEL MOSFET
Steady
State
Power Dissipation
RqJA (Notes 1, 2, 3)
G (4)
Operating Junction and Storage Temperature
Source Current (Body Diode)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
Symbol
Value
Unit
Junction−to−Case − Steady State
RqJC
0.93
°C/W
Junction−to−Ambient − Steady State (Note 2)
RqJA
39
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
D
4C01xx
AYWZZ
D
D
4C01N = Specific Device Code for
NVMFS4C01N
4C01WF= Specific Device Code of
NVMFS4C01NWF
A
= Assembly Location
Y
= Year
W
= Work Week
ZZ
= Lot Traceabililty
ORDERING INFORMATION
Package
Shipping†
NVMFS4C01NT1G
SO−8 FL
(Pb−Free)
1500 /
Tape & Reel
NVMFS4C01NT3G
SO−8 FL
(Pb−Free)
5000 /
Tape & Reel
NVMFS4C01NWFT1G
SO−8 FL
(Pb−Free)
1500 /
Tape & Reel
NVMFS4C01NWFT3G
SO−8 FL
(Pb−Free)
5000 /
Tape & Reel
Device
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
S
S
S
G
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
April, 2016 − Rev. 2
1
Publication Order Number:
NVMFS4C01N/D
NVMFS4C01N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
16.3
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25 °C
1
TJ = 125°C
100
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH)
VGS = VDS, ID = 250 mA
100
mA
nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
VGS(TH)/TJ
RDS(on)
1.3
2.2
5.8
V
mV/°C
VGS = 10 V
ID = 30 A
0.56
0.67
VGS = 4.5 V
ID = 30 A
0.76
0.95
mW
Forward Transconductance
gFS
VDS = 3 V, ID = 30 A
183
S
Gate Resistance
RG
TA = 25 °C
1.0
W
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
148
Total Gate Charge
QG(TOT)
63
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
10144
VGS = 0 V, f = 1 MHz, VDS = 15 V
5073
pF
18
VGS = 4.5 V, VDS = 15 V; ID = 30 A
nC
29
13
QG(TOT)
VGS = 10 V, VDS = 15 V,
ID = 30 A
139
nC
SWITCHING CHARACTERISTICS (Note 5)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
29
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V, ID = 15 A,
RG = 3.0 W
tf
68
ns
53
36
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.73
TJ = 125°C
0.55
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 10 A
1.1
V
87
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
QRR
43
ns
44
147
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
www.onsemi.com
2
NVMFS4C01N
TYPICAL CHARACTERISTICS
400
400
10 V
3.6 V
3.2 V
300
4.5 V
250
200
3.0 V
150
2.8 V
100
50
VGS = 2.6 V
250
200
TJ = 25°C
150
100
TJ = 150°C
TJ = −55°C
0
0.0
0.5
1.0
1.5
2.0
2.5
1.5
3.0
3.5
4
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
Figure 2. Transfer Characteristics
1.4
1.3
TJ = 25°C
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
1.6
3
Figure 1. On−Region Characteristics
ID = 30 A
1.8
2.5
VGS, GATE−TO−SOURCE VOLTAGE (V)
1.5
3
2
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
4
5
6
7
8
9
10
1.5
TJ = 25°C
1.4
1.3
1.2
1.1
1.0
0.9
VGS = 4.5 V
0.8
0.7
VGS = 10 V
0.6
0.5
0
50
100
150
200
250
300
350
400
VGS, GATE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
100000
VGS = 10 V
ID = 30 A
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
300
50
0
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE (W)
VDS = 3 V
350
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
350
3.4 V
1.4
1.2
1.0
10000
TJ = 125°C
TJ = 100°C
1000
TJ = 85°C
100
0.8
0.6
−50 −25
0
25
50
75
100
125
150
175
10
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
www.onsemi.com
3
30
NVMFS4C01N
VGS, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
100k
CISS
10k
COSS
1k
VGS = 0 V
TJ = 25°C
f = 1 MHz
100
CRSS
10
0.1
10
1
12
11
15
10
9
VDS
VGS
8
12
7
6
9
5
4
QGD
QGS
6
VDS = 15 V
ID = 30 A
TJ = 25°C
3
2
1
0
0
100
20
40
60
80
100
3
0
140
120
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
1000
tr
IS, SOURCE CURRENT (A)
td(off)
VGS = 4.5 V
VDD = 15 V
ID = 15 A
tf
td(on)
100
10
100
10
1
TJ = 150°C
0.1
0.1
1
10
100
0.3
0.5
0.4
TJ = 25°C
0.6
0.7
TJ = −55°C
0.8
0.9
1.0
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
1000
10 ms
ID, DRAIN CURRENT (A)
t, TIME (ns)
18
QT
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS
100
100 ms
VGS ≤ 10 V
TC = 25°C
10
RDS(on) Limit
Thermal Limit
Package Limit
1
0.1
1
1 ms
10 ms
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
www.onsemi.com
4
100
NVMFS4C01N
TYPICAL CHARACTERISTICS
100
RqJA = Steady State = 39°C/W
Duty Cycle = 0.5
0.2
0.1
0.05
1 0.02
0.01
R(t) (°C/W)
10
PCB Cu Area = 650 mm2
PCB Cu Thk = 2 oz
0.1
0.01
Single Pulse
0.000001
0.00001
0.0001
0.001
0.1
0.01
1
t, TIME (s)
Figure 12. Thermal Impedance (Junction−to−Ambient)
1000
100
IPEAK, (A)
0.001
TJ(initial) = 25°C
10
TJ(initial) = 100°C
1
1.00E−04
1.00E−03
TIME IN AVALANCHE (s)
Figure 13. Avalanche Characteristics
www.onsemi.com
5
1.00E−02
10
100
1000
NVMFS4C01N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE M
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
A
2
B
D1
2X
0.20 C
4X
E1
2
q
E
c
1
2
3
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
A1
4
TOP VIEW
C
SEATING
PLANE
DETAIL A
0.10 C
A
0.10 C
SIDE VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
DETAIL A
2X
0.10
b
C A B
0.05
c
0.495
8X
4.560
MILLIMETERS
MIN
NOM
MAX
1.10
0.90
1.00
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.00
5.30
5.15
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.30
6.15
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.575
0.71
1.20
1.35
1.50
0.51
0.575
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
2X
1.530
e/2
e
L
1
4
3.200
K
4.530
E2
PIN 5
(EXPOSED PAD)
L1
M
1.330
2X
0.905
1
G
0.965
D2
4X
1.000
4X 0.750
BOTTOM VIEW
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
www.onsemi.com
6
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NVMFS4C01N/D