ADA4870ARR-EBZ User Guide UG-685 One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Evaluating the ADA4870 High Speed, High Output Current Amplifier FEATURES Enables easy evaluation of the ADA4870 Single-supply or dual-supply operation Robust thermal management APPLICATIONS 12271-001 Organic light-emitting diode (OLED) panel driver Active matrix organic light-emitting diode (AMOLED) panel driver Base transceiver station (BTS) envelope tracking Power field effect transistor (FET) driver Ultrasound Piezoelectric driver PIN diode driver Waveform generation Automatic test equipment (ATE) Charge-coupled device (CCD) panel driver Figure 1. Evaluation Board, Top Side GENERAL DESCRIPTION The ADA4870 is a 40 V, unity-gain stable, high speed current feedback amplifier capable of delivering 1 A of output current from a 40 V supply. Manufactured using the Analog Devices, Inc., proprietary high voltage XFCB process, the innovative architecture of the ADA4870 enables high output power, high speed signal processing solutions in a variety of demanding applications. The ADA4870 is ideal for driving high voltage power FETs, piezoelectric transducers, PIN diodes, and a variety of other demanding applications that require high speed from high supply voltage and high current output. The ADA4870ARR-EBZ evaluation board provides a platform for quick and easy evaluation of the ADA4870. Figure 1 shows the top side of the evaluation board. Figure 2 shows the bottom side of the board with the large exposed copper area for applying a heat sink as needed. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. A | Page 1 of 9 12271-002 The ADA4870 is available in a power SOIC package (PSOP_3) featuring an exposed thermal slug that provides high thermal conductivity to the printed circuit board (PCB) and heat sink enabling efficient heat transfer for improved reliability in demanding environments. The ADA4870 operates over the industrial temperature range of −40°C to +85°C. Figure 2. Evaluation Board, Bottom Side UG-685 ADA4870ARR-EBZ User Guide TABLE OF CONTENTS Features .............................................................................................. 1 Asymmetrical Supplies and Mid Supply Bias (VMID) ............4 Applications ....................................................................................... 1 ON, Initial Power-Up, and Short Circuit ...................................5 General Description ......................................................................... 1 Shutdown (SD) ..............................................................................5 Revision History ............................................................................... 2 Thermal Monitor/Short-Circuit Flag (TFL) ..............................5 Evaluation Board Hardware ............................................................ 3 Thermal Design and Heat Sink Selection ..................................5 Board Stack Up ............................................................................. 3 Thermal Performance ...................................................................6 Power Supplies and Decoupling ................................................. 3 Evaluation Board Schematic ............................................................7 Input and Output .......................................................................... 3 Bill of Materials ..................................................................................8 Symmetrical Supplies and DC-Coupled Inputs ....................... 3 REVISION HISTORY 6/2016—Rev. 0 to Rev. A Changes to Applications Section, Figure 1, and Figure 2 ............ 1 Changes to Board Stack Up Section, Power Supplies and Decoupling Section, and Input and Output Section.................... 3 Added Symmetrical Supplies and DC-Coupled Inputs Section and Figure 3; Renumbered Sequentially........................................ 3 Added Asymmetrical Supplies and Mid Supply Bias (VMID) Section, Figure 4, and Figure 5 ....................................................... 4 Changes to Table 1 ............................................................................ 4 Changes to ON, Initial Power-Up, Short Circuit Section, Shutdown (SD) Section, and Thermal Design and Heat Sink Section.............................................................................. 5 Added Figure 6 .................................................................................. 5 Added Figure 7 .................................................................................. 6 Changes to Thermal Performance Section, Figure 8, and Figure 9 .............................................................................................. 6 Changes to Figure 10 ........................................................................ 7 Changes to Table 2 ............................................................................ 8 6/2014—Revision 0: Initial Version Rev. A | Page 2 of 9 ADA4870ARR-EBZ User Guide UG-685 EVALUATION BOARD HARDWARE The ADA4870ARR-EBZ evaluation board is a 6-layer board. All signal routing is on the top layer; the bottom layer is an exposed copper ground plane to facilitate the use of a heat sink. The heat sink is needed for high power dissipation projects, such as driving a 20 Ω load with the maximum output swing. The internal layers (Layer 2 through Layer 5) consist of the GND, VCC, VMID, and VEE planes. POWER SUPPLIES AND DECOUPLING The evaluation board can be powered using a single supply or dual supplies. The total supply voltage (VCC − VEE) must be between 10 V and 40 V. The board provides sufficient power supply decoupling for high current, fast slewing signals with 22 μF and 10 μF tantalum capacitors installed at C1 and C2 where the VCC supply voltage is applied to the board; 22 μF and 10 μF tantalum capacitors are installed at C22 and C23 where the VEE supply voltage is applied to the board. In addition, 0.1 μF ceramic chip capacitors (C4 and C5) are placed in close proximity to the VCC pins (Pin 1, Pin 18, Pin 19, and Pin 20). And 0.1 μF ceramic chip capacitors (C25 and C26) are placed in close proximity to the VEE pins (Pin 10, Pin 11, Pin 12, and Pin 13). SYMMETRICAL SUPPLIES AND DC-COUPLED INPUTS Figure 3 shows the noninverting or inverting configuration schematic when using dual, symmetrical supplies. When using the factory default settings with noninverting input, the ground reference is established through the 49.9 Ω termination resistors (R17 and R18), and the gain can be calculated using R20/(R19 + R18). The gain is +4.5 V/V for the factory default settings. When using the factory default settings with inverting input, the gain can be calculated using R20/R19. The gain is −4.0 V/V for the factory default settings. In dual-supply operation when installing R30 in either inverting or noninverting applications, position the jumper at P4 to short VMID to GND. INPUT AND OUTPUT Figure 10 shows the evaluation board schematic for the factory default settings when the board is shipped. The evaluation board uses edge-mount SMA connectors on the inputs and outputs for easy interfacing to signal sources and test equipment. When evaluating high voltage output signals using standard 50 Ω test equipment, R29 can be replaced with a 2.45 kΩ resistor that provides a signal division of 49.6 at the DIV_OUT SMA connector. The board can accommodate a capacitor load (C71) referenced to GND, and/or a power resistor in the TO-220 package (R30) referenced to VMID. When using input signals of 5 V and lower, the board is equipped with 49.9 Ω, 0.25 W resistors at R17 and R18 that are capable of handling the power when using the factory default settings. The factory default configuration provides for operation on dual symmetrical supplies in noninverting and inverting gains of +4.5 V/V, and −4.0 V/V respectively. For single-supply and asymmetrical supply operation, see the Asymmetrical Supplies and Mid Supply Bias (VMID) section and Table 1 for guidance on configuring the input terminations and supply settings. Rev. A | Page 3 of 9 R1 0Ω INP R17 49.9Ω R9 DNI R2 0Ω INN R18 49.9Ω R8 49.9Ω VMID R19 300Ω R10 DNI VCC ADA4870 R28 4.99Ω C71 NI R29 0Ω DIV_OUT R30 NI VEE R20 1.21kΩ VMID VMID NOTES 1. DNI = DO NOT INSTALL. 2. NI = NOT INSTALLED (USER-DEFINED VALUES). Figure 3. Schematic of Dual, Symmetrical Supplies with Noninverting or Inverting Input 12271-003 BOARD STACK UP UG-685 ADA4870ARR-EBZ User Guide INP R17 49.9Ω Figure 4 and Figure 5 show schematics when using a single supply with ac-coupled input. When ac coupling into the noninverting input (INP), the dc operating point of the amplifier can be established by installing a resistor at R9 connected to VMID and replacing R1 with an ac coupling capacitor (C1), as shown in Figure 4. The ac coupling capacitor (C1) combined with the VMID bias resistor (R9) form a high-pass filter with the cutoff frequency at 1/(2 × π × R9 × C1). The value of the ac coupling capacitor (C1) can be calculated based on the desired cutoff frequency. When ac coupling into the inverting input (INN), the dc operating point of the amplifier can be established by shorting R9 to VMID. Do not install R1. R9 1kΩ R2 DNI R18 49.9Ω ADA4870 VMID R19 300Ω R28 4.99Ω C71 NI DIV_OUT R30 NI GND VMID R20 1.21kΩ R10 0Ω R29 0Ω VMID NOTES 1. DNI = DO NOT INSTALL. 2. NI = NOT INSTALLED (USER-DEFINED VALUES). 12271-004 The ADA4870 must be referenced to a dc operating point. When using a single supply or asymmetrical dual supplies, apply the appropriate reference voltage to the VMID pin of P4 using a low impedance source, such as a dc supply. The recommended VMID reference voltage is VEE + (VCC – VEE)/2. VCC R8 49.9Ω C1 Figure 4. Schematic of Single Supply with Noninverting Input R1 DNI R17 49.9Ω R8 49.9Ω R9 0Ω VMID R19 C2 300Ω INN R18 49.9Ω R10 DNI VCC V+ ADA4870 R28 4.99Ω C71 NI R29 0Ω DIV_OUT R30 NI GND R20 1.21kΩ VMID VMID NOTES 1. DNI = DO NOT INSTALL. 2. NI = NOT INSTALLED (USER-DEFINED VALUES). 12271-005 ASYMMETRICAL SUPPLIES AND MID SUPPLY BIAS (VMID) Figure 5. Schematic of Single Supply with Inverting Input Table 1. Configuration of Input Components Supply1 Dual Dual Single Single 1 2 3 Configuration Noninverting Inverting Noninverting Inverting Coupling DC DC AC AC Gain (V/V) +4.5 −4.0 +5.0 −4.0 R9 (Ω) Do not insert Do not insert 1,000 0 R10 (Ω) Do not insert Do not insert 0 Do not insert Dual means symmetrical supplies; single means any nonsymmetrical supplies. If R30 is installed, short VMID to GND. When input ac coupling is required, replace the dc coupling resister with an ac coupling capacitor. Rev. A | Page 4 of 9 R1 (Ω) 0 0 Capacitor3 Do not insert R2 (Ω) 0 0 Do not insert Capacitor3 P4 (VMID) Open2 Open2 DC voltage supply DC voltage supply ADA4870ARR-EBZ User Guide UG-685 the amplifier. Do not float the pin. When turning the amplifier back on from the shutdown state, pull the SD pin high and then pull the ON pin low. Following this sequence is required to turn on the ADA4870. To enable the short-circuit protection, the ON pin must float following the turn on sequence. ON, INITIAL POWER-UP, AND SHORT CIRCUIT The board is shipped with the ON pin pulled low to VEE at P1 to ensure that the amplifier is enabled. Subsequently, floating the ON pin enables the short-circuit protection feature while the amplifier remains on. While ON is held low, the short-circuit protection feature is disabled. THERMAL MONITOR/SHORT-CIRCUIT FLAG (TFL) The TFL pin can be used to monitor relative changes in die temperature and to detect a short-circuit condition. During normal operation, the TFL pin outputs a dc voltage that is approximately 1.7 V (typical) above VEE and is related to the die temperature. The TFL voltage changes at approximately −3 mV/°C. When the die temperature exceeds approximately 140°C, the amplifier switches to an off state, dropping the supply current to approximately 5 mA while TFL continues to report a voltage indicative of the die temperature. When the die temperature returns to an acceptable level, the amplifier automatically resumes normal operation. The ON pin turns on the amplifier after initial power-up and after a short-circuit event. The pin is referenced to the negative supply (VEE). When a short-circuit condition is detected, the amplifier is disabled, the supply current drops to approximately 5 mA, and the TFL pin outputs a dc voltage of approximately 300 mV above VEE. To turn the amplifier back on after a short-circuit event, follow the previously described sequence for initial power-up. Pulling the ON pin high disables the amplifier and causes the supply current to drop to approximately 5 mA, as if a shortcircuit condition had been detected. Pin 3 of P2 uses a 5 V Zener diode (CR1) to set the high level at 5 V above VEE. THERMAL DESIGN AND HEAT SINK SELECTION In some applications, the ADA4870 may be required to dissipate as much as 10 W at elevated ambient temperatures of up to +85°C. The evaluation board provides robust thermal management under these conditions. The impedance at ON is approximately 20 kΩ. The ON pin is decoupled to VEE via C8 to shunt noise away from ON and to help avoid false triggers. SHUTDOWN (SD) The top of the board has an exposed copper area to which the ADA4870 PSOP package must be soldered. The exposed copper area allocated to the attachment of the PSOP slug is connected to the exposed copper ground plane on the bottom by an array of 136 thermal vias. A single internal ground layer (Layer 2) is also attached. Figure 6 shows a model of the ADA4870 package mounted to the evaluation board with an applied heat sink. The board factory default setting for the (P3) jumper pulls the SD pin to the HI position, VEE + 5.2 V. Pulling the SD pin low to VEE places the amplifier in a low power shutdown state, reducing the quiescent current to approximately 750 μA. The SD pin must be pulled low to a maximum of VEE + 0.9 V for shutdown, or pulled high to a minimum of VEE + 1.1 V to enable BOND WIRE DIE ATTACH TJ DIE θJC EXPOSED PADDLE EVALUATION BOARD THERMAL INTERFACE MATERIAL (TIM) HEAT SINK θCBOT TCASE θTIM TBOT θHS TTI TA Figure 6. Thermal Model for ADA4870 with Heat Sink Rev. A | Page 5 of 9 12271-006 THERMAL VIAS UG-685 ADA4870ARR-EBZ User Guide When necessary, a heat sink can be mounted to the bottom exposed copper using the mounting holes and an applied thermal interface material (TIM), such as the GC Electronics 10-8109. Refer to the manufacturer guidelines when applying the TIM; the TIM thermal resistance (θTIM) must be no more than 0.3°C/W. See Figure 7 for the dimensions of the heat sink and mounting hole locations. The approximate thermal resistance of the heat sink can be calculated from Equation 1, where θJC equals 1.1°C/W and θCBOT is approximately equal to 1.0°C/W. A heat sink having a thermal resistance of 4.2°C/W allows 10 W of power dissipation at an ambient temperature of 85°C. (θ JC θ CBOT θ TIM ) (1) Figure 8 and Figure 9 show the die temperature vs. time while the internal power dissipation is increased over several hours. The ambient environment for Figure 8 is 25°C in still air; for Figure 9, the ambient environment is 85°C in still air. Figure 8 shows the die temperature in two conditions: one without a heat sink and the other with a heat sink rated at 5.4°C/W. Figure 9 shows the die temperature in three conditions: one without a heat sink, the second with a heat sink rated at 5.4°C/W, and the third with a heat sink rated at 4.2 °C/W. For both Figure 8 and Figure 9, the board is positioned with the bottom side or heat sink facing up to facilitate natural convection. Using ac power dissipation and/or forced convection result in lower temperature. 150 140 where: TJ is the junction temperature. TA is the ambient temperature. PDISS is the chip power dissipation. θJC is the chip thermal resistance. θCBOT is the thermal resistance of the chip solder material and the PCB. θTIM is the TIM thermal resistance. DIE TEMPERATURE (°C) 130 120 110 NO HEAT SINK 5.4°C/W HEAT SINK 100 90 80 70 60 50 7W 40 30 8W 0 9W 60 10W 120 180 240 TIME (Minutes) 12271-008 TJ TA θ HS P DISS THERMAL PERFORMANCE Figure 8. Die Temperature vs. Time and Internal Power Dissipation on the Evaluation Board, Ambient Temperature = 25°C, No Air Flow 150 2.02" 2.33" 130 120 NO HEAT SINK 5.4°C/W HEAT SINK 4.2°C/W HEAT SINK 110 100 Figure 7. Dimensions of the Heat Sink and Mounting Holes 90 3W 0 4W 60 5W 120 6W 180 7W 240 8W 300 TIME (Minutes) 9W 360 10W 420 480 12271-009 1.09" DIE TEMPERATURE (°C) 140 12271-007 2.45" Figure 9. Die Temperature vs. Time and Internal Power Dissipation on the Evaluation Board, Ambient Temperature = 85°C, No Air Flow Rev. A | Page 6 of 9 ADA4870ARR-EBZ User Guide UG-685 EVALUATION BOARD SCHEMATIC 1 2 3 VEE 1 GND BLK 1 VCC RED VEE BLU 1 VCC 1 2 69157-102HLF AGND SAMTECTSW10608GS3PIN BYPASS CAPS AND ESD PROTECTION P4 VMID VCC AGND VEE P N AGND POWER CONNECTORS LO ON HI VCC R4 20K P2 1 2 3 LO SD HI 20K C8 1000PF 1 SMA SHORT HERE FOR INVERTING INP 1 JOHNSON142-0701-801 2 3 4 5 R1 R8 0 49.9 TFL GRN R89 1K VMID R2 JOHNSON142-0701-801 0 2 3 4 5 R18 49.9 1/4W DNI 300 P C7343 50V 22UF C22 C25 0.1UF 50V C0603 C7343-31 50V 10UF C23 C26 0.1UF 50V AGND C0603 R20 VCC VCC TFL VCC SD_N VCC ON_N OUT NC OUT INP OUT INN OUT OUT VEE NC VEE VEE 1.21K 1/2W PAD PAD IN_FB_1 R10 TBD0805 AGND VCC DUT1 1 2 3 4 5 6 7 8 9 10 INN_1 R19 20K VCC SMA SHORT HERE FOR NONINVERTING IN_1 N C9 INP_1 AGND 1 R7 20K R6 VEE R9 TBD0805 AGND INN C7 0.1UF 50V C0805H53 VEE 0.1UF DNI R17 49.9 1/4W VMID CR2 BZX84C5V6LT1/T3G VEE VEE C7343-31 C5 0.1UF 50V C0603 VCC R5 CR1 BZX84C5V6LT1/T3G C7343 C4 0.1UF 50V C0603 AGND SAMTECTSW10608GS3PIN SAMTECTSW10608GS3PIN C2 10UF 50V VEE P3 VEE VEE 1 2 3 C1 22UF 50V VEE 20 19 18 17 16 15 14 13 12 11 OUT_1 R28 R29 4.99 0 OUT_LOAD_1 P1 VCC 2 3 4 5 C71 DNI ADA4870 DIV_OUT 1 OUT_POST_SNUB_1 R30 DNI JOHNSON142-0701-801 AGND VEE VEE AGND AGND VMID AGND VMID 12271-010 AGND NOTES 1. CHANGE R1 OR R2 TO CAPACITOR (C1 OR C2) WHEN INPUT AC COUPLING IS REQUIRED. Figure 10. Evaluation Board Schematic Rev. A | Page 7 of 9 UG-685 ADA4870ARR-EBZ User Guide BILL OF MATERIALS Table 2. Item 1 2 3 4 5 6 7 8 9 10 11 12 Qty 1 1 2 2 5 1 1 1 2 3 1 3 Reference Designator Not applicable DUT1 C1 ,C22 C2, C23 C4, C5, C9, C25, C26 C7 C71 C8 CR1, CR2 INP, INN, DIV_OUT GND P1, P2, P3 13 1 P4 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 2 2 2 1 1 1 1 1 4 1 1 1 1 1 2 R1,R2 R9, R10 R17, R18 R19 R20 R28 R29 R30 R4, R5, R6, R7 R8 R89 TFL VCC VEE Jumper Description ADA4870 evaluation board ADA4870 Capacitor, tantalum, 7343 Capacitor, tantalum, 7343 Capacitor, ceramic, X7R, 0603 Capacitor, ceramic, X7R,0805, 50 V Capacitor, ceramic, COG, 0603, 50 V Capacitor ceramic, X7R, 0603, 50 V Diode, Zener, SOT-23 Connector, SMA end launch Connector, test point Connector, PCB, berg, header, straight, male, 3P Connector, PCB, berg, jumper, straight, male, 2P Resistor, 0603, jumper Resistor, 0805 Resister, 1206, 1% Resistor, 1206, 1% Resistor, 2010, 1% Resistor, 2512, 1% Resistor, 1206, jumper Resistor, TO-220 Resistor, 0603, 1% Resistor, 0603, 1% Resistor, 0603, 1% Connector, test point Connector, test point Connector, test point Jumper socket for P2 and P3 Rev. A | Page 8 of 9 Value Not applicable Not applicable 22 μF 10 μF 0.1 μF 0.1 μF Not installed 1000 pF 5.6 V Not applicable Black Not applicable Manufacturer/Part No. Analog Devices/ADA4870ARR-EBZ Analog Devices/ADA4870 AVX/TAJD226K050R AVX/TAJD106M050RNJ AVX/06035C104KAT2A Murata/GRM21BR71H104KA01L Murata/GRM1885C1H301JA01D AVX/06035C102KAT2A ON Semiconductor/BZX84C5V6LT1/T3G Johnson/142-0701-801 Components Corporation/TP104-01-00 Samtec/TSW-103-08-G-S Not applicable FCI/69157-102HLF 0Ω Not installed 49.9 Ω 300 Ω 1.21 kΩ 4.99 Ω 0Ω Not installed 20 kΩ 49.9 Ω 1 kΩ Green Red Blue Not applicable Panasonic/EERJ-3GEY0R00V Panasonic/ERJ-8ENF49R9V Vishay Dale/CRCW1206300RFKEA Panasonic/ERJ-12SF1211U Vishay Dale/CRCW25124R99FKEG Vishay Dale/CRCW12060000Z0EA Panasonic/ERJ-3EKF2002V Panasonic/ERJ-3EKF49R9V Panasonic/ERJ-3EKF1001V Components Corporation/TP104-01-05 Components Corporation/TP104-01-02 Components Corporation/TP104-01-06 FCI/65474-001LF ADA4870ARR-EBZ User Guide UG-685 NOTES ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. 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Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. ©2014–2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG12271-0-6/16(A) Rev. A | Page 9 of 9