EVALPRAHVOPAMP-1RZ User Guide
UG-670
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Evaluating Universal Precision High-Voltage Op Amps in SOIC Packages
FEATURES
LOW-PASS FILTER
Footprint for 8-pin SOIC with bottom thermal pad
Locations for passive filter components
Figure 1 is a typical representation of a first-order low-pass
filter. This circuit has a 6 dB per octave roll-off after a closed
loop −3 dB point defined by fC. Gain below this frequency is
defined as the magnitude of R2 to R1. The circuit can be
considered an ac integrator for frequencies well above fC;
however, the time domain response is that of a single RC,
rather than an integral.
GENERAL DESCRIPTION
The EVALPRAHVOPAMP-1RZ is an evaluation board that
accommodates single op amps in SOIC packages. It provides
the user with multiple choices and extensive flexibility for
different applications circuits and configurations. This board is
not intended to be used with high frequency components or
high speed amplifiers; however, it provides the user with many
combinations for various circuit types such as active filters,
differential amplifiers, and external frequency compensation
circuits. A few examples of application circuits are shown in this
user guide.
C3
R2
ACL = −(R2/R1); closed loop gain
Choose R4 equal to the parallel combination between R2 and
R1 in order to minimize errors due to bias currents.
DIFFERENCE AMPLIFIER AND PERFORMANCE
OPTIMIZATION
Figure 2 is useful as a computational amplifier in making a
differential-to-single-ended conversion or in rejecting a
common-mode signal. The output voltage VOUT is comprised of
two separate components:
60
GAIN (dB)
fL = 1/(2π × R1 × C3); unity gain frequency
Figure 2 shows an op amp configured as a difference amplifier.
The difference amplifier is the complement of the summing
amplifier, and allows the subtraction of two voltages or the
cancellation of a signal common to both inputs. The circuit
shown in
R1
fC
40
fC = 1/(2π × R2 × C3); −3 dB frequency
1.
20
2.
fL
A component VOUT1 due to VIN1 acting alone (VIN2 shortcircuited to ground).
A component VOUT2 due to VIN2 acting alone (VIN1 shortcircuited to ground).
R2
0
R1
10
100
1k
RELATIVE FREQUENCY (f)
10k
VIN2
VOUT
R3
R4
Figure 1. Simple Low-Pass Filter
12040-002
1
12040-001
–20
VIN1
R2/R1 = 100
Figure 2. Difference Amplifier
The algebraic sum of these two components must be equal to
VOUT. By applying the principles expressed in the output voltage
VOUT components, and by letting R3 = R1 and R4 = R2, then:
VOUT1 = VIN1 R2/R1
VOUT2 = −VIN2 R2/R1
VOUT = VOUT1 + VOUT2 = (VIN1 − VIN2) R2/R1
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. A | Page 1 of 4
UG-670
EVALPRAHVOPAMP-1RZ User Guide
For this type of application, CMRR depends upon how tightly
matched resistors are used. Poorly matched resistors result in a
low value of CMRR.
CURRENT-TO-VOLTAGE CONVERTER
Current can be measured in two ways with an operational
amplifier. Current can be converted to a voltage with a resistor
and then amplified, or injected directly into a summing node.
R2
To see how this works, consider a hypothetical source of error
for resistor R7 (1 − error). Using the superposition principle
and letting R4 = R2 and R7 = R6, the output voltage is as
follows:
Figure 3. Current-to-Voltage Converter
Figure 3 is a typical representation of a current-to-voltage transducer. The input current is fed directly into the summing node
and the amplifier output voltage changes to exactly the same
current from the summing node through R2. The scale factor of
this circuit is R2 volts per amp. The only conversion error in
this circuit is IBIAS, which is summed algebraically with IIN1.
VDD = VIN2 − VIN1
From this equation, ACM and ADM can be defined as follows:
ACM = R2/(R2 – R1) × error
EXTERNAL COMPENSATION TECHNIQUES
As mentioned above, errors introduced by resistor mismatch
can be a big drawback of discrete differential amplifiers, but
there are different ways to optimize this circuit configuration:
2.
The differential gain is directly related to the ratio R2/R1.
Therefore, one way to optimize the performance of this
circuit is to place the amplifier in a high gain
configuration. When larger values for resistors R2 and R4
and smaller values for resistors R1 and R3 are selected, the
higher the gain, the higher the CMRR. For example, when
R2 = R4 = 10 kΩ, and R1 = R3 = 1 kΩ, and error = 0.1%,
CMRR improves to greater than 80 dB. For high gain
configuration, select amplifiers with very low IBIAS and very
high gain (such as the ADA4661-2, ADA4610-2, and
AD8667) to reduce errors.
Select resistors that have much tighter tolerance and
accuracy. The more closely they are matched, the better the
CMRR. For example, if a CMRR of 90 dB is needed, match
resistors to approximately 0.02%.
Series Resistor Compensation
The use of external compensation networks is required to optimize
certain applications. Figure 4 is a typical representation of a
series resistor compensation for stabilizing an op amp driving
capacitive load. The stabilizing effect of the series resistor
isolates the op amp output and the feedback network from the
capacitive load. The required amount of series resistance
depends on the part used, but values of 5 Ω to 50 Ω are usually
sufficient to prevent local resonance. The disadvantages of this
technique are a reduction in gain accuracy and extra distortion
when driving nonlinear loads.
R02
VOUT
VIN
CL
RL
Figure 4. Series Resistor Compensation
RL = 10kΩ
CL = 2nF
GND
TIME (10µs/DIV)
Figure 5. Capacitive Load Drive Without Resistor
Rev. A | Page 2 of 4
12040-005
These equations demonstrate that when there is no error in the
resistor values, the ACM = 0 and the amplifier responds only to
the differential voltage applied to its inputs. Under these conditions,
the CMRR of the circuit is highly dependent on the CMRR of
the amplifier selected for this job.
12040-004
ADM = R2/R1 × {1 − [(R1 + 2R2/R1 + R2) × error/2]}
1.
VOUT
R4
VOLTAGE (200mV/DIV)
VOUT
R2 R1 + 2R2 error
R1 1 − R1 + R2 × 2
=
2
R
VD +
× error
R1 + R2
IIN1
12040-003
Difference amplifiers are commonly used in high-accuracy
circuits to improve the common-mode rejection ratio (CMRR).
EVALPRAHVOPAMP-1RZ User Guide
UG-670
GND
GND
TIME (10µs/DIV)
12040-008
VOLTAGE (200mV/DIV)
RL = 10kΩ
CL = 2nF
12040-006
VOLTAGE (200mV/DIV)
RL = 10kΩ
CL = 2nF
TIME (10µs/DIV)
Figure 6. Capacitive Load Drive with Resistor
Figure 8. Capacitive Load Drive Without Snubber
Snubber Network
RL = 10kΩ
CL = 500pF
RS = 100Ω
CS = 1nF
VOLTAGE (200mV/DIV)
Another way to stabilize an op amp driving a capacitive load is
with the use of a snubber, as shown in Figure 7. This method
presents the significant advantage of not reducing the output
swing because there is no isolation resistor in the signal path.
Also, the use of the snubber does not degrade the gain accuracy
or cause extra distortion when driving a nonlinear load. The
exact RS and CS combinations can be determined
experimentally.
RL
TIME (10µs/DIV)
12040-007
VIN
CL
CS
12040-009
VOUT
RS
Figure 9. Capacitive Load Drive with Snubber
Figure 7. Snubber Network
C3
P1
1
2
3
GND
V+
HIGH
VOLTAGE
V–
AGND
DNI
R2
C4
DNI
DNI
V+
+
V–
V1
JOHNSON142-0701-801
AGND
DNI
7 DUT
2 –IN V+
OUT 6
3 +IN
PAD
V– NC
RT1
DNI
G1
4
1
5
8
PAD
AGND
TP2
V2
JOHNSON142-0701-801
AGND
TP0
G2
RO1
RO2
DNI
DNI
RS
DNI
CS
DNI
CL
DNI
AGND
AGND
ADA4700-1ARDZ
R7
R3
1
2 3 45
AGND
DNI
C1
DNI
2 3 45
AGND
C6
DNI
R1
1
–
R5
DNI
C2
TP1
C5
DNI
DNI
C8
RT2
DNI
R4
DNI
AGND
AGND
DNI
1
VO
JOHNSON142-0701-801
5 4 32
RL
DNI G0
AGND
AGND
DNI
AGND
R6
DNI
V–
HIGH
VOLTAGE
–
C7
+
DNI
AGND
Figure 10. EVALPRAHVOPAMP-1RZ Electrical Schematic
Rev. A | Page 3 of 4
12040-010
V+
EVALPRAHVOPAMP-1RZ User Guide
12040-011
UG-670
Figure 11. EVALPRAHVOPAMP-1RZ Board Layout Patterns
REVISION HISTORY
5/14—Rev. 0 to Rev. A
Changes to Figure 1 and Figure 2 ................................................... 1
Changes to Figure 3 .......................................................................... 2
Changes to Figure 7 and Figure 10 ................................................. 3
2/14—Revision 0: Initial Version
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
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UG12040-0-5/14(A)
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