RT9193T

RT9193T
300mA, Thermal Folded Back CMOS LDO Regulator
General Description
Features
The RT9193T is designed for portable RF and wireless
applications with demanding performance and space
requirements. The RT9193T performance is optimized for
battery-powered systems to deliver ultra low noise and
low quiescent current. A noise bypass pin is available for
further reduction of output noise. Regulator ground current
increases only slightly in dropout, further prolonging the
battery life. The RT9193T also works with low-ESR
ceramic capacitors, reducing the amount of board space
necessary for power applications, critical in hand-held
wireless devices. The RT9193T consumes less than 0.01μA
in shutdown mode and has fast turn-on time less than
50μs. RT9193T is short circuit thermal folded back
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Short Circuit Thermal Folded Back Protection
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protected. RT9193T lowers its OTP trip point from 165°C
to 110°C when output short circuit occurs (VOUT < 0.4V)
providing maximum safety to end users. The other features
include ultra low dropout voltage, high output accuracy,
current limiting protection, and high ripple rejection ratio.
Available in the 5-lead of SC-70, SOT-23 and
WDFN-6L 2x2 packages.
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Ultra-Low-Noise for RF Application
Ultra-Fast Response in Line/Load Transient
Quick Start-Up (Typically 50us)
< 0.01uA Standby Current When Shutdown
Low Dropout : 220mV @ 300mA
Wide Operating Voltage Ranges : 2.5V to 5.5V
TTL-Logic-Controlled Shutdown Input
Low Temperature Coefficient
Current Limiting Protection
Thermal Shutdown Protection
Only 1uF Output Capacitor Required for Stability
High Power Supply Rejection Ratio
Custom Voltage Available
RoHS Compliant and 100% Lead (Pb)-Free
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Applications
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Ordering Information
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RT9193T-
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Package Type
U5 : SC-70-5
B : SOT-23-5
QW : WDFN-6L 2x2 (W-Type)
CDMA/GSM Cellular Handsets
Battery-Powered Equipment
Laptop, Palmtops, Notebook Computers
Hand-Held Instruments
PCMCIA Cards
Portable Information Appliances
Marking Information
For marking information, contact our sales representative
Lead Plating System
directly or through a Richtek distributor located in your
P : Pb Free
area.
G : Green (Halogen Free and Pb Free)
Output Voltage
15 : 1.5V
16 : 1.6V
:
34 : 3.4V
35 : 3.5V
1H : 1.85V
2H : 2.85V
Note :
Richtek products are :
`
(TOP VIEW)
EN
GND
VIN
1
6
2
5
3
7
4
BP
NC
VOUT
WDFN-6L 2x2
VOUT
BP
5
4
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.
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Pin Configurations
Suitable for use in SnPb or Pb-free soldering processes.
2
3
VIN GND EN
SC-70-5/SOT-23-5
DS9193T-06 April 2011
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1
RT9193T
Typical Application Circuit
RT9193T
VOUT
GND
Chip Enable
EN
+
CIN
1uF
VIN
+
VIN
COUT
VOUT
1uF
BP
CBP
22nF
Functional Pin Description
Pin Name Pin Function
VIN
Power Input Voltage
GND
Ground
EN
Chip Enable (Active High). Note that this pin is high impedance. There should be a pull low 100kΩ
resistor connected to GND when the control signal is floating.
BP
Reference Noise Bypass
VOUT
Output Voltage
Function Block Diagram
EN
Shutdown
and
Logic Control
Quick
Start
BP
VIN
VREF
+
-
Error
Amplifier
MOSFET
Driver
VOUT
Current-Limit
and
Thermal
Protection
GND
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DS9193T-06 April 2011
RT9193T
Absolute Maximum Ratings
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(Note 1)
Supply Input Voltage ---------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
SC-70-5 -------------------------------------------------------------------------------------------------------------------SOT-23-5 ------------------------------------------------------------------------------------------------------------------WDFN-6L 2x2 ------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
SOT-70-5, θJA ------------------------------------------------------------------------------------------------------------SOT-23-5, θJA ------------------------------------------------------------------------------------------------------------WDFN-6L 2x2, θJA ------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ----------------------------------------------------------------------------Storage Temperature Range ------------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Mode) --------------------------------------------------------------------------------------------MM (Machine Mode) ----------------------------------------------------------------------------------------------------
Recommended Operating Conditions
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6V
300mW
400mW
606mW
333°C/W
250°C/W
165°C/W
260°C
−65°C to 150°C
2kV
200V
(Note 4)
Supply Input Voltage ---------------------------------------------------------------------------------------------------- 2.5V to 5.5V
Ambient Temperature Range ------------------------------------------------------------------------------------------ −40°C to 85°C
Junction Temperature Range ------------------------------------------------------------------------------------------ −40°C to 125°C
Electrical Characteristics
(VIN = VOUT + 1V, CIN = COUT = 1uF, CBP = 22nF, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Output Voltage Accuracy
ΔVOUT
IOUT = 1mA
−2
--
+2
%
Current Limit
ILIM
RLOAD = 1Ω
360
400
--
mA
Quiescent Current
IQ
VEN ≥ 1.2V, IOUT = 0mA
--
90
130
μA
170
200
Dropout Voltage
(Note 5)
V DROP
IOUT = 200mA
mV
IOUT = 300mA
--
220
300
VIN = (VOUT + 0.3V) to 5.5V,
IOUT = 1mA
--
--
0.3
%
Line Regulation
ΔVLINE
Load Regulation
ΔVLOAD 1mA < IOUT < 300mA
--
--
0.6
%
Standby Current
ISTBY
VEN = GND, Shutdown
--
0.01
1
uA
EN Input Bias Current
IIBSD
VEN = GND or VIN
--
0
100
nA
V IL
VIN = 3V to 5.5V, Shutdown
--
--
0.4
VIN = 3V to 5.5V, Start-Up
1.2
--
--
--
100
--
--
−70
--
--
−50
--
--
165
--
EN Threshold
Logic-Low Voltage
Logic-High Voltage V IH
Output Noise Voltage
eNO
Power Supply
Rejection Rate
PSRR
f = 100Hz
f = 10kHz
Thermal Shutdown Temperature
DS9193T-06 April 2011
T SD
10Hz to 100kHz, IOUT = 200mA
COUT = 1uF
COUT = 1uF, IOUT = 10mA
V
uVRMS
dB
°C
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RT9193T
Parameter
Thermal Shutdown Temperature
Hysteresis
Symbol
Test Conditions
ΔTSD
Thermal Folded Back
Min
Typ
Max
Unit
--
30
--
°C
--
110
--
°C
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θ JA is measured in the natural convection at T A = 25°C on a low effective thermal conductivity test board
(Single Layer, 1S) of JEDEC 51-3 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. The dropout voltage is defined as VIN -VOUT, which is measured when VOUT is VOUT(NORMAL) − 100mV.
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DS9193T-06 April 2011
RT9193T
Typical Operating Characteristics
Output Voltage vs. Temperature
1.8
RT9193T-15PU5
VIN = 3.3V
CIN = COUT = 1uF X7R
RT9193T-15PU5
VIN = 3.3V
CIN = COUT = 1uF X7R
90
Quiescent Current (uA)
1.7
Output Voltage (V)
Quiescent Current vs. Temperature
95
1.6
1.5
1.4
1.3
85
80
75
70
65
1.2
60
-50
-25
0
25
50
75
100
125
-50
-25
0
Dropout Voltage vs. Load Current
TJ = 125°C
250
200
100
125
VIN = 4V to 5V
CIN = COUT = 1uF, X7R
0
TJ = 25°C
150
TJ = -40°C
-20
-40
100
ILOAD = 100mA
-60
50
-80
0
0
0.05
0.1
0.15
0.2
0.25
0.3
ILOAD = 10mA
10
0.01
100
0.1
1K
1
10K
10
100K
100
Load Current (A)
Frequency (Hz)
(kHz)
EN Pin Shoutdown Threshold vs. Temperature
EN Pin Shutdown Response
1.5
RT9193T-15PU5
VIN = 3.3V
CIN = COUT = 1uF X7R
EN Pin Voltage
(V)
1.75
1.25
Output Voltage
(V)
EN Pin Shoutdown Threshold (V)
75
PSRR
20
PSRR (dB)
Dropout Voltage (mV)
RT9193T-33PB
CIN = COUT = 1uF
50
Temperature (°C)
Temperature (°C)
300
25
1
0.75
10
VIN = 5V
CIN = COUT = 1uF
1M
1000
RT9193T-28PU5
No Load
5
0
2
1
0
0.5
-50
-25
0
25
50
75
100
125
Time (500μs/Div)
Temperature (°C)
DS9193T-06 April 2011
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5
RT9193T
Load Transient Response
VIN = 5V, VOUT = 2.8V
CIN = COUT = 1uF
50
Output Voltage
Deviation (mV)
0
20
0
-20
6
200
0
50
0
-50
Line Transient Response
Line Transient Response
VIN = 4V to 5V
COUT = 1uF
RT9193T-25PB
ILOAD = 1mA
Output Voltage
Deviation (mV)
4
10
0
-10
6
VIN = 4V to 5V
COUT = 1uF
RT9193T-25PB
ILOAD = 100mA
5
4
10
0
-10
Time (50μs/Div)
Time (100μs/Div)
Noise
Noise
RT9193T-30PB
ILOAD = 50mA
VIN = 4.5V
CIN = COUT = 1uF, X7R
200
100
100
Noise (μV)
200
0
-100
-200
RT9193T-15PU5
ILOAD = 50mA
0
-100
-200
f = 10Hz to 100kHz
Time (10ms/Div)
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ILOAD = 1mA to 250mA
Time (500μs/Div)
5
Output Voltage
Deviation (mV)
VIN = 5V, VOUT = 2.8V
400 CIN = COUT = 1uF
Time (500μs/Div)
VIN = 4.5V
CIN = COUT = 1uF, X7R
Noise (μV)
ILOAD = 1mA to 60mA
Load Current
(mA)
100
Input Voltage
Deviation (V)
Input Voltage
Deviation (V)
Output Voltage
Deviation (mV)
Load Current
(mA)
Load Transient Response
f = 10Hz to 100kHz
Time (10ms/Div)
DS9193T-06 April 2011
RT9193T
Output Voltage
(V)
EN Pin Voltage
(V)
Start Up
10
VIN = 5V
CIN = COUT = 1uF
RT9193T-28PU5
No Load
5
0
2
1
0
Time (10μs/Div)
DS9193T-06 April 2011
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RT9193T
Applications Information
Like any low-dropout regulator, the external capacitors used
with the RT9193T must be carefully selected for regulator
stability and performance. Using a capacitor whose value
is > 1μF on the RT9193T input and the amount of
capacitance can be increased without limit. The input
capacitor must be located a distance of not more than
0.5 inch from the input pin of the IC and returned to a
clean analog ground. Any good quality ceramic or
tantalum can be used for this capacitor. The capacitor
with larger value and lower ESR (equivalent series
resistance) provides better PSRR and line-transient
response. The output capacitor must meet both
requirements for minimum amount of capacitance and
ESR in all LDOs application. The RT9193T is designed
specifically to work with low ESR ceramic output capacitor
in space-saving and performance consideration. Using
a ceramic capacitor whose value is at least 1μF with ESR
is > 25mΩ on the RT9193T output ensures stability. The
RT9193T still works well with output capacitor of other
types due to the wide stable ESR range. Figure 1 shows
the curves of allowable ESR range as a function of load
current for various output capacitor values. Output
capacitor of larger capacitance can reduce noise and
improve load transient response, stability, and PSRR. The
output capacitor should be located not more than 0.5
inch from the VOUT pin of the RT9193T and returned to a
clean analog ground.
Region of Stable COUT ESR vs. Load Current
100.00
100
Instable
C OUT ESR (Ω)
10
10.00
Connecting a 22nF between the BP pin and GND pin
significantly reduces noise on the regulator output, it is
critical that the capacitor connection between the BP pin
and GND pin be direct and PCB traces should be as short
as possible. There is a relationship between the bypass
capacitor value and the LDO regulator turn on time. DC
leakage on this pin can affect the LDO regulator output
noise and voltage regulation performance.
Enable Function
The RT9193T features an LDO regulator enable/disable
function. To assure the LDO regulator will switch on, the
EN turn on control level must be greater than 1.2 volts.
The LDO regulator will go into the shutdown mode when
the voltage on the EN pin falls below 0.4 volts. For to
protecting the system, the RT9193T have a quickdischarge function. If the enable function is not needed in
a specific application, it may be tied to VIN to keep the
LDO regulator in a continuously on state.
Thermal Considerations
Thermal protection limits power dissipation in RT9193T.
When the operation junction temperature exceeds 165°C,
the OTP circuit starts the thermal shutdown function turn
the pass element off. The pass element turn on again
after the junction temperature cools by 30°C.
RT9193T lowers its OTP trip level from 165°C to 110°C
when output short circuit occurs (VOUT < 0.4V) as shown
in Figure 2. This limits IC case temperature under 100°C
and provides maximum safety to end users when output
short circuit occurs.
For continue operation, do not exceed absolute maximum
operation junction temperature 125°C. The power
dissipation definition in device is :
1
1.00
Stable
0.10
Bypass Capacitor and Low Noise
PD = (VIN−VOUT) x IOUT + VIN x IQ
0.01
Simulation Verify
RT9193T-15PU5
CIN = COUT = 1uF, X7R
0.00
0
50
100
150
200
Load Current (mA)
Figure 1
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8
250
300
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
DS9193T-06 April 2011
RT9193T
PD(MAX) = ( TJ(MAX) − TA ) /θJA
700
For recommended operating conditions specification of
RT9193T, where T J(MAX) is the maximum junction
temperature of the die (125°C) and TA is the maximum
ambient temperature. The junction to ambient thermal
resistance (θJA is layout dependent) for SOT-23-5 package
is 250°C/W, SC-70-5 package is 333°C/W and
WDFN-6L 2x2 package is 165°C/W on standard JEDEC
51-3 thermal test board. The maximum power dissipation
at TA = 25°C can be calculated by following formula :
PD(MAX) = (125°C−25°C) / 333 = 300mW (SC-70-5)
WDFN-6L 2x2
Power Dissipation (mW)
Where T J(MAX) is the maximum operation junction
temperature 125°C, TA is the ambient temperature and
the θJA is the junction to ambient thermal resistance.
600
500
SOT-23-5
400
SC 70-5
300
200
100
0
0
25
50
75
100
125
150
Ambient Temperature (°C)
Figure 3. Derating Curve for Packages
PD(MAX) = (125°C−25°C) / 250 = 400mW (SOT-23-5)
PD(MAX) = (125°C−25°C) / 165 = 606mW (WDFN-6L 2x2)
The maximum power dissipation depends on operating
ambient temperature for fixed T J(MAX) and thermal
resistance θJA. For RT9193T packages, the Figure 3 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
VOUT Short to GND
0.4V
VOUT
IOUT
TSD
165 °C 110 C
°
OTP Trip Point
110 °C
IC Temperature
80 °C
Figure 2. Short Circuit Thermal Folded Back Protection
when Output Short Circuit Occurs
DS9193T-06 April 2011
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9
RT9193T
Outline Dimension
H
D
L
B
C
b
A
A1
e
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.800
1.100
0.031
0.044
A1
0.000
0.100
0.000
0.004
B
1.150
1.350
0.045
0.054
b
0.150
0.400
0.006
0.016
C
1.800
2.450
0.071
0.096
D
1.800
2.250
0.071
0.089
e
0.650
0.026
H
0.080
0.260
0.003
0.010
L
0.210
0.460
0.008
0.018
SC-70-5 Surface Mount Package
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DS9193T-06 April 2011
RT9193T
H
D
L
B
C
b
A
A1
e
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.889
1.295
0.035
0.051
A1
0.000
0.152
0.000
0.006
B
1.397
1.803
0.055
0.071
b
0.356
0.559
0.014
0.022
C
2.591
2.997
0.102
0.118
D
2.692
3.099
0.106
0.122
e
0.838
1.041
0.033
0.041
H
0.080
0.254
0.003
0.010
L
0.300
0.610
0.012
0.024
SOT-23-5 Surface Mount Package
DS9193T-06 April 2011
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11
RT9193T
D2
D
L
E
E2
1
e
b
A
A1
SEE DETAIL A
2
1
2
1
A3
DETAIL A
Pin #1 ID and Tie Bar Mark Options
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
0.700
0.800
0.028
0.031
A1
0.000
0.050
0.000
0.002
A3
0.175
0.250
0.007
0.010
b
0.200
0.350
0.008
0.014
D
1.950
2.050
0.077
0.081
D2
1.000
1.450
0.039
0.057
E
1.950
2.050
0.077
0.081
E2
0.500
0.850
0.020
0.033
e
L
0.650
0.300
0.026
0.400
0.012
0.016
W-Type 6L DFN 2x2 Package
Richtek Technology Corporation
Richtek Technology Corporation
Headquarter
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
5F, No. 95, Minchiuan Road, Hsintien City
Hsinchu, Taiwan, R.O.C.
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: [email protected]
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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DS9193T-06 April 2011