LatticeECP3 AMC Evaluation Board – Revision B User’s Guide August 2012 Revision: EB56_01.1 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Introduction The LatticeECP3™ AMC Evaluation Board allows designers to investigate and experiment with the features of the LatticeECP3 high-speed SERDES transceivers in an AMC system environment. The features of the LatticeECP3 AMC Evaluation Board assist engineers with rapid prototyping and testing of their designs. The board follows portions of the PICMG AMC R2.0 AMC form-factor specification that allows users the capability to use the board in live system evaluations. This user’s guide is intended to be referenced in conjunction with evaluation design tutorials to demonstrate the LatticeECP3 FPGA. Figure 1. LatticeECP3 AMC Evaluation Board Details LatticeECP3 FPGA AMC Backplane Interface Connection Mini-AB USB Clock Oscillator FTDI USB-UART Pushbutton PROGRAMn & GSRn Serial SPI Flash Device DIP Switches LEDs Clock Oscillator FMC Interface Connector Status LEDs RJ45 Ethernet Parallel Flash Devices SFP Transceiver Cage/Socket ispClock Devices DDR Memory Devices Programming ispVM MachXO Jumpers Download Device Connection Power Manager Device 2 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Features • Single module AMC PCB card edge interface – Allows demonstration of AMC Fat Pipes – Common options interface • Allows control of SERDES PCS registers using the Serial Client Interface (ORCAstra) • DMC (FPGA Mezzanine Card) expansion connector • USB-B connection to UART for run-time control • RJ45 interface to 10/100/1000 Ethernet to SGMII • SFP transceiver module cage and connection • On-board Boot Flash – 64M Serial SPI Flash • DDR2 memory components (256MB x 32 bits) • 32-bit parallel, non-volatile memory that can be read, erased and reprogrammed • Switches, LEDs and displays for demonstration purposes • ispVM™ System software programming support • On-board reference clock sources The board can be used as provided with a front-panel SFP cage that accepts industry standard transceiver modules. It also includes a RJ45 network jack for Ethernet communication. However, by removing the SFP and RJ45 the board can be used with a standard VITA 57.1 FPGA Mezzanine Card. This permits user-specific FMCs to be used with the LatticeECP3 AMC Evaluation Board. The contents of this user’s guide include top-level functional descriptions of the various portions of the evaluation board, descriptions of the on-board connectors, diodes and switches and a complete set of schematics (Appendix D) and bill of materials (Appendix B). LatticeECP3 Device This board features a LatticeECP3 FPGA with a 1.2V core supply. It can accommodate all pin-compatible LatticeECP3 devices in the 1156-ball fpBGA (1mm pitch) package. A complete description of this device can be found in the LatticeECP3 Family Data Sheet. Note: The connections referenced in this document refer to the LFE3-95EA-FF1156 device. However, the LFE150EA-FF1156 has been used but provides full device migration pinouts. This device permits additional transceiver connections to the board. Available I/Os and associated sysIO™ banks may differ for other densities within this device family. Applying Power to the Board The LatticeECP3 AMC Evaluation Board is ready to power on. The board can be supplied with power from the uTCA backplane or chassis. For evaluations outside a telecom equipment environment Lattice provides the Lattice AMC Interface Card that provides power. See Appendix A for further information on the Lattice AMC Interface Card. All input power sources and on-board power supplies are fused with the surface mounted fuses noted below. 3 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 1. Board Power Supply Fuses (see Appendix D, Figure 27) Fuse Designator Description F1 12V Input Supply Fuse F2 3.3V Fuse F3 1.2V Core Fuse F4 1.8VFuse F5 1.2V Analog Supply F6 2.5V Fuse The above-mentioned supplies can be isolated from the on-board regulators by removal of the associated fuse. Surface-mounted test-loops are provided to apply alternative power sources to these supplies as required for testing purposes. Table 2. Power Supply Test Connections Test Point Designator Supply LP1 2.5V LP2 1.8V LP3 3.3V LP4 12V LP5 1.2V VCCA LP6 1.2V VCC Core LP7 Ground Power Management The board includes an ispPAC®-POWR1014A programmable power management IC (U7). This device controls the power sequence and monitors designated board supplies. The POWER GOOD indicator LED D10 is controlled via this device. This LED indicates all supplies are on and at proper operating levels. The power management device is factory-programmed to control and monitor the power supplies. The block diagram of the power management is shown in Figure 2. Figure 2. Power Management Scheme (see Appendix D, Figure 28) 12VDC VCC Core, +1.2v , 10A POL AMC EDGE I2C AMC MGT PWR AMC BOOT EN MachXO Controller POL MOSFET 3_3V, +3.3V, 10A DDR2 POWR 1014A 4 VREF, +0.9V, 30uA VTT, +0.9V, 0.5A LDO 1_8V, +1.8V, 2A LDO 1_2VA, +1.2V, 1.5A ETH_1_2V, +1.2V, 0.5A LDO LDO 2_5V, +2.5V, 1.5A LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Programming/FPGA Configuration A programming header is provided on the evaluation board that provides access to all on-board Lattice devices including the LatticeECP3 JTAG port. The on-board JTAG scheme utilizes a MachXO™ CPLD to serve as a controller for the JTAG when programmed with the BSCAN2 logic. The BSCAN2 controller is factory-programmed within the MachXO640C device. The JTAG chain includes the POWR1014A power manager device that is available in the JTAG chain and through the alternative chain that is controlled via the ispVM cable selection. The user can alter any design within the FPGA or either of the two ispClock™5406D devices. However, users should not alter the MachXO640C or POWR1014A devices without consulting Lattice. Figure 3. AMC JTAG Chain (see Appendix D, Figure 30) TCK BS_TDI TDO ispVM TMS MachXO TDO BSCAN2 TDI TMS TCK TDO TDI TMS TCK TDO BS_TDO BS_TMS EN LatticeECP3 TDO Select ispClock5406D ispClock5406D TCK TDO TDI TMS TCK TDO TMS Select ATDI TMS TDI TDI_SEL POWR1014A TDI TMS TCK TDO TCK TDI TDI BS_TCK TMS FMC ispVM Requirements Note: An ispDOWNLOAD™ Cable is included with each ispLEVER®-Base or ispLEVER-Advanced design tool shipment. Cables may also be purchased separately from Lattice. After initial board setup, use the following procedure to program the evaluation board. Instructions assume ispVM software has been installed on a local PC. Requirements: • PC with ispVM System v.19.0 (or later) programming management software, installed with appropriate drivers (USB driver for USB Cable, Windows NT/2000/XP parallel port driver for ispDOWNLOAD Cable). Note: An option to install these drivers is included as part of the ispVM System setup. • ispDOWNLOAD Cable (pDS4102-DL2A, HW7265-DL3A, HW-USB-1A, etc.) ispVM Download Interface J4 is an 8-pin JTAG connector used in conjunction with the ispVM USB download cable to program and control the device. 5 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 4. Standard ispVM Programming Cable Configuration 8 7 6 5 4 3 2 1 Table 3. ispVM JTAG Connector (see Appendix D, Figure 30) Pin Function Color 1 PWR Red 2 TDO Brown 3 TDI Orange 4 BS_Enable Note 1 5 PWR_SEL Note 2 6 TMS Purple 7 GND Black 8 TCK White 1. Only connected to enable BSCAN2 logic within the MachXO640 CPLD. Connect TRST (green lead) to this pin. 2. Only connected for alternate programming of POWR1014A power manager device. Connect ISPEN (yellow lead) to this pin. Figure 5. ispVM Download Connection (J4) TCK GND TMS PWR ATDI SEL See Table 3 Notes BSCAN2_EN TDI TDO +3.3V From ispVM Cable J4 Board Programming To program or reprogram the Lattice devices on the board, the user must understand the board JTAG topology. As shown in Figure 3, the board allows several different programming variations. These are user-controlled by the ispVM connections (J4) and jumper selections (J14- TMS SEL and J15- TDO SEL). An alternative chain can be used when it is desired to only communicate with the POWR1014A device. This alternative method utilizes the ispVM to drive the TDISEL input. A logic “1 “driven on the TDISEL of the POWR1014A will enable the ATDI input, ignoring the TDI data of the board JTAG chain and receiving TDI data directly from the ispVM input. Programming the POWR1014A Device 1. Connect the ispVM colored leads to J4 with the yellow lead connected to Pin 5 (PWR_SEL). 2. Add jumpers to J14 and J15 as shown in Figure 6. 6 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 6. Jumpers for Programming the POWR1014A Device (see Appendix D, Figure 39) 3. Open an ispVM session. 4. Go to Options > Cable and IO Port Setup > ispEN Connected, and set LOW > OK. Figure 7. Set ispEN =LOW 5. Click Scan on the top toolbar. 6. Browse to the programming file and select Go from the top toolbar to program device. 7 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 8. ispVM Session Window for POWR1014A Programming Programming the MachXO640C Device 1. Connect the ispVM colored leads to J4 with the yellow and green leads left unconnected. 2. Add jumpers to J14 and J15 as shown in Figure 9. Figure 9. Jumpers to Program the MachXO640C Device (see Appendix D, Figure 39) 3. Click Scan on the top toolbar. 8 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 10. ispVM Session Window for MachXO640C Only Programming 4. Place the POWR1014A in BYPASS. 9 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 11. POWR1014A Device Window 5. Browse to the programming file for the MachXO640 device and select FLASH Erase, Program, Verify. Using ispVM to Access and Program the Chained Devices In this configuration, the board will utilize the BSCAN2 soft core within the MachXO640C device. Use the ispVM System software to communicate with the targeted devices on the board. 1. Connect the ispVM colored leads to J4 with the green lead connected to Pin 4 (BS_EN). 2. Add jumpers to J14 and J15 as shown in Figure 12. Figure 12. Jumpers for Accessing the Complete JTAG Chain (see Appendix D, Figure 39) 3. Open an ispVM session. 10 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide 4. In the ispVM session, go to Open > File > Browse to locate the Lattice-supplied .xcf file. Figure 13. ispVM JTAG Chain Session Window In this session ispVM can control each device target separately by use of the BSCAN2 linker controller held within the MachXO640C device. As shown below, the devices included can be bypassed and/or programmed via this session. 1. To begin this session, navigate to the Options > Cable and IO Port Setup > TRST Connected. Set High > OK. 2. Next, navigate to ispTools > BSCAN Config > BSCAN2 4-PORT. Enable the appropriate targets. MSPort1 = ECP3 (U1), MSPort2 = CLK5406A (U28), MSPort3 = CLK5406A (U30), MSPort4 = FMC. 11 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 14. BSCAN2 GUI Control Window 3. From the window above, Configure BSCAN2 will initialize the JTAG targets. Configuration Status Indicators (see Appendix B, Figure 5) Figure 15. ECP3 Status LEDs and Pushbutton Controls (see Appendix D, Figure 30) The LEDs indicate the status of the LatticeECP3 FPGA configuration. • D12 (red) – Illumination indicates that the programming was aborted or reinitialized driving the INITN output low. • D15 (green) – Illumination indicates the successful completion of configuration by releasing the open collector DONE output pin. • D14 (red) – Illumination indicates that PROGRAMN is low. • D13 (red) – Illumination indicates that GSRN is low. PROGRAMN and GSRN These pushbutton switches assert/de-assert the logic levels on PROGRAMN (SW2) and GSRN (SW1). Depressing the button drives a logic level “0” to the device. Programming Serial SPI Flash Memory A Serial SPI (16-pin TSSOP 64M) Flash memory device (U8) is on-board for non-volatile configuration memory storage. A STMicro M25P64VMF16 device or equivalent is populated on-board. The Serial SPI Flash memory device can be configured easily via its JTAG port. This mode enables the FPGA to be programmed at power-up or by assertion of PROGRAMN with a bitstream stored in the memory device. 12 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide 1. Connect the LatticeECP3 AMC Evaluation Board and follow the beforementioned procedure to complete the BSCAN2 chain. 2. In the dialog box, select SPI Flash Programming mode in the Device Access Options pull-down menu. This will open the SPI Serial Flash Dialog box. Figure 16. Device Information Dialog Box 3. In the SPI Serial Flash Device dialog box, select SPI Flash Erase, Program, Verify in the Operation pulldown menu. 4. Select SPI Serial Flash in the Device Family pull-down menu, STMicro under the Vendor pull-down menu, SPI-M2564 under the Device pull-down menu, and 16-lead SOIC under the Package submenu. Figure 17. Select Device Dialog Box 13 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 18. Sample SPI Serial Flash Device Dialog Box 5. Click OK in the SPI Flash Device dialog box. Then click OK in the Select Device dialog box. The main configuration window will appear. 6. From the main programming window, select Go from the top toolbar. SPI Serial Flash programming will begin. On-Board Parallel SPI Flash Memory (see Appendix D, Figure 31) A 32-bit parallel Flash interface to two 16-bit Flash memory devices are included. The LatticeECP3 AMC Evaluation Board incorporates the use of the LatticeMico32™ system builder to access them. 14 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 4. Flash Memory Interface Signal LatticeECP31156BGA Signal LatticeECP3-1156BGA flash_a2 Y31 flash_d0 N30 flash_a3 Y32 flash_d1 N29 flash_a4 AA29 flash_d2 N26 flash_a5 Y30 flash_d3 P26 flash_a6 Y33 flash_d4 AF31 flash_a7 Y34 flash_d5 AF32 flash_a8 W26 flash_d6 AE29 flash_a9 W27 flash_d7 AE30 flash_a10 W29 flash_d8 AE31 flash_a11 W30 flash_d9 AE32 flash_a12 W28 flash_d10 N32 flash_a13 V29 flash_d11 N31 flash_a14 W31 flash_d12 N27 flash_a15 W32 flash_d13 N28 flash_a16 V26 flash_d14 AA27 flash_a17 V27 flash_d15 AA28 flash_a18 W33 flash_d16 AC33 flash_a19 W34 flash_d17 AC34 flash_a20 V28 flash_d18 AC30 flash_a21 U28 flash_d19 AB30 flash_a22 V30 flash_d20 AA30 flash_cem AN34 flash_d21 AA31 flash_oe_n AN33 flash_d22 AA26 flash_we_n AH33 flash_d23 AA25 flash_byte_n AJ33 flash_d24 AB33 flash_wp_n AP33 flash_d25 AB34 flash_rst_n AP32 flash_d26 N34 flash_rdby_a AL34 flash_d27 N33 flash_rdby_b AL33 flash_d28 P28 flash_d29 P27 flash_d30 Y25 flash_d31 Y26 15 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide On-Board Clock Capabilities (see Appendix D, Figure 40) The LatticeECP3 AMC Evaluation Board allows for several clock source options. These options are controlled via the two ispClock5406A programmable clock management devices. There are several on-board oscillator sources that can be synthesized and/or fanned out to several clock input destinations. As shown in Figure 19, the SERDES/PCS core of the FPGA has several optional connections that can be used with the PCB. All of the clock variations can be managed via programming of the ispClock5406A devices. • PCSA – Clock is sourced from an on-board 122.88, 125, or 156.25 MHz clock. If 122.88 MHz is used, however, this will disallow any non-CPRI interfaces of PCSA. PCSA can also receive a clock from the AMC backplane. • PCSB and PCSC – Clock is sourced from an on-board 125 or 156.25 MHz device. They can also receive clocks from the AMC backplane. The clocking will allow for different rate or same rate clocks to be individually provided to PCSB and PCSC reference clocks. • PCSD – Clock is sourced from an on-board 122.88, 125 or 156.25 MHz device. They can also receive clocks from the AMC backplane. • Clock from AMC – The telcom clock of the AMC edge-finger (TCLKB) will be connected. This clock is capable of driving a reference clock to the PCS reference clocks for all four quads. This clock can be disabled when not in use. • Clock to AMC – The telcom clock of the AMC edge-finger (TCLKB) will be connected. The clock is capable of driving off the AMC module to the backplane and can be the same reference source of any of the PCS quads. This clock can be disabled when not in use. • Telcom Clock – TCLKB is known as CLK2. This clock needs to be bi-directional because it will need to both receive or send a clock on the same pins of the backplane. It is controlled via a single-channel M-LVDS receiver device that determines whether the board is supplying or receiving the clock from the AMC backplane. Figure 19. Clock Controller Scheme (see Appendix D, Figure 40) PCSA 122.88 MHz PCSB 125.00 MHz 156.25 MHz PCSC Backplane PCSD Backplane 16 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide SERDES (see Appendix D, Figure 32) The PCSA quad is used for the following purposes. PCSA Usage 1. One duplex SERDES channel connected to the 1000BASEX to SFP interface. 2. One duplex SERDES channel connected to the Marvel 88E1111 PHY device SGMII utilizing RJ-45 connections. 3. One duplex Gigabit Ethernet SERDES channel with connectivity to the VITA57 FMC connector. 4. One duplex Gigabit Ethernet SERDES channel with connectivity to the AMC edge. 5. Reference clock will include a 125 MHz or 156.25 MHz source connected to the PCSA dedicated clock inputs. A 122.88 MHz source is available for CPRI-only demos that disallows any non-CPRI usage of PCSA interfaces. Figure 20. PCSA Channel Provisioning PCSA RJ45 with Magnetics AMC VITA57 AMC Connector Marvell 8E1111 3-Speed PHY GigE SFP 125 or 122.88 MHz PCS REF CLK Ch0 Ch1 FPGA I/O Ch2 Ch3 FPGA PCSB Usage All four duplex channels are interfaced to the AMC backplane on the PCB edge. PCSC Usage All four duplex channels are interfaced to the AMC backplane on the PCB edge. PCSD Usage All four duplex channels are interfaced to the FMC interface connector for use with a custom FMC module. 17 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide FPGA Test Pins (see Appendix D, Figure 37) General Purpose DIP Switch General purpose FPGA pins are available for user applications. FPGA pins are connected to a SPST slide actuated DIP switch (SW3). The switches are connected to logic level 0 when moved to the ON position inward toward the board and a 1 when outward from the board. In Figure 21, the SW3 (left) switch position 1 is indicated with DOT. Figure 21. PCB LEDs and Switches The designated pins are connected according to Table 5. Table 5. FPGA to DIP Pins FPGA BGA SW3 Switch Position C25 1 D25 2 G26 3 G25 4 B28 5 A28 6 A26 7 A27 8 18 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide General Purpose LEDs (see Appendix D, Figure 37) The LEDs on the LatticeECP3 AMC Evaluation Board are connected to general-purpose FPGA I/Os. These LEDs can be used to indicate the status of user designs. The LEDs illuminate when the FPGA output is driven to a LOW. Table 6 lists the LEDs and their associated FPGA pins. Table 6. LED Definitions Name FPGA Pin # PCB Designator LED Color LED1 A29 D25 Red LED2 A30 D26 Amber LED3 H26 D27 Green LED4 H25 D28 Blue LED5 A31 D29 Blue LED6 B31 D30 Green LED7 C29 D31 Amber LED8 C30 D32 Red DDR2 Memory Devices (see Appendix D, Figures 34 and 35) • The board is equipped with two 1.8V, 256MB/84-ball BGA DDR2 SDRAM memory devices such as the Micron Technology MT47H16M16BG-3:B TR device. • The DDR2 memory includes a 32-bit wide interface. • The board includes termination of data, address and command signals. It includes all power and external components needed to demonstrate the memory controller of the LatticeECP3 device. Table 7. DDR2 Memory Controller Interconnections Net Name LatticeECP3 FPGA Net Name LatticeECP3 FPGA DQ0 W1 A0 R4 DQ1 W8 A1 R1 DQ2 W9 A2 R2 DQ3 W4 A3 P10 DQ4 W3 A4 P9 DQ5 Y2 A5 R5 DQ6 Y1 A6 R7 DQ7 Y8 A7 P8 DQ8 AA1 A8 N8 DQ9 Y7 A9 P4 DQ10 AA7 A10 P5 DQ11 AA4 A11 N1 DQ12 AA3 A12 N2 DQ13 AB2 K_0 T2 DQ14 AB1 K_0# T1 19 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Net Name LatticeECP3 FPGA Net Name LatticeECP3 FPGA DQ15 AA5 K_1 AD4 DQ16 AN1 K_1# AD3 DQ17 AN2 CAS# T7 DQ18 AD9 BA0 T6 DQ19 AD8 BA1 T5 DQ20 AP2 ODT R3 DQ21 AP3 CS0# T3 DQ22 AL3 WE# T4 DQ23 AK3 VREF V7 DQ24 AN3 DM0 W2 DQ25 AM3 DM1 AA2 DQ26 AJ5 DM2 AJ4 DQ27 AJ6 DM3 AP5 DQ28 AL5 CEO# U9 DQ29 AM5 RAS# R8 DQ30 AL4 DQ31 AM4 DQS0 W6 DQS0# Y6 DQS1 AA10 DQS1# AB9 DQS2 AJ2 DQS2# AJ3 DQS3 AM6 DQS3# AN6 Ethernet Interface (see Appendix D, Figure 33) The Marvell 88E1111 Gigabit Ethernet transceiver device (U17) is included on-board. This physical layer device supports 1000BASE-T, 100BASE-TX, and 10BASE-T applications via a standard media interface to an RJ-45 (Bel Stewart “MAGJACK”, part number L829-1J1T-43) connection. The RJ-45 connection includes network magnetics that provide the proper signal conditioning, electro-magnetic interference suppression and signal isolation. This connector includes two LEDs and the board includes four status LEDs from the Marvell device. The LEDs are register-programmed. Detailed descriptions can be found in the Marvell data sheet. Table 8. PHY Status Indicators LED Status Description RJ45- Yellow LED RX RJ45- Yellow LED TX PCB Amber (D17) LINK 10 PCB Amber (D18) LINK 100 PCB Green (D19) LINK 1000 PCB Amber (D20) DUPLEX 20 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 22. Ethernet PHY Status LEDs Green - LED 1000 Green - Duplex Green - LED 10 Green - LED 100 The Marvell 88E1111 device communicates via a MAC interface to the LatticeECP3 device via a SGMII SERDES interconnection. Table 9. FPGA GPIO to PHY Interface Signal LatticeECP3 FPGA phy_mdio J21 phy_mdc H22 phy_resetn A23 phy_int_n B23 phy_freq_sel E22 phy_clk25 E23 phy_125clk C23 phy_crs D23 phy_col K22 CPLD Device (see Appendix D, Figure 39, U27) The board includes a Lattice MachXO (LCMXO-640C-MN100) CPLD device that is used in conjunction with the BSCAN2 linker design for managing the on-board JTAG chain. It is also used for general purpose board management functions. Table 10 lists connections from the MachXO device that are not associated with the BSCAN2 linker design. Table 10. CPLD TO FPGA Interconnections MachXO Pin Connected to B1 AMC Hotswap Switch SW4 C1 POWR1014A Input Pin 4 D2 LatticeECP3 GPIO AH27 D1 LatticeECP3 GPIO AH28 C2 LatticeECP3 GPIO AL29 E1 POWR1014A Output Pin 1 E2 POWR1014A Output Pin 10 F1 POWR1014A Input Pin 47 21 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide MachXO Pin Connected to F2 POWR1014A Output Pin 6 J1 LatticeECP3 GPIO D16 K1 LatticeECP3 GPIO K16 N14 AMC LED3 Blue M14 AMC LED2 Green L13 AMC LED1 Red L14 AMC I2C SDA AMC Pin 71 M13 AMC I2C SCL AMC Pin 56 AMC Backplane Interface (see Appendix D, Figure 39, CN1) Table 11. AMC Edge Interface Connections AMC Pin# Name 85 Connected To LatticeECP3 Pin GND AMC Pin# Name 86 Connected To LatticeECP3 Pin GND 84 PWR 12VDC 87 RX8- PCSC_HDINN3 AK22 83 PS0# See Schematic 88 RX8+ PCSC_HDINP3 AL22 GND 89 See Schematic 90 TX8- PCSC_HDOUTN3* AN22 See Schematic 91 TX8+ PCSC_HDOUTP3 * AP22 GND 92 82 81 FCLKA- 80 FCLKA+ 79 GND GND 78 TCLKB- N/C 93 RX9- PCSC_HDINN2 AK23 77 TCLKB+ N/C 94 RX9+ PCSC_HDINP2 AL23 76 GND 75 TCLKA- 74 TCLKA+ 73 95 GND N/C 96 TX9- PCSC_HDOUTN2* AN23 N/C 97 TX9+ PCSC_HDOUTP2 * AP23 GND 98 GND 72 PWR 12VDC 99 RX10- PCSC_HDINN1 AK24 71 SDA_L See Schematic 100 RX10+ PCSC_HDINP1 AL24 70 GND 101 GND 69 RX7- PCSB_HDINN0 AK17 102 TX10- PCSC_HDOUTN1* AN24 68 RX7+ PCSB_HDINP0 AL17 103 TX10+ PCSC_HDOUTP1 * AP24 67 GND 104 GND 66 TX7- PCSB_HDOUTN0* AN17 105 RX11- PCSC_HDINN0 AK25 65 TX7+ PCSB_HDOUTP0 * AP17 106 RX11+ PCSC_HDINP0 AL25 63 RX6- PCSB_HDINN1 AK16 108 TX11- PCSC_HDOUTN0* AN25 62 RX6+ PCSB_HDINP1 AL16 109 TX11+ PCSC_HDOUTP0 * AP25 64 GND 61 107 GND GND 110 GND 60 TX6- PCSB_HDOUTN1* AN16 111 RX12- N/C 59 TX6+ PCSB_HDOUTP1 * AP16 112 RX12+ N/C 58 GND 57 PWR 56 SCL_L 55 113 GND 12VDC 114 TX12- See Schematic 115 TX12+ GND 116 22 N/C N/C GND LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 11. AMC Edge Interface Connections (Continued) AMC Pin# Name Connected To LatticeECP3 Pin AMC Pin# Name 54 RX5- PCSB_HDINN2 AK15 117 RX13- N/C 53 RX5+ PCSB_HDINP2 AL15 118 RX13+ N/C 51 TX5- PCSB_HDOUTN2* AN15 120 TX13- 50 TX5+ PCSB_HDOUTP2 * AP15 121 TX13+ 52 GND 49 119 GND Connected To GND 122 N/C N/C GND 48 RX4- PCSB_HDINN3 AK14 123 RX14- N/C 47 RX4+ PCSB_HDINP3 AL14 124 RX14+ N/C 45 TX4- PCSB_HDOUTN3* AN14 126 TX14- 44 TX4+ PCSB_HDOUTP3 * AP14 127 TX14+ 46 GND 43 125 GND GND 128 N/C N/C GND 42 PWR 12VDC 129 RX15- N/C 41 ENABLE See Schematic 130 RX15+ N/C GND 131 40 39 RX3- 38 RX3+ 37 GND N/C 132 TX15- N/C 133 TX15+ GND 134 N/C N/C GND 36 TX3- N/C 135 RX16- N/C 35 TX3+ N/C 136 RX16+ N/C 34 GND 33 RX2- 32 RX2+ 31 137 138 TX16- N/C 139 TX16+ GND 30 TX2- 29 TX2+ 28 140 PWR 26 GA2 25 N/C N/C GND N/C 141 RX17- N/C 142 RX17+ GND 27 GND N/C 143 N/C N/C GND 12VDC 144 TX17- See Schematic 145 TX17+ GND 146 N/C N/C GND 24 RX1- N/C 147 RX18- N/C 23 RX1+ N/C 148 RX18+ N/C 22 GND 21 TX1- 20 TX1+ 19 149 150 TX18- N/C 151 TX18+ GND 18 PWR 17 GA1 16 GND N/C 152 12VDC 153 RX19- See Schematic 154 RX19+ GND 155 PCSA_HDINN0 AK21 156 TX19- 14 RX0+ PCSA_HDINP0 AL21 157 TX19+ 12 TX0- PCSA_HDOUTN0* 158 AN21 159 23 N/C N/C GND RX0- GND N/C GND 15 13 N/C N/C N/C GND RX20- N/C LatticeECP3 Pin LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 11. AMC Edge Interface Connections (Continued) AMC Pin# Name Connected To LatticeECP3 Pin AMC Pin# Name 11 TX0+ PCSA_HDOUTP0 * AP21 160 RX20+ 10 GND 161 LatticeECP3 Pin Connected To N/C GND 9 PWR 12VDC 162 TX20- N/C 8 RSRVD8 N/C 163 TX20+ N/C 7 GND 164 GND 6 RSRVD6 N/C 165 TCK N/C 5 GA0 See Schematic 166 TMS N/C 4 MP 3.3VDC MP 167 TRST# N/C 3 PS1# See Schematic 168 TDO N/C 2 PWR 12VDC 169 TDI N/C 1 GND 170 GND Notes: *Denotes AC coupling capacitor is on board. N/C = floating FMC Interconnection (see Appendix D, Figure 42, CN3) A VITA57.1 compliant FPGA Mezzanine Card (FMC) connection in available on the AMC module. This connector provides a low overhead bridge to the unique user FMC. Figure 23. FMC Interface Connection Table 12. FPGA Mezzanine Card Connections* FMC Pin FMC Port LatticeECP3 Port A2 DP1_M2C_P PCSD_HDINP0 AL13 A3 DP1_M2C_N PCSD_HDINN0 AK13 A1 LatticeECP3 BGA GND A4 GND A5 GND A6 DP2_M2C_P PCSD_HDINP1 AL12 A7 DP2_M2C_N PCSD_HDINN1 AK12 A8 GND A9 GND A10 DP3_M2C_P PCSD_HDINP2 AL11 A11 DP3_M2C_N PCSD_HDINN2 AK11 A12 GND 24 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 12. FPGA Mezzanine Card Connections* (Continued) FMC Pin FMC Port LatticeECP3 Port A13 LatticeECP3 BGA GND A14 DP4_M2C_P PCSD_HDINP2 AL10 A15 DP4_M2C_N PCSD_HDINN2 AK10 A16 GND A17 GND A18 DP5_M2C_P N/C A19 DP5_M2C_N N/C A20 GND A21 GND A22 DP1_C2M_P PCSD_HDOUTP0 AP13 A23 DP1_C2M_N PCSD_HDOUTN0 AN13 A24 GND A25 GND A26 DP2_C2M_P PCSD_HDOUTP1 AP12 A27 DP2_C2M_N PCSD_HDOUTN1 AN12 A28 GND A29 GND A30 DP3_C2M_P PCSD_HDOUTP2 AP11 A31 DP3_C2M_N PCSD_HDOUTN2 AN11 A32 GND A33 GND A34 DP4_C2M_P PCSD_HDOUTP3 AP10 A35 DP4_C2M_N PCSD_HDOUTN3 AN10 A36 GND A37 GND A38 DP5_C2M_P N/C A39 DP5_C2M_N N/C A40 B1 GND RES1 N/C B2 GND B3 GND B4 DP9_M2C_P N/C B5 DP9_M2C_N N/C B6 GND B7 GND B8 DP8_M2C_P B9 DP8_M2C_N N/C N/C B10 GND B11 GND B12 DP7_M2C_P N/C B13 DP7_M2C_N N/C B14 GND B15 GND 25 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 12. FPGA Mezzanine Card Connections* (Continued) FMC Pin FMC Port B16 DP6_M2C_P B17 DP6_M2C_N LatticeECP3 Port LatticeECP3 BGA N/C N/C B18 GND B19 GND B20 GBTCLK1_M2C_P RUM2_PLL P302 B21 GBTCLK1_M2C_N RUM2_PLL R292 B22 GND B23 GND B24 DP9_C2M_P N/C B25 DP9_C2M_N N/C B26 GND B27 GND B28 DP8_C2M_P B29 DP8_C2M_N N/C N/C B30 GND B31 GND B32 DP7_C2M_P N/C B33 DP7_C2M_N N/C B34 GND B35 GND B36 DP6_C2M_P N/C B37 DP6_C2M_N N/C B38 GND B39 B40 GND N/C RES0 C1 GND C2 DP0_C2M_P PCSA_HDOUTP2 AP19 C3 DP0_C2M_N PCSA_HDOUTN2 AN19 C4 GND C5 GND C6 DP0_M2C_P PCSA_HDINP2 AL19 C7 DP0_M2C_N PCSA_HDINN2 Ak19 C8 GND C9 C10 C11 GND LA06_P GPIO_01 D6 LA06_N 1 C5 LA10_P GPIO_01 A8 LA10_N 1 A9 GPIO_0 C12 GND C13 C14 C15 GND GPIO_0 C16 GND C17 C18 GND GPIO_01 LA14_P 26 G11 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 12. FPGA Mezzanine Card Connections* (Continued) FMC Pin C19 FMC Port LatticeECP3 Port LA14_N GPIO_0 C20 GND C21 GND LatticeECP3 BGA 1 G12 C22 LA18_P_CC GPIO_01 F10 C23 LA18_N_CC GPIO_01 E10 C24 GND C25 GND C26 LA27_P GPIO_01 C13 C27 LA27_N GPIO_01 G13 C28 GND C29 GND C30 SCL C31 SDA C32 GND C33 GND C34 GA0 C35 12P0V 12VDC C36 C37 GND 12P0V 12VDC C38 C39 GND 3P3V 3.3VDC C40 D1 GND PG_C2M AP27 D2 GND D3 GND D4 GBTCLK0_M2C_P RUM0_GPLL V342 D5 GBTCLK0_M2C_N RUM0_GPLL V332 D6 GND D7 D8 D9 GND LA01_P_CC GPIO_01 B1 LA01_N_CC GPIO_0 1 B2 LA05_P GPIO_01 B4 LA05_N 1 A3 LA09_P GPIO_01 B6 LA09_N GPIO_0 1 A6 LA13_P GPIO_01 C11 LA13_N 1 D11 D10 D11 D12 GND GPIO_0 D13 D14 D15 GND D16 D17 D18 GND GPIO_0 D19 GND D20 LA17_P_CC GPIO_01 E11 D21 LA17_N_CC GPIO_01 F12 D22 GND 27 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 12. FPGA Mezzanine Card Connections* (Continued) FMC Pin D23 D24 FMC Port LatticeECP3 Port LA23_P LA23_N D25 LatticeECP3 BGA GPIO_0 1 E13 GPIO_0 1 F14 GND D26 LA26_P GPIO_01 D10 D27 LA26_N GPIO_01 E10 D28 D29 GND TCK Connected to BSCAN Linker D30 TDI Connected to BSCAN Linker D31 TDO Connected to BSCAN Linker D32 3P3VAUX D33 TMS D34 TRST_L D35 GA1 D36 3P3V Connected to BSCAN Linker N/C 3.3VDC D37 D38 GND 3P3V 3.3VDC D39 D40 GND 3P3V 3.3VDC E1 GND E2 HA01_P_CC E3 HA01_N_CC N/C N/C E4 GND E5 GND E6 HA05_P E7 HA05_N N/C N/C E8 GND E9 HA09_P E10 HA09_N N/C N/C E11 GND E12 HA13_P E13 HA13_N N/C N/C E14 GND E15 HA16_P E16 HA16_N N/C N/C E17 GND E18 HA20_P N/C E19 HA20_N N/C E20 GND E21 HB03_P N/C E22 HB03_N N/C E23 E24 GND HB05_P N/C 28 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 12. FPGA Mezzanine Card Connections* (Continued) FMC Pin FMC Port E25 HB05_N LatticeECP3 Port LatticeECP3 BGA N/C E26 GND E27 HB09_P N/C E28 HB09_N N/C E29 GND E30 HB13_P N/C E31 HB13_N N/C E32 GND E33 HB19_P N/C E34 HB19_N N/C E35 GND E36 HB21_P E37 HB21_N N/C N/C E38 E39 GND VADJ GND E40 F1 GND PG_M2C AN28 F2 GND F3 GND F4 HA00_P_CC N/C F5 HA00_N_CC N/C F6 GND F7 HA04_P N/C F8 HA04_N N/C F9 GND F10 HA08_P N/C F11 HA08_N N/C F12 GND F13 HA12_P N/C F14 HA12_N N/C F15 GND F16 HA15_P F17 HA15_N N/C N/C F18 GND F19 HA19_P F20 HA19_N N/C N/C F21 GND F22 HB02_P F23 HB02_N N/C N/C F24 F25 GND HB04_P N/C 29 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 12. FPGA Mezzanine Card Connections* (Continued) FMC Pin FMC Port F26 HB04_N LatticeECP3 Port LatticeECP3 BGA N/C F27 GND F28 HB08_P N/C F29 HB08_N N/C F30 GND F31 HB12_P N/C F32 HB12_N N/C F33 GND F34 HB16_P N/C F35 HB16_N N/C F36 GND F37 HB20_P F38 HB20_N N/C N/C F39 F40 GND VADJ GND G1 GND G2 CLK0_C2M_P PCLKT2 U26 G3 CLK0_C2M_N PCLKC2 U27 G4 GND G5 GND G6 G7 LA00_P_CC GPIO_01 C3 LA00_N_CC GPIO_0 1 C4 LA03_P GPIO_01 B3 LA03_N GPIO_0 1 A2 LA08_P GPIO_01 B7 LA08_N GPIO_0 1 A7 LA12_P GPIO_01 J12 LA12_N 1 K12 G8 G9 G10 GND G11 G12 G13 GND G14 G15 G16 GND GPIO_0 G17 GND G18 LA16_P GPIO_01 K13 G19 LA16_N GPIO_01 J13 G20 GND G21 LA20_P GPIO_01 J14 G22 LA20_N GPIO_01 H13 G23 GND G24 LA22_P GPIO_01 K14 G25 LA22_N GPIO_01 K15 G26 GND 30 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 12. FPGA Mezzanine Card Connections* (Continued) FMC Pin G27 G28 FMC Port LatticeECP3 Port LA25_P LA25_N G29 G30 G31 G34 G37 D3 LA29_N GPIO_0 C2 LA31_P GPIO_01 A14 LA31_N GPIO_0 1 B14 LA33_P GPIO_01 D15 LA33_N 1 E15 GPIO_01 J16 GND GND GPIO_0 GND VADJ GND GND H1 VREF_A_M2C H2 PRSNT_M2C_L H3 H5 GND CLK0_M2C_P GPIO_01 A15 CLK0_M2C_N 1 B15 GPIO_0 H6 H7 H8 GND LA02_P GPIO_01 E4 LA02_N GPIO_0 1 D4 LA04_P GPIO_01 D5 LA04_N GPIO_0 1 C6 LA07_P GPIO_01 A4 LA07_N GPIO_0 1 A5 LA11_P GPIO_01 A10 LA11_N 1 B10 H9 H10 H11 GND H12 H13 H14 GND H15 H16 H17 B13 1 G40 H4 GPIO_0 GPIO_01 G38 G39 A13 1 LA29_P G35 G36 GPIO_0 GND G32 G33 LatticeECP3 BGA 1 GND GPIO_0 H18 GND H19 LA15_P GPIO_01 B11 H20 LA15_N GPIO_01 K13 H21 GND H22 LA19_P GPIO_01 A12 H23 LA19_N GPIO_01 B12 H24 GND H25 LA21_P GPIO_01 D12 H26 LA21_N GPIO_01 E12 H27 GND 31 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 12. FPGA Mezzanine Card Connections* (Continued) FMC Pin H28 H29 FMC Port LatticeECP3 Port GPIO_0 G13 GPIO_0 1 H14 LA28_P GPIO_01 J15 LA28_N GPIO_0 1 H15 LA30_P GPIO_01 C14 LA30_N GPIO_0 1 D15 LA32_P GPIO_01 G16 LA32_N 1 G17 LA24_P LA24_N H30 H31 H32 GND H33 H34 H35 GND H36 H37 H38 GND GPIO_0 H39 H40 LatticeECP3 BGA 1 GND VADJ GND J1 GND I2 CLK1_C2M_P J3 CLK1_C2M_N N/C N/C J4 GND J5 GND J6 HA03_P N/C J7 HA03_N N/C J8 GND J9 HA07_P J10 HA07_N N/C N/C J11 GND J12 HA11_P J13 HA11_N N/C N/C J14 GND J15 HA14_P J16 HA14_N N/C N/C J17 GND J18 HA18_P N/C J19 HA18_N N/C J20 GND J21 HA22_P N/C J22 HA22_N N/C J23 GND J24 HB01_P N/C J25 HB01_N N/C J26 GND J27 HB07_P N/C J28 HB07_N N/C 32 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 12. FPGA Mezzanine Card Connections* (Continued) FMC Pin FMC Port LatticeECP3 Port J29 GND J30 HB11_P J31 HB11_N N/C N/C J32 GND J33 HB15_P J34 HB15_N N/C N/C J35 GND J36 HB18_P J37 HB18_N N/C N/C J38 J39 GND VIO_B_M2C N/C J40 K1 LatticeECP3 BGA GND VREF_B_M2C N/C K2 GND K3 GND K4 CLK1_M2C_P N/C K5 CLK1_M2C_N N/C K6 GND K7 HA02_P N/C K8 HA02_N N/C K9 GND K10 HA06_P K11 HA06_N N/C N/C K12 GND K13 HA10_P K14 HA10_N N/C N/C K15 GND K16 HA17_P_CC K17 HA17_N_CC N/C N/C K18 GND K19 HA21_P N/C K20 HA21_N N/C K21 GND K22 HA23_P N/C K23 HA23_N N/C K24 GND K25 HB00_P_CC N/C K26 HB00_N_CC N/C K27 GND K28 HB06_P_CC N/C K29 HB06_N_CC N/C 33 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Table 12. FPGA Mezzanine Card Connections* (Continued) FMC Pin FMC Port LatticeECP3 Port K30 GND K31 HB10_P K32 HB10_N N/C N/C K33 GND K34 HB14_P K35 HB14_N N/C N/C K36 GND K37 HB17_P_CC K38 HB17_N_CC N/C N/C K39 K40 LatticeECP3 BGA GND VIO_B_M2C N/C 1. GPIO_0= LatticeECP3 Bank0/Top. These I/Os only support emulated LVDS differential outputs. Refer to the LatticeECP3 Family Data Sheet for details. 2, FPGA input pin only. Technical Support Assistance Hotline: 1-800-LATTICE (North America) +1-503-268-8001 (Outside North America) e-mail: [email protected] Internet: www.latticesemi.com Revision History Date Version Change Summary September 2010 01.0 Initial release. August 2012 01.1 Updated document with new corporate logo. Updated Programming schematic. © 2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. 34 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Appendix A. Lattice AMC Interface Card A Lattice-supplied bench board is available for simple demonstrations. The Lattice AMC Interface Card provides a simple interface for powering the LatticeECP3 AMC Evaluation Board when an AMC chassis or backplane is not available. The Lattice AMC Interface Card also provides hardware loopbacks and interfaces for simple debug and demonstrations. Figure 24. Lattice AMC Interface Card J2 – Jumper needed for ATX input J1 – 12V DC Wall Transformer ATX Power Module input To supply power from the wall transformer, first remove the jumper shunt from J2, connect the output connection of the power cord to J1, and plug the wall transformer into an AC wall outlet. This will immediately power up the board and the green LED D2 will illuminate. The 12V DC input will supply both 12V DC and 3.3V DC to all four AMC socket connections. The wall-wart is a good source for simple and less power consuming evaluations. TheLattice AMC Interface Card can alternately be connected to an ATX-style power supply via a standard 20-pin connection. A jumper must shunt J2. A switch SW1 will turn on power from an ATX supply that has an AC-supply and is in the power-on position. When the SW1 is in the ON position, green LEDs D2 and D3 will illuminate. The supply power from the ATX unit will supply both 12V DC and 3.3V DC to all four AMC socket connections. This supply is needed when multiple AMC modules are used with the card. The Lattice AMC Interface Card incorporates an alternate scheme to provide power to the board. The board is equipped to accept a main supply via the TB1 connection. This connection is provided for use with a benchtop supply adjusted to provide a nominal +12V DC. It should be set up similar to the wall power supply, as described above. When power is applied, the green LED D2 will illuminate indicating that 12V DC is present. Another green LED, D10, will also illuminate to indicate all individual supplies have come up to their operating levels 35 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 25. Lattice AMC Interface Card Orientation Figure 25 shows the correct orientation of the LatticeECP3 AMC Evaluation Boards in the Lattice AMC Interface Card. Users must assure correct insertion in the AMC sockets. Interface card schematics are shown in Appendix E and the bill of materials is shown in Appendix C. 36 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Appendix B. LatticeECP3 AMC Evaluation Board Bill of Materials Item Quantity 1 1 1a 1 2 Reference Part Manufacturer CG1 SFP_CAGE 1 CN1 AMC EDGE FINGER 3 1 CN2 HOST_SFP Tyco/AMP 4 1 CN3 VITA57 ASP-134486-01 5 2 C1, C2 100UF-D3POSCAP 6 5 C3, C5, C361, C406, C408 10UF-16V-TANTBSMT 7 2 C4, C12 8 3 C6, C7, C9 9 107 10 Part Number Description Tyco/AMP 6367034-1 Bottom EMI Cage Tyco/AMP 6367035-1 Top EMI Cage 1367073-1 20-pin host connector Sanyo 16TQC100M 100UF, 16V, D3. POSCAP AVX TAJB106K016R CAP TANTALUM 10UF 16V 10% SMD 330UF-DL3POSCAP Sanyo 6TPE330MIL 330UF, 6.3V, D3L. POSCAP 100UF-CER-1812SMT Murata GRM435R60J107ME20L 100UF, 6.3V, X5R, 1812 C14, C17, C28, C30, C32, 100NF-0603SMT C34, C36, C38, C40, C42, C52, C54, C56, C58, C60, C62, C64, C66, C70, C72, C76, C77, C78, C79, C80, C81, C82, C83, C84, C85, C88, C89, C106, C111, C112, C114, C115, C117, C119, C186, C188, C191, C193, C195, C197, C230, C232, C234, C237, C247, C249, C252, C254, C257, C260, C262, C264, C266, C268, C270, C274, C277, C279, C281, C283, C285, C287, C288, C290, C292, C302, C303, C304, C306, C312, C314, C319, C321, C322, C324, C327, C329, C331, C338, C340, C342, C346, C348, C350, C358, C359, C360, C362, C364, C366, C368, C371, C372, C373, C387, C388, C389, C404, C405, C407, C409, C410 Panasonic ECJ-1VF1C104Z CAP .1UF 16V CERAMIC Y5V 0603 16 C15, C20, C22, C24, C26, 22UF-16V-TANTBSMT C44, C46, C48, C50, C68, C86, C108, C189, C242, C245, C255 Kemet T491B226M016AT CAPACITOR TANT 22UF 16V 20% SMD 11 25 C16, C21, C23, C25, C27, 1UF-16V-0805SMT C45, C47, C49, C51, C69, C87, C107, C185, C190, C231, C243, C246, C256, C271, C272, C289, C351, C352, C353, C356 Panasonic ECJ-2FB1C105K CAP 1UF 16V CERAMIC 0805 X5R 12 100 C18, C19, C29, C31, C33, 10NF-0603SMT C35, C37, C39, C41, C43, C53, C55, C57, C59, C61, C63, C65, C67, C71, C73, C92, C93, C94, C95, C96, C97, C98, C99, C100, C101, C102, C103, C104, C105, C116, C118, C187, C194, C196, C198, C199, C200, C201, C235, C236, C248, C250, C251, C253, C258, C259, C261, C263, C265, C267, C269, C275, C276, C278, C280, C282, C284, C286, C297, C305, C307, C308, C309, C311, C313, C318, C320, C323, C325, C326, C328, C330, C337, C339, C341, C345, C347, C349, C357, C363, C365, C367, C369, C374, C376, C378, C380, C382, C384, C390, C392, C394, C396, C398, C400 Kemet C0603C103K5RACTU CAP .01UF 50V CERAMIC X7R 0603 Panasonic ECJ-0EB1A104K CAP .1UF 10V CERAMIC X5R 0402 Panasonic ECJ0EB1E103K CAP .01UF 25V CERAMIC X7R 0402 13 2 C109, C113 14 13 C110, C202, C203, C204, 10NF-0402SMT C205, C206, C244, C273, C310, C317, C334, C335, C336 100NF-0402SMT 37 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Item Quantity 15 32 C126, C129, C130, C131, 100NFX5R-0402SMT C132, C133, C134, C135, C136, C137, C138, C139, C140, C141, C142, C143, C152, C153, C154, C155, C156, C157, C158, C161, C168, C169, C170, C171, C172, C173, C174, C175 Kemet C0402C104K8PACTU CAP .10UF 10V CERAMIC X5R 0402 16 3 C184, C233, C291 Kemet B45196H2476K209 CAP TANTALUM 47UF 10V 10% SMD 17 1 C192 AVX 0402YC223KAT2A CAP CERM .022UF 10% 16V X7R 0402 18 2 C238, C298 100UF-D2EPOSCAP Sanyo 6TPE100MI 100UF, 6.3V, D2E. POSCAP 19 2 C370, C386 6.8UF-TANT-0805SMT Kemet T494R685K006AS CAP TANT 6.8UF 6.3V 10% SMD ALT Reference Part 47UF-10V-TANTBSMT Manufacturer Part Number Description TACR685K010XTA 20 12 C375, C377, C379, C381, 560PF-0603SMT C383, C385, C391, C393, C395, C397, C399, C401 Kemet C0603C561K5RACTU CAP 560PF 50V CERAMIC X7R 0603 21 41 C413, C414, C415, C416, 1000PF-0402SMT C417, C418, C419, C420, C421, C422, C423, C424, C425, C426, C427, C428, C429, C430, C431, C432, C433, C434, C435, C436, C437, C438, C439, C440, C441, C442, C443, C444, C445, C446, C447, C448, C449, C450, C451, C452, C453 Panasonic ECJ-0EB1E102K CAP 1000PF 25V CERAMIC X7R 0402 22 2 D1, D35 SCHOTTKY/VISHAYV12P10 Vishay V12P10-M3/87A TO277 SCHOTTKY DIODE 23 2 D2, D37 LED_GREEN_0603 Panasonic LNJ336W83RA LED GREEN 0603 SMD 24 12 D10, D15, D16, D19, D20, LED_GREEN_0402 D27, D30, D33, D34, D39, D40, D41 Rohm SML-P12PTT86 LED GREEN 0.2MM 13MCD 0402 SMD 25 5 D12, D13, D14, D25, D32 LED_RED_0402 Rohm SML-P12VTT86 LED RED 0.2MM 60MCD 0402 SMD 26 4 D17, D18, D26, D31 LED_AMBER_0402 Avago HSMA-C280 LED CHIP ALINGAP AMBER TOP MOUNT 0402SMD ALT SML-P12YT YELLOW ALT SML-P12DT ORANGE ALT SML AMBER 27 2 D28, D29 LED_BLUE_0402 Kingbright APHHS1005PBC/A LED 1X0.5MM 470NM BL WTR CLR SMD 28 1 D36 LED_BLUE_0603 Panasonic LNJ936W8CRA LED BLUE HIGH BRIGHT 0603 SMD 29 1 D38 LED_RED_0603 Panasonic LNJ236W82RA LED RED HIGH BRIGHT ESS SMD 30 19 FB5, FB6, FB7, FB8, MPZ1608Y600B FB13, FB14, FB15, FB16, FB17, FB18, FB20, FB21, FB22, FB23, FB24, FB25, FB26, FB27, FB28 TDK MPZ1608Y600B FERRITE CHIP 60 OHM 2.3A 0603 31 1 F1 F1251CT-ND Littlefuse 0154010.DR FUSEBLOCK WITH 10A FUSE SMD 32 5 F2, F3, F4, F5, F6 F1228CT-ND Littlefuse 0154005.DR FUSEBLOCK WITH 5A FUSE SMD 33 2 J2, J11 HEADER 2 Samtec TSW-102-07-T-S 2x1-0.25 Header 34 0 J3 HEADER 2[DNP] 35 1 J4 HEADER 8 Samtec TSW-108-07-T-S 8x1-0.25 Header 36 1 J5 RJ-45 Bel Fuse L-829-1J1T-43 Integrated RJ45 Connector 37 1 J9 USB_MINI_AB MOLEX 56579-0576 38 0 J10 HEADER 3(DNP) 39 1 J13 HEADER 3 Samtec TSW-103-07-T-S 3x1-0.25 Header 40 1 J14 HEADER 2X2 Samtec TSW-102-07-T-D 2x2-0.25 Header 41 1 J15 HEADER 3 Samtec TSW-103-07-T-S 3x1-0.25 Header 42 7 LP1, LP2, LP3, LP4, LP5, 5016 LP6, LP7 Keystone Electronics 5016 TEST POINT PC COMPACT SMT 43 3 L1, L2, L3 1UH-1210SMT Panasonic ELJ-FA1R0KF2 Inductor 1uH 10% 230mA 1210 (Digikey PCD1008CT-ND) 44 2 MH1, MH2 MHOLE_1 38 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Item Quantity 45 3 MH5, MH6, MH7 Reference M HOLE2 Part Manufacturer Part Number Description 46 0 PNL1 FRONT PANEL 47 4 PP1, PP2, PP3, PP4 PROBEPOINT 48 1 Q2 NTMS4503 ON Semiconductor NTMS4503NR2G MOSFET N-CH 28V 14A 8-SOIC 49 5 Q4, Q5, Q6, Q7, Q9 2N2222/SOT23 Diodes Inc MMBT2222A-7 TRANS NPN 40V 350MW SMD SOT23 50 1 RN1 EXBV8V472JV Panasonic EXBV8V472JV RES ARRAY 4.7K OHM 5% 4 RES SMD 51 1 RN2 EXB2HV681JV Panasonic EXB2HV681JV RES ARRAY 680 OHM 5% 8 RES SMD 52 1 RN3 EXB2HV472JV Panasonic EXB2HV472JV RES ARRAY 4.7K OHM 5% 8 RES SMD 53 1 RN4 EXB2HV201JV Panasonic EXB-2HV201JV RES ARRAY 200 OHM 5% 8 RES SMD 3 RP1, RP2, RP3 CTS-RT1402B7 CTS Corporation Resistor/Electrocomponents RT2402B7 RES NET DDR SDRAM 50 OHM 3X9 BGA 55 1 R1 680R-1206SMT Panasonic ERJ-8GEYJ681V RES 680 OHM 1/4W 5% 1206 SMD 56 22 R6, R7, R10, R11, R102, 0R-0603SMT R103, R104, R105, R185, R187, R198, R200, R213, R214, R228, R229, R242, R246, R287, R288, R296, R297 Panasonic ERJ-3GEY0R00V RES ZERO OHM 1/10W 5% 0603 SMD 57 0 R8, R9, R188, R197, OPEN-0603SMT R199, R290, R291, R292, R293, R255, R260, R263, R267, R268, R272, R276 58 1 R16 12_1K-0603SMT Susumu Co. Ltd. RG1608P-1212-B-T5 RES 12.1K OHM 1/10W .1% 0603 SMD 59 2 R17, R22 2K-0603SMT Panasonic ERJ-3EKF2001V RES 2.00K OHM 1/10W 1% 0603 SMD 60 3 R18, R19, R20 100R-0805SMT Panasonic ERJ-6GEYJ101V RES 100 OHM 1/8W 5% 0805 SMD 61 8 R21, R23, R25, R183, 1K-0603SMT R189, R194, R201, R281 Panasonic ERJ-3EKF1001V RES 1.00K OHM 1/16W 1% 0603 SMD 62 1 R24 470R-0603SMT Yageo RC0603FR-07470RL RES 470 OHM 1/10W 1% 0603 SMD 63 1 R26 806R-0603SMT Panasonic ERJ-3EKF8060V RES 806 OHM 1/10W 1% 0603 SMD 64 33 R45, R51, R52, R53, R54, 10K-0402SMT R55, R56, R58, R61, R64, R65, R66, R74, R75, R76, R77, R79, R80, R82, R83, R84, R85, R86, R90, R91, R93, R94, R100, R101, R278, R279, R280, R283 Panasonic ERJ-2RKF1002X RES 10.0K OHM 1/16W 1% 0402 SMD 65 6 R35, R36, R37, R39, R41, 2_2K-0402SMT R42 Panasonic ERJ-2RKF2201X RES 2.20K OHM 1/10W 1% 0402 SMD 66 4 R44, R215, R216, R282 330R-0402SMT Panasonic ERJ-2RKF3300X RES 330 OHM 1/10W 1% 0402 SMD 67 1 R59 100R-0603SMT Panasonic ERA-3YEB101V RES 100 OHM 1/16W .1% 0603 SMD 68 3 R72, R73, R78 680R-0603SMT Panasonic ERJ-3GEYJ681V RES 680 OHM 1/10W 5% 0603 SMD 69 2 R81, R96 220R-0603SMT Panasonic ERJ-3GEYJ221V RES 220 OHM 1/10W 5% 0603 SMD 70 3 R87, R88, R89 OPEN-0402SMT 71 12 R92, R217, R219, R220, 10K-0603SMT R221, R222, R223, R224, R320, R27, R29, R30 Panasonic ERJ-3GEYJ103V RES 10K OHM 1/10W 5% 0603 SMD 72 13 R95, R97, R118, R122, 4_7K-0402SMT R123, R195, R218, R270, R275, R284, R285, R286, R298 Panasonic ERJ-2RKF4701X RES 4.70K OHM 1/10W 1% 0402 SMD 73 4 R98, R99, R131, R132 100R-0402SMT Panasonic ERJ-2RKF1000X RES 100 OHM 1/10W 1% 0402 SMD 74 6 R106, R107, R108, R109, 680R-0402SMT R251, R252 Panasonic ERJ-2GEJ681X RES 680 OHM 1/10W 5% 0402 SMD ALT 54 39 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Item Quantity 75 25 R110, R111, R112, R113, 50R-0402SMT R114, R115, R116, R117, R190, R191, R192, R193, R196, R202, R203, R204, R205, R206, R207, R208, R209, R210, R211, R230, R250 Reference Part Vishay Manufacturer FC0402E50R0BTBST1 RES 50 OHM 50MW .1% 0402 SMD 76 2 R119, R120 33R-0402SMT Panasonic ERJ-2GEJ330X RES 33 OHM 1/16W 5% 0402 SMD 77 1 R121 22R-0603SMT Yageo RC0603FR-0722RL RES 22.0 OHM 1/10W 1% 0603 SMD 78 12 R57, R60, R62, R63, R67, 0R-0402SMT R124, R125, R126, R127, R128, R129, R130 Panasonic ERJ-2GE0R00X RES ZERO OHM 1/10W 5% 0402 SMD 79 6 R231, R233, R238, R245, 220R-0402SMT R258, R259 Panasonic ERJ-2RKF2200X RES 220 OHM 1/10W 1% 0402 SMD 80 1 R184 4_7K-0603SMT Panasonic ERJ-3EKF4701V RES 4.70K OHM 1/10W 1% 0603 SMD 81 1 R212 1_5K-0402SMT Panasonic ERJ-2RKF1501X RES 1.50K OHM 1/16W 1% 0402 SMD 82 1 R225 270R-0603SMT Panasonic ERJ-3EKF2700V RES 270 OHM 1/10W 1% 0603 SMD 83 2 R226, R227 330R-0603SMT Panasonic ERJ-3GEYJ331V RES 330 OHM 1/10W 5% 0603 SMD 84 24 R232, R234, R235, R236, 10R-0402SMT R237, R240, R241, R243, R244, R247, R248, R249, R254, R256, R257, R261, R262, R264, R266, R269, R271, R273, R274, R277 Panasonic ERJ-2RKF10R0X RES 10.0 OHM 1/10W 1% 0402 SMD 85 2 R239, R265 470R-0402SMT Panasonic ERJ-2RKF4700X RES 470 OHM 1/10W 1% 0402 SMD 86 1 R289 160R-2010SMT Panasonic ERJ-12ZYJ161U RES 160 OHM 3/4W 5% 2010 SMD 87 2 R294, R295 1M-2500V OHMCRAFT HVC2512L1005LT RES SMT 10M 2.5kV 20% 88 1 SEG1 ESD SEGMENT 89 4 SP1, SP2, SP7, SP8 TEST POINT 90 2 SW1, SW2 B3U-1000P Omron B3U-1000P SWITCH TACT SPST W/O GND SMD 91 1 SW3 TDA DIP-8 ITT TDA08H0SK1 SWITCH DIP 8POS HALF PITCH SMT 92 1 SW4 HOT SWAP C&K HDT0001 SWITCH DETECTOR SPST TOP ACT SMD 93 24 TP1, TP2, TP3, TP4, TP5, TestPoint TP6, TP18, TP19, TP20, TP21, TP22, TP23, TP24, TP25, TP26, TP27, TP28, TP29, TP30, TP31, TP32, TP33, TP34, TP35 94 1 U1 ECP3-95-1156BGA Lattice Supplied ECP3-150EA-8FN1156I 1156-fpBGA 95 1 U2 PTH12060W Texas Instruments PTH12060WAH TH MODULE PIP 12VIN 10A ADJ 10TH 96 1 U3 PTH12060L Texas Instruments PTH12060LAH TH MODULE PIP 12VIN 10A ADJ 10TH(0.8v-1.8v) 97 3 U4, U5, U6 SC1592 Semtech SC1592ISTRT IC LDO ADJ REG 3A SOIC-8L 98 1 U7 ispPAC-POWR1014A01T48/TN48 Lattice Supplied ISPPAC-POWR1014A01TN48I 48-TQFP 99 1 U8 M25P64-FLASH Numonynx M25P64-VMF6TP IC SRL FLASH 64MBIT 3V 16-SOP Wide(300MIL) 100 2 U9, U11 NC7WZ16MACO6A/Fairchild TinyLogic Fairchild NC7WZ16P6X IC BUFFER UHS DUAL SC70-6 101 1 U10 MAX6817 Maxim MAX6817-EUT+T ±15kV ESD-Protected, Dual, CMOS Switch Debouncers 102 1 U12 SN74LVC125A/SO14 Texas Instruments SN74LVC125AD IC QUAD BUS BUFFER GATE 14SOIC 103 2 U13, U14 M29W32-FLASH Numonynx M29W320DB70ZE6F IC FLASH 32MBIT 70NS 48TFBGA 104 1 U15 24AA1025-ISM Microchip Technology 24AA1025-I/SM IC SRL EEPROM 1024K 1.8V 8SOIC 105 1 U16 LT1963-ADJ Linear Technology LT1963ES8 IC REG LDO ADJ 1.5A LN 8SOIC 106 1 U17 88e1111 Marvell Single-port Gigabit Ethernet (117 TFBGA) 40 Part Number 88e1111-Bx-BABC000(Bx indicates any revision code) Description LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Item Quantity 107 2 U20, U23 Reference LP2997-SO8 Part 108 2 U21, U22 109 1 110 111 Manufacturer National Semiconductor Part Number Description LP2996M IC DDR TERMINATION REG 8SOIC DDR2-SDRAM-84FBGA Micron Technology MT47H16M16BG-3:B TR IC DDR2 SDRAM 256MB 84FBGA/3nS U25 FT232R Future Technology Devices International Ltd. FTDI_FT232RL USB Serial Converter SSOP28 1 U26 LTC4300A Linear Technology LTC4300A-1CMS8#PBF IC BUFFER BUS 2WR HOTSWAP 1 U27 LCMXO640M100/MN100 Lattice Supplied LCMXO-640C-4-M100C 100-CBGA 112 2 U28, U30 ispClock5406D Lattice Supplied ISPPAC-CLK5406D01SN48I 48-QFNS 113 1 U29 SN65MLVD3DRBT Texas Instruments SN65MLVD3DRBT IC M-LVDS RECEIVER 1CH 8-SON 114 1 U31 NC7SZ125/SOT23 Fairchild NC7SZ125P5X IC BUFF TRI-ST UHS N-INV SC705 115 1 X1 156.25MHz CTS CB3LV-3I-156M2500 OSC 156.2500 MHZ 3.3V SMD 116 1 X2 125.00MHz CTS CB3LV-3I-125M0000 OSC 125.0000 MHZ 3.3V SMD 117 1 X3 SL-122_88MHz Silicon Labs 530AA122M880DG OSC 122.88MHZ 3.3V SMD 118 1 Y1 25MHz Epson Toyocom Corporation SG-636PCE 25.0000MC0:ROHS OSCILLATOR 25.0000MHZ SMD 10.5mm x 5.8mm 119 3 R321,R322, R323 1K-0402SMT Panasonic ERJ-2RKF1001X RES 1.00K OHM 1/10W 1% 0402 SMD 41 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Appendix C. Lattice AMC Interface Card Bill of Materials Item Quantity 1 4 Reference Part CN1, CN2, CN3, CN4 AMC Manufacturer Part Number Description 2 1 C1 470UF-FKSMT Panasonic EEV-FK1V471Q CAP 470UF 35V ELECT FK SMD 3 1 C2 100UF-FKSMT Panasonic EEE-FK1V101XP CAP 100UF 35V ELECT FK SMD 4 1 C3 330UF-FKSMT Panasonic EEE-FK1C331P CAP 330UF 16V ELECT FK SMD 5 2 C4, C5 10UF-16V-TANTBSMT AVX TAJB106K016R CAP TANTALUM 10UF 16V 10% SMD 6 1 D1 SCHOTTKY/VISHAY-V12P10 Vishay V12P10-E3/87A TO277 SCHOTTKY DIODE 7 2 D2, D3 LED-SMT1206_GREEN Panasonic LNJ316C83RA LED GREEN (UP) W/LENS 1206 8 1 F1 F1251CT-ND Littlefuse 9 1 F2 F1228CT-ND Littlefuse 0154005.DR FUSEBLOCK WITH 5A FUSE SMD 10 1 J1 22HP037-2.1mm Condor 22HP037A Power input 11 1 J2 HEADER 2 Samtec TSW-102-07-T-S 2x1-0.25 Header 12 0 MH1, MH2, MH3, MH4 M HOLE2 13 1 PWR1 MOLEX_39-29-9202 14 2 R1, R3 470R-1206SMT Panasonic ERJ-8GEYJ471V RES 470 OHM 1/4W 5% 1206 SMD 15 2 R2, R4 0R-0603SMT Panasonic ERJ-3GEY0R00V RES ZERO OHM 1/10W 5% 0603 SMD 16 1 R5 2K-0603SMT Panasonic ERJ-3EKF2001V RES 2.00K OHM 1/10W 1% 0603 SMD 17 1 SW1 SW SPST C&K ET2MD1CBE 18 1 TB1 Terminal Block/ED1202DS On-Shore Tech. ED120/2DS TERMINAL BLOCK 5.08MM VERT 2POS 19 1 U1 PTH12060W Texas Instruments PTH12060WAH TH MODULE PIP 12VIN 10A ADJ 10-TH 4 Standoffs MH1, MH3, Digikey 8440GK-ND or equal (1” nylon 4-40 threaded) MH4, MH5 Molex 73391-0060 CONN JACK SMA STR 50 OHM PCB 4 12 4 FUSEBLOCK WITH 10A FUSE SMD Screws - Digikey H542-ND or equal (nylon 4-40 screw) AND washer SMA J3, J4, J5, J6,J7, J8, J9, J10, J11, J12, J13, J14 42 A B 5 CLK5406 CLK5406 4 Device Power Pins Power REFERENCE CLOCKS Power Mgt. PWR1014 32-bit DDR2 Bank 6 Bank 7 3 SERDES Bank 8 Bank 3 Bank 2 Bank 1 Test LEDs Switches GMII PHY Status & Control ECP3 FPGA Bank 0 FMC GPIO I2C PCSC C 3 PCSD FMC FAT PIPE PCSB AMC FAT PIPES 43 AMC GbE FMC GbE SGMII 1000/2500 BaseX PCSA D 4 Designator U1 is the FPGA DUT. The site names are associated to the ECP3-95. The 1156BGA will use the ECP3-150 device. This design only includes the additional SERDES connections for the ECP3-150 device. All other additional FPGA pins are left no connects. 5 2 Programming CLK Contrl RS232 32-bit Flash Flash(Contd) 2 Date: Size B Title Friday, May 28, 2010 1 Sheet 1 of 19 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 ECP3-AMC Eval Board Project Cover Page XO256 Shelf Ctrl BSCAN2 1 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Appendix D. LatticeECP3 AMC Evaluation Board Schematic Figure 26. Cover Page A B C D TP6 TP5 TP4 TP3 1 1 1 1 1_8V 3_3VIN 1K-0603SMT R25 R27 10K-0603SMT [3] 1_8V_EN TestPoint TestPoint TestPoint TestPoint TestPoint 1_8_TRIM_i 5 806R-0603SMT R26 EN SENSE OUT2 OUT1 SC1592 8 7 6 5 U4 1 2 U2 ILIM IN1 IN2 CNTL 1 2 3 4 1 5016 GND VIN AMC_MP 1_2V_A 1_8V 12_0V C7 100UF-CER-1812SMT 1.8V R18 100R-0805SMT GND 1 1 1 SENSE VOUT 5016 1 5016 LP6 1 5016 LP3 1 LP1 + 1_8V 3.3V 5 6 R7 4 1_2V_A R21 + 1K-0603SMT R29 10K0603SMT [3] 1_2VA_EN C5 10UF-16V-TANTBSMT 0R-0603SMT F1228CT-ND F2 5A Fast-Blo SMT Socketed Fuse VCC_CORE 3_3V 2_5V F4 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse 3_3VIN R17 2K-0603SMT R10 0R-0603SMT PTH12060W C93 10NF-0603SMT R9 OPEN-0603SMT 12_0V 3_3VIN 1 1 5016 LP5 1 LP2 J2 HEADER 2 HD2x1 DI C351 1 PLACE THESE NEXT TO ASSOCIATED FUSE MUP 1 10 INHIBIT# 3 8 TRACK TP2 GND 9 2 1 1UF-16V-0805SMT 9 MDWN ADJUST 4 GND 7 TP1 3_3VIN EN SENSE OUT2 OUT1 U5 SC1592 8 7 6 5 2K-0603SMT R22 + D4 D3 D2 D1 S1 S2 S3 G Q2 ILIM IN1 IN2 CNTL [3] NTMS4503 SO8 DI C12 330UF-DL3POSCAP 8 7 6 5 3_3VIN 1 5016 1 3_3V 1 2 3 4 R59 100R-0603SMT 3 12_0VIN Place Resistor Close to Q2 1.2V Analog 3 C6 100UF-CER-1812SMT 12_0V R19 100R-0805SMT GND C94 10NF-0603SMT 3V_GATE 1 2 3 4 1 5016 LP7 1 J3 HEADER 2[DNP] HD2x1 DI GND +12V LP4 PLACE THESE TOGETHER 2 1 GND 9 3V_GATE TestPoint C352 GND Pads Distributed around the board 1UF-16V-0805SMT + 1_2V_A 3_3VIN 1 2 U3 F5 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse [3] CORE_EN GND 2_5V C1 VOUT SENSE 2 5 6 EN SENSE OUT2 OUT1 2 U6 SC1592 8 7 6 5 1.2V Core ILIM IN1 IN2 CNTL + 12_0V Date: Size C Title + 2_5V Friday, May 28, 2010 1 Sheet 2 of 19 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 ECP3-AMC Eval Board Project 1 F6 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse 3_3VIN Power Generation C9 100UF-CER-1812SMT 2.5V + C4 330UF-DL3POSCAP 12VIN GOOD VCC_CORE R20 100R-0805SMT GND C95 10NF-0603SMT C3 10UF-16V-TANTBSMT 1 2 3 4 R1 12_0V 680R-1206SMT D2 LED_GREEN_0603 F1228CT-ND 5A Fast-Blo SMT Socketed Fuse R6 F3 + 0R-0603SMT C2 470R-0603SMT R24 R16 12_1K-0603SMT 1K-0603SMT R23 + R11 0R-0603SMT PTH12060L R30 10K-0603SMT [3] 2_5V_EN R8 OPEN-0603SMT 12_0V VIN SCHOTTKY/VISHAY-V12P10 D1 POWER INPUT F1251CT-ND 10A Fast-Blo SMT Socketed Fuse F1 MUP 10 INHIBIT# 3 9 MDWN 8 TRACK 100UF-D3POSCAP GND 7 2_5_TRIM_i ADJUST 4 3_3VIN 100UF-D3POSCAP GND 9 4 C353 44 1UF-16V-0805SMT G 5 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 27. Power Generation VCCA_TRIM_i A B C D 5 R63 0R-0402SMT R62 0R-0402SMT TDI_BUF TDI_PWR TMS_BUF TCK_BUF TDO_OUT VMON10 [12] PWR_SCL [12] PWR_SDA [5,14] [14] [5,14] [5,14] [14] R60 0R-0402SMT R57 0R-0402SMT [5] PWR_TDI_SEL_N [14] HOTSWAP [12] FPGA_IN [14] XO_IN 2_5V 4 C16 IN4 VMON7 VMON8 VMON9 VMON10 3_3VIN VCC_CORE 1_2V_A FOR POWR1014A programming ONLY: Connect ispVM Cable ISP/PROG(Yellow) to Pin 5 of programming header J4 R52 10K-0402SMT AMC_MP R67 0R-0402SMT 1_8V DDR2_FPGA_VTT + C15 AMC_MP AMC BOOT EN 39 38 19 17 18 16 22 21 44 46 47 48 25 26 27 28 32 33 34 35 36 37 XO CONTROLLER 1UF-16V-0805SMT VMON7 I2C 22UF-16V-TANTBSMT AMC MGT PWR ispPAC-POWR1014A-01T48/TN48 Data Sheet Version = June 2008 SCL SDA TDISEL ATDI TDI TMS TCK TDO IN1 IN2 IN3 IN4 VMON1 VMON2 VMON3 VMON4 VMON5 VMON6 VMON7 VMON8 VMON9 VMON10 U7 IN4 HVOUT1 HVOUT2 3 GNDA GNDD GNDD PLDCLK MCLK RESETB 30 31 7 42 43 40 13 12 11 10 9 8 6 5 4 3 2 1 15 14 POL POL SMBA_OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT9 OUT10 OUT11 OUT12 OUT13 OUT14 10NF-0603SMT C18 AMC_MP 100NF-0603SMT C14 ispPAC 23 41 29 45 20 24 VCCD VCCD VCCA VCCINP VCCJ VCCPROG 12VDC R51 R53 R54 PWR_GOOD EN_2_5V EN_1_8V EN_VCCA EN_CORE AMC_MP [2] 10K-0402SMT 10K-0402SMT 10K-0402SMT AMC_MP 1 1 Q6 Q4 [14] D10 LED_GREEN_0402 AMC_BOOT_EN 2N2222/SOT23 10K-0402SMT 2 R45 330R-0402SMT 1 1 R44 AMC_MP R66 10K-0402SMT EN_CORE AMC_MP [2] EN_1_8V R56 10K-0402SMT AMC_MP R61 10K-0402SMT R65 10K-0402SMT 2N2222/SOT23 2_5V_EN R64 10K-0402SMT AMC_MP EN_2_5V R55 10K-0402SMT AMC_MP [2] EN_VCCA 1_2VA_EN [2] Q5 Q7 PWR_GOOD 2N2222/SOT23 CORE_EN 2N2222/SOT23 1_8V_EN Date: Size C Title [12,14] Friday, March 05, 2010 1 Sheet ECP3- AMC Eval Board Project 3 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 1 Power Management PWR_GOOD ETH_1_2V, +1.2V, 0.5A 2_5V, +2.5V, 1.5A R58 10K-0402SMT XO_OUT [14] FPGA_OUT [12] DDR_REG_EN [9,11] 3V_GATE [2] LDO LDO 1_2VA, +1.2V, 1.5A LDO VTT, +0.9V, 0.5A VREF, +0.9V, 30uA 1_8V, +1.8V, 2A DDR2 3_3V, +3.3V, 10A VCC Core, +1.2v , 10A 2 LDO MOSFET XO_OUT 3 2 3 2 AMC EDGE 3 FPGA_OUT 4 AMC_BOOT_EN 3 2 3 2 45 G 5 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 28. Power Management VMON9 VMON8 A B C 5 ECP3-95-1156BGA U1I VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC N13 AB16 N21 N18 AB21 V22 N19 N14 AB15 AB20 N15 U22 AB19 P13 U13 R13 AB14 Y13 N16 AB18 V13 R22 N20 P22 N22 AB13 AB22 AB17 Y22 AA13 AA22 N17 C77 C31 C21 C78 C79 C81 C82 10NF-0603SMT C55 C45 PCSA_VCCOB 100NF-0603SMT C80 10NF-0603SMT C54 + C44 C83 C84 C33 PCSB_VCCIB C85 100NF-0603SMT 10NF-0603SMT C57 2 FB14 MPZ1608Y600B DI C56 C97 C98 C99 C100 C101 C102 C103 C104 C105 4 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT 10NF-0603SMT C96 VCC_CORE C34 + C22 C35 C23 PCSB_VCCIB 3 C37 PCSC_VCCIB C38 C39 + C24 C25 PCSC_VCCIB VCCPLL + C86 3_3V + C68 1_2V_A C87 C69 10NF-0603SMT C106 100NF-0603SMT AD16 AD18 AE19 AC17 AC18 AD13 AE16 AD17 AC22 AE23 AE12 AD22 AE22 AC13 AE13 AD19 Y23 AA23 P12 AC20 AC14 M20 AA12 Y12 R12 AC15 AC21 M21 R23 M15 M14 P23 T13 W13 T22 W22 100NF-0603SMT C60 C61 2 FB15 MPZ1608Y600B DI C107 1UF-16V-0805SMT 100NF-0603SMT C88 100NF-0603SMT C70 10NF-0603SMT C63 C49 PCSC_VCCOB 100NF-0603SMT C62 + C48 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT C36 2 FB7 MPZ1608Y600B DI PCSC_VCCOB 1_2V_A 1 1_2V_A 1 VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCA VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCAUX VCCPLL_L VCCPLL_L VCCPLL_R VCCPLL_R ECP3-95-1156BGA U1J 10NF-0603SMT C59 C47 PCSB_VCCOB 100NF-0603SMT C58 + C46 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT C32 2 FB6 MPZ1608Y600B DI PCSB_VCCOB 1_2V_A 1 1_2V_A 1 1UF-16V-0805SMT PCSA_VCCIB 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT 100NF-0603SMT C76 VCC_CORE PP3 VCC_CORE 100NF-0603SMT C52 C53 2 FB13 MPZ1608Y600B DI PCSA_VCCOB 1_2V_A 1 C30 + C20 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT C29 PCSA_VCCIB 2 FB5 MPZ1608Y600B DI C28 1_2V_A 1 22UF-16V-TANTBSMT 22UF-16V-TANTBSMT 1UF-16V-0805SMT 1UF-16V-0805SMT 22UF-16V-TANTBSMT 22UF-16V-TANTBSMT 3 22UF-16V-TANTBSMT 22UF-16V-TANTBSMT 1UF-16V-0805SMT 22UF-16V-TANTBSMT 22UF-16V-TANTBSMT FB17 MPZ1608Y600B DI 2 PP4 PP2 100NF-0603SMT 10NF-0603SMT C92 C108 22UF-16V-TANTBSMT + 1 2 3_3V 100NF-0603SMT C89 C42 10NF-0603SMT C72 100NF-0603SMT C64 C65 2 FB16 MPZ1608Y600B DI PCSD_VCCOB 10NF-0603SMT C71 C41 PCSD_VCCIB C43 + C26 C27 PCSD_VCCIB 10NF-0603SMT C73 Date: Size C Title PP1 10NF-0603SMT C67 C51 PCSD_VCCOB 100NF-0603SMT C66 + C50 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT C40 2 FB8 MPZ1608Y600B DI 1_2V_A 1 1_2V_A 1 2 22UF-16V-TANTBSMT 22UF-16V-TANTBSMT D 1 2 1UF-16V-0805SMT 1UF-16V-0805SMT 1UF-16V-0805SMT 1UF-16V-0805SMT 1UF-16V-0805SMT 1UF-16V-0805SMT 4 1 2 1 1 Friday, March 05, 2010 1 Sheet 4 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 1 ECP3-AMC Eval Board Project Power Supplies 2 46 2 5 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 29. Power Supplies A B C 11 8 10NF-0402SMT 4Y 3Y 3_3V R86 10K-0402SMT R93 10K-0402SMT 10 12 13 9 SN74LVC125A/SO14 4A 4OE_N 3A 3OE_N U12B PROGRAMN GSRN 5 SW2 PROGRAMN SW1 FPGA GSRN 6 3 2Y 1Y 16 15 14 13 12 11 10 9 5 4 2 1 3 1 OUT2 OUT1 MAX6817 IN2 IN1 U10 TMS SEL J14 4 6 R79 10K-0402SMT FPGA_MCLK FPGA_SISPI TDO SEL J15 SN74LVC125A/SO14 2A 2OE_N 1A 1OE_N U12A 3_3V M25P64-FLASH XO ONLY PROGRAMN & GSRN Pushbuttons U8 HOLD# CK VCC D DU1 DU8 DU2 DU7 DU3 DU6 DU4 DU5 S# VSS Q W# C113 FPGA_CSSPI0N_DI SPI0_Q 1 2 3 4 5 6 7 8 4_7K-0402SMT FLASH_DIS SPI FLASH 100NF-0402SMT C110 7 R97 D15 100NF-0402SMT 4 INITN R92 10K-0603SMT DONE 1 DONE TMS SEL J14 TDO SEL J15 ECP3-95-1156BGA 3_3V GSRN D13 TDO TDI TMS TCK PR16B/BUSY/SISPI/AVDN PR16A/D7/SPID0 PR14B/D6/SPID1 PR14A/D5 PR13B/D4/SO PR13A/D3/SI PR11B/D2 PR11A/D1 PR10B/D0/SPIFASTN PR8B/MCLK PR10A/WRITEN PR8A/DOUT/CSON/CSSPI1N PR5B/DI/CSSPI0N/CEN PR7B/CSN/SN/CONT1N/OEN PR7A/CS1N/HOLDN/CONT2N/RDY PR5A DONE CCLK INITN PROGRAMN CFG0 CFG1 CFG2 PT145B PT145A PT143B PT143A PT142B PT142A PT140B PT140A XRES DNU1 DNU2 VCCIO8 VCCIO8 TDI TCK TMS TDO VCCJ U1G 680R-0603SMT R72 LED_RED_0402 [12] GSRN DONE indicator will light when configuration is successfully completed INITN LED_RED_0402 R78 D12 680R-0603SMT R R81 LED_GREEN_0402 JTAG CHAIN Q9 2N2222/SOT23 R80 10K-0402SMT INITN indicator will light if an error occurs during configuration programming FPGA_XRES DONE FPGA_CCLK INITN PROGRAMN CFG0 CFG1 CFG2 FPGA_CSSPI0N_DI FPGA_CSN FPGA_CS1N FPGA_D0 FPGA_MCLK FPGA_SISPI SPI0_Q [14] [14] [14] [14] OUT Y2 OUT Y1 TCK_BUF TMS_BUF 4 6 OUT Y2 OUT Y1 NC7WZ16-MACO6A/Fairchild TinyLogic R96 220R-0603SMT D16 LED_GREEN_0402 This LED indicates activity on TDI. 4 6 AMC_MP 3 EN BS_TDO TDO XO BSCAN2 BS_TMS TMS CK5406D TMS SELECT TDI BS_TDI TDO SELECT CK5406D U11 FMC 3 1 3 1 TDI_SEL TDO IN A2 IN A1 2 PWR1014A TDI TMS ATDI IN A2 IN A1 AMC_MP U9 FPGA_D0 2 R89 OPEN-0402SMT SPIFASTN R76 10K-0402SMT NC7WZ16-MACO6A/Fairchild TinyLogic R88 OPEN-0402SMT FPGA_CSN R75 10K-0402SMT JTAG Programming Chain R286 4_7K-0402SMT DI MSP_TDO_1 MSP_TCK_1 MSP_TMS_1 MSP_TDI_1 R298 4_7K-0402SMT DI [3,14] TCK_BUF [3,14] TMS_BUF [3,14] TDI_BUF R87 OPEN-0402SMT FPGA_CS1N R74 10K-0402SMT Programming Scenarios: 1- ispPWR standalone 2- ispPWR and XO chain 3- BSCAN2 control of ECP3, ispCLK1, ispCLK2, or FMC 3_3V 3_3V 3_3V ECP3 F33 F32 J34 H34 G32 G33 H33 G34 E32 F34 E31 E34 D34 F31 G30 D33 G31 C34 C33 B34 B33 F30 D32 C31 D31 C32 B32 D29 D30 A33 A32 W23 AN4 AP4 N25 P25 E1 D1 D2 C1 K10 3 PROGRAMN D14 LED_RED_0402 680R-0603SMT R73 3_3V 3_3V Y 3_3V 220R-0603SMT G 3 2 Y D 14 VCC 4_7K-0402SMT R95 GND 5 VCC 5 VCC GND C109 R98 GND 2 R99 100R-0402SMT C114 3_3V 100R-0402SMT 4.7K 4.7K 4.7K AMC_MP [14] BSCAN2_EN [3] PWR_TDI_SEL_N [14] TDO_OUT R90 10K-0402SMT CFG0 TCK TMS TDI TDO GND VCC AMC_MP +3.3V TDO TDI BSCAN2_EN PWR ATDI SEL TMS GND TCK 7 1 FROM ISPVM CABLE J4 HEADER 8 2 3 4 5 6 8 J4 JTAG 10K-0402SMT FPGA_XRES 10K-0402SMT R94 R91 R85 10K-0402SMT CFG1 FPGA_CCLK R77 10K-0402SMT CFG2 1 Date: Size C Title Thursday, August 09, 2012 1 Sheet ECP3 AMC Eval Board Project Programming 5 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 FOR POWR1014 Programming: Connect Yellow lead of ispVM cable to Pin5 of J4. ispVM SW setting ISP/PROG=LOW FOR BSCAN2 FUNCTION: Connect Green lead of ispVM cable to Pin4 of J4. ispVM SW setting TRST=HIGH 4.7K EXBV8V472JV LOCAL_TMS LOCAL_TCK LOCAL_TDI R84 10K-0402SMT 10K-0402SMT R82 R83 10K-0402SMT 3_3V 4LOCAL_TCK 3_3V ISPVM 100NF-0603SMT GSRN TDI TMS TCK TDO RN1B PROGRAMN TDI TMS TCK TDO RN1D CONFIG Status LEDs TCK C112 4 BS_TCK RN1C 2 5 VCC GND 2 1 RN1A 8 TDO_OUT 2 7 LOCAL_TDI 3 6 R TDI TMS TCK TDO 47 TCK INITN 5 DONE LOCAL_TMS PROGRAMN TDI TMS TCK TDO 100NF-0603SMT 5 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 30. Programming C111 100NF-0603SMT A B C 5 FLASH_A22 FLASH_A21 FLASH_A20 FLASH_A19 FLASH_A18 FLASH_A17 FLASH_A16 FLASH_A15 FLASH_A14 FLASH_A13 FLASH_A12 FLASH_A11 FLASH_A10 FLASH_A9 FLASH_A8 FLASH_A7 FLASH_A6 FLASH_A5 FLASH_A4 FLASH_A3 FLASH_A2 H6 H1 VCC DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 CEn OEn WEn RD/BY BYTEn WPn RESETn G4 G6 F5 G5 F4 G3 F3 G2 F2 E5 H5 E4 H4 H3 E3 H2 E2 F1 G1 A4 A3 F6 B3 B4 4 [12] FLASH_CTRL[0..7] M29W32-FLASH GND GND NC A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 U13 10NF-0603SMT C116 R104 C4 D3 D4 C3 B2 E6 D6 C6 A6 B6 D5 C5 A5 B5 A2 C2 D2 B1 A1 C1 D1 E1 100NF-0603SMT C115 2_5V FLASH_CTRL0 FLASH_CTRL1 FLASH_CTRL2 FLASH_CTRL3 FLASH_CTRL4 FLASH_CTRL5 FLASH_CTRL6 FLASH_CTRL7 FLASH_D31 FLASH_D30 FLASH_D29 FLASH_D28 FLASH_D27 FLASH_D26 FLASH_D25 FLASH_D24 FLASH_D23 FLASH_D22 FLASH_D21 FLASH_D20 FLASH_D19 FLASH_D18 FLASH_D17 FLASH_D16 FLASH_CEM FLASH_OE_N FLASH_WE_N FLASH_RD_BY_A FLASH_BYTE_N FLASH_WP_N_ACC FLASH_RESET_N 3_3V R105 4 0R-0603SMT 48 0R-0603SMT D 5 3_3V A0 VCC WP SCL SDA 24AA1025-ISM GND A2 A1 5 8 7 6 EEPROM 4 3 2 U15 R100 10K-0402SMT 1 [12] 3 C117 G4 G6 F5 G5 F4 G3 F3 G2 F2 E5 H5 E4 H4 H3 E3 H2 E2 F1 G1 A4 A3 F6 B3 B4 EEPROM_I2C_SCL EEPROM_I2C_SDA FLASH_RD_BY_B 100NF-0603SMT C119 2_5V 3_3V 10NF-0603SMT C118 FLASH_D15 FLASH_D14 FLASH_D13 FLASH_D12 FLASH_D11 FLASH_D10 FLASH_D9 FLASH_D8 FLASH_D7 FLASH_D6 FLASH_D5 FLASH_D4 FLASH_D3 FLASH_D2 FLASH_D1 FLASH_D0 FLASH_CEM 100NF-0603SMT R102 0R-0603SMT R103 0R-0603SMT R101 10K-0402SMT FLASH_D[0..31] FLASH_D[0..31] 3 GND GND [12] [12] 2 NC A20 A19 A18 A17 A16 A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 U14 M29W32-FLASH VCC DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 CEn OEn WEn RD/BY BYTEn WPn RESETn 2 H6 H1 C4 D3 D4 C3 B2 E6 D6 C6 A6 B6 D5 C5 A5 B5 A2 C2 D2 B1 A1 C1 D1 E1 Date: Friday, March 05, 2010 1 Sheet ECP3 AMC Eval Board Project [12] 6 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 Parallel Flash/EEPROM FLASH_A[2..22] Size B Title FLASH_A22 FLASH_A21 FLASH_A20 FLASH_A19 FLASH_A18 FLASH_A17 FLASH_A16 FLASH_A15 FLASH_A14 FLASH_A13 FLASH_A12 FLASH_A11 FLASH_A10 FLASH_A9 FLASH_A8 FLASH_A7 FLASH_A6 FLASH_A5 FLASH_A4 FLASH_A3 FLASH_A2 FLASH_A[2..22] 1 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 31. Parallel Flash/EEPROM FLASH_A[2..22] 49 5 AMC_RXN_[0..11] AMC_RXP_[0..11] AMC_TXN_[0..11] AMC_TXP_[0..11] AMC_TXN_11 AMC_TXP_11 AMC_RXN_11 AMC_RXP_11 AMC_TXN_10 AMC_TXP_10 AMC_RXN_10 AMC_RXP_10 AMC_TXN_9 AMC_TXP_9 AMC_RXN_9 AMC_RXP_9 AMC_TXN_8 AMC_TXP_8 AMC_RXN_8 AMC_RXP_8 AMC_TXN_7 AMC_TXP_7 AMC_RXN_7 AMC_RXP_7 AMC_TXN_6 AMC_TXP_6 AMC_RXN_6 AMC_RXP_6 AMC_TXN_5 AMC_TXP_5 AMC_RXN_5 AMC_RXP_5 AMC_TXN_4 AMC_TXP_4 AMC_RXN_4 AMC_RXP_4 AMC_TXN_3 AMC_TXP_3 AMC_RXN_3 AMC_RXP_3 AMC_TXN_2 AMC_TXP_2 AMC_RXN_2 AMC_RXP_2 AMC_TXN_1 AMC_TXP_1 AMC_RXN_1 AMC_RXP_1 AMC_TXN_0 AMC_TXP_0 AMC_RXN_0 AMC_RXP_0 Common Options Not Used AMC_RXN_[0..11] AMC_RXP_[0..11] AMC_TXN_[0..11] AMC_TXP_[0..11] Fat Pipes [14] [14] [14] [14] [16] SFP_RDP C129 PCSA_HDOUTP2 4 [17] FMC_DP1_M2C_N [17] FMC_DP1_M2C_P [17] FMC_DP2_M2C_N [17] FMC_DP2_M2C_P [17] FMC_DP3_M2C_N [17] FMC_DP3_M2C_P [17] FMC_DP4_M2C_N [17] FMC_DP4_M2C_P [17] FMC_DP1_C2M_N [17] FMC_DP1_C2M_P [17] FMC_DP2_C2M_N [17] FMC_DP2_C2M_P [17] FMC_DP3_C2M_N [17] FMC_DP3_C2M_P [17] FMC_DP4_C2M_N 100NFX5R-0402SMT C153 C152 100NFX5R-0402SMT 100NFX5R-0402SMT 100NFX5R-0402SMT C175 C173 C171 PCSC_HDINN1 AMC_RXP_11 PCSD_HDOUTN3 PCSD_HDOUTP2 C170 PCSD_HDOUTN2 PCSD_HDOUTP1 C172 PCSD_HDOUTP0 100NFX5R-0402SMT 3 PCSD_HDINN0 PCSD_HDINP0 PCSD_HDINN1 PCSD_HDINP1 PCSD_HDINN2 PCSD_HDINP2 PCSD_HDINN3 PCSD_HDINP3 PCSD_HDOUTN0 PCSD_HDOUTN1 C174 100NFX5R-0402SMT 100NFX5R-0402SMT 100NFX5R-0402SMT 100NFX5R-0402SMT 100NFX5R-0402SMT 100NFX5R-0402SMT PCSD_HDOUTP3 PCSC_HDINN0 PCSC_HDINP1 PCSC_HDINP0 AMC_RXN_10 AMC_RXN_11 PCSC_HDINN2 AMC_RXN_9 PCSC_HDINP2 AMC_RXP_10 AMC_RXP_9 PCSC_HDINN3 PCSC_HDOUTN0 PCSC_HDOUTP0 PCSC_HDOUTN1 PCSC_HDOUTP1 PCSC_HDOUTN2 PCSC_HDOUTP2 PCSC_HDINP3 C168 100NFX5R-0402SMT C158 100NFX5R-0402SMT 100NFX5R-0402SMT AMC_RXP_8 C169 C161 C157 C156 PCSC_HDOUTN3 AMC_RXN_8 AMC_TXN_11 AMC_TXP_11 AMC_TXN_10 AMC_TXP_10 100NFX5R-0402SMT C154 100NFX5R-0402SMT 100NFX5R-0402SMT AMC_TXP_9 AMC_TXN_9 AMC_TXN_8 C155 PCSB_HDINN0 PCSC_HDOUTP3 PCSB_HDINP0 AMC_RXP_7 AMC_RXN_7 AMC_TXP_8 PCSB_HDINN2 PCSB_HDINP1 PCSB_HDINN1 AMC_RXP_6 AMC_RXN_6 PCSB_HDINN3 PCSB_HDINP2 AMC_RXP_5 AMC_RXN_5 AMC_RXN_4 PCSB_HDINP3 PCSB_HDOUTN0 PCSB_HDOUTP0 PCSB_HDOUTN1 AMC_RXP_4 C142 100NFX5R-0402SMT AMC_TXP_7 AMC_TXN_7 C143 100NFX5R-0402SMT C141 AMC_TXN_6 PCSB_HDOUTP1 PCSB_HDOUTN2 PCSB_HDOUTP2 C140 AMC_TXP_6 100NFX5R-0402SMT 100NFX5R-0402SMT AMC_TXN_5 C139 PCSB_HDOUTN3 PCSB_HDOUTP3 C138 AMC_TXP_5 100NFX5R-0402SMT C136 100NFX5R-0402SMT AMC_TXP_4 100NFX5R-0402SMT PCSA_HDOUTN0 PCSA_HDOUTP0 AMC_TXN_4 C137 100NFX5R-0402SMT C134 100NFX5R-0402SMT PCSA_HDOUTN1 PCSA_HDOUTP1 C132 100NFX5R-0402SMT 100NFX5R-0402SMT PCSA_HDOUTN2 AMC_TXP_0 C135 PCSA_HDOUTN3 C130 100NFX5R-0402SMT 100NFX5R-0402SMT 100NFX5R-0402SMT AMC_TXN_0 C133 C131 PCSA_HDOUTP3 PCSA_HDINN0 100NFX5R-0402SMT AMC_RXN_0 C126 PCSA_HDINP0 PCSA_HDINN1 PCSA_HDINP1 PCSA_HDINN2 PCSA_HDINP2 PCSA_HDINN3 PCSA_HDINP3 3 AMC_RXP_0 4 [17] FMC_DP4_C2M_P [8] ETH_SIN_n [8] ETH_SIN [17] FMC_DP0_C2M_N [17] FMC_DP0_C2M_P [16] SFP_TDN [16] SFP_TDP [8] ETH_SOUT_n [8] ETH_SOUT [17] FMC_DP0_M2C_N [17] FMC_DP0_M2C_P [16] SFP_RDN Fat Pipes A B C D 5 PCSD_VCCOB PCSD_VCCIB PCSC_VCCOB PCSC_VCCIB PCSB_VCCOB PCSB_VCCIB PCSA_VCCOB PCSA_VCCIB AL13 AK13 AL12 AK12 AL11 AK11 AL10 AK10 AP13 AN13 AP12 AN12 AP11 AN11 AP10 AN10 AH12 AH13 AE15 AF13 AF12 AF11 AE14 AG13 AG12 AG11 AL21 AK21 AL20 AK20 AL19 AK19 AL18 AK18 AP21 AN21 AP20 AN20 AP19 AN19 AP18 AN18 AH19 AH20 AF21 AF20 AF19 AF18 AG21 AG20 AG19 AG18 AL17 AK17 AL16 AK16 AL15 AK15 AL14 AK14 AP17 AN17 AP16 AN16 AP15 AN15 AP14 AN14 AH15 AH16 AF17 AF16 AF15 AF14 AG17 AG16 AG15 AG14 AL25 AK25 AL24 AK24 AL23 AK23 AL22 AK22 AP25 AN25 AP24 AN24 AP23 AN23 AP22 AN22 AH22 AH23 AF24 AF23 AF22 AE20 AG24 AG23 AG22 AE21 2 2 [15] PCSD_REFCLKN [15] PCSD_REFCLKP [15] PCSC_REFCLKN [15] PCSC_REFCLKP [15] PCSB_REFCLKN [15] PCSB_REFCLKP [15] PCSA_REFCLKN [15] PCSA_REFCLKP PCSD_HDINP0 PCSD_HDINN0 PCSD_HDINP1 PCSD_HDINN1 PCSD_HDINP2 PCSD_HDINN2 PCSD_HDINP3 PCSD_HDINN3 PCSD_HDOUTP0 PCSD_HDOUTN0 PCSD_HDOUTP1 PCSD_HDOUTN1 PCSD_HDOUTP2 PCSD_HDOUTN2 PCSD_HDOUTP3 PCSD_HDOUTN3 PCSD_REFCLKP PCSD_REFCLKN PCSC_HDINP0 PCSC_HDINN0 PCSC_HDINP1 PCSC_HDINN1 PCSC_HDINP2 PCSC_HDINN2 PCSC_HDINP3 PCSC_HDINN3 PCSC_HDOUTP0 PCSC_HDOUTN0 PCSC_HDOUTP1 PCSC_HDOUTN1 PCSC_HDOUTP2 PCSC_HDOUTN2 PCSC_HDOUTP3 PCSC_HDOUTN3 PCSC_REFCLKP PCSC_REFCLKN PCSB_HDINP0 PCSB_HDINN0 PCSB_HDINP1 PCSB_HDINN1 PCSB_HDINP2 PCSB_HDINN2 PCSB_HDINP3 PCSB_HDINN3 PCSB_HDOUTP0 PCSB_HDOUTN0 PCSB_HDOUTP1 PCSB_HDOUTN1 PCSB_HDOUTP2 PCSB_HDOUTN2 PCSB_HDOUTP3 PCSB_HDOUTN3 PCSB_REFCLKP PCSB_REFCLKN PCSA_HDINP0 PCSA_HDINN0 PCSA_HDINP1 PCSA_HDINN1 PCSA_HDINP2 PCSA_HDINN2 PCSA_HDINP3 PCSA_HDINN3 PCSA_HDOUTP0 PCSA_HDOUTN0 PCSA_HDOUTP1 PCSA_HDOUTN1 PCSA_HDOUTP2 PCSA_HDOUTN2 PCSA_HDOUTP3 PCSA_HDOUTN3 PCSA_REFCLKP PCSA_REFCLKN ECP3-95-1156BGA PCSD_HDINP0 PCSD_HDINN0 PCSD_HDINP1 PCSD_HDINN1 PCSD_HDINP2 PCSD_HDINN2 PCSD_HDINP3 PCSD_HDINN3 PCSD_HDOUTP0 PCSD_HDOUTN0 PCSD_HDOUTP1 PCSD_HDOUTN1 PCSD_HDOUTP2 PCSD_HDOUTN2 PCSD_HDOUTP3 PCSD_HDOUTN3 PCSD_REFCLKP PCSD_REFCLKN PCSD_VCCIB0 PCSD_VCCIB1 PCSD_VCCIB2 PCSD_VCCIB3 PCSD_VCCOB0 PCSD_VCCOB1 PCSD_VCCOB2 PCSD_VCCOB3 U1M ECP3-95-1156BGA PCSA_HDINP0 PCSA_HDINN0 PCSA_HDINP1 PCSA_HDINN1 PCSA_HDINP2 PCSA_HDINN2 PCSA_HDINP3 PCSA_HDINN3 PCSA_HDOUTP0 PCSA_HDOUTN0 PCSA_HDOUTP1 PCSA_HDOUTN1 PCSA_HDOUTP2 PCSA_HDOUTN2 PCSA_HDOUTP3 PCSA_HDOUTN3 PCSA_REFCLKP PCSA_REFCLKN PCSA_VCCIB0 PCSA_VCCIB1 PCSA_VCCIB2 PCSA_VCCIB3 PCSA_VCCOB0 PCSA_VCCOB1 PCSA_VCCOB2 PCSA_VCCOB3 PCSB_HDINP0 PCSB_HDINN0 PCSB_HDINP1 PCSB_HDINN1 PCSB_HDINP2 PCSB_HDINN2 PCSB_HDINP3 PCSB_HDINN3 PCSB_HDOUTP0 PCSB_HDOUTN0 PCSB_HDOUTP1 PCSB_HDOUTN1 PCSB_HDOUTP2 PCSB_HDOUTN2 PCSB_HDOUTP3 PCSB_HDOUTN3 PCSB_REFCLKP PCSB_REFCLKN PCSB_VCCIB0 PCSB_VCCIB1 PCSB_VCCIB2 PCSB_VCCIB3 PCSB_VCCOB0 PCSB_VCCOB1 PCSB_VCCOB2 PCSB_VCCOB3 PCSC_HDINP0 PCSC_HDINN0 PCSC_HDINP1 PCSC_HDINN1 PCSC_HDINP2 PCSC_HDINN2 PCSC_HDINP3 PCSC_HDINN3 PCSC_HDOUTP0 PCSC_HDOUTN0 PCSC_HDOUTP1 PCSC_HDOUTN1 PCSC_HDOUTP2 PCSC_HDOUTN2 PCSC_HDOUTP3 PCSC_HDOUTN3 PCSC_REFCLKP PCSC_REFCLKN PCSC_VCCIB0 PCSC_VCCIB1 PCSC_VCCIB2 PCSC_VCCIB3 PCSC_VCCOB0 PCSC_VCCOB1 PCSC_VCCOB2 PCSC_VCCOB3 U1H Date: Size C Title Friday, March 05, 2010 1 Sheet ECP3 AMC Eval Board Project SERDES 7 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 1 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 32. SERDES A B C 5 1 2 VCC OUT 25MHz DI OSC_SMT EN GND Y1 4 3 3_3V R121 R119 R120 SGMII_ETH_MD3_N SGMII_ETH_MD3_P SGMII_ETH_MD2_N SGMII_ETH_MD2_P SGMII_ETH_MD1_N SGMII_ETH_MD1_P SGMII_ETH_MD0_N SGMII_ETH_MD0_P ADJ OUT TP35 4 COMA XTAL1 XTAL2 125CLK CRS COL CONFIG0 CONFIG1 CONFIG2 CONFIG3 CONFIG4 CONFIG5 CONFIG6 SEL_FREQ RX_DV RX_ER RX_CLK RXD0 RXD1 RXD2 RXD3 RXD4 RXD5 RXD6 RXD7 TX_EN TX_ER TX_CLK TXD0 TXD1 TXD2 TXD3 TXD4 TXD5 TXD6 TXD7 SGMII_AVDD SGMII_ETH_1_2V + C189 C184 47UF-10V-TANTBSMT GTX_CLK U17 2 1 88e1111 117TFBGA DI SGMII_ETH_COMA L4 H9 J9 SGMII_ETH_125CLKK2 SGMII_PHY_CRS B5 SGMII_PHY_COL B6 SGMII_PHY_CLK25 33R-0402SMT 33R-0402SMT D8 E9 F8 G7 F9 G9 G8 SGMII_ETH_CFG0 SGMII_ETH_CFG1 SGMII_ETH_CFG2 SGMII_ETH_CFG3 SGMII_ETH_CFG4 SGMII_ETH_CFG5 SGMII_ETH_CFG6 B1 D2 C1 B2 D3 C3 B3 C4 A1 A2 C5 E1 F2 D1 F1 G2 G3 H2 H1 H3 J1 J2 E2 H8 R122 4_7K-0402SMT 22R-0603SMT SGMII_CLK25 SGMII_ETH_CRS SGMII_ETH_COL TP24 TP25 TP26 TP28 TP30 TP31 TP32 EN IN GND GND GND 3 6 7 SGMII_PHY_FREQ_SEL 5 22UF-16V-TANTBSMT 8 2_5V + C190 C185 1UF-16V-0805SMT C205 10NF-0402SMT C204 10NF-0402SMT C203 10NF-0402SMT 8 7 9 3 1 2 4 6 5 11 12 10 RJ-45 MDID+ MDDCT MDID- MDIC+ MDCCT MDIC- MDIB+ MDBCT MDIB- MDIA+ MDACT MDIA- J5 LED2+ LED2LED1+ LED1- SHLD1 SHLD2 7 8 4 5 3 6 1 2 16 15 14 13 19 20 SGMII_ETH_LED_TX_PU SGMII_ETH_LED_TX SGMII_ETH_LED_RX_PU SGMII_ETH_LED_RX MH1 and MH2 are 0.100" diameter plated through holes 3 Ethernet RJ45 Connector 10NF-0402SMT C206 TDI TDO TMS TCK TRST HSDAC HSDAC S_OUT S_OUT S_CLK S_CLK S_IN S_IN RSET RESET INT MDIO MDC LINK1000 LINK100 LINK10 DUPLEX RX_LED TX_LED MDIO_3 MDIO_3 MDIO_2 MDIO_2 MDIO_1 MDIO_1 MDIO_0 MDIO_0 SGMII_HSDAC_TP SGMII_HSDAC_n_TP M5 M6 R131 100R-0402SMT 2_5V R123 4_7K-0402SMT SGMII_ETH_SOUT SGMII_ETH_SOUT_n A7 A8 L7 K8 L8 L9 M9 SCLK SCLKb A5 A6 TP33 TP34 TP27 TP29 ETH_SOUT [7] ETH_SOUT_n [7] R111 2 VDDO bypass C199 10NF-0603SMT SGMII_MD1_BIAS DUPLEX R115 SGMII CFG0= CFG1= CFG2= CFG3= CFG4= CFG5= CFG6= SGMII_PHY_RESET_N SGMII_PHY_INT_N SGMII_PHY_FREQ_SEL SGMII_PHY_CLK25 SGMII_ETH_125CLK SGMII_ETH_CRS SGMII_ETH_COL PHY_MDIO PHY_MDC with Auto Neg 000, PHY ADDR 100 111 100 100 110 000 C200 10NF-0603SMT SGMII_MD2_BIAS PHY_MDIO [12] PHY_MDC [12] Date: Size C Title C201 10NF-0603SMT PHY_NET[0..6] Friday, May 28, 2010 1 Sheet 8 of 19 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 [12] ECP3-AMC Eval Board Project SGMII_ETH_MD3_N SGMII_ETH_MD3_P SGMII_MD3_BIAS 1000BASE-T PHY/RJ45 PHY_NET0 PHY_NET1 PHY_NET2 PHY_NET3 PHY_NET4 PHY_NET5 PHY_NET6 R117 50R-0402SMT 50R-0402SMT SGMII_ETH_MD2_N R116 SGMII_ETH_MD2_P C196 10NF-0603SMT OSC bypass 2_5V C197 100NF-0603SMT 3_3V LED_1000 LED_GREEN_0402 D20 Place 49 ohm termination resistors as close as possible to G-PHY. The associated 0.01uF capacitor should be placed close to the 49 ohm resistors. C198 10NF-0603SMT SGMII_MD0_BIAS LED_100 LED_GREEN_0402 D19 50R-0402SMT 50R-0402SMT SGMII_ETH_MD1_N R114 50R-0402SMT 50R-0402SMT SGMII_ETH_MD1_P LED_10 LED_AMBER_0402 D18 LED_AMBER_0402 D17 1 LINKA STATUS C195 100NF-0603SMT 2_5V SGMII_ETH_MD0_N R112 R113 C193 100NF-0603SMT C194 10NF-0603SMT DVDD bypass SGMII_ETH_MD0_P C191 100NF-0603SMT C192 220NF-0402SMT SGMII_ETH_1_2V R109 680R-0402SMT R108 680R-0402SMT SGMII_ETH_LED_1000 SGMII_ETH_LED_DUPLEX R107 680R-0402SMT R106 680R-0402SMT SGMII_ETH_LED_100 SGMII_ETH_LED_10 SGMII_AVDD 2 50R-0402SMT R110 50R-0402SMT TP18 TP19 TP20 TP21 TP22 TP23 4_7K-0402SMT ETH_SIN [7] ETH_SIN_n [7] R118 R132 100R-0402SMT SGMII_ETH_RSET_N M2 SGMII_ETH_SIN SGMII_ETH_SIN_n SGMII_PHY_RESET_N SGMII_PHY_INT_N K3 L1 A3 A4 PHY_MDIO PHY_MDC M1 L3 SGMII_ETH_MD3_P SGMII_ETH_MD3_N N8 N9 SGMII_ETH_LED_1000 SGMII_ETH_LED_100 SGMII_ETH_LED_10 SGMII_ETH_LED_DUPLEX SGMII_ETH_LED_RX SGMII_ETH_LED_TX SGMII_ETH_MD2_P SGMII_ETH_MD2_N N6 N7 A9 B8 C8 E8 C9 D9 SGMII_ETH_MD1_P SGMII_ETH_MD1_N SGMII_ETH_MD0_P SGMII_ETH_MD0_N N3 N4 N1 N2 1 FB18 MPZ1608Y600B DI 2_5V C188 100NF-0603SMT SGMII_ETH_1_2V C187 10NF-0603SMT C186 100NF-0603SMT SGMII_AVDD SGMII_AVDD 2 3 Place caps close to RJ45 jack 1 2_5V C202 10NF-0402SMT 2 1 B9 F7 J8 VDDOH VDDOH VDDOH 1UF-16V-0805SMT B4 C2 K1 VDDO VDDO VDDO K9 L2 VDDOX VDDOX B7 M3 M4 M7 M8 N5 AVDD AVDD AVDD AVDD AVDD AVDD SO-8 DI SGMII_ETH_LED_RX_PU U16 LT1963-ADJ SGMII_ETH_CFG3 R127 0R-0402SMT C6 C7 D7 E3 E7 F3 J3 J7 RJ45 R128 SGMII_ETH_CFG4 0R-0402SMT SGMII_ETH_LED_1000 DVDD DVDD DVDD DVDD DVDD DVDD DVDD DVDD 2 SGMII_ETH_CFG1 R125 0R-0402SMT SGMII_ETH_LED_1000 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND VSSC 1 SGMII_ETH_CFG2 R126 0R-0402SMT 2_5V D4 D5 D6 E4 E5 E6 F4 F5 F6 G4 G5 G6 H4 H5 H6 J4 J5 J6 K4 K5 K6 L5 L6 H7 2 R129 SGMII_ETH_CFG5 0R-0402SMT SGMII_ETH_LED_1000 4 SGMII_ETH_LED_TX_PU R124 SGMII_ETH_CFG0 0R-0402SMT GND SGMII_ETH_CFG6 R130 0R-0402SMT GND 50 SGMII_ETH_LED_10 D 5 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 33. 1000BASE-T PHY/RJ45 A 5 1 1_8V C259 2 100NF-0603SMT C231 DDR2_VDDL C256 DDR2_VREF C246 3 8 DDR2_VREF C243 FB20 MPZ1608Y600B DI VTT VSENSE 2 + C242 1 1_8V FB21 MPZ1608Y600B DI DDR2_VDDQ + C245 2 1 1_8V SD 1UF-16V-0805SMT 22UF-16V-TANTBSMT C257 C230 22UF-16V-TANTBSMT + C255 MPZ1608Y600B DI FB22 C260 B 10NF-0603SMT VDDQ 100NF-0603SMT R184 4_7K-0603SMT 100NF-0603SMT 22UF-16V-TANTBSMT C261 VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VSS VSS VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VREF VDDL VSSDL U21B 4 DDR2_VDD DDR2-SDRAM-84FBGA A1 E1 J9 M9 R1 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 A3 E3 J3 N1 P9 A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 J2 J1 J7 DDR2_VDD R183 1K-0603SMT 100UF-D2EPOSCAP DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 LDQS LDQS#/NU UDQS UDQS#/NU LDM UDM CK CK# CKE WE# RAS# CAS# ODT CS# BA0 BA1 NC_A2 NC_E2 NC_R8 RFU_L1 RFU_R3 RFU_R7 B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 F7 E8 B7 A8 F3 B3 J8 K8 K2 K3 K7 L7 K9 L8 L2 L3 A2 E2 R8 L1 R3 R7 DDR2-SDRAM-84FBGA U21A DDR2_DQ15 DDR2_DQ14 DDR2_DQ13 DDR2_DQ12 DDR2_DQ11 DDR2_DQ10 DDR2_DQ9 DDR2_DQ8 DDR2_DQ7 DDR2_DQ6 DDR2_DQ5 DDR2_DQ4 DDR2_DQ3 DDR2_DQ2 DDR2_DQ1 DDR2_DQ0 DDR2_A0 DDR2_A1 DDR2_A2 DDR2_A3 DDR2_A4 DDR2_A5 DDR2_A6 DDR2_A7 DDR2_A8 DDR2_A9 DDR2_A10 DDR2_A11 DDR2_A12 DDR2_DQS0 DDR2_DQS0# DDR2_DQS1 DDR2_DQS1# DDR2_DM0 DDR2_DM1 1_DDR2_K 1_DDR2_K# DDR2_CE0# DDR2_WE# DDR2_RAS# DDR2_CAS# DDR2_ODT0 DDR2_CS0# DDR2_BA0 DDR2_BA1 ALL Memory controller buses, clocks, and control traces must be 50 Ohm Transmission lines C238 + SP1 DDR2_VREF SP2 DDR2_VDDQ C237 1UF-16V-0805SMT C262 C232 100NF-0603SMT 1UF-16V-0805SMT 6 7 AVIN PVIN GND VREF C263 5 C258 1 100NF-0603SMT C233 10NF-0603SMT 4 10NF-0603SMT LP2997-SO8 10NF-0603SMT 100NF-0603SMT 47UF-10V-TANTBSMT C234 10NF-0603SMT R188 OPEN-0603SMT C269 2 C265 DDR2_VDDQ C264 [3,11] DDR_REG_EN C266 1UF-16V-0805SMT R185 0R-0603SMT C236 U20 100NF-0603SMT C R187 0R-0603SMT C268 100NF-0603SMT 100NF-0603SMT C235 10NF-0603SMT 10NF-0603SMT R189 1K-0603SMT 100NF-0603SMT 1 1 DDR2_VTT 3 DDR2_VTT DDR2_BA0 DDR2_ODT0 DDR2_CS0# 1_DDR2_K# R190 50R-0402SMT DDR2_VTT C251 1_8V 10NF-0603SMT + C252 2_5V C267 VTT 100NF-0603SMT C253 1_8V 10NF-0603SMT 10NF-0603SMT C270 R191 50R-0402SMT C244 10NF-0402SMT 1_DDR2_K DDR2_CE0# DDR2_WE# DDR2_RAS# DDR2_CAS# DDR2_ODT0 DDR2_CS0# DDR2_BA0 DDR2_BA1 DDR2_DQS0 DDR2_DQS0# DDR2_DQS1 DDR2_DQS1# DDR2_DM0 DDR2_DM1 1_DDR2_K 1_DDR2_K# DDR2_A0 DDR2_A1 DDR2_A2 DDR2_A3 DDR2_A4 DDR2_A5 DDR2_A6 DDR2_A7 DDR2_A8 DDR2_A9 DDR2_A10 DDR2_A11 DDR2_A12 DDR2_DQ15 DDR2_DQ14 DDR2_DQ13 DDR2_DQ12 DDR2_DQ11 DDR2_DQ10 DDR2_DQ9 DDR2_DQ8 DDR2_DQ7 DDR2_DQ6 DDR2_DQ5 DDR2_DQ4 DDR2_DQ3 DDR2_DQ2 DDR2_DQ1 DDR2_DQ0 2 DDR2_CMD7 DDR2_CMD6 DDR2_CMD5 DDR2_CMD4 DDR2_CMD3 DDR2_CMD2 DDR2_CMD1 DDR2_CMD0 1_DDR2_7 1_DDR2_6 1_DDR2_5 1_DDR2_4 1_DDR2_3 1_DDR2_2 1_DDR2_1 1_DDR2_0 [11] 1_DDR2_[0:7] [10,11] [10,11] DDR2_A[0:12] DDR2_CMD[0:7] [11] DDR2_DQ[0:15] A3 B3 C3 D3 E3 F3 G3 H3 J3 X2 R1=50 Ohm R1 X1 R1 A1 B1 C1 D1 E1 F1 G1 H1 J1 U1 Pin RP1 A1 B1 C1 D1 E1 F1 G1 H1 J1 DDR2_A3 DDR2_A7 DDR2_A6 DDR2_A1 DDR2_A9 DDR2_A11 DDR2_A12 DDR2_A10 DDR2_A2 DDR2_A0 DDR2_A5 DDR2_BA1 DDR2_A8 DDR2_A4 DDR2_CE0# 2 Termination at end of line X1 needs to be matched length for all traces CTS-RT1402B7 A3 B3 C3 D3 E3 F3 G3 H3 J3 C248 C249 C250 Date: Size C Title Friday, March 05, 2010 1 Sheet 9 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 1 ECP3 AMC Eval Board Project DDR2 Memory 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT C247 PLACE TERMINATIONS CLOSE TO MEMORY DEVICES C254 2_5V 10NF-0603SMT DDR2_VREF 100NF-0603SMT 100NF-0603SMT D 3 DDR2_WE# C2 4 DDR2_RAS# R196 50R-0402SMT R230 50R-0402SMT R250 50R-0402SMT DDR2_CAS# J2 J2 H2 H2 F2 F2 E2 E2 G2 G2 D2 D2 B2 B2 A2 A2 51 C2 5 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 34. DDR2 Memory DDR2_A[0:12] A B 5 DDR2-SDRAM-84FBGA 10NF-0603SMT C275 1UF-16V-0805SMT DDR2_VDDL 100NF-0603SMT C274 DDR2_VREF DDR2_VREF 100NF-0603SMT C277 1UF-16V-0805SMT 10NF-0603SMT C C279 C272 100NF-0603SMT 10NF-0603SMT DDR2_VDDQ C278 U22B B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8 M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2 F7 E8 B7 A8 F3 B3 J8 K8 K2 K3 K7 L7 K9 L8 L2 L3 A2 E2 R8 L1 R3 R7 DDR2_VDD 4 DDR2-SDRAM-84FBGA C281 VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VSS VSS VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VREF VDDL VSSDL C282 A1 E1 J9 M9 R1 A9 C1 C3 C7 C9 E9 G1 G3 G7 G9 A3 E3 J3 N1 P9 A7 B2 B8 D2 D8 E7 F2 F8 H2 H8 J2 J1 J7 100NF-0603SMT C271 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 LDQS LDQS#/NU UDQS UDQS#/NU LDM UDM CK CK# CKE WE# RAS# CAS# ODT CS# BA0 BA1 NC_A2 NC_E2 NC_R8 RFU_L1 RFU_R3 RFU_R7 10NF-0603SMT DDR2_VDD U22A DDR2_DQ31 DDR2_DQ30 DDR2_DQ29 DDR2_DQ28 DDR2_DQ27 DDR2_DQ26 DDR2_DQ25 DDR2_DQ24 DDR2_DQ23 DDR2_DQ22 DDR2_DQ21 DDR2_DQ20 DDR2_DQ19 DDR2_DQ18 DDR2_DQ17 DDR2_DQ16 DDR2_A0 DDR2_A1 DDR2_A2 DDR2_A3 DDR2_A4 DDR2_A5 DDR2_A6 DDR2_A7 DDR2_A8 DDR2_A9 DDR2_A10 DDR2_A11 DDR2_A12 DDR2_DQS2 DDR2_DQS2# DDR2_DQS3 DDR2_DQS3# DDR2_DM2 DDR2_DM3 2_DDR2_K 2_DDR2_K# DDR2_CE0# DDR2_WE# DDR2_RAS# DDR2_CAS# DDR2_ODT0 DDR2_CS0# DDR2_BA0 DDR2_BA1 C283 D 100NF-0603SMT SP7 SP8 1 1 C276 4 C286 ALL Memory controller buses, clocks, and control traces must be 50 Ohm Transmission lines 3 3 DDR2_VDDQ C287 52 100NF-0603SMT 5 2_DDR2_K# R193 50R-0402SMT C273 10NF-0402SMT 2_DDR2_K Place this termination close to memory device R192 50R-0402SMT 2 2 DDR2_CE0# DDR2_WE# DDR2_RAS# DDR2_CAS# DDR2_ODT0 DDR2_CS0# DDR2_BA0 DDR2_BA1 DDR2_DQS2 DDR2_DQS2# DDR2_DQS3 DDR2_DQS3# DDR2_DM2 DDR2_DM3 2_DDR2_K 2_DDR2_K# DDR2_A0 DDR2_A1 DDR2_A2 DDR2_A3 DDR2_A4 DDR2_A5 DDR2_A6 DDR2_A7 DDR2_A8 DDR2_A9 DDR2_A10 DDR2_A11 DDR2_A12 Date: Size B Title DDR2_DQ31 DDR2_DQ30 DDR2_DQ29 DDR2_DQ28 DDR2_DQ27 DDR2_DQ26 DDR2_DQ25 DDR2_DQ24 DDR2_DQ23 DDR2_DQ22 DDR2_DQ21 DDR2_DQ20 DDR2_DQ19 DDR2_DQ18 DDR2_DQ17 DDR2_DQ16 [11] Friday, March 05, 2010 [9,11] 1 Sheet 10 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 DDR2_CMD[0:7] 2_DDR2_[0:7] [11] [9,11] ECP3 AMC Eval Board Project DDR2 Memory DDR2_CMD7 DDR2_CMD6 DDR2_CMD5 DDR2_CMD4 DDR2_CMD3 DDR2_CMD2 DDR2_CMD1 DDR2_CMD0 2_DDR2_7 2_DDR2_6 2_DDR2_5 2_DDR2_4 2_DDR2_3 2_DDR2_2 2_DDR2_1 2_DDR2_0 DDR2_A[0:12] DDR2_DQ[16:31] 1 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 35. DDR2 Memory 10NF-0603SMT 100NF-0603SMT C285 10NF-0603SMT C284 10NF-0603SMT C280 A B C D 1_8V C329 C330 C331 U2 U1 V9 V8 V2 V1 V5 W5 V4 V3 V7 W7 W2 W1 W8 W9 W4 W3 W6 Y6 Y2 Y1 Y8 AA8 Y5 Y4 Y9 Y10 AA2 AA1 Y7 AA7 AA4 AA3 AA10 AB9 AB2 AB1 AA5 AB5 AD2 AD1 AC6 AC7 AD4 AD3 AE2 AE1 AE4 AE3 AM1 AM2 AL1 AL2 AN1 AN2 AD9 AD8 AP2 AP3 AJ2 AJ3 AL3 AK3 AJ4 AK4 AN3 AM3 AJ5 AJ6 AL5 AM5 AM6 AN6 AL4 AM4 AP5 AP6 AH7 AJ7 AE9 AD10 AK6 AL6 AF9 AG9 AK7 AL7 AN7 AP7 AN8 AP8 AK8 AL8 AM7 AM8 AH9 AJ8 AB12 V11 V12 AB11 W11 W10 C338 5 10NF-0603SMT 100NF-0603SMT C337 DDR2_FPGA_VREF DDR2_FPGA_VTT 1_8V DDR2_DQ24 DDR2_DQ25 DDR2_DQ26 DDR2_DQ27 DDR2_DQ28 DDR2_DQ29 DDR2_DQS3 DDR2_DQS3# DDR2_DQ30 DDR2_DQ31 DDR2_DM3 DDR2_DQ16 DDR2_DQ17 DDR2_DQ18 DDR2_DQ19 DDR2_DQ20 DDR2_DQ21 DDR2_DQS2 DDR2_DQS2# DDR2_DQ22 DDR2_DQ23 DDR2_DM2 2_DDR2_K 2_DDR2_K# DDR2_DM1 DDR2_DQ8 DDR2_DQ9 DDR2_DQ10 DDR2_DQ11 DDR2_DQ12 DDR2_DQS1 DDR2_DQS1# DDR2_DQ13 DDR2_DQ14 DDR2_DQ15 DDR2_DM0 DDR2_DQ0 DDR2_DQ1 DDR2_DQ2 DDR2_DQ3 DDR2_DQ4 DDR2_DQS0 DDR2_DQS0# DDR2_DQ5 DDR2_DQ6 DDR2_DQ7 DDR2_FPGA_VREF 10NF-0603SMT 10NF-0603SMT 100NF-0603SMT 100NF-0603SMT C328 ECP3-95-1156BGA PL44A/LDQ49 PL44B/LDQ49 PL46A/LDQ49/PCLKT6_0 PL46B/LDQ49/PCLKC6_0 PL47A/LDQ49 PL47B/LDQ49 PL49A/LDQS49 PL49B/LDQS49# PL50A/LDQ49 PL50B/LDQ49 PL52A/LDQ49/VREF1_6 PL52B/LDQ49/VREF2_6 PL53A/LDQ58 PL53B/LDQ58 PL55A/LDQ58 PL55B/LDQ58 PL56A/LDQ58 PL56B/LDQ58 PL58A/LDQS58 PL58B/LDQS58# PL59A/LDQ58 PL59B/LDQ58 PL61A/LDQ58 PL61B/LDQ58 PL61E_A/LDQ58/LLM1_GPLLT_FB_A PL61E_B/LDQ58/LLM1_GPLLT_FB_B PL61E_C/LDQ58/LLM1_GPLLT_IN_A PL61E_D/LDQ58/LLM1_GPLLT_IN_B PL62A/LDQ67 PL62B/LDQ67 PL64A/LDQ67 PL64B/LDQ67 PL65A/LDQ67 PL65B/LDQ67 PL67A/LDQS67 PL67B/LDQS67# PL68A/LDQ67 PL68B/LDQ67 PL70A/LDQ67 PL70B/LDQ67 PL70E_A/LDQ67/LLM2_GPLLT_FB_A PL70E_B/LDQ67/LLM2_GPLLT_FB_B PL70E_C/LDQ67/LLM2_GPLLT_IN_A PL70E_D/LDQ67/LLM2_GPLLT_IN_B PL71A PL71B PL74A PL74B PL77A PL77B PL79E_A/LLM3_GPLLT_FB_A PL79E_B/LLM3_GPLLT_FB_B PL79E_C/LLM3_GPLLT_IN_A PL79E_D/LLM3_GPLLT_IN_B PL80A/LDQ85 PL80B/LDQ85 PL82A/LDQ85 PL82B/LDQ85 PL83A/LDQ85 PL83B/LDQ85 PL85A/LDQS85 PL85B/LDQS85# PL86A/LDQ85 PL86B/LDQ85 PL88A/LDQ85 PL88B/LDQ85 PL89A/LDQ94 PL89B/LDQ94 PL91A/LDQ94 PL91B/LDQ94 PL92A/LDQ94 PL92B/LDQ94 PL94A/LDQS94 PL94B/LDQS94# PL95A/LDQ94 PL95B/LDQ94 PL97A/LDQ94 PL97B/LDQ94 PB2A PB2B PB4A PB4B PB5A PB5B PB7A PB7B PB8A PB8B PB14A PB14B PB16A PB16B PB10A PB10B PB11A PB11B PB13A PB13B VCCIO6 VCCIO6 VCCIO6 VCCIO6 VTT6_1 VTT6_2 C312 1_8V C313 C314 G4 G5 K9 K8 H5 H4 F2 F1 F3 E3 G2 G1 G3 H3 H1 J1 J3 H2 N4 N3 M5 N5 N2 N1 M10 N10 P5 P4 N8 P8 P2 P1 N7 N6 R7 R5 P9 P10 R2 R1 P7 P6 R4 R3 R9 R10 T6 T5 R8 T7 T4 T3 T9 T8 T2 T1 U9 U8 U5 U4 U6 U7 U12 U11 N12 N11 T11 T10 [15] DDR2_CLKN [15] DDR2_CLKP C327 R206 50R-0402SMT DDR2_CLKN DDR2_CLKP 1_8V DDR2_CLKP DDR2_CLKN 1_DDR2_K 1_DDR2_K# DDR2_CE0# DDR2_BA0 DDR2_BA1 DDR2_RAS# DDR2_CAS# DDR2_WE# DDR2_CS0# DDR2_A0 DDR2_ODT0 DDR2_A6 DDR2_A5 DDR2_A4 DDR2_A3 DDR2_A2 DDR2_A1 DDR2_A10 DDR2_A9 DDR2_A8 DDR2_A7 DDR2_A12 DDR2_A11 4 C334 10NF-0402SMT 50R-0402SMT R207 PLACE CLOSE TO U1 10NF-0603SMT 100NF-0603SMT C326 DDR2_FPGA_VREF 10NF-0603SMT 10NF-0603SMT 100NF-0603SMT 100NF-0603SMT C311 ECP3-95-1156BGA PL2A PL2B PL4A PL4B PL5A PL5B PL8A/LDQ13 PL8B/LDQ13 PL10A/LDQ13 PL10B/LDQ13 PL11A/LDQ13 PL11B/LDQ13 PL13A/LDQS13 PL13B/LDQS13# PL14A/LDQ13 PL14B/LDQ13 PL16A/LDQ13 PL16B/LDQ13 PL17A/LDQ22 PL17B/LDQ22 PL19A/LDQ22 PL19B/LDQ22 PL20A/LDQ22 PL20B/LDQ22 PL22A/LDQS22 PL22B/LDQS22# PL23A/LDQ22 PL23B/LDQ22 PL25A/LDQ22 PL25B/LDQ22 PL25E_A/LDQ22/LUM2_GPLLT_FB_A PL25E_B//LDQ22/LUM2_GPLLT_FB_B PL25E_C/LDQ22/LUM2_GPLLT_IN_A PL25E_D//LDQ22/LUM2_GPLLT_IN_B PL26A/LDQ31 PL26B/LDQ31 PL28A/LDQ31 PL28B/LDQ31 PL29A/LDQ31 PL29B/LDQ31 PL31A/LDQS31 PL31B/LDQS31# PL32A/LDQ31 PL32B/LDQ31 PL34A/LDQ31/VREF1_7 PL34B/LDQ31/VREF2_7 PL35A/LDQ40 PL35B/LDQ40 PL37A/LUM0_GDLLT_IN_A/LDQ40 PL37B/LUM0_GDLLT_IN_B/LDQ40 PL38A/LUM0_GDLLT_FB_A/LDQ40 PL38B/LUM0_GDLLT_FB_B/LDQ40 PL40A/LDQS40 PL40B/LDQS40# PL41A/LDQ40 PL41B/LDQ40 PL43A/PCLKT7_0/LDQ40 PL43B/PCLKC7_0/LDQ40 PL43E_A/LUM0_GPLLT_FB_A PL43E_B/LUM0_GPLLT_FB_B PL43E_C/LUM0_GPLLT_IN_A PL43E_D/LUM0_GPLLT_IN_B VCCIO7 VCCIO7 VCCIO7 VCCIO7 VTT7_1 VTT7_2 DDR2_FPGA_VTT DDR2_DQ31 DDR2_DQ30 DDR2_DQ29 DDR2_DQ28 DDR2_DQ27 DDR2_DQ26 DDR2_DQ25 DDR2_DQ24 DDR2_DQ23 DDR2_DQ22 DDR2_DQ21 DDR2_DQ20 DDR2_DQ19 DDR2_DQ18 DDR2_DQ17 DDR2_DQ16 DDR2_DQ15 DDR2_DQ14 DDR2_DQ13 DDR2_DQ12 DDR2_DQ11 DDR2_DQ10 DDR2_DQ9 DDR2_DQ8 DDR2_DQ7 DDR2_DQ6 DDR2_DQ5 DDR2_DQ4 DDR2_DQ3 DDR2_DQ2 DDR2_DQ1 DDR2_DQ0 DDR2_A0 DDR2_A1 DDR2_A2 DDR2_A3 DDR2_A4 DDR2_A5 DDR2_A6 DDR2_A7 DDR2_A8 DDR2_A9 DDR2_A10 DDR2_A11 DDR2_A12 DDR2_DQS2 DDR2_DQS2# DDR2_DQS3 DDR2_DQS3# DDR2_DM2 DDR2_DM3 2_DDR2_K 2_DDR2_K# DDR2_DQS0 DDR2_DQS0# DDR2_DQS1 DDR2_DQS1# DDR2_DM0 DDR2_DM1 1_DDR2_K 1_DDR2_K# DDR2_CE0# DDR2_WE# DDR2_RAS# DDR2_CAS# DDR2_ODT0 DDR2_CS0# DDR2_BA0 DDR2_BA1 2_DDR2_7 2_DDR2_6 2_DDR2_5 2_DDR2_4 2_DDR2_3 2_DDR2_2 2_DDR2_1 2_DDR2_0 1_DDR2_7 1_DDR2_6 1_DDR2_5 1_DDR2_4 1_DDR2_3 1_DDR2_2 1_DDR2_1 1_DDR2_0 DDR2_CMD7 DDR2_CMD6 DDR2_CMD5 DDR2_CMD4 DDR2_CMD3 DDR2_CMD2 DDR2_CMD1 DDR2_CMD0 3 3 [9] [10] [9] [10] [9,10] [9,10] DDR2_CMD[0:7] 1_DDR2_[0:7] 2_DDR2_[0:7] DDR2_A[0:12] DDR2_DQ[0:15] DDR2_DQ[16:31] 1_8V R194 1K-0603SMT R201 1K-0603SMT 4 DDR2_FPGA_VTT DDR2_FPGA_VREF DDR2_FPGA_VTT DDR2_DQ7 DDR2_DQ15 DDR2_DQ0 DDR2_DQ2 DDR2_DM0 DDR2_DM1 DDR2_DQ9 DDR2_DQ12 DDR2_DQ4 DDR2_DQ23 DDR2_DQ31 DDR2_DQ24 DDR2_DQ18 DDR2_DM2 DDR2_DM3 DDR2_DQ25 DDR2_DQ28 DDR2_DQ20 2 2_5V C288 1_8V R200 0R-0603SMT 1UF-16V-0805SMT C289 VDDQ VREF LP2997-SO8 5 4 R199 U23 OPEN-0603SMT 2 SD 1_8V 100NF-0603SMT C290 VTT VSENSE C291 8 3 + R198 R1 R1 DDR2_FPGA_VTT R204 R205 50R-0402SMT 50R-0402SMT C317 10NF-0402SMT A1 B1 C1 D1 E1 F1 G1 H1 J1 DDR2_DQS1 DDR2_DQS0 RP2 A1 B1 C1 D1 E1 F1 G1 H1 J1 2 DDR2_DQS3# R1=50 Ohm R1 R1 DDR2_FPGA_VTT R210 R211 50R-0402SMT 50R-0402SMT C336 10NF-0402SMT DDR2_FPGA_VTT R208 R209 50R-0402SMT 50R-0402SMT C335 10NF-0402SMT CTS-RT1402B7 A3 B3 C3 D3 E3 F3 G3 H3 J3 DDR2_DQS2# A3 B3 C3 D3 E3 F3 G3 H3 J3 A1 B1 C1 D1 E1 F1 G1 H1 J1 Date: Size C Title C306 C309 C323 DDR2_DQ21 DDR2_DQ29 DDR2_DQ16 DDR2_DQ26 DDR2_DQ19 DDR2_DQ27 DDR2_DQ17 DDR2_DQ30 DDR2_DQ22 C325 Friday, March 05, 2010 1 Sheet 11 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 ECP3 SPB Card Project C324 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT C322 DDR2_DQ5 DDR2_DQ13 DDR2_DQ8 DDR2_DQ10 DDR2_DQ3 DDR2_DQ11 DDR2_DQ1 DDR2_DQ14 DDR2_DQ6 Memory Controllers DDR2_DQS3 DDR2_DQS2 RP3 A1 B1 C1 D1 E1 F1 G1 H1 J1 C305 100NF-0603SMT 100NF-0603SMT 10NF-0603SMT 10NF-0603SMT PLACE TERMINATIONS CLOSE TO U1 DDR2_DQS1# R1=50 Ohm DDR2_FPGA_VTT R202 R203 50R-0402SMT 50R-0402SMT C310 10NF-0402SMT CTS-RT1402B7 A3 B3 C3 D3 E3 F3 G3 H3 J3 DDR2_DQS0# A3 B3 C3 D3 E3 F3 G3 H3 J3 1 DDR2_FPGA_VTT C298 + C302 0R-0603SMT 100NF-0603SMT PLACE TERMINATIONS CLOSE TO U1 [3,9] DDR_REG_EN R197 OPEN-0603SMT DDR2_FPGA_VREF C297 10NF-0603SMT U1F 100NF-0603SMT BANK7 10NF-0603SMT C304 10NF-0603SMT C321 C307 R195 4_7K-0402SMT 5 C318 47UF-10V-TANTBSMT C292 U1E 100NF-0603SMT 10NF-0603SMT C303 10NF-0603SMT C319 6 7 AVIN PVIN GND 1 100NF-0603SMT J2 J2 H2 H2 G2 G2 F2 F2 E2 E2 D2 D2 C2 C2 A2 100NF-0603SMT C308 100NF-0603SMT C320 J2 J2 F2 F2 H2 H2 G2 G2 E2 E2 D2 D2 C2 C2 A2 A2 B2 B2 B2 B2 53 A2 100UF-D2EPOSCAP BANK6 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 36. Memory Controllers A B C D C3 C4 B1 B2 E4 D4 B3 A2 D5 C6 B4 A3 D6 C5 A4 A5 B7 A7 B6 A6 A8 A9 A10 B10 J12 K12 C11 D11 G11 G12 A11 B11 K13 J13 E11 F12 F10 E10 A12 B12 J14 H13 D12 E12 K14 K15 E13 F13 G13 H14 A13 B13 D10 C10 C13 D13 J15 H15 D3 C2 C14 D14 A14 B14 G16 G17 D15 E15 J16 H16 A15 B15 E17 F18 C16 D16 K16 L16 A16 B16 G18 F19 C17 D17 J17 H17 M17 L13 M13 L17 3_3V 7 4_7K 10 RN3G EXB2HV472JV 8 4_7K 9 RN3H EXB2HV472JV SWITCH8 TDA DIP-8 5 SWITCH1 SWITCH2 SWITCH3 SWITCH4 SWITCH5 SWITCH6 SWITCH7 SWITCH8 6 4_7K 11 RN3F EXB2HV472JV SWITCH6 SWITCH7 SW3 5 4_7K 12 RN3E EXB2HV472JV SWITCH5 3 4_7K 14 RN3C EXB2HV472JV SWITCH3 4 4_7K 13 RN3D EXB2HV472JV 2 4_7K 15 RN3B EXB2HV472JV SWITCH2 SWITCH4 1 4_7K 16 RN3A EXB2HV472JV SWITCH1 3_3V FMC_CLK_P FMC_CLK_N HEADER 3 3 1 0R-0603SMT R214 R213 0R-0603SMT FPGA_I2C_SDA R35 2_2K-0402SMT R42 2_2K-0402SMT 10NF-0603SMT 100NF-0603SMT 10NF-0603SMT 2_5V C340 C341 PHY_NET0 PHY_NET1 PHY_NET2 PHY_NET3 PHY_NET4 PHY_NET5 PHY_NET6 2_5V C339 SWITCH1 SWITCH2 SWITCH3 SWITCH4 SWITCH5 SWITCH6 SWITCH7 SWITCH8 LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 PHY_MDIO PHY_MDC SGMII_PHY_RESET_N SGMII_PHY_INT_N SGMII_PHY_FREQ_SEL SGMII_PHY_CLK25 SGMII_ETH_125CLK SGMII_ETH_CRS SGMII_ETH_COL 4 R41 2_2K-0402SMT A17 B17 E19 E20 A18 B18 J18 H18 D18 E18 G19 H19 A19 B19 K20 L19 C19 D19 J19 K19 A20 B20 G20 G21 C20 D20 F21 F22 A21 B21 D21 E21 H20 J20 A22 B22 J22 J23 C22 D22 J21 H22 A23 B23 E22 E23 C23 D23 K22 K21 A24 B24 G23 H23 D24 E24 K23 K24 A25 B25 C28 D28 C25 D25 G26 G25 B28 A28 A26 A27 A29 A30 H26 H25 A31 B31 C29 C30 L22 L18 M22 M18 FPGA_I2C_SCL R39 2_2K-0402SMT ECP3-95-1156BGA PT74A PT74B PT76A/PCLKT1_0 PT76B/PCLKC1_0 PT77A PT77B PT79A PT79B PT80A PT80B PT82A PT82B PT83A PT83B PT85A PT85B PT86A PT86B PT88A PT88B PT89A PT89B PT91A PT91B PT95A PT95B PT97A PT97B PT98A PT98B PT101A PT101B PT103A PT103B PT104A PT104B PT106A PT106B PT107A PT107B PT109A PT109B PT110A PT110B PT112A PT112B PT113A PT113B PT115A PT115B PT116A PT116B PT118A PT118B PT119A PT119B PT121A PT121B PT122A PT122B PT124A PT124B PT125A PT125B PT127A PT127B PT128A PT128B PT130A PT130B PT131A PT131B PT133A PT133B PT134A PT134B PT136A/VREF1_1 PT136B/VREF2_1 VCCIO1 VCCIO1 VCCIO1 VCCIO1 U1B BANK1 R37 2_2K-0402SMT Position- BGA 1C25 2D25 3G26 4G25 5B28 6A28 7A26 8A27 2 J13 CLK_I2C_SCL CLK_I2C_SDA EEPROM_I2C_SCL EEPROM_I2C_SDA PWR_SCL PWR_SDA 3_3V [17] [17] [17] FMC_PRSNT_M2C XO_GSRN [14] XO_TSALL [14] PWR_SCL [3] PWR_SDA [3] CLK_I2C_SCL [15] CLK_I2C_SDA [15] EEPROM_I2C_SCL [6] EEPROM_I2C_SDA [6] FMC_CLK_P FMC_CLK_N FMC_LA_P_0 FMC_LA_N_0 FMC_LA_P_1 FMC_LA_N_1 FMC_LA_P_2 FMC_LA_N_2 FMC_LA_P_3 FMC_LA_N_3 FMC_LA_P_4 FMC_LA_N_4 FMC_LA_P_5 FMC_LA_N_5 FMC_LA_P_6 FMC_LA_N_6 FMC_LA_P_7 FMC_LA_N_7 FMC_LA_P_8 FMC_LA_N_8 FMC_LA_P_9 FMC_LA_N_9 FMC_LA_P_10 FMC_LA_N_10 FMC_LA_P_11 FMC_LA_N_11 FMC_LA_P_12 FMC_LA_N_12 FMC_LA_P_13 FMC_LA_N_13 FMC_LA_P_14 FMC_LA_N_14 FMC_LA_P_15 FMC_LA_N_15 FMC_LA_P_16 FMC_LA_N_16 FMC_LA_P_17 FMC_LA_N_17 FMC_LA_P_18 FMC_LA_N_18 FMC_LA_P_19 FMC_LA_N_19 FMC_LA_P_20 FMC_LA_N_20 FMC_LA_P_21 FMC_LA_N_21 FMC_LA_P_22 FMC_LA_N_22 FMC_LA_P_23 FMC_LA_N_23 FMC_LA_P_24 FMC_LA_N_24 FMC_LA_P_25 FMC_LA_N_25 FMC_LA_P_26 FMC_LA_N_26 FMC_LA_P_27 FMC_LA_N_27 FMC_LA_P_28 FMC_LA_N_28 FMC_LA_P_29 FMC_LA_N_29 FMC_LA_P_30 FMC_LA_N_30 FMC_LA_P_31 FMC_LA_N_31 FMC_LA_P_32 FMC_LA_N_32 FMC_LA_P_33 FMC_LA_N_33 FMC_PRSNT_M2C DIP SWITCH ECP3-95-1156BGA PT2A PT2B PT5A PT5B PT7A PT7B PT8A PT8B PT10A PT10B PT11A PT11B PT13A PT13B PT14A PT14B PT16A PT16B PT17A PT17B PT19A PT19B PT20A PT20B PT22A PT22B PT23A PT23B PT25A PT25B PT26A PT26B PT28A PT28B PT29A PT29B PT31A PT31B PT32A PT32B PT34A PT34B PT35A PT35B PT37A PT37B PT38A PT38B PT40A PT40B PT41A PT41B PT43A PT43B PT44A PT44B PT46A PT46B PT4A/VREF1_0 PT4B/VREF2_0 PT50A PT50B PT56A PT56B PT58A PT58B PT59A PT59B PT61A PT61B PT62A PT62B PT64A PT64B PT65A PT65B PT67A PT67B PT68A PT68B PT70A PT70B PT71A PT71B PT73A/PCLKT0_0 PT73B/PCLKC0_0 VCCIO0 VCCIO0 VCCIO0 VCCIO0 U1A SWITCH[1..8] 5 R36 2_2K-0402SMT 100NF-0603SMT C342 PHY_NET[0..6] PHY_MDIO [8] PHY_MDC [8] R212 1_5K-0402SMT 4 3 [17] FMC_LA_N_[0..33] C349 100NF-0603SMT 10NF-0603SMT C348 USB_0 USB_1 USB_2 USB_3 USB_4 USB_5 USB_6 USB_7 100NF-0603SMT C350 100NF-0603SMT C346 BLUE_LED_EN_N [14] LED2_EN_N [14] LED1_EN_N [14] FPGA_OUT [3] FPGA_IN [3] PWR_GOOD [3,14] [16] [16] [16] [16] [16] [17] [17] GSRN [5] SFP_TXFAULT SFP_TXDIS SFP_MODPRST SFP_RATESEL SFP_LOS [6] [6] [6] CLK_CTRL0 CLK_CTRL1 CLK_CTRL2 CLK_CTRL3 CLK_CTRL4 CLK_CTRL5 CLK_CTRL6 CLK_CTRL7 FLASH_CTRL[0..7] FLASH_D3 FLASH_D2 FLASH_D1 FLASH_D0 FLASH_D13 FLASH_D12 FLASH_D11 FLASH_D10 FLASH_D29 FLASH_D28 FLASH_D27 FLASH_D26 FLASH_D[0..31] FLASH_A[2..22] FMC_PG_M2C FMC_PG_C2M 10NF-0603SMT C345 AMC_GA0 AMC_GA1 AMC_GA2 FPGA_I2C_SDA FPGA_I2C_SCL USB_TXD USB_DTR# USB_RTS# USB_RXD USB_RI# USB_DSR# USB_DCD# USB_CTS# FLASH_CTRL0 FLASH_CTRL1 FLASH_CTRL2 FLASH_CTRL3 FLASH_CTRL4 FLASH_CTRL5 FLASH_CTRL6 FLASH_CTRL7 AMC_CLK_EN 122MHz_EN 125MHz_EN 156MHz_EN CLK_RESET CLK_OEx CLK_LOCK1 CLK_LOCK2 FLASH_D9 FLASH_D8 FLASH_D7 FLASH_D6 FLASH_D5 FLASH_D4 FLASH_D25 FLASH_D24 FLASH_D23 FLASH_D22 FLASH_D21 FLASH_D20 FLASH_D19 FLASH_D18 FLASH_D17 FLASH_D16 FLASH_D15 FLASH_D14 FLASH_A22 FLASH_A21 FLASH_A20 FLASH_A19 FLASH_A18 FLASH_A17 FLASH_A16 FLASH_A15 FLASH_A14 FLASH_A13 FLASH_A12 FLASH_A11 FLASH_A10 FLASH_A9 FLASH_A8 FLASH_A7 FLASH_A6 FLASH_A5 FLASH_A4 FLASH_A3 FLASH_A2 FLASH_D31 FLASH_D30 [17] V31 V30 U28 V28 W34 W33 V27 V26 W32 W31 V29 W28 W30 W29 W27 W26 Y34 Y33 Y30 AA29 Y32 Y31 Y26 Y25 AA34 AA33 Y28 Y27 AB34 AB33 AA25 AA26 AA31 AA30 AB30 AC30 AC34 AC33 AA28 AA27 AC32 AC31 AB28 AB29 AE32 AE31 AE30 AE29 AF32 AF31 AM34 AM33 AJ34 AK34 AN34 AN33 AH33 AJ33 AP33 AP32 AL34 AL33 AL32 AK32 AJ31 AK31 AN32 AM32 AL30 AM30 AP31 AN31 AP29 AP30 AL31 AM31 AM29 AN29 AP28 AN28 AP27 AN27 AM27 AL27 AH26 AG26 AM28 AL28 AK27 AJ27 AK28 AJ28 AH27 AH28 AL29 AK29 AF26 AE26 AB23 AB24 V24 V23 W25 W24 FMC_LA_P_[0..33] PR44A PR44B PR46A/PCLKT3_0 PR46B/PCLKC3_0 PR47A PR47B PR49A PR49B PR50A PR50B PR52A/VREF1_3 PR52B/VREF2_3 PR53A PR53B PR55A PR55B PR56A PR56B PR58A PR58B PR59A PR59B PR61A PR61B PR61E_A/RLM1_GPLLT_FB_A PR61E_B/RLM1_GPLLT_FB_B PR61E_C/RLM1_GPLLT_IN_A PR61E_D/RLM1_GPLLT_IN_B PR62A PR62B PR64A/HS64 PR64B/HS64 PR65A PR65B PR67A PR67B PR68A PR68B PR70A/HS70 PR70B/HS70 PR70E_A/RLM2_GPLLT_FB_A PR70E_B/RLM2_GPLLT_FB_B PR70E_C/RLM2_GPLLT_IN_A PR70E_D/RLM2_GPLLT_IN_B PR71A PR71B PR74A PR74B PR77A PR77B PR79E_A/RLM3_GPLLT_FB_A PR79E_B/RLM3_GPLLT_FB_B PR79E_C/RLM3_GPLLT_IN_A PR79E_D/RLM3_GPLLT_IN_B PR80A PR80B PR82A/HS82 PR82B/HS82 PR83A PR83B PR85A PR85B PR86A PR86B PR88A/HS88 PR88B/HS88 PR89A PR89B PR91A/HS91 PR91B/HS91 PR92A PR92B PR94A PR94B PR95A PR95B PR97A/HS97 PR97B/HS97 PB131A PB131B PB133A PB133B PB134A PB134B PB136A PB136B PB137A PB137B PB139A PB139B PB140A PB140B PB142A PB142B PB143A PB143B PB145A PB145B VCCIO3 VCCIO3 VCCIO3 VCCIO3 VTT3_1 VTT3_2 ECP3-95-1156BGA [8] U1D 3 BANK3 FMC_LA_P_0 FMC_LA_P_1 FMC_LA_P_2 FMC_LA_P_3 FMC_LA_P_4 FMC_LA_P_5 FMC_LA_P_6 FMC_LA_P_7 FMC_LA_P_8 FMC_LA_P_9 FMC_LA_P_10 FMC_LA_P_11 FMC_LA_P_12 FMC_LA_P_13 FMC_LA_P_14 FMC_LA_P_15 FMC_LA_P_16 FMC_LA_P_17 FMC_LA_P_18 FMC_LA_P_19 FMC_LA_P_20 FMC_LA_P_21 FMC_LA_P_22 FMC_LA_P_23 FMC_LA_P_24 FMC_LA_P_25 FMC_LA_P_26 FMC_LA_P_27 FMC_LA_P_28 FMC_LA_P_29 FMC_LA_P_30 FMC_LA_P_31 FMC_LA_P_32 FMC_LA_P_33 FMC_LA_N_0 FMC_LA_N_1 FMC_LA_N_2 FMC_LA_N_3 FMC_LA_N_4 FMC_LA_N_5 FMC_LA_N_6 FMC_LA_N_7 FMC_LA_N_8 FMC_LA_N_9 FMC_LA_N_10 FMC_LA_N_11 FMC_LA_N_12 FMC_LA_N_13 FMC_LA_N_14 FMC_LA_N_15 FMC_LA_N_16 FMC_LA_N_17 FMC_LA_N_18 FMC_LA_N_19 FMC_LA_N_20 FMC_LA_N_21 FMC_LA_N_22 FMC_LA_N_23 FMC_LA_N_24 FMC_LA_N_25 FMC_LA_N_26 FMC_LA_N_27 FMC_LA_N_28 FMC_LA_N_29 FMC_LA_N_30 FMC_LA_N_31 FMC_LA_N_32 FMC_LA_N_33 C347 2 [14] 3_3V [13] AMC_GA[0..2] USB_[0..7] CLK_CTRL[0..7] 10NF-0603SMT 3_3V PR17A/RDQ22 PR17B/RDQ22 PR19A/RDQ22/HS19 PR19B/RDQ22/HS19 PR20A/RDQ22 PR20B/RDQ22 PR22A/RDQS22 PR22B/RDQS22# PR23A/RDQ22 PR23B/RDQ22 PR25A/RDQ22/HS25 PR25B/RDQ22/HS25 PR25E_A/RUM2_GPLLT_FB_A/RDQ22 PR25E_B/RUM2_GPLLT_FB_B/RDQ22 PR25E_C/RUM2_GPLLT_IN_A/RDQ22 PR25E_D/RUM2_GPLLT_IN_B/RDQ22 PR26A/RDQ31 PR26B/RDQ31 PR28A/RDQ31/HS28 PR28B/RDQ31/HS28 PR29A/RDQ31 PR29B/RDQ31 PR31A/RDQS31 PR31B/RDQS31# PR32A/RDQ31 PR32B/RDQ31 PR34A/VREF1_2/RDQ31/HS34 PR34B/VREF2_2/RDQ31/HS34 PR35A/RDQ40 PR35B/RDQ40 PR37A/RUM0_GDLLT_IN_A/RDQ40/HS37 PR37B/RUM0_GDLLT_IN_B/RDQ40/HS37 PR38A/RUM0_GDLLT_FB_A/RDQ40 PR38B/RUM0_GDLLT_FB_B/RDQ40 PR40A/RDQS40 PR40B/RDQS40# PR41A/RDQ40 PR41B/RDQ40 PR43A/PCLKT2_0/RDQ40/HS43 PR43B/PCLKC2_0/RDQ40/HS43 PR43E_A/RUM0_GPLLT_FB_A/RDQ40 PR43E_B/RUM0_GPLLT_FB_B/RDQ40 PR43E_C/RUM0_GPLLT_IN_A/RDQ40 PR43E_D/RUM0_GPLLT_IN_B/RDQ40 VCCIO2 VCCIO2 VCCIO2 VCCIO2 VTT2_1 VTT2_2 LED6_PU LED7_PU LED8_PU 7 470R 10 RN2G EXB2HV681JV 8 470R 9 RN2H EXB2HV681JV Date: Size C FPGA Pins Friday, May 28, 2010 1 Sheet ECP3 AMC Eval Board Project LED_RED_0402 D32 LED_AMBER_0402 D31 LED_GREEN_0402 D30 LED_BLUE_0402 D29 LED_BLUE_0402 D28 LED_GREEN_0402 D27 LED_AMBER_0402 D26 LED_RED_0402 D25 [17] [17] [17] [17] 12 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 LED8 BGA- C30 LED7 LED8_PU LED7_PU BGA- C29 LED5_PU LED6 BGA- B31 LED6_PU LED5 BGA- A31 LED5_PU LED4 BGA- H25 LED4_PU LED3 BGA- H26 LED3_PU LED2 BGA- A30 LED2_PU LED1 BGA- A29 LED1_PU LEDs LED4_PU 6 470R 11 RN2F EXB2HV681JV [17] [17] FMC_GBTCLK0_M2C_P FMC_GBTCLK0_M2C_N FMC_CLK0_C2M_P FMC_CLK0_C2M_N FMC_GBTCLK1_M2C_P FMC_GBTCLK1_M2C_N 5 470R 12 RN2E EXB2HV681JV Title 3_3V FLASH_D0 FLASH_D1 FLASH_D2 FLASH_D3 FLASH_D10 FLASH_D11 FLASH_D12 FLASH_D13 FLASH_D26 FLASH_D27 FLASH_D28 FLASH_D29 4 470R 13 RN2D EXB2HV681JV LED3_PU LED2_PU LED1_PU N30 N29 N26 P26 N32 N31 N27 N28 N34 N33 P28 P27 P32 P31 P30 R29 P34 P33 R28 R27 R31 R30 R26 R25 R34 R33 T29 T28 T32 T31 T26 T27 T34 T33 T30 U30 U32 U31 U26 U27 U34 U33 V34 V33 N24 U23 N23 U24 T25 T24 1 14 RN2C 3 470R EXB2HV681JV 2 470R 15 RN2B EXB2HV681JV 1 470R 16 RN2A EXB2HV681JV [15] ECP3-95-1156BGA U1C BANK2 2 R Y G B B G Y 54 R BANK0 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 37. FPGA Pins 55 5 4 11 USB_CTS# 14 13 12 9 10 USB_DSR# 8 7 6 5 4 USB_DCD# USB_RXD 100NF-0603SMT USB_RI# C358 FT232R GPIO3 GPIO2 SLEEP# CTS# DCD# DSR# NC_1 GND RI# RXD VCCIO RTS# DTR# OSCI 3 USBDP USBDM 3V3OUT GND RESET# VCC GND GPIO0 GPIO1 NC_2 AGND TEST 27 15 16 17 18 19 20 21 22 23 24 25 26 USB_P 100NF-0603SMT USB_N C359 3_3V R218 4_7K-0402SMT R217 10K-0603SMT J9 1 2 3 4 5 1UH-1206SMT L1 1 2 3 4 5 2 2 2 1 Title RS232 1605 Valley Center Parkway Bethlehem, PA 18017 POSITION USB CONNECTION FOR FRONT PANEL ACCESS LED_GREEN_0402 D34 C D Date: Size B Wednesday, May 26, 2010 1 Sheet ECP3 AMC Eval Board Project 13 of 19 Rev A A 10NF-0603SMT C357 3 OSCO R216 1 2 330R-0402SMT 1 2 330R-0402SMT LED_GREEN_0402 3_3V D33 1 1 A USB_CTS# USB_7 C356 2 USB_DTR# USB_RTS# TXD 28 CB1 CB0 R215 2 B [12] USB_[0..7] USB_DCD# USB_6 USB_RI# USB_4 USB_DSR# USB_RXD USB_3 USB_5 USB_RTS# 3_3V 1UF-16V-0805SMT B C USB_DTR# USB_1 USB_2 USB_TXD 1 USB_TXD U25 3 9 9 6 6 8 8 7 7 USB_0 4 USB_MINI_AB D 5 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 38. RS232 A B C D R320 10K-0603SMT [3] TDI_PWR [3,5] TMS_BUF M12 B7 P7 B6 AMC_MP 10NF-0603SMT C19 J15 HEADER 3 3 1 1 2 J14 HEADER 2X2 XO_TMS BSCAN2_TMS M12 is NC for E devices (2 of 2) 5 Data Sheet Version = 2.5 LCMXO256/640-M100/MN100 SLEEPN VCCAUX VCC VCC U27-2 R224 2 1 GND GND N9 B9 [3,5] TDI_BUF [5] BSCAN2_EN [3,5] TCK_BUF 2 1 AMC_MP TCK_BUF J11 HEADER 2 HD2x1 DI FOR BSCAN2: Connect ispVM Cable ISP/PROG(Yellow) to Pin 4 of programming header J4 BSCAN2_TDO TMS SELECT [12] XO_TSALL [12] XO_GSRN HOTSWAP BLUE_LED_EN_N LED2_EN_N LED1_EN_N AMC_BOOT_EN XO_OUT XO_IN PWR_GOOD C361 10UF-16V-TANTBSMT 10K-0603SMT [3] [12] [12] [12] [3] [3] [3] [3,12] + TDO SELECT 2 3 4 C360 AMC_MP 100NF-0603SMT C17 A C P10 G1 P1 H1 N2 N10 P11 N11 P12 N12 P13 P14 N13 P2 P3 N4 P4 N3 P5 N5 P6 N6 N7 P8 N8 P9 H2 J1 J2 K1 K2 L1 L2 M1 M2 N1 M3 B1 C1 D2 D1 C2 E1 E2 F1 F2 G2 B D BP_I2C_SDA BP_I2C_SCL R221 10K-0603SMT 4 Data Sheet Version = 2.5 LCMXO256/640-M100/MN100 VCCIO1 VCCIO1 VCCIO1 GNDIO1 GNDIO1 GNDIO1 PB4A PB4B PB4C PB4D PB5A PB5C PB5D TMS PL9B TCK PB2A PB2B TDO PB2C TDI PB2D PB3A (PCLK1_1) PB3B PB3C (PCLK1_0) PB3D PR5D PR5C PR5B PR5A PR4B PR4A PR3D PR3C PR3B PR3A PR2B PR9B PR9A PR8B PR8A PR7D PR7C PR7B PR7A PR6B PR6A VCCIO0 VCCIO0 VCCIO0 GNDIO0 GNDIO0 GNDIO0 PT3A PT2F PT2E PT2D PT2C PT2B PT2A PR2A PT5C PT5B PT5A PT4F PT4E PT4D PT4C PT4B (PCLK0_1) PT4A (PCLK0_0) PT3D PT3C PT3B (1 of 2) 3 4 PL5C PL5D (GSRN) PL6A PL6B (TSALL) PL7A PL7B PL7C PL7D PL8A PL8B PL9A PL2A PL2B PL3A PL3B PL3C PL3D PL4A PL4B PL5A PL5B U27-1 HOT SWAP HOT SWAP SW4 R220 10K-0603SMT 1 7 2 5 B5 A14 H14 G14 B13 A4 B4 A3 B3 A2 C3 A1 B2 A13 A12 B11 A11 B12 A10 B10 A9 A8 B8 A7 A6 A5 G13 F14 F13 E14 E13 D14 D13 C14 C13 B14 C12 N14 M14 L13 L14 M13 K14 K13 J14 J13 H13 0R-0603SMT 0R-0603SMT [15] [15] [15] [15] FMC JTAG MSP_TDO_4 [17] MSP_TMS_4 [17] MSP_TCK_4 [17] MSP_TDI_4 [17] MSP_TDO_3 MSP_TMS_3 MSP_TCK_3 MSP_TDI_3 ISP_CLKS MSP_TDO_2 [15] MSP_TMS_2 [15] MSP_TCK_2 [15] MSP_TDI_2 [15] MSP_TDO_1 [5] MSP_TMS_1 [5] MSP_TCK_1 [5] MSP_TDI_1 [5] ECP3 R228 R229 D37 LED_GREEN_0603 led_0603 DI LED2 R226 330R-0603SMT LTC4300A 8 6 3 4 BP_I2C_SDA BP_I2C_SCL D38 LED_RED_0603 led_0603 DI LED1 R227 330R-0603SMT VCC SDAIN SCLIN GND R321 1K-0402SMT 3 R322 1K-0402SMT R323 1K-0402SMT Net BSCAN2_TMS is white-wired net AMC_MP BSCAN2_TMS MSP_TDO_4 MSP_TMS_4 MSP_TCK_4 MSP_TDI_4 MSP_TDO_3 MSP_TMS_3 MSP_TCK_3 MSP_TDI_3 MSP_TDO_2 MSP_TMS_2 MSP_TCK_2 MSP_TDI_2 TDI_BUF MSP_TDO_1 MSP_TMS_1 MSP_TCK_1 MSP_TDI_1 BSCAN2_TDO AMC_I2C_SDA AMC_I2C_SCL D36 LED_BLUE_0603 led_0603 DI LED3 R225 270R-0603SMT 3 EN SDAOUT SCLOUT READY U26 R222 10K-0603SMT HOTSWAP SWITCH AND LEDs 1, 2, & 3 MUST BE PLACED PER AMC SPEC R219 10K-0603SMT BSCAN2_TMS 100NF-0603SMT 4 XO_TMS 56 XO_TSALL 5 [7] AMC_RXP_[0..11] [7] AMC_RXN_[0..11] [7] AMC_TXP_[0..11] AMC_RXP_[0..11] AMC_RXN_[0..11] AMC_TXP_[0..11] AMC_TXN_[0..11] AMC_GA[0..2] AMC_MP AMC_PS1# R223 10K-0603SMT AMC_MP D35 SCHOTTKY/VISHAY-V12P10 [7] AMC_TXN_[0..11] [12] AMC_GA[0..2] AMC_MP AMC_PS0# 2 [15] AMC_TCLKB_N [15] AMC_TCLKB_P 12_0VIN 2 AMC_GA0 AMC_TXN_0 AMC_TXP_0 AMC_RXN_0 AMC_RXP_0 AMC_GA1 AMC_TXN_1 AMC_TXP_1 AMC_RXN_1 AMC_RXP_1 AMC_GA2 AMC_TXN_2 AMC_TXP_2 AMC_RXN_2 AMC_RXP_2 AMC_TXN_3 AMC_TXP_3 AMC_RXN_3 AMC_RXP_3 AMC_ENABLE# AMC_TXN_4 AMC_TXP_4 AMC_RXN_4 AMC_RXP_4 AMC_TXN_5 AMC_TXP_5 AMC_RXN_5 AMC_RXP_5 AMC_SCL_L AMC_TXN_6 AMC_TXP_6 AMC_RXN_6 AMC_RXP_6 AMC_TXN_7 AMC_TXP_7 AMC_RXN_7 AMC_RXP_7 AMC_SDA_L AMC_TCLKB_N AMC_TCLKB_P 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 AMC Date: Size C Title GND PWR PS0# GND FCLKAFCLKA+ GND TCLKBTCLKB+ GND TCLKATCLKA+ GND PWR SDA_L GND RX7RX7+ GND TX7TX7+ GND RX6RX6+ GND TX6TX6+ GND PWR SCL_L GND RX5RX5+ GND TX5TX5+ GND RX4RX4+ GND TX4TX4+ GND PWR ENABLE# GND RX3RX3+ GND TX3TX3+ GND RX2RX2+ GND TX2TX2+ GND PWR GA2 GND RX1RX1+ GND TX1TX1+ GND PWR GA1 GND RX0RX0+ GND TX0TX0+ GND PWR RSRVD8 GND RSRVD6 GA0 MP PS1# PWR GND CN1 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 Thursday, May 06, 2010 1 Sheet ECP3 AMC Eval Board Project 14 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 AMC_TXN_11 AMC_TXP_11 AMC_RXN_11 AMC_RXP_11 AMC_TXN_10 AMC_TXP_10 AMC_RXN_10 AMC_RXP_10 AMC_TXN_9 AMC_TXP_9 AMC_RXN_9 AMC_RXP_9 AMC_TXN_8 AMC_TXP_8 AMC_RXN_8 AMC_RXP_8 AMC BACKPLANE GND RX8RX8+ GND TX8TX8+ GND RX9RX9+ GND TX9TX9+ GND RX10RX10+ GND TX10TX10+ GND RX11RX11+ GND TX11TX11+ GND RX12RX12+ GND TX12TX12+ GND RX13RX13+ GND TX13TX13+ GND RX14RX14+ GND TX14TX14+ GND RX15RX15+ GND TX15TX15+ GND RX16RX16+ GND TX16TX16+ GND RX17RX17+ GND TX17TX17+ GND RX18RX18+ GND TX18TX18+ GND RX19RX19+ GND TX19TX19+ GND RX20RX20+ GND TX20TX20+ GND TCK TMS TRST# TDO TDI GND 1 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 39. AMC Backplane C364 DI A 2 1 3_3V 2 1 2 C367 DI DI 2 10NF-0603SMT C366 DI C369 DI 125.00MHz GND VCC X2 156.25MHz GND VCC X1 100NF-0603SMT 100NF-0603SMT TANT DI C373 DI 5 100NF-0603SMT C389 DI CLK_VCC2 100NF-0603SMT C386 C387 C388 6.8UF-TANT-0805SMT DI DI DI FB28 MPZ1608Y600B 100NF-0603SMT C370 C371 C372 6.8UF-TANT-0805SMT DI DI TANT DI 125MHz_EN DIS# GND R RE VCC Q_N Q VCCO_0 122MHz_N 5 C375 DI C391 DI C379 DI 560PF-0603SMT C378 DI C381 DI C393 DI 560PF-0603SMT C392 DI C395 DI 4 C397 DI CLK_CTRL7 C383 DI C399 DI 560PF-0603SMT C398 DI C385 DI VCCO_5 CLK_LOCK2 C401 DI 560PF-0603SMT C400 DI VCCO_11 560PF-0603SMT C384 DI 10NF-0603SMT VCCO_10 560PF-0603SMT C382 DI 10NF-0603SMT VCCO_4 9 RN4H 7 [14] MSP_TDI_3 [14] MSP_TMS_3 [14] MSP_TCK_3 [14] MSP_TDO_3 3_3V 3 R275 4_7K-0402SMT DI R270 4_7K-0402SMT DI AMC_CLK AMC_CLK_VREF 38 39 40 41 22 21 20 19 18 17 16 15 14 CLK_LOCK1 42 48 47 46 45 38 39 40 41 22 21 20 CLK_SCL 125MHz 125MHz_VREF CLK_RESET CLK_LOCK2 CLK_SDA CLK_SCL CLK_OEx R285 4_7K-0402SMT DI R284 4_7K-0402SMT DI 19 18 17 122MHz 122MHz_N 10 RN4G R265 470R-0402SMT DI 3_3V 16 15 14 156MHz 156MHz_VREF 24 42 48 47 46 45 11 RN4F AMC_CLK_EN 122MHz_EN R239 470R-0402SMT DI CLK_RESET CLK_LOCK1 CLK_SDA CLK_SCL CLK_OEx 24 6 8 156MHz_EN 125MHz_EN CLK_LOCK2 LOCK2 D40 LED_GREEN_0402 R252 680R-0402SMT [14] MSP_TDI_2 [14] MSP_TMS_2 [14] MSP_TCK_2 [14] MSP_TDO_2 3 CLK_SDA RN4E 13 RN4D 14 RN4C 15 RN4B 16 RN4A CLK_LOCK1 D39 LED_GREEN_0402 CLK_SDA 3_3V 12 10NF-0603SMT VCCO_9 560PF-0603SMT C396 DI 10NF-0603SMT VCCO_8 560PF-0603SMT C394 DI 10NF-0603SMT VCCO_7 CLK_LOCK2 CLK_CTRL6 CLK_SCL CLK_OEx CLK_LOCK1 CLK_CTRL5 CLK_RESET 156MHz_EN CLK_CTRL4 125MHz_EN 122MHz_EN CLK_CTRL3 AMC_CLK_EN CLK_CTRL1 CLK_CTRL2 CLK_CTRL0 5 4 3 2 1 EXB2HV201JV 2K LOCK1 R251 680R-0402SMT 0R-0603SMT R246 0R-0603SMT R242 10NF-0603SMT VCCO_3 3_3V 560PF-0603SMT C380 DI 10NF-0603SMT VCCO_2 [12] CLK_I2C_SDA [12] CLK_I2C_SCL Place bypass caps close to output bank supply pins. 10NF-0603SMT VCCO_6 560PF-0603SMT C390 DI 10NF-0603SMT C377 DI 10NF-0603SMT VCCO_1 1 2 3 HEADER 3(DNP) J10 [12] CLK_CTRL[0..7] AMC_CLK_VREF 560PF-0603SMT C376 DI 10NF-0603SMT R259 DI 220R-0402SMT AMC_CLK AMC_CLK_EN R258 DI 220R-0402SMT 122MHz 4 560PF-0603SMT C374 DI 10NF-0603SMT 4 3 2 1 X3 SL-122_88MHz R245 DI 220R-0402SMT 1 125MHz_VREF 125MHz R238 DI 220R-0402SMT 3 NC 156MHz 156MHz_VREF 156MHz_EN R233 DI 220R-0402SMT 1 3 R231 DI 220R-0402SMT SN65MLVD3DRBT GND A B VCC U29 2 1 EN OUTP EN OUTP CLK_VCC1 5 6 7 8 122MHz_EN 100NF-0603SMT FB27 MPZ1608Y600B R268 100R-0603SMT DI 10NF-0603SMT DI DI 2 4 2 4 MPZ1608Y600B MPZ1608Y600B C368 DI 3_3V 1 3_3V FB25 C365 DI FB26 100NF-0603SMT 6V 2 100NF-0603SMT 1 3_3V 6V DI 10NF-0603SMT [14] AMC_TCLKB_N B C363 DI MPZ1608Y600B FB24 100NF-0603SMT 1 3_3V 2 10NF-0603SMT C362 DI [14] AMC_TCLKB_P C D DI MPZ1608Y600B FB23 100NF-0603SMT 1 3_3V 6 TDO TMS TCK TDI FBKP FBKN FBKVTT REFBP REFBN REFBVTT REFAP REFAN REFAVTT RREF RESETb USER0 USER1 USER2 USER3 TDO TMS TCK TDI FBKP FBKN FBKVTT REFBP REFBN REFBVTT REFAP REFAN REFAVTT RREF RESETb USER0 USER1 USER2 USER3 2 CLK_VCC1 U28 DI ispCLOCK5406D VCCD 4 CLK_VCC2 13 Place Oscillators close to Clock 5406D. Place VREF dividers close to oscillators. U30 2 DI ispCLOCK5406D 49 DIE_PAD 49 VCC 44 DIE_PAD 44 VCCD 43 43 GND 23 VCCA VCCA VCCJ VCCJ GNDD 23 GNDD 3 37 GNDA 37 GNDA 57 13 5 VCCO_5 BANK_5P BANK_5N GNDO_5 VCCO_4 BANK_4P BANK_4N GNDO_4 VCCO_3 BANK_3P BANK_3N GNDO_3 VCCO_2 BANK_2P BANK_2N GNDO_2 VCCO_1 BANK_1P BANK_1N GNDO_1 VCCO_0 BANK_0P BANK_0N GNDO_0 VCCO_5 BANK_5P BANK_5N GNDO_5 VCCO_4 BANK_4P BANK_4N GNDO_4 VCCO_3 BANK_3P BANK_3N GNDO_3 VCCO_2 BANK_2P BANK_2N GNDO_2 VCCO_1 BANK_1P BANK_1N GNDO_1 VCCO_0 BANK_0P BANK_0N GNDO_0 VCCO_9 VCCO_10 VCCO_11 12 10 11 9 5 6 7 8 4 2 3 1 AMC_TCLKB_P DDR2_CLKP DDR2_CLKN AMC_CLK_OUTP 10R-0402SMT AMC_CLK_OUTN 10R-0402SMT DDR2_CLKP 10R-0402SMT DDR2_CLKN 10R-0402SMT R237 DI R240 DI R241 DI R243 DI PCSD_REFCLKP 10R-0402SMT PCSD_REFCLKN 10R-0402SMT R248 DI R249 DI PCSA_REFCLKN 10R-0402SMT PCSB_REFCLKN 10R-0402SMT AMC_CLK_OUTN 10R-0402SMT DDR2_CLKN 10R-0402SMT PCSC_REFCLKN 10R-0402SMT R277 DI PCSD_REFCLKN 10R-0402SMT PCSD_REFCLKP R274 DI 10R-0402SMT R276 100R-0603SMT DNI R273 DI PCSC_REFCLKP R271 DI 10R-0402SMT R272 100R-0603SMT DNI R269 DI R266 DDR2_CLKP DI 10R-0402SMT R267 100R-0603SMT DNI R264 DI AMC_CLK_OUTP R262 DI 10R-0402SMT R263 100R-0603SMT DNI R261 DI R257 PCSB_REFCLKP DI 10R-0402SMT R260 100R-0603SMT DNI R256 DI PCSA_REFCLKP R254 DI 10R-0402SMT R255 100R-0603SMT DNI PCSD_REFCLKN PCSD_REFCLKP PCSC_REFCLKN PCSC_REFCLKN 10R-0402SMT R247 DI Date: Size C Title Friday, March 05, 2010 1 Sheet ECP3 AMC Eval Board Project REF CLOCK GEN 15 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 [7] [7] [7] [7] [14] [11] PCSC_REFCLKP PCSC_REFCLKP 10R-0402SMT R244 DI [7] [7] [7] [7] [14] [11] AMC_TCLKB_N PCSB_REFCLKN PCSB_REFCLKN 10R-0402SMT R236 DI PCSB_REFCLKP PCSB_REFCLKP 10R-0402SMT R235 DI PCSA_REFCLKP PCSA_REFCLKN PCSA_REFCLKP 10R-0402SMT PCSA_REFCLKN 10R-0402SMT R234 DI R232 DI Place U2 and optional M-LVDS termination resistors at the end of the T-Line. VCCO_8 VCCO_5 4 2 3 1 25 27 26 28 VCCO_4 5 6 7 8 VCCO_7 VCCO_3 12 10 11 9 32 31 30 29 VCCO_2 25 27 26 28 VCCO_6 VCCO_1 32 31 30 29 33 35 34 36 VCCO_0 33 35 34 36 1 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 40. Reference Clock Generation A B C 5 [12] SFP_MODPRST [12] SFP_RATESEL [12] SFP_LOS SFP_LOS 0R-0603SMT R296 [12] SFP_TXFAULT [12] SFP_TXDIS [17] I2C_SCL 3_3V R278 1K-0603SMT 0R-0603SMT R279 R283 R297 2 4 3_3V R280 10K-0402SMT U31 1 2 3 4 5 6 7 8 9 10 1 R282 1 2 330R-0402SMT 20 19 18 17 16 15 14 13 12 11 SFP_TDP SFP_TDN 3 SFP_RDN SFP_RDP C407 100NF-0603SMT 6 5 4 3 2 1 6 5 4 3 2 1 CG1 SFP_CAGE 11 10 9 8 7 11 10 9 8 7 3 SFP LOS LIT WHEN OPTICAL LINK IS VALID LED_GREEN_0402 D41 C409 100NF-0603SMT HOST_SFP VeeT TDTD+ VeeT VccT VccR VeeR RD+ RDVeeR SFP VeeT TxFault TxDisable Mod_Def_2 Mod_Def_1 Mod_Def_0 RateSel LOS VeeR VeeR CN2 NC7SZ125/SOT23 4 2 5 1 [17] I2C_SDA 4 100NF-0603SMT D 10K-0402SMT 10K-0402SMT 58 3 C404 To HDIN 1UH-1206SMT C408 10UF-16V-TANTBSMT L3 L2 1UH-1206SMT From HDOUT 2 SFP_RDN [7] SFP_RDP [7] C410 SFP_TDP [7] SFP_TDN [7] 2 100NF-0603SMT 5 C405 Date: Size B Title Friday, May 28, 2010 1 Sheet ECP3 AMC Eval Board Project 16 of 19 Rev B 1605 Valley Center Parkway Bethlehem, PA 18017 SFP Cage/Connector C406 10UF-16V-TANTBSMT 3_3V 1 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 41. SFP Cage/Connector 100NF-0603SMT 10K-0402SMT R281 A B C 5 VITA57 CN3I VITA57 CN3E VITA57 CN3A GND CLK1_C2M_P CLK1_C2M_N GND GND HA03_P HA03_N GND HA07_P HA07_N GND HA11_P HA11_N GND HA14_P HA14_N GND HA18_P HA18_N GND HA22_P HA22_N GND HB01_P HB01_N GND HB07_P HB07_N GND HB11_P HB11_N GND HB15_P HB15_N GND HB18_P HB18_N GND VIO_B_M2C GND GND HA01_P_CC HA01_N_CC GND GND HA05_P HA05_N GND HA09_P HA09_N GND HA13_P HA13_N GND HA16_P HA16_N GND HA20_P HA20_N GND HB03_P HB03_N GND HB05_P HB05_N GND HB09_P HB09_N GND HB13_P HB13_N GND HB19_P HB19_N GND HB21_P HB21_N GND VADJ GND GND DP1_M2C_P DP1_M2C_N GND GND DP2_M2C_P DP2_M2C_N GND GND DP3_M2C_P DP3_M2C_N GND GND DP4_M2C_P DP4_M2C_N GND GND DP5_M2C_P DP5_M2C_N GND GND DP1_C2M_P DP1_C2M_N GND GND DP2_C2M_P DP2_C2M_N GND GND DP3_C2M_P DP3_C2M_N GND GND DP4_C2M_P DP4_C2M_N GND GND DP5_C2M_P DP5_C2M_N GND J1 I2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J20 J21 J22 J23 J24 J25 J26 J27 J28 J29 J30 J31 J32 J33 J34 J35 J36 J37 J38 J39 J40 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19 E20 E21 E22 E23 E24 E25 E26 E27 E28 E29 E30 E31 E32 E33 E34 E35 E36 E37 E38 E39 E40 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 [7] [7] [7] [7] [7] [7] [7] [7] [7] [7] [7] [7] [7] [7] [7] [7] FMC_DP1_M2C_P FMC_DP1_M2C_N FMC_DP2_M2C_P FMC_DP2_M2C_N FMC_DP3_M2C_P FMC_DP3_M2C_N FMC_DP4_M2C_P FMC_DP4_M2C_N FMC_DP1_C2M_P FMC_DP1_C2M_N FMC_DP2_C2M_P FMC_DP2_C2M_N FMC_DP3_C2M_P FMC_DP3_C2M_N FMC_DP4_C2M_P FMC_DP4_C2M_N 4 4 VITA57 CN3J VITA57 VITA57 CN3F VREF_B_M2C GND GND CLK1_M2C_P CLK1_M2C_N GND HA02_P HA02_N GND HA06_P HA06_N GND HA10_P HA10_N GND HA17_P_CC HA17_N_CC GND HA21_P HA21_N GND HA23_P HA23_N GND HB00_P_CC HB00_N_CC GND HB06_P_CC HB06_N_CC GND HB10_P HB10_N GND HB14_P HB14_N GND HB17_P_CC HB17_N_CC GND VIO_B_M2C PG_M2C GND GND HA00_P_CC HA00_N_CC GND HA04_P HA04_N GND HA08_P HA08_N GND HA12_P HA12_N GND HA15_P HA15_N GND HA19_P HA19_N GND HB02_P HB02_N GND HB04_P HB04_N GND HB08_P HB08_N GND HB12_P HB12_N GND HB16_P HB16_N GND HB20_P HB20_N GND VADJ RES1 GND GND DP9_M2C_P DP9_M2C_N GND GND DP8_M2C_P DP8_M2C_N GND GND DP7_M2C_P DP7_M2C_N GND GND DP6_M2C_P DP6_M2C_N GND GND GBTCLK1_M2C_P GBTCLK1_M2C_N GND GND DP9_C2M_P DP9_C2M_N GND GND DP8_C2M_P DP8_C2M_N GND GND DP7_C2M_P DP7_C2M_N GND GND DP6_C2M_P DP6_C2M_N GND GND RES0 CN3B K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13 K14 K15 K16 K17 K18 K19 K20 K21 K22 K23 K24 K25 K26 K27 K28 K29 K30 K31 K32 K33 K34 K35 K36 K37 K38 K39 K40 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 F32 F33 F34 F35 F36 F37 F38 F39 F40 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 FMC_PG_M2C [12] FMC_GBTCLK1_M2C_P FMC_GBTCLK1_M2C_N [12] [12] 3 3 VITA57 CN3G VITA57 CN3C GND CLK0_C2M_P CLK0_C2M_N GND GND LA00_P_CC LA00_N_CC GND LA03_P LA03_N GND LA08_P LA08_N GND LA12_P LA12_N GND LA16_P LA16_N GND LA20_P LA20_N GND LA22_P LA22_N GND LA25_P LA25_N GND LA29_P LA29_N GND LA31_P LA31_N GND LA33_P LA33_N GND VADJ GND GND DP0_C2M_P DP0_C2M_N GND GND DP0_M2C_P DP0_M2C_N GND GND LA06_P LA06_N GND GND LA10_P LA10_N GND GND LA14_P LA14_N GND GND LA18_P_CC LA18_N_CC GND GND LA27_P LA27_N GND GND SCL SDA GND GND GA0 12P0V GND 12P0V GND 3P3V GND G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 G23 G24 G25 G26 G27 G28 G29 G30 G31 G32 G33 G34 G35 G36 G37 G38 G39 G40 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 FMC_DP0_C2M_P FMC_DP0_C2M_N 3_3V 12_0V 0R-0603SMT 0R-0603SMT FMC_LA_P_33 FMC_LA_N_33 FMC_LA_P_31 FMC_LA_N_31 FMC_LA_P_29 FMC_LA_N_29 FMC_LA_P_25 FMC_LA_N_25 FMC_LA_P_22 FMC_LA_N_22 FMC_LA_P_20 FMC_LA_N_20 FMC_LA_P_16 FMC_LA_N_16 FMC_LA_P_12 FMC_LA_N_12 FMC_LA_P_8 FMC_LA_N_8 FMC_LA_P_3 FMC_LA_N_3 FMC_LA_P_0 FMC_LA_N_0 [7] [7] GbE [12] [12] 2 I2C_SCL [16] I2C_SDA [16] [7] [7] FMC_CLK0_C2M_P FMC_CLK0_C2M_N FMC_GA0 R287 R288 FMC_LA_P_27 FMC_LA_N_27 FMC_LA_P_18 FMC_LA_N_18 FMC_LA_P_14 FMC_LA_N_14 FMC_LA_P_10 FMC_LA_N_10 FMC_LA_P_6 FMC_LA_N_6 FMC_DP0_M2C_P FMC_DP0_M2C_N 2 VITA57 CN3H VITA57 VREF_A_M2C PRSNT_M2C_L GND CLK0_M2C_P CLK0_M2C_N GND LA02_P LA02_N GND LA04_P LA04_N GND LA07_P LA07_N GND LA11_P LA11_N GND LA15_P LA15_N GND LA19_P LA19_N GND LA21_P LA21_N GND LA24_P LA24_N GND LA28_P LA28_N GND LA30_P LA30_N GND LA32_P LA32_N GND VADJ PG_C2M GND GND GBTCLK0_M2C_P GBTCLK0_M2C_N GND GND LA01_P_CC LA01_N_CC GND LA05_P LA05_N GND LA09_P LA09_N GND LA13_P LA13_N GND LA17_P_CC LA17_N_CC GND LA23_P LA23_N GND LA26_P LA26_N GND TCK TDI TDO 3P3VAUX TMS TRST_L GA1 3P3V GND 3P3V GND 3P3V CN3D H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 H29 H30 H31 H32 H33 H34 H35 H36 H37 H38 H39 H40 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 [12] 3_3V FMC_LA_P_32 FMC_LA_N_32 FMC_LA_P_30 FMC_LA_N_30 FMC_LA_P_28 FMC_LA_N_28 FMC_LA_P_24 FMC_LA_N_24 FMC_LA_P_21 FMC_LA_N_21 FMC_LA_P_19 FMC_LA_N_19 FMC_LA_P_15 FMC_LA_N_15 FMC_LA_P_11 FMC_LA_N_11 FMC_LA_P_7 FMC_LA_N_7 FMC_LA_P_4 FMC_LA_N_4 FMC_LA_P_2 FMC_LA_N_2 FMC_CLK_P FMC_CLK_N FMC_PRSNT_M2C FMC_GA1 FMC_LA_P_26 FMC_LA_N_26 FMC_LA_P_23 FMC_LA_N_23 FMC_LA_P_17 FMC_LA_N_17 FMC_LA_P_13 FMC_LA_N_13 FMC_LA_P_9 FMC_LA_N_9 FMC_LA_P_5 FMC_LA_N_5 FMC_LA_P_1 FMC_LA_N_1 FMC_PRSNT_M2C FMC_CLK_P FMC_CLK_N Date: Size C Title Friday, May 28, 2010 1 Sheet ECP3 AMC Eval Board Project FMC BACKPLANE [12] [12] FMC_LA_P_[0..33] FMC_LA_N_[0..33] R293 OPEN-0603SMT R292 OPEN-0603SMT FMC_3P3AUX R291 OPEN-0603SMT R290 OPEN-0603SMT FMC_3P3AUX MSP_TMS_4 [14] MSP_TCK_4 [14] MSP_TDO_4 [14] MSP_TDI_4 [14] 17 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 [12] [12] [12] FMC_3P3AUX [12] [12] 160R-2010SMT R289 FMC_GBTCLK0_M2C_P FMC_GBTCLK0_M2C_N FMC_PG_C2M 1 FMC_LA_P_0 FMC_LA_P_1 FMC_LA_P_2 FMC_LA_P_3 FMC_LA_P_4 FMC_LA_P_5 FMC_LA_P_6 FMC_LA_P_7 FMC_LA_P_8 FMC_LA_P_9 FMC_LA_P_10 FMC_LA_P_11 FMC_LA_P_12 FMC_LA_P_13 FMC_LA_P_14 FMC_LA_P_15 FMC_LA_P_16 FMC_LA_P_17 FMC_LA_P_18 FMC_LA_P_19 FMC_LA_P_20 FMC_LA_P_21 FMC_LA_P_22 FMC_LA_P_23 FMC_LA_P_24 FMC_LA_P_25 FMC_LA_P_26 FMC_LA_P_27 FMC_LA_P_28 FMC_LA_P_29 FMC_LA_P_30 FMC_LA_P_31 FMC_LA_P_32 FMC_LA_P_33 59 FMC_LA_N_0 FMC_LA_N_1 FMC_LA_N_2 FMC_LA_N_3 FMC_LA_N_4 FMC_LA_N_5 FMC_LA_N_6 FMC_LA_N_7 FMC_LA_N_8 FMC_LA_N_9 FMC_LA_N_10 FMC_LA_N_11 FMC_LA_N_12 FMC_LA_N_13 FMC_LA_N_14 FMC_LA_N_15 FMC_LA_N_16 FMC_LA_N_17 FMC_LA_N_18 FMC_LA_N_19 FMC_LA_N_20 FMC_LA_N_21 FMC_LA_N_22 FMC_LA_N_23 FMC_LA_N_24 FMC_LA_N_25 FMC_LA_N_26 FMC_LA_N_27 FMC_LA_N_28 FMC_LA_N_29 FMC_LA_N_30 FMC_LA_N_31 FMC_LA_N_32 FMC_LA_N_33 FMC_GA0 FMC_GA1 D 5 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 42. FMC Backplane FAT PIPE 60 A B C D C425 C413 C416 C417 C418 C419 C428 C422 C429 C423 C430 C431 C433 C434 C435 C436 C437 C438 C439 C441 1000PF-0402SMT C450 C443 C444 5 C453 1000PF-0402SMT 1000PF-0402SMT C452 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C442 1000PF-0402SMT C451 1000PF-0402SMT 1000PF-0402SMT C440 1_8V C446 1000PF-0402SMT 1000PF-0402SMT C445 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT VCCPLL 3_3V C424 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C427 C432 1_2V_A 2_5V C415 C420 C426 4 C421 C448 C449 4 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C447 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT 1000PF-0402SMT C414 VCC_CORE ALL CAPS PLACED UNDER BGA 5 AD24 AH21 AM9 AJ9 AK26 M19 U17 C18 AF33 AM15 AG27 L11 Y11 E5 T14 B26 L3 F20 B9 AM24 E26 M16 AD23 AC3 M6 L15 U29 AL26 M24 AA15 AM11 AM10 U20 AE10 AJ21 AE24 AH10 E30 AA19 V21 T21 W12 P17 W14 C15 L21 R16 AN9 AD14 L23 U10 AD20 AM18 W21 Y21 AK9 Y24 H8 AE11 M32 V20 M12 E33 B30 AA16 J33 Y16 AG10 K18 AF2 AF25 AK5 AD6 W15 V15 W20 M11 Y3 AM25 R6 B5 AJ22 AG25 AE25 R19 AJ26 AC29 J5 AC11 AM22 AJ19 AM17 L24 W19 AN30 R21 AA24 U21 Y29 P16 AL9 R15 T20 AJ14 A1 T17 F17 AC24 P15 V19 C12 R11 V25 AA20 U25 AJ17 ECP3-95-1156BGA GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND U1L GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND AF10 Y15 P29 U3 J2 J30 AP9 K17 Y19 P21 P3 AJ13 AM13 V10 AH24 P11 U14 AA17 Y17 AM26 U16 AA6 AC12 Y20 AJ11 AJ25 T15 AH14 AD21 P18 AA11 R17 AE17 AP34 AH18 AJ10 W18 AK33 AA14 V17 AA32 AH11 AN5 R32 V6 AG8 L20 C24 H27 AK2 AD11 V16 AF30 AC19 AA21 F23 AJ16 P24 AM20 AJ24 AN26 AM12 AM19 C21 T12 M23 L29 E9 AE18 V14 T18 AJ18 AM23 W16 W17 AD32 E2 P14 V18 AM16 P20 AP1 R14 R24 AD15 AM14 U18 U19 P19 AA18 AP26 L12 Y18 U15 AD12 T16 T23 L14 AJ20 AH17 T19 A34 AJ12 R18 R20 AH25 AK30 Y14 AM21 AF5 V32 AJ23 AC23 AJ15 F14 AC16 F11 3 3 B8 B27 B29 C7 C8 C9 C26 C27 D7 D8 D9 D26 D27 E6 E7 E8 E14 E16 E25 E27 E28 E29 F4 F5 F6 F7 F8 F9 F15 F16 F24 F25 F26 F27 F28 F29 G6 G7 G8 G9 G10 G14 G15 G22 G24 G27 G28 G29 H6 H7 H9 H10 H11 H12 H21 H24 H28 H29 H30 H31 H32 J4 J6 J7 J8 J9 J10 J11 J24 J25 J26 J27 J28 J29 J31 J32 K1 K2 K3 K4 K5 K6 K7 K11 K25 K26 K27 K28 K29 K30 K31 K32 K33 K34 L1 L2 L4 L5 L6 L7 L8 L9 L10 L25 L26 L27 L28 L30 L31 L32 L33 L34 M1 M2 M3 M4 M8 M7 M9 M25 NC222 NC221 NC220 NC219 NC218 NC217 NC216 NC215 NC214 NC213 NC210 NC209 NC208 NC207 NC206 NC205 NC204 NC203 NC202 NC201 NC200 NC199 NC198 NC197 NC193 NC192 NC191 NC190 NC189 NC188 NC187 NC186 NC185 NC184 NC183 NC179 NC178 NC177 NC176 NC175 NC174 NC173 NC172 NC171 NC170 NC167 NC166 NC165 NC164 NC163 NC162 NC161 NC160 NC159 NC158 NC157 NC156 NC155 NC154 NC153 NC152 NC151 NC150 NC149 NC148 NC147 NC146 NC145 NC144 NC143 NC142 NC141 NC140 NC139 NC138 NC137 NC136 NC135 NC134 NC133 NC132 NC131 NC130 NC129 NC128 NC127 NC126 NC125 NC124 NC123 NC122 NC121 ECP3-95-1156BGA NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29 NC30 NC31 NC32 NC33 NC34 NC35 NC36 NC37 NC38 NC39 NC40 NC41 NC42 NC43 NC44 NC45 NC46 NC47 NC48 NC49 NC50 NC51 NC52 NC53 NC54 NC55 NC56 NC57 NC58 NC59 NC60 NC61 NC62 NC63 NC64 NC65 NC66 NC67 NC68 NC69 NC70 NC71 NC72 NC73 NC74 NC75 NC76 NC77 NC78 NC79 NC80 NC81 NC82 NC83 NC84 NC85 NC86 NC87 NC88 NC89 NC90 NC91 NC92 NC93 NC94 NC95 NC96 NC97 NC98 NC99 NC100 NC101 NC102 NC103 NC104 NC105 NC106 NC107 NC108 NC109 NC110 NC111 NC112 NC113 NC114 NC115 NC116 NC118 NC117 NC119 NC120 U1K AK1 AJ32 AJ30 AJ29 AJ1 AH34 AH32 AH31 AH30 AH29 AH8 AH6 AH5 AH4 AH3 AH2 AH1 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG7 AG6 AG5 AG4 AG3 AG2 AG1 AF34 AF29 AF28 AF27 AF8 AF7 AF6 AF4 AF3 AF1 AE34 AE33 AE28 AE27 AE8 AE7 AE6 AE5 AD34 AD33 AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD7 AD5 AC28 AC27 AC26 AC25 AC10 AC9 AC8 AC5 AC4 AC2 AC1 AB32 AB31 AB27 AB26 AB25 AB10 AB8 AB7 AB6 AB4 AB3 AA9 N9 M34 M33 M31 M30 M29 M28 M27 M26 2 2 Date: Size C Title Friday, March 05, 2010 1 Sheet ECP3 SPB Eval Board Project VSS/Decoupling 18 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 1 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 43. VSS/Decoupling 61 A B C D M HOLE2 M HOLE2 5 MH6 MH5 FRONT PANEL PNL1 5 1 M HOLE2 MH7 1 4 4 SEG1 3 R294 1M-2500V ESD SEGMENT 3 1 1 2 2 3 3 Date: Size A Title R295 1M-2500V 2 Friday, March 05, 2010 Sheet ECP3 AMC Eval Board Project LED3 u-USB LED2 1 19 1 of 19 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 SFP RJ45 FRONT PANEL LED1 2 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 44. Front Panel A B C 5 CN2 2 4 12VDC INPUT CN4 CN3 PCB TOP 3 Date: Size A Title 2 Tuesday, April 13, 2010 AMC Loopback Project CN1 1 Sheet 1 1 of 4 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 BLOCK DIAGRAM Place AMC primary side up in CN4 Slot 3.3VDC MP Place AMC secondary side up in CN3 Slot 3 Lane Loops 0 => 0 1 => 1 2 => 2 3 => 3 4 => 4 5 => 5 6 => 6 7 => 7 8 => 8 9 => 9 10 => 10 11 => 11 Loops 0 1 2 3 8 9 10 11 62 Lane 0 => 1 => 2 => 3 => 4 => 5 => 6 => 7 => D Place AMC primary side up in CN2 Slot 4 Place AMC secondary side up in CN1 Slot 5 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Appendix E. Lattice AMC Interface Card Schematic Figure 45. Block Diagram A B C D M HOLE2 M HOLE2 M HOLE2 MH3 M HOLE2 MH4 5 2 TB1 1 Terminal Block/ED1202DS GND +12VDC 12_0V 4 J2 HEADER 2 1 2 U1 GND VIN MARK TERMINAL BLOCK +12VDC at PIN1 Add jumper to disable This is needs to be jumped when using ATX supply MH2 MH1 1 PTH12060W SENSE VOUT R5 2K-0603SMT R4 0R-0603SMT 5 6 C5 10UF-16V-TANTBSMT R2 0R-0603SMT F1228CT-ND F2 5A Fast-Blo SMT Socketed Fuse 3.3V F1251CT-ND 10A Fast-Blo SMT Socketed Fuse INHIBIT# 3 2 POWER INPUT F1 ADJUST 4 Male Power Jack 2.1mm 22HP037-2.1mm 3 12_0VIN GND 3 3 + + C3 + 330UF-FKSMT C4 10UF-16V-TANTBSMT 3_3V_MP D1 SCHOTTKY/VISHAY-V12P10 + C1 C2 470UF-FKSMT 100UF-FKSMT + D2 2 R1 12_0V 470R-1206SMT D3 R3 470R-1206SMT 12_0VIN 12VIN GOOD Date: Size B Title SW SPST SW1 1 Sheet 2 of 4 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 Thursday, February 18, 2010 AMC Loopback Project 1 MOLEX_39-29-9202 PWR1 3_3V_MP ATX GOOD POWER LED-SMT1206_GREEN LED-SMT1206_GREEN 2 G J1 1 2 10 MUP 9 MDWN 8 TRACK 4 G 63 7 20 19 18 17 16 15 14 13 12 11 12V NC NC NC OK NC GND GND NC GND GND GND NC PS_ON GND GND 3.3V NC 3.3V 3.3V 10 9 8 7 6 5 4 3 2 1 5 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 46. Power 64 A B C D 5 5 12_0V 3_3V_MP E_LINKN_0 E_LINKP_0 I_LINKN_0 I_LINKP_0 E_LINKN_1 E_LINKP_1 I_LINKN_1 I_LINKP_1 E_LINKN_2 E_LINKP_2 I_LINKN_2 I_LINKP_2 E_LINKN_3 E_LINKP_3 I_LINKN_3 I_LINKP_3 E_LINKN_4 E_LINKP_4 I_LINKN_4 I_LINKP_4 E_LINKN_5 E_LINKP_5 I_LINKN_5 I_LINKP_5 AMC_SCL_L E_LINKN_6 E_LINKP_6 I_LINKN_6 I_LINKP_6 E_LINKN_7 E_LINKP_7 I_LINKN_7 I_LINKP_7 AMC_SDA_L AMC_TCLKA_N AMC_TCLKA_P AMC_TCLKB_N AMC_TCLKB_P AMC_FCLKA_N AMC_FCLKA_P 4 B85 B84 B83 B82 B81 B80 B79 B78 B77 B76 B75 B74 B73 B72 B71 B70 B69 B68 B67 B66 B65 B64 B63 B62 B61 B60 B59 B58 B57 B56 B55 B54 B53 B52 B51 B50 B49 B48 B47 B46 B45 B44 B43 B42 B41 B40 B39 B38 B37 B36 B35 B34 B33 B32 B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 B21 B20 B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 4 AMC GND PWR PS0# GND FCLKAFCLKA+ GND TCLKBTCLKB+ GND TCLKATCLKA+ GND PWR SDA_L GND RX7RX7+ GND TX7TX7+ GND RX6RX6+ GND TX6TX6+ GND PWR SCL_L GND RX5RX5+ GND TX5TX5+ GND RX4RX4+ GND TX4TX4+ GND PWR ENABLE# GND RX3RX3+ GND TX3TX3+ GND RX2RX2+ GND TX2TX2+ GND PWR GA2 GND RX1RX1+ GND TX1TX1+ GND PWR GA1 GND RX0RX0+ GND TX0TX0+ GND PWR RSRVD8 GND RSRVD6 GA0 MP PS1# PWR GND CN1 GND RX8RX8+ GND TX8TX8+ GND RX9RX9+ GND TX9TX9+ GND RX10RX10+ GND TX10TX10+ GND RX11RX11+ GND TX11TX11+ GND RX12RX12+ GND TX12TX12+ GND RX13RX13+ GND TX13TX13+ GND RX14RX14+ GND TX14TX14+ GND RX15RX15+ GND TX15TX15+ GND RX16RX16+ GND TX16TX16+ GND RX17RX17+ GND TX17TX17+ GND RX18RX18+ GND TX18TX18+ GND RX19RX19+ GND TX19TX19+ GND RX20RX20+ GND TX20TX20+ GND TCK TMS TRST# TDO TDI GND B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98 B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 B119 B120 B121 B122 B123 B124 B125 B126 B127 B128 B129 B130 B131 B132 B133 B134 B135 B136 B137 B138 B139 B140 B141 B142 B143 B144 B145 B146 B147 B148 B149 B150 B151 B152 B153 B154 B155 B156 B157 B158 B159 B160 B161 B162 B163 B164 B165 B166 B167 B168 B169 B170 E_LINKN_11 E_LINKP_11 I_LINKN_11 I_LINKP_11 E_LINKN_10 E_LINKP_10 I_LINKN_10 I_LINKP_10 E_LINKN_9 E_LINKP_9 I_LINKN_9 I_LINKP_9 E_LINKN_8 E_LINKP_8 I_LINKN_8 I_LINKP_8 3 3 12_0V 3_3V_MP 2 I_LINKN_0 I_LINKP_0 E_LINKN_0 E_LINKP_0 I_LINKN_1 I_LINKP_1 E_LINKN_1 E_LINKP_1 I_LINKN_2 I_LINKP_2 E_LINKN_2 E_LINKP_2 I_LINKN_3 I_LINKP_3 E_LINKN_3 E_LINKP_3 I_LINKN_4 I_LINKP_4 E_LINKN_4 E_LINKP_4 I_LINKN_5 I_LINKP_5 E_LINKN_5 E_LINKP_5 AMC_SCL_L I_LINKN_6 I_LINKP_6 E_LINKN_6 E_LINKP_6 I_LINKN_7 I_LINKP_7 E_LINKN_7 E_LINKP_7 AMC_SDA_L 2 AMC_TCLKA_N AMC_TCLKA_P AMC_TCLKB_N AMC_TCLKB_P AMC_FCLKA_N AMC_FCLKA_P B85 B84 B83 B82 B81 B80 B79 B78 B77 B76 B75 B74 B73 B72 B71 B70 B69 B68 B67 B66 B65 B64 B63 B62 B61 B60 B59 B58 B57 B56 B55 B54 B53 B52 B51 B50 B49 B48 B47 B46 B45 B44 B43 B42 B41 B40 B39 B38 B37 B36 B35 B34 B33 B32 B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 B21 B20 B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 CN2 AMC GND PWR PS0# GND FCLKAFCLKA+ GND TCLKBTCLKB+ GND TCLKATCLKA+ GND PWR SDA_L GND RX7RX7+ GND TX7TX7+ GND RX6RX6+ GND TX6TX6+ GND PWR SCL_L GND RX5RX5+ GND TX5TX5+ GND RX4RX4+ GND TX4TX4+ GND PWR ENABLE# GND RX3RX3+ GND TX3TX3+ GND RX2RX2+ GND TX2TX2+ GND PWR GA2 GND RX1RX1+ GND TX1TX1+ GND PWR GA1 GND RX0RX0+ GND TX0TX0+ GND PWR RSRVD8 GND RSRVD6 GA0 MP PS1# PWR GND Date: Size C Title GND RX8RX8+ GND TX8TX8+ GND RX9RX9+ GND TX9TX9+ GND RX10RX10+ GND TX10TX10+ GND RX11RX11+ GND TX11TX11+ GND RX12RX12+ GND TX12TX12+ GND RX13RX13+ GND TX13TX13+ GND RX14RX14+ GND TX14TX14+ GND RX15RX15+ GND TX15TX15+ GND RX16RX16+ GND TX16TX16+ GND RX17RX17+ GND TX17TX17+ GND RX18RX18+ GND TX18TX18+ GND RX19RX19+ GND TX19TX19+ GND RX20RX20+ GND TX20TX20+ GND TCK TMS TRST# TDO TDI GND I_LINKN_11 I_LINKP_11 E_LINKN_11 E_LINKP_11 I_LINKN_10 I_LINKP_10 E_LINKN_10 E_LINKP_10 I_LINKN_9 I_LINKP_9 E_LINKN_9 E_LINKP_9 I_LINKN_8 I_LINKP_8 E_LINKN_8 E_LINKP_8 Thursday, January 28, 2010 AMC Loopback Project Board to Board B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98 B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 B119 B120 B121 B122 B123 B124 B125 B126 B127 B128 B129 B130 B131 B132 B133 B134 B135 B136 B137 B138 B139 B140 B141 B142 B143 B144 B145 B146 B147 B148 B149 B150 B151 B152 B153 B154 B155 B156 B157 B158 B159 B160 B161 B162 B163 B164 B165 B166 B167 B168 B169 B170 1 Sheet 3 of 4 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 1 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 47. Board to Board 65 A B C D 5 5 12_0V 2 3 4 5 2 3 4 5 2 3 4 5 2 3 4 5 2 3 4 5 2 3 4 5 3_3V_MP B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98 B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 B119 B120 B121 B122 B123 B124 B125 B126 B127 B128 B129 B130 B131 B132 B133 B134 B135 B136 B137 B138 B139 B140 B141 B142 B143 B144 B145 B146 B147 B148 B149 B150 B151 B152 B153 B154 B155 B156 B157 B158 B159 B160 B161 B162 B163 B164 B165 B166 B167 B168 B169 B170 A_LINKN_11 A_LINKP_11 A_LINKN_11 A_LINKP_11 A_LINKN_10 A_LINKP_10 A_LINKN_10 A_LINKP_10 A_LINKN_9 A_LINKP_9 A_LINKN_9 A_LINKP_9 A_LINKN_8 A_LINKP_8 A_LINKN_8 A_LINKP_8 3 12_0V 1 SMA J6 1 J4 A_TCLKB_N A_TCLKB_P SMA 1 SMA J13 2 3 4 5 2 3 4 5 SMA 1 SMA J14 1 J12 1 J11 1 SMA 2 3 4 5 1 SMA J10 SMA 1 SMA J9 1 2 3 4 5 2 3 4 5 2 3 4 5 3_3V_MP B_LINKN_0 B_LINKP_0 B_LINKN_0 B_LINKP_0 B_LINKN_1 B_LINKP_1 B_LINKN_1 B_LINKP_1 B_LINKN_2 B_LINKP_2 B_LINKN_2 B_LINKP_2 B_LINKN_3 B_LINKP_3 B_LINKN_3 B_LINKP_3 TX_RX_N_0 TX_RX_P_0 RX_TX_N_0 RX_TX_P_0 TX_RX_N_1 TX_RX_P_1 RX_TX_N_1 RX_TX_P_1 AMC_SCL_L TX_RX_N_2 TX_RX_P_2 RX_TX_N_2 RX_TX_P_2 TX_RX_N_3 TX_RX_P_3 RX_TX_N_3 RX_TX_P_3 AMC_SDA_L B_TCLKA_N B_TCLKA_P B_TCLKB_N B_TCLKB_P B_FCLKA_N B_FCLKA_P J8 A_TCLKA_N A_TCLKA_P A_FCLKA_N A_FCLKA_P GND RX8RX8+ GND TX8TX8+ GND RX9RX9+ GND TX9TX9+ GND RX10RX10+ GND TX10TX10+ GND RX11RX11+ GND TX11TX11+ GND RX12RX12+ GND TX12TX12+ GND RX13RX13+ GND TX13TX13+ GND RX14RX14+ GND TX14TX14+ GND RX15RX15+ GND TX15TX15+ GND RX16RX16+ GND TX16TX16+ GND RX17RX17+ GND TX17TX17+ GND RX18RX18+ GND TX18TX18+ GND RX19RX19+ GND TX19TX19+ GND RX20RX20+ GND TX20TX20+ GND TCK TMS TRST# TDO TDI GND J7 AMC GND PWR PS0# GND FCLKAFCLKA+ GND TCLKBTCLKB+ GND TCLKATCLKA+ GND PWR SDA_L GND RX7RX7+ GND TX7TX7+ GND RX6RX6+ GND TX6TX6+ GND PWR SCL_L GND RX5RX5+ GND TX5TX5+ GND RX4RX4+ GND TX4TX4+ GND PWR ENABLE# GND RX3RX3+ GND TX3TX3+ GND RX2RX2+ GND TX2TX2+ GND PWR GA2 GND RX1RX1+ GND TX1TX1+ GND PWR GA1 GND RX0RX0+ GND TX0TX0+ GND PWR RSRVD8 GND RSRVD6 GA0 MP PS1# PWR GND CN3 SMA 4 B85 B84 B83 B82 B81 B80 B79 B78 B77 B76 B75 B74 B73 B72 B71 B70 B69 B68 B67 B66 B65 B64 B63 B62 B61 B60 B59 B58 B57 B56 B55 B54 B53 B52 B51 B50 B49 B48 B47 B46 B45 B44 B43 B42 B41 B40 B39 B38 B37 B36 B35 B34 B33 B32 B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 B21 B20 B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 3 SMA 1 SMA J5 1 J3 A_LINKN_0 A_LINKP_0 A_LINKN_0 A_LINKP_0 A_LINKN_1 A_LINKP_1 A_LINKN_1 A_LINKP_1 A_LINKN_2 A_LINKP_2 A_LINKN_2 A_LINKP_2 A_LINKN_3 A_LINKP_3 A_LINKN_3 A_LINKP_3 A_LINKN_4 A_LINKP_4 A_LINKN_4 A_LINKP_4 A_LINKN_5 A_LINKP_5 A_LINKN_5 A_LINKP_5 AMC_SCL_L A_LINKN_6 A_LINKP_6 A_LINKN_6 A_LINKP_6 A_LINKN_7 A_LINKP_7 A_LINKN_7 A_LINKP_7 AMC_SDA_L A_TCLKA_N A_TCLKA_P A_TCLKB_N A_TCLKB_P A_FCLKA_N A_FCLKA_P 4 AMC B_TCLKB_N B_TCLKB_P B_TCLKA_N B_TCLKA_P 2 GND PWR PS0# GND FCLKAFCLKA+ GND TCLKBTCLKB+ GND TCLKATCLKA+ GND PWR SDA_L GND RX7RX7+ GND TX7TX7+ GND RX6RX6+ GND TX6TX6+ GND PWR SCL_L GND RX5RX5+ GND TX5TX5+ GND RX4RX4+ GND TX4TX4+ GND PWR ENABLE# GND RX3RX3+ GND TX3TX3+ GND RX2RX2+ GND TX2TX2+ GND PWR GA2 GND RX1RX1+ GND TX1TX1+ GND PWR GA1 GND RX0RX0+ GND TX0TX0+ GND PWR RSRVD8 GND RSRVD6 GA0 MP PS1# PWR GND CN4 B_FCLKA_N B_FCLKA_P B85 B84 B83 B82 B81 B80 B79 B78 B77 B76 B75 B74 B73 B72 B71 B70 B69 B68 B67 B66 B65 B64 B63 B62 B61 B60 B59 B58 B57 B56 B55 B54 B53 B52 B51 B50 B49 B48 B47 B46 B45 B44 B43 B42 B41 B40 B39 B38 B37 B36 B35 B34 B33 B32 B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 B21 B20 B19 B18 B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 2 GND RX8RX8+ GND TX8TX8+ GND RX9RX9+ GND TX9TX9+ GND RX10RX10+ GND TX10TX10+ GND RX11RX11+ GND TX11TX11+ GND RX12RX12+ GND TX12TX12+ GND RX13RX13+ GND TX13TX13+ GND RX14RX14+ GND TX14TX14+ GND RX15RX15+ GND TX15TX15+ GND RX16RX16+ GND TX16TX16+ GND RX17RX17+ GND TX17TX17+ GND RX18RX18+ GND TX18TX18+ GND RX19RX19+ GND TX19TX19+ GND RX20RX20+ GND TX20TX20+ GND TCK TMS TRST# TDO TDI GND B86 B87 B88 B89 B90 B91 B92 B93 B94 B95 B96 B97 B98 B99 B100 B101 B102 B103 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 B119 B120 B121 B122 B123 B124 B125 B126 B127 B128 B129 B130 B131 B132 B133 B134 B135 B136 B137 B138 B139 B140 B141 B142 B143 B144 B145 B146 B147 B148 B149 B150 B151 B152 B153 B154 B155 B156 B157 B158 B159 B160 B161 B162 B163 B164 B165 B166 B167 B168 B169 B170 RX_TX_N_3 RX_TX_P_3 TX_RX_N_3 TX_RX_P_3 RX_TX_N_2 RX_TX_P_2 TX_RX_N_2 TX_RX_P_2 RX_TX_N_1 RX_TX_P_1 TX_RX_N_1 TX_RX_P_1 RX_TX_N_0 RX_TX_P_0 TX_RX_N_0 TX_RX_P_0 Date: Size C Title 1 Thursday, February 18, 2010 AMC Loopback Project LOOPS Sheet 4 of 4 Rev A 1605 Valley Center Parkway Bethlehem, PA 18017 1 A B C D LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Figure 48. Loops LatticeECP3 AMC Evaluation Board – Revision B User’s Guide Appendix F. Example Preference File BANK BANK BANK BANK BANK BANK 0 1 2 3 6 7 VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO 3.3 2.5 3.3 3.3 1.8 1.8 V; V; V; V; V; V; # Clock Input IOBUF PORT "clk_in" IO_TYPE=LVDS25 PCICLAMP=ON TERMINATEVTT=OFF DIFFRESISTOR=OFF ; LOCATE COMP "clk_in" SITE "U6" ; # RESETn IOBUF PORT "reset_n" IO_TYPE=LVCMOS33 PCICLAMP=ON ; LOCATE COMP "reset_n" SITE "AL27" ; # Switches IOBUF PORT "switch_0" IO_TYPE=LVCMOS25 IOBUF PORT "switch_1" IO_TYPE=LVCMOS25 IOBUF PORT "switch_2" IO_TYPE=LVCMOS25 IOBUF PORT "switch_3" IO_TYPE=LVCMOS25 IOBUF PORT "switch_4" IO_TYPE=LVCMOS25 IOBUF PORT "switch_5" IO_TYPE=LVCMOS25 IOBUF PORT "switch_6" IO_TYPE=LVCMOS25 IOBUF PORT "switch_7" IO_TYPE=LVCMOS25 LOCATE COMP "switch_0" SITE "C25" ; LOCATE COMP "switch_1" SITE "D25" ; LOCATE COMP "switch_2" SITE "G26" ; LOCATE COMP "switch_3" SITE "G25" ; LOCATE COMP "switch_4" SITE "B28" ; LOCATE COMP "switch_5" SITE "A28" ; LOCATE COMP "switch_6" SITE "A26" ; LOCATE COMP "switch_7" SITE "A27" ; # LEDs IOBUF PORT "oled_0" IO_TYPE=LVCMOS25 IOBUF PORT "oled_1" IO_TYPE=LVCMOS25 IOBUF PORT "oled_2" IO_TYPE=LVCMOS25 IOBUF PORT "oled_3" IO_TYPE=LVCMOS25 IOBUF PORT "oled_4" IO_TYPE=LVCMOS25 IOBUF PORT "oled_5" IO_TYPE=LVCMOS25 IOBUF PORT "oled_6" IO_TYPE=LVCMOS25 IOBUF PORT "oled_7" IO_TYPE=LVCMOS25 LOCATE COMP "oled_0" SITE "A29" ; LOCATE COMP "oled_1" SITE "A30" ; LOCATE COMP "oled_2" SITE "H26" ; LOCATE COMP "oled_3" SITE "H25" ; LOCATE COMP "oled_4" SITE "A31" ; LOCATE COMP "oled_5" SITE "B31" ; LOCATE COMP "oled_6" SITE "C29" ; LOCATE COMP "oled_7" SITE "C30" ; PCICLAMP=ON PCICLAMP=ON PCICLAMP=ON PCICLAMP=ON PCICLAMP=ON PCICLAMP=ON PCICLAMP=ON PCICLAMP=ON ; ; ; ; ; ; ; ; 66 ; ; ; ; ; ; ; ; LatticeECP3 AMC Evaluation Board – Revision B User’s Guide # Flash memory interface LOCATE COMP "flash_a2" SITE "Y31" ; LOCATE COMP "flash_a3" SITE "Y32" ; LOCATE COMP "flash_a4" SITE "AA29" ; LOCATE COMP "flash_a5" SITE "Y30" ; LOCATE COMP "flash_a6" SITE "Y33" ; LOCATE COMP "flash_a7" SITE "Y34" ; LOCATE COMP "flash_a8" SITE "W26" ; LOCATE COMP "flash_a9" SITE "W27" ; LOCATE COMP "flash_a10" SITE "W29" ; LOCATE COMP "flash_a11" SITE "W30" ; LOCATE COMP "flash_a12" SITE "W28" ; LOCATE COMP "flash_a13" SITE "V29" ; LOCATE COMP "flash_a14" SITE "W31" ; LOCATE COMP "flash_a15" SITE "W32" ; LOCATE COMP "flash_a16" SITE "V26" ; LOCATE COMP "flash_a17" SITE "V27" ; LOCATE COMP "flash_a18" SITE "W33" ; LOCATE COMP "flash_a19" SITE "W34" ; LOCATE COMP "flash_a20" SITE "V28" ; LOCATE COMP "flash_a21" SITE "U28" ; LOCATE COMP "flash_a22" SITE "V30" ; LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP "flash_d0" SITE "N30"; "flash_d1" SITE "N29"; "flash_d2" SITE "N26"; "flash_d3" SITE "P26"; "flash_d4" SITE "AF31"; "flash_d5" SITE "AF32"; "flash_d6" SITE "AE29"; "flash_d7" SITE "AE30"; "flash_d8" SITE "AE31"; "flash_d9" SITE "AE32"; "flash_d10" SITE "N32"; "flash_d11" SITE "N31"; "flash_d12" SITE "N27"; "flash_d13" SITE "N28"; "flash_d14" SITE "AA27"; "flash_d15" SITE "AA28"; "flash_d16" SITE "AC33"; "flash_d17" SITE "AC34"; "flash_d18" SITE "AC30"; "flash_d19" SITE "AB30"; "flash_d20" SITE "AA30"; "flash_d21" SITE "AA31"; "flash_d22" SITE "AA26"; "flash_d23" SITE "AA25"; "flash_d24" SITE "AB33"; "flash_d25" SITE "AB34"; "flash_d26" SITE "N34"; "flash_d27" SITE "N33"; 67 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP "flash_d28" SITE "P28"; "flash_d29" SITE "P27"; "flash_d30" SITE "Y25"; "flash_d31" SITE "Y26"; "flash_cem" SITE "AN34"; "flash_oe_n" SITE "AN33"; "flash_we_n" SITE "AH33"; "flash_byte_n" SITE "AJ33"; "flash_wp_n" SITE "AP33"; "flash_rst_n" SITE "AP32"; "flash_rdby_a" SITE "AL34"; "flash_rdby_b" SITE "AL33"; # I2C LOCATE COMP "pwr_sda" SITE "A16"; LOCATE COMP "pwr_scl" SITE "L16"; LOCATE COMP "clk_sda" SITE "G18"; LOCATE COMP "clk_scl" SITE "B16"; LOCATE COMP "eeprom_sda" SITE "C17"; LOCATE COMP "eeprom" SITE "E19"; # 88E1111 PHY LOCATE COMP "phy_mdio" SITE "J21"; LOCATE COMP "phy_mdc" SITE "H22"; LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE COMP COMP COMP COMP COMP COMP COMP "phy_resetn" SITE "A23"; "phy_int_n" SITE "B23"; "phy_freq_sel" SITE "E22"; "phy_clk25" SITE "E23"; "phy_125clk" SITE "C23"; "phy_crs" SITE "D23"; "phy_col" SITE "K22"; # DDR2 Memory Interface IOBUF PORT "em_ddr_clk_0" IO_TYPE=SSTL18D_II IOBUF PORT "em_ddr_clk_1" IO_TYPE=SSTL18D_II IOBUF PORT "em_ddr_dqs_0" IO_TYPE=SSTL18D_II IOBUF PORT "em_ddr_dqs_1" IO_TYPE=SSTL18D_II IOBUF PORT "em_ddr_dqs_2" IO_TYPE=SSTL18D_II IOBUF PORT "em_ddr_dqs_3" IO_TYPE=SSTL18D_II IOBUF PORT "em_ddr_data_0" IO_TYPE=SSTL18_II IOBUF PORT "em_ddr_data_1" IO_TYPE=SSTL18_II IOBUF PORT "em_ddr_data_2" IO_TYPE=SSTL18_II IOBUF PORT "em_ddr_data_3" IO_TYPE=SSTL18_II IOBUF PORT "em_ddr_data_4" IO_TYPE=SSTL18_II IOBUF PORT "em_ddr_data_5" IO_TYPE=SSTL18_II IOBUF PORT "em_ddr_data_6" IO_TYPE=SSTL18_II IOBUF PORT "em_ddr_data_7" IO_TYPE=SSTL18_II 68 ; ; ; ; ; ; ; ; ; ; ; ; ; ; LatticeECP3 AMC Evaluation Board – Revision B User’s Guide IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF IOBUF PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT PORT LOCATE LOCATE LOCATE LOCATE COMP COMP COMP COMP "em_ddr_data_8" IO_TYPE=SSTL18_II ; "em_ddr_data_9" IO_TYPE=SSTL18_II ; "em_ddr_data_10" IO_TYPE=SSTL18_II ; "em_ddr_data_11" IO_TYPE=SSTL18_II ; "em_ddr_data_12" IO_TYPE=SSTL18_II ; "em_ddr_data_13" IO_TYPE=SSTL18_II ; "em_ddr_data_14" IO_TYPE=SSTL18_II ; "em_ddr_data_15" IO_TYPE=SSTL18_II ; "em_ddr_data_16" IO_TYPE=SSTL18_II ; "em_ddr_data_17" IO_TYPE=SSTL18_II ; "em_ddr_data_18" IO_TYPE=SSTL18_II ; "em_ddr_data_19" IO_TYPE=SSTL18_II ; "em_ddr_data_20" IO_TYPE=SSTL18_II ; "em_ddr_data_21" IO_TYPE=SSTL18_II ; "em_ddr_data_22" IO_TYPE=SSTL18_II ; "em_ddr_data_23" IO_TYPE=SSTL18_II ; "em_ddr_data_24" IO_TYPE=SSTL18_II ; "em_ddr_data_25" IO_TYPE=SSTL18_II ; "em_ddr_data_26" IO_TYPE=SSTL18_II ; "em_ddr_data_27" IO_TYPE=SSTL18_II ; "em_ddr_data_28" IO_TYPE=SSTL18_II ; "em_ddr_data_29" IO_TYPE=SSTL18_II ; "em_ddr_data_30" IO_TYPE=SSTL18_II ; "em_ddr_data_31" IO_TYPE=SSTL18_II ; "em_ddr_ba_0" IO_TYPE=SSTL18_II ; "em_ddr_ba_1" IO_TYPE=SSTL18_II ; "em_ddr_cas_n" IO_TYPE=SSTL18_II ; "em_ddr_ras_n" IO_TYPE=SSTL18_II ; "em_ddr_dm_0" IO_TYPE=SSTL18_II ; "em_ddr_dm_1" IO_TYPE=SSTL18_II ; "em_ddr_dm_2" IO_TYPE=SSTL18_II ; "em_ddr_dm_3" IO_TYPE=SSTL18_II ; "em_ddr_odt" IO_TYPE=SSTL18_II ; "em_ddr_we_n" IO_TYPE=SSTL18_II ; "em_ddr_addr_0" IO_TYPE=SSTL18_II ; "em_ddr_addr_1" IO_TYPE=SSTL18_II ; "em_ddr_addr_2" IO_TYPE=SSTL18_II ; "em_ddr_addr_3" IO_TYPE=SSTL18_II ; "em_ddr_addr_4" IO_TYPE=SSTL18_II ; "em_ddr_addr_5" IO_TYPE=SSTL18_II ; "em_ddr_addr_6" IO_TYPE=SSTL18_II ; "em_ddr_addr_7" IO_TYPE=SSTL18_II ; "em_ddr_addr_8" IO_TYPE=SSTL18_II ; "em_ddr_addr_9" IO_TYPE=SSTL18_II ; "em_ddr_addr_10" IO_TYPE=SSTL18_II ; "em_ddr_addr_11" IO_TYPE=SSTL18_II ; "em_ddr_addr_12" IO_TYPE=SSTL18_II ; "em_ddr_cs_n_0" IO_TYPE=SSTL18_II ; "em_ddr_cke_0" IO_TYPE=SSTL18_II ; "em_ddr_data_0" "em_ddr_data_1" "em_ddr_data_2" "em_ddr_data_3" SITE SITE SITE SITE "W1" "W8" "W9" "W4" ; ; ; ; 69 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP "em_ddr_data_4" SITE "W3" ; "em_ddr_data_5" SITE "Y2" ; "em_ddr_data_6" SITE "Y1" ; "em_ddr_data_7" SITE "Y8" ; "em_ddr_data_8" SITE "AA1" ; "em_ddr_data_9" SITE "Y7" ; "em_ddr_data_10" SITE "AA7" ; "em_ddr_data_11" SITE "AA4" ; "em_ddr_data_12" SITE "AA3" ; "em_ddr_data_13" SITE "AB2" ; "em_ddr_data_14" SITE "AB1" ; "em_ddr_data_15" SITE "AA5" ; LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP COMP "em_ddr_data_16" SITE "AN1" ; "em_ddr_data_17" SITE "AN2" ; "em_ddr_data_18" SITE "AD9" ; "em_ddr_data_19" SITE "AD8" ; "em_ddr_data_20" SITE "AP2" ; "em_ddr_data_21" SITE "AP3" ; "em_ddr_data_22" SITE "AL3" ; "em_ddr_data_23" SITE "AK3" ; "em_ddr_data_24" SITE "AN3" ; "em_ddr_data_25" SITE "AM3" ; "em_ddr_data_26" SITE "AJ5" ; "em_ddr_data_27" SITE "AJ6" ; "em_ddr_data_28" SITE "AL5" ; "em_ddr_data_29" SITE "AM5" ; "em_ddr_data_30" SITE "AL4" ; "em_ddr_data_31" SITE "AM4" ; "em_ddr_dqs_0" SITE "W6" ; "em_ddr_dqs_1" SITE "AA10" ; "em_ddr_dqs_2" SITE "AJ2" ; "em_ddr_dqs_3" SITE "AM6" ; "em_ddr_dm_0" SITE "W2" ; "em_ddr_dm_1" SITE "AA2" ; "em_ddr_dm_2" SITE "AJ4" ; "em_ddr_dm_3" SITE "AP5" ; "em_ddr_ba_0" SITE "T6" ; "em_ddr_ba_1" SITE "T5" ; "em_ddr_cas_n" SITE "T7" ; "em_ddr_ras_n" SITE "R8" ; "em_ddr_addr_0" SITE "R4" ; "em_ddr_addr_1" SITE "R1" ; "em_ddr_addr_2" SITE "R2" ; "em_ddr_addr_3" SITE "P10" ; "em_ddr_addr_4" SITE "P9" ; "em_ddr_addr_5" SITE "R5" ; "em_ddr_addr_6" SITE "R7" ; "em_ddr_addr_7" SITE "P8" ; "em_ddr_addr_8" SITE "N8" ; "em_ddr_addr_9" SITE "P4" ; "em_ddr_addr_10" SITE "P5" ; "em_ddr_addr_11" SITE "N1" ; "em_ddr_addr_12" SITE "N2" ; 70 LatticeECP3 AMC Evaluation Board – Revision B User’s Guide LOCATE LOCATE LOCATE LOCATE LOCATE LOCATE COMP COMP COMP COMP COMP COMP "em_ddr_cs_n_0" SITE "T3" ; "em_ddr_odt" SITE "R3" ; "em_ddr_we_n" SITE "T4" ; "em_ddr_clk_0" SITE "T2" ; "em_ddr_clk_1" SITE "AD4" ; "em_ddr_cke_0" SITE "U9" ; #150K Locates for ddr on amc board LOCATE PGROUP "ddr2_test_core/u_ddr_sdram_mem_top/U1_ddr_sdram_mem_core/U1_LSC_IP_ddr_core/genblk0 _u_0__dv_mod/u1_pio_read_macro/DQS_PIO_READ" SITE "R76C2D" ; LOCATE PGROUP "ddr2_test_core/u_ddr_sdram_mem_top/U1_ddr_sdram_mem_core/U1_LSC_IP_ddr_core/genblk0 _u_1__dv_mod/u1_pio_read_macro/DQS_PIO_READ" SITE "R85C2D" ; #150K_LOCATE PGROUP "ddr2_test_core/u_ddr_sdram_mem_top/U1_ddr_sdram_mem_core/U1_LSC_IP_ddr_core/genblk0 _u_2__dv_mod/u1_pio_read_macro/DQS_PIO_READ" SITE "R112C2D" ; LOCATE PGROUP "ddr2_test_core/u_ddr_sdram_mem_top/U1_ddr_sdram_mem_core/U1_LSC_IP_ddr_core/genblk0 _u_3__dv_mod/u1_pio_read_macro/DQS_PIO_READ" SITE "R121C2D" ; LOCATE PGROUP "ddr2_test_core/DDR2_CORE_GROUP" SITE "R60C2D" ; BLOCK JTAGPATHS ; 71