ESDR0502B D

ESDR0502B, SZESDR0502B
Transient Voltage Suppressor
ESD Protection Diodes with Ultra−Low
Capacitance
The ESDR0502B is designed to protect voltage sensitive
components from damage due to ESD in applications that require ultra
low capacitance to preserve signal integrity. Excellent clamping
capability, low leakage and fast response time are combined with an
ultra low diode capacitance of 0.5 pF to provide best in class
protection from IC damage due to ESD. The small SC−75 package is
ideal for designs where board space is at a premium. The ESDR0502B
can be used to protect two uni−directional lines or one bi−directional
line. When used to protect one bi−directional line, the effective
capacitance is 0.25 pF. Because of its low capacitance, it is well suited
for protecting high frequency signal lines such as USB2.0 high speed
and antenna line applications.
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1
PIN 1. CATHODE
2. CATHODE
3. ANODE
3
2
MARKING
DIAGRAM
Specification Features:
• Low Capacitance 0.5 pF Typical
• Low Clamping Voltage, Low Leakage
• Small Body Outline Dimensions:
3
1
0.063” x 0.063” (1.60 mm x 1.60 mm)
• Stand−off Voltage: 5 V
• Response Time is Typically < 1.0 ns
• IEC61000−4−2 Level 4 ESD Protection
ISO10605 330 pF/2 kW ±17 kV (Contact)
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
This is a Pb−Free Device
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic
AD
M
G
= Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
ORDERING INFORMATION
Epoxy Meets UL 94 V−0
LEAD FINISH: 100% Matte Sn (Tin)
MOUNTING POSITION: Any
Package
Shipping†
ESDR0502BT1G
SC−75
(Pb−Free)
3000/Tape &
Reel
SZESDR0502BT1G
SC−75
(Pb−Free)
3000/Tape &
Reel
Device
QUALIFIED MAX REFLOW TEMPERATURE: 260°C
Device Meets MSL 1 Requirements
MAXIMUM RATINGS
Rating
AD M G
G
1
• SZ Prefix for Automotive and Other Applications Requiring Unique
•
2
SC−75
CASE 463
STYLE 4
Symbol
Value
Unit
IEC 61000−4−2 Contact (ESD)
IEC 61000−4−2 Air (ESD)
ESD
±15
±15
kV
Peak Surge Power (8 x 20 ms)
Ppk
20
W
Peak Surge Current (8 x 20 ms)
Ipp
2.0
A
Total Power Dissipation on FR−5 Board
(Note 1) @ TA = 25°C
PD
150
mW
Storage Temperature Range
Tstg
−55 to +150
°C
Junction Temperature Range
TJ
−55 to +150
°C
DEVICE MARKING INFORMATION
°C
See specific marking information in the device marking
column of the Electrical Characteristics tables starting on
page 2 of this data sheet.
Lead Solder Temperature − Maximum
(10 Second Duration)
TL
260
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
See Application Note AND8308/D for further
description of survivability specs.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
© Semiconductor Components Industries, LLC, 2015
February, 2015 − Rev. 3
1
Publication Order Number:
ESDR0502B/D
ESDR0502B, SZESDR0502B
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Symbol
I
Parameter
IF
IPP
Maximum Reverse Peak Pulse Current
VC
Clamping Voltage @ IPP
VRWM
IR
Working Peak Reverse Voltage
VC VBR VRWM
Maximum Reverse Leakage Current @ VRWM
VBR
IT
Test Current
IF
Forward Current
VF
Forward Voltage @ IF
Ppk
Peak Power Dissipation
C
V
IR VF
IT
Breakdown Voltage @ IT
IPP
Uni−Directional TVS
Capacitance @ VR = 0 and f = 1.0 MHz
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, VF = 1.1 V Max. @ IF = 10 mA for all types)
VRWM
(V)
IR (mA)
@ VRWM
VBR (V)
@ IT
(Note 2)
IT
C (pF),
uni−directional
(Note 3)
C (pF),
bi−directional
(Note 4)
VC (V)
@ IPP = 1 A
(Note 5)
Device*
Device
Marking
Max
Max
Min
mA
Typ
Max
Typ
Max
Max
ESDR0502B
AD
5.0
1.0
5.8
1.0
0.5
0.9
0.25
0.45
15
VC
Per
IEC61000−
4−2
(Note 6)
Figures 1
and 2
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
*Include SZ−prefix devices where applicable.
2. VBR is measured with a pulse test current IT at an ambient temperature of 25°C.
3. Uni−directional capacitance at f = 1 MHz, VR = 0 V, TA = 25°C (pin1 to pin 3; pin 2 to pin 3).
4. Bi−directional capacitance at f = 1 MHz, VR = 0 V, TA = 25°C (pin1 to pin 2).
5. Surge current waveform per Figure 5.
6. Typical waveform. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV contact per IEC 61000−4−2
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV contact per IEC 61000−4−2
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2
ESDR0502B, SZESDR0502B
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
Ipeak
Level
Test Voltage (kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1
2
7.5
4
2
2
4
15
8
4
3
6
22.5
12
6
4
8
30
16
8
100%
90%
I @ 30 ns
I @ 60 ns
10%
tP = 0.7 ns to 1 ns
Figure 3. IEC61000−4−2 Spec
ESD Gun
Oscilloscope
TVS
50 W
Cable
50 W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
% OF PEAK PULSE CURRENT
100
PEAK VALUE IRSM @ 8 ms
tr
90
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
80
70
60
HALF VALUE IRSM/2 @ 20 ms
50
40
30
tP
20
10
0
0
20
40
t, TIME (ms)
60
Figure 5. 8 X 20 ms Pulse Waveform
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3
80
ESDR0502B, SZESDR0502B
PACKAGE DIMENSIONS
SC−75/SOT−416
CASE 463−01
ISSUE F
−E−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
2
3
b 3 PL
0.20 (0.008)
e
−D−
DIM
A
A1
b
C
D
E
e
L
HE
1
M
D
HE
C
0.20 (0.008) E
INCHES
NOM MAX
0.031 0.035
0.002 0.004
0.008 0.012
0.006 0.010
0.063 0.067
0.031 0.035
0.04 BSC
0.004 0.006 0.008
0.061 0.063 0.065
MIN
0.027
0.000
0.006
0.004
0.059
0.027
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
A
L
MILLIMETERS
MIN
NOM MAX
0.70
0.80
0.90
0.00
0.05
0.10
0.15
0.20
0.30
0.10
0.15
0.25
1.55
1.60
1.65
0.70
0.80
0.90
1.00 BSC
0.10
0.15
0.20
1.50
1.60
1.70
A1
SOLDERING FOOTPRINT*
0.356
0.014
1.803
0.071
0.787
0.031
0.508
0.020
1.000
0.039
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
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PUBLICATION ORDERING INFORMATION
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ON Semiconductor Website: www.onsemi.com
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For additional information, please contact your local
Sales Representative
ESDR0502B/D