NSS12100XV6 D

NSS12100XV6T1G
12 V, 1 A, Low VCE(sat)
PNP Transistor
ON Semiconductor’s e2 PowerEdge family of low VCE(sat)
transistors are miniature surface mount devices featuring ultra low
saturation voltage (VCE(sat)) and high current gain capability. These
are designed for use in low voltage, high speed switching applications
where affordable efficient energy control is important.
Typical application are DC−DC converters and power management
in portable and battery powered products such as cellular and cordless
phones, PDAs, computers, printers, digital cameras and MP3 players.
Other applications are low voltage motor controls in mass storage
products such as disc drives and tape drives. In the automotive
industry they can be used in air bag deployment and in the instrument
cluster. The high current gain allows e2PowerEdge devices to be
driven directly from PMU’s control outputs, and the Linear Gain
(Beta) makes them ideal components in analog amplifiers.
http://onsemi.com
12 VOLTS, 1.0 AMPS
PNP LOW VCE(sat) TRANSISTOR
EQUIVALENT RDS(on) 300 mW
COLLECTOR
1, 2, 5, 6
3
BASE
Features
•
•
•
•
•
4
EMITTER
High Current Capability (1 A)
High Power Handling (Up to 650 mW)
Low VCE(s) (150 mV Typical @ 500 mA)
Small Size
This is a Pb−Free Device
1
SOT−563
CASE 463A
STYLE 4
Benefits
• High Specific Current and Power Capability Reduces Required PCB Area
• Reduced Parasitic Losses Increases Battery Life
DEVICE MARKING
MAXIMUM RATINGS (TA = 25°C)
Rating
Symbol
Max
Unit
Collector-Emitter Voltage
VCEO
−12
Vdc
Collector-Base Voltage
VCBO
−12
Vdc
Emitter-Base Voltage
VEBO
−5.0
Vdc
Collector Current − Continuous
Collector Current − Peak
IC
ICM
−1.0
−2.0
Adc
Electrostatic Discharge
ESD
HBM Class 3
MM Class C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1
VE M G
G
VE = Specific Device Code
M = Month Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NSS12100XV6T1G
Package
Shipping †
SOT−563 4000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 0
1
Publication Order Number:
NSS12100XV6/D
NSS12100XV6T1G
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD (Note 1)
500
mW
4.0
mW/°C
Thermal Resistance,
Junction−to−Ambient
RqJA (Note 1)
250
°C/W
Total Device Dissipation
TA = 25°C
Derate above 25°C
PD (Note 2)
650
mW
5.2
mW/°C
Thermal Resistance,
Junction−to−Ambient
RqJA (Note 2)
192
°C/W
RqJL
105
°C/W
PD Single
1.0
W
TJ, Tstg
−55 to +150
°C
Thermal Resistance,
Junction−to−Lead 6
Total Device Dissipation
(Single Pulse < 10 sec.)
Junction and Storage
Temperature Range
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Collector −Emitter Breakdown Voltage, (IC = −10 mAdc, IB = 0)
V(BR)CEO
−12
−
−
Vdc
Collector −Base Breakdown Voltage, (IC = −0.1 mAdc, IE = 0)
V(BR)CBO
−12
−
−
Vdc
Emitter −Base Breakdown Voltage, (IE = −0.1 mAdc, IC = 0)
V(BR)EBO
−5.0
−
−
Vdc
Collector Cutoff Current, (VCB = −12 Vdc, IE = 0)
ICBO
−
−0.02
−0.1
mAdc
Emitter Cutoff Current, (VCES = −5.0 Vdc, IE = 0)
IEBO
−
−0.03
−0.1
mAdc
200
100
90
−
−
−
−
−
−
−
−
−
−
−
−0.030
−0.080
−0.050
−0.200
−0.400
−0.040
−0.100
−0.060
−0.225
−0.440
−
0.95
−1.15
−
−1.05
−1.15
OFF CHARACTERISTICS
ON CHARACTERISTICS
DC Current Gain (Note 3)
(IC = −10 mA, VCE = −2.0 V)
(IC = −500 mA, VCE = −2.0 V)
(IC = −1.0 A, VCE = −2.0 V)
hFE
Collector −Emitter Saturation Voltage (Note 3)
(IC = −0.05 A, IB = −0.005 A) (Note 4)
(IC = −0.1 A, IB = −0.002 A)
(IC = −0.1 A, IB = −0.010 A)
(IC = −0.5 A, IB = −0.050 A)
(IC = −1.0 A, IB = −0.100 A)
VCE(sat)
Base −Emitter Saturation Voltage (Note 3)
(IC = −1.0 A, IB = −0.01 A)
VBE(sat)
Base −Emitter Turn−on Voltage (Note 3)
(IC = −2.0 A, VCE = −3.0 V)
VBE(on)
V
V
V
Input Capacitance (VEB = −0.5 V, f = 1.0 MHz)
Cibo
−
50
pF
Output Capacitance (VCB = −3.0 V, f = 1.0 MHz)
Cobo
−
20
pF
1.
2.
3.
4.
mm2,
mm2,
FR−4 @ 100
1 oz copper traces.
FR−4 @ 500
1 oz copper traces.
Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
Guaranteed by design but not tested.
http://onsemi.com
2
NSS12100XV6T1G
0.9
3.0
IC/IB = 10
VCE(sat) = 150°C
VCE(sat), COLLECTOR EMITTER
SATURATION VOLTAGE (V)
VCE(sat), COLLECTOR EMITTER
SATURATION VOLTAGE (V)
1.0
25°C
0.8
0.7
−55°C
0.6
0.5
0.4
0.3
0.2
0.1
0
200
150°C
1.5
1.0
0.5
150°C (2.0 V)
25°C (5.0 V)
25°C (2.0 V)
−55°C (5.0 V)
IC/IB = 10
1.2
1.0
TA = −55°C
0.8
0.6
25°C
0.4
150°C
0.2
0
0.001
0.01
0.1
1
10
0.001
IC, COLLECTOR CURRENT (A)
VCE, COLLECTOR−EMITTER VOLTAGE (V)
VBE(on), BASE EMITTER TURN−ON VOLTAGE (V)
0.6
VCE = −1.0 V
TA = −55°C
25°C
0.4
0.2
150°C
0
0.001
0.01
0.1
0.1
10
1
Figure 4. Base Emitter Saturation Voltage vs.
Collector Current
1.0
0.8
0.01
IC, COLLECTOR CURRENT (A)
Figure 3. DC Current Gain vs. Collector
Current
1.2
10
1.4
100
1.4
0.01
0.1
1
IC, COLLECTOR CURRENT (A)
Figure 2. Collector Emitter Saturation Voltage vs.
Collector Current
150°C (5.0 V)
−55°C (2.0 V)
0
2.0
0.001
VBE(sat), BASE EMITTER
SATURATION VOLTAGE (V)
hFE, DC CURRENT GAIN
300
2.5
10
0.01
0.1
1
IC, COLLECTOR CURRENT (A)
600
400
25°C
0
0.001
Figure 1. Collector Emitter Saturation Voltage vs.
Collector Current
500
VCE(sat) = −55°C
IC/IB = 100
1
10
1.0
10 mA
100 mA
300 mA
IC = 500 mA
0.8
0.6
0.4
0.2
0
0.01
IC, COLLECTOR CURRENT (A)
0.1
1
10
IB, BASE CURRENT (mA)
Figure 5. Base Emitter Turn−On Voltage vs.
Collector Current
Figure 6. Saturation Region
http://onsemi.com
3
100
NSS12100XV6T1G
30
Cobo, OUTPUT CAPACITANCE (pF)
Cibo, INPUT CAPACITANCE (pF)
50
45
40
Cibo(pF)
35
30
25
20
0
1
3
4
2
VEB, EMITTER BASE VOLTAGE (V)
5
25
Cobo(pF)
20
15
10
5
0
0
Figure 7. Input Capacitance
1
2
3
4
5
6
7
8
9
VCB, COLLECTOR BASE VOLTAGE (V)
Figure 8. Output Capacitance
http://onsemi.com
4
10
NSS12100XV6T1G
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A−01
ISSUE F
D
−X−
6
1
e
A
5
4
2
3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
L
E
−Y−
HE
b 65 PL
0.08 (0.003)
DIM
A
b
C
D
E
e
L
HE
C
M
X Y
MILLIMETERS
MIN
NOM MAX
0.50
0.55
0.60
0.17
0.22
0.27
0.08
0.12
0.18
1.50
1.60
1.70
1.10
1.20
1.30
0.5 BSC
0.10
0.20
0.30
1.50
1.60
1.70
INCHES
NOM MAX
0.021 0.023
0.009 0.011
0.005 0.007
0.062 0.066
0.047 0.051
0.02 BSC
0.004 0.008 0.012
0.059 0.062 0.066
MIN
0.020
0.007
0.003
0.059
0.043
STYLE 4:
PIN 1. COLLECTOR
2. COLLECTOR
3. BASE
4. EMITTER
5. COLLECTOR
6. COLLECTOR
SOLDERING FOOTPRINT*
0.3
0.0118
0.45
0.0177
1.35
0.0531
1.0
0.0394
0.5
0.5
0.0197 0.0197
SCALE 20:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
5
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NSS12100XV63/D