INFINEON TUA6034-T

Sp e c if icat io n, V 2 . 51 , Ja n ua ry 20 0 6
TUA6034, TUA6036
3- Ban d Di g i tal T V / S et- T op -B ox Tu ne r IC
TA IF UN
Ver s i on 2 .51
W i re l e s s C o m mu n i c a t i o n
N e v e r
s t o p
t h i n k i n g .
Edition 2006-01-11
Published by Infineon Technologies AG,
Am Campeon 1-12,
85579 Neubiberg, Germany
© Infineon Technologies AG 2006.
All Rights Reserved.
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The information herein is given to describe certain components and shall not be considered as a guarantee of
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Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
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Representatives worldwide (www.infineon.com).
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Due to technical requirements components may contain dangerous substances. For information on the types in
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and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
Sp e c if icat io n, V 2 . 51 , Ja n ua ry 20 0 6
TUA6034, TUA6036
3- Ban d Di g i tal T V / S et- T op -B ox Tu ne r IC
TA IF UN
Ver s i on 2 .51
W i re l e s s C o m mu n i c a t i o n
N e v e r
s t o p
t h i n k i n g .
TUA6034, TUA6036
Revision History:
Page
Page
(in previous (in current
Version)
Version)
2006-01-11
V 2.51
Subjects (major changes since last revision)
Revision History: Target Spec. V1.1, January 2001
Previous Version: Target Spec. V1.0, November 2000
div.
div.
in extended mode reference division ratio 80 replaced by 32
5-2
5-2
new definition of thermal properties
Revision History: Preliminary Spec. V1.2, April 2001
Previous Version: Target Spec. V1.1, January 2001
div.
div.
status: preliminary
div.
div.
bug fixes: TSSOP and VQFN pinning.
Changes: application focus to digital applications, tbd’s
replaced by values
5-10, 5-11
5-10, 5-11
phase noise values added
5-21
5-21
diagrams added
Revision History: Preliminary Spec. V1.3, July 2001
Previous Version: Preliminary Spec. V1.2, April 2001
div.
div
Stand-by mode added
5-5
5-5
Crystal Oscillator: Input impedances added
5-7
5-7
Output leakage current replaced by port output voltage
Symbol for port output saturation voltages changed
5-12
5-12
AGC source current 2 and AGC output voltage changed
5-15
5-15
Definition for MA1= 0 and MA0 = 1 changed
Revision History: Preliminary Spec. V1.4, October 2001
Previous Version: Preliminary Spec. V1.3, July 2001
3-5, 3-7
3-5, 3-7
PNP ports: Pull-down resistors added
5-5
5-5
MID band: IVCC corrected
5-10, 5-11
5-10, 5-11
Phase Noise: new values
5-12
5-12
AGC output voltage changed
Revision History: Spec. V2.0, May2002
Previous Version: Preliminary Spec. V1.4, October 2001
all
all
preliminary and confidential deleted
TUA6034, TUA6036
Revision History:
div
div
2006-01-11
tbf’s replaced, ISDB-T application deleted
Revision History: Spec. V2.1, August 2002
Previous Version: Spec. V2.0, May 2002
5-6
5-6
Bus output SDA, Low-level output voltage,
IOL = 6 mA at 400 kHz deleted
Revision History: Spec. V2.2, December 2002
Previous Version: Spec. V2.1, August 2002
3-2
3-2
Pinning of TUA6034-V changed
Revision History: V2.3, February 2003
Previous Version: Spec. V2.2, December 2002
all
all
Mirrored version TUA6036 added
Revision History: V2.4, March 2003
Previous Version: Spec. V2.3, February 2003
2-10, 4-29,
4-30
2-10, 4-29,
4-30
Frequencies corrected
5-34
5-34
Ambient temperature extended
5-38, 5-39,
5-40
5-38, 5-39,
5-40
Input IP2,Input IIP3, Output voltage causing 1 dB
compression added,
test frequencies changed
Revision History: V2.5, April 2004
Previous Version: Spec. V2.4, March 2003
5-35
33
Crystal oscillation frequency added
div.
div.
TUA6034-V in VQFN-48 package
n.a.
28
ISDB-T application added
all
all
New Infineon template (A5 letter page size, page
numbering)
Revision History: V2.51, January 2006
Previous Version: Spec. V2.5, April 2004
all
all
Infineon Logo and postal address changed
div.
div.
stand-by mode replaced with power down mode
8, 11
15
General description: topics added
V 2.51
TUA6034, TUA6036
Revision History:
2006-01-11
14, 20
15, 21
Package GND added for the VQFN package
n.a.
30 - 32
Application circuits for TUA6034-V added
30
34
Absolute Maximum Ratings definitions updated
60
64
PG-VQFN-48 Outline Drawing updated
V 2.51
We Listen to Your Comments
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TUA6034, TUA6036
TAIFUN
Product Info
General Description
The TUA6034, TUA6036 ’TAIFUN’ device combines a mixer-oscillator block with a
digitally programmable phase locked loop (PLL) for use in TV and VCR tuners and in settop-box applications.
Features
•
General
•
•
•
•
•
Suitable for PAL, NTSC, DVB and
ATSC
Wideband AGC detector for internal
tuner AGC
− 5 programmable take-over points
− 2 programmable time constants
Low phase noise
Full ESD protection
Qualified according to JEDEC for
consumer applications
PLL
•
•
•
•
•
•
•
•
•
Mixer/Oscillator
•
•
•
•
•
•
High impedance mixer input
(common emitter) for LOW band
Low impedance mixer input
(common base) for MID band
Low impedance mixer input
(common base) for HIGH band
2 pin oscillator for LOW band
2 pin oscillator for MID band
4 pin oscillator for HIGH band
•
4 independent I2C addresses
I2C bus protocol compatible with 3.3 V
and 5V micro-controllers up to 400 kHz
High voltage VCO tuning output
4 PNP ports
1 NPN port/ADC input
Internal LOW/MID/HIGH band switch
Bus controlled power down mode
Lock-in flag
6 programmable reference divider
ratios (24, 28, 32, 64, 80, 128)
4 programmable charge pump currents
Application
•
•
IF-Amplifier
•
Symmetrical IF preamplifier with low
output impedance able to drive a
compensated SAW filter (500Ω//40pF)
4 IF pins to connect a 2 pole bandpass
The IC is suitable for PAL, NTSC,
DVB-C, DVB-T, ISDB-T and ATSC
tuners. The focus is on digital
terrestrial.
The AGC stage makes the tuner AGC
independent of the Video-IF AGC
Ordering Information
Type
Ordering Code
Package
TUA6034-T
Q67034-H0009
PG-TSSOP-38
TUA6036-T
Q67037-A0012
PG-TSSOP-38
TUA6034-V
Q67034-H0008
PG-VQFN-48
Specification
7
V 2.51, 2006-01-11
Table of Contents
Page
1
1.1
1.1.1
1.1.2
1.1.3
1.1.4
1.2
Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mixer/Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IF-Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PLL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
10
10
10
10
11
11
2
2.1
2.2
2.3
2.4
2.4.1
2.4.2
2.4.3
2.4.4
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Definition and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mixer-Oscillator block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PLL block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C-Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
13
16
22
24
24
25
26
26
3
3.1
3.2
3.3
3.4
3.5
3.6
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Circuit TUA6034-T for ATSC . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Circuit TUA6034-T for DVB-T . . . . . . . . . . . . . . . . . . . . . . . . .
Application Circuit TUA6034-T for ISDB-T . . . . . . . . . . . . . . . . . . . . . . . .
Application Circuit TUA6034-V for ATSC . . . . . . . . . . . . . . . . . . . . . . . . .
Application Circuit TUA6034-V for DVB-T . . . . . . . . . . . . . . . . . . . . . . . . .
Application Circuit TUA6034-V for ISDB-T . . . . . . . . . . . . . . . . . . . . . . . .
28
28
29
30
31
32
33
4
4.1
4.1.1
4.1.2
4.1.3
4.2
4.3
4.4
4.4.1
4.4.2
4.4.3
4.4.4
4.4.5
4.4.6
4.5
4.5.1
4.5.2
4.5.3
Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I2C Bus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input admittance (S11) of the LOW band mixer (40 to 150 MHz) . . . . .
Input impedance (S11) of the MID band mixer (150 to 455 MHz) . . . . .
Input impedance (S11) of the HIGH band mixer (450 to 865 MHz) . . . .
Output admittance (S22) of the of the mixers (30 to 50 MHz) . . . . . . . .
Input impedance (S11) of the IF amplifier (30 to 50 MHz) . . . . . . . . . . .
Output impedance (S22) of the IF amplifier (30 to 50 MHz) . . . . . . . . .
Measurement Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gain (GV) measurement in LOW band . . . . . . . . . . . . . . . . . . . . . . . . .
Gain (GV) measurement in MID and HIGH bands . . . . . . . . . . . . . . . .
Matching circuit for optimum noise figure in LOW band . . . . . . . . . . . .
34
34
34
36
37
50
55
56
56
56
57
57
58
58
59
59
59
60
Specification
8
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
4.5.4
4.5.5
4.5.6
4.5.7
4.5.8
5
5.1
5.2
Noise figure (NF) measurement in LOW band . . . . . . . . . . . . . . . . . . .
Noise figure (NF) measurement in MID and HIGH bands . . . . . . . . . . .
Cross modulation measurement in LOW band . . . . . . . . . . . . . . . . . . .
Cross modulation measurement in MID and HIGH bands . . . . . . . . . . .
Ripple susceptibility measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
61
61
62
62
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Package TSSOP-38 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Package VQFN-48 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Specification
9
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Product Description
1
Product Description
The TUA6034, TUA6036 ’TAIFUN’ device combines a mixer-oscillator block with a
digitally programmable phase locked loop (PLL) for use in TV and VCR tuners and in settop-box applications.
The mixer-oscillator block includes three balanced mixers (one mixer with an
unbalanced high-impedance input and two mixers with a balanced low-impedance
input), two 2-pin asymmetrical oscillators for the LOW and the MID band, one 4-pin
symmetrical oscillator for the HIGH band, an IF amplifier, a reference voltage, and a
band switch.
The PLL block with four independently selectable chip addresses forms a digitally
programmable phase locked loop. With a 4 MHz quartz crystal, the PLL permits precise
setting of the frequency of the tuner oscillator up to 1024 MHz in increments of 31.25,
50, 62.5, 125, 142.86 or 166.7 kHz. The tuning process is controlled by a microprocessor
via an I2C bus. The device has 5 output ports, one of them (P4) can also be used as ADC
input port. A flag is set when the loop is locked. The lock flag can be read by the
processor via the I2C bus.
1.1
Features
1.1.1
General
•
•
•
•
•
Suitable for PAL, NTSC, DVB, ISDB-T and ATSC
Wideband AGC detector for internal tuner AGC
− 5 programmable take-over points
− 2 programmable time constants
Low phase noise
Full ESD protection
Qualified according to JEDEC for consumer applications
1.1.2
•
•
•
•
•
•
High impedance mixer input (common emitter) for LOW band
Low impedance mixer input (common base) for MID band
Low impedance mixer input (common base) for HIGH band
2 pin oscillator for LOW band
2 pin oscillator for MID band
4 pin oscillator for HIGH band
1.1.3
•
Mixer/Oscillator
IF-Amplifier
4 IF pins to connect a 2 pole bandpass
Specification
10
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Product Description
•
Symmetrical IF preamplifier with low output impedance able to drive a compensated
SAW filter (500 Ω//40 pF)
1.1.4
•
•
•
•
•
•
•
•
•
•
4 independent I2C addresses
I2C bus protocol compatible with 3.3 V and 5V micro-controllers up to 400 kHz
High voltage VCO tuning output
4 PNP ports
1 NPN port/ADC input
Bus controlled power down mode
Internal LOW/MID/HIGH band switch
Lock-in flag
6 programmable reference divider ratios (24, 28, 32, 64, 80, 128)
4 programmable charge pump currents
1.2
•
•
PLL
Application
The IC is suitable for PAL, NTSC, DVB-C, DVB-T, ISDB-T and ATSC tuners.
The focus is on digital terrestrial.
The AGC stage makes the tuner AGC independent of the Video-IF AGC.
Recommended band limits in MHz:
Table 1
ATSC tuners
RF input
Band
Oscillator
min
max
min
max
LOW
55.25
157.25
101
203
MID
163.25
451.25
201
479
HIGH
457.25
861.25
503
907
Table 2
DVB-T tuners
Band
min
max
min
max
LOW
48.25
154.25
87.15
193.15
MID
161.25
439.25
200.15
478.15
HIGH
447.25
863.25
486.15
902.15
RF input
Specification
Oscillator
11
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Product Description
Table 3
ISDB-T tuners
RF input
Oscillator
Band
min
max
min
max
LOW
93
167
150
224
MID
173
467
230
524
HIGH
473
767
530
824
Note: Tuning margin of 3 MHz not included.
Specification
12
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
2
Functional Description
2.1
Pin Configuration
Figure 1
Specification
OSCLOWOUT
1
38
HIGHIN
OSCLOWIN
2
37
HIGHIN
OSCGND
3
36
MIDIN
OSCMIDIN
4
35
MIDIN
OSCMIDOUT
5
34
LOWIN
OSCHIGHIN
6
33
RFGND
OSCHIGHOUT
7
32
MIXOUT
OSCHIGHOUT
8
31
MIXOUT
OSCHIGHIN
9
30
IFIN
29
IFIN
28
P2
TUA6034-T
TSSOP-38
package
VCC
10
IFGND
11
IFOUT
12
27
AGC
IFOUT
13
26
GND
PLLGND
14
25
SDA
VT
15
24
SCL
CP
16
23
AS
P4/ADC
17
22
P1
XTAL
18
21
P0
XTAL
19
20
P3
Pin Configuration TUA6034 in PG-TSSOP-38 Package
13
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
Figure 2
Specification
HIGHIN
1
38
OSCLOWOUT
HIGHIN
2
37
OSCLOWIN
MIDIN
3
36
OSCGND
MIDIN
4
35
OSCMIDIN
LOWIN
5
34
OSCMIDOUT
RFGND
6
33
OSCHIGHIN
MIXOUT
7
32
OSCHIGHOUT
MIXOUT
8
31
OSCHIGHOUT
IFIN
9
30
OSCHIGHIN
IFIN
10
29
VCC
P2
11
28
IFGND
TUA6036-T
TSSOP-38
package
AGC
12
27
IFOUT
GND
13
26
IFOUT
SDA
14
25
PLLGND
SCL
15
24
VT
AS
16
23
CP
P1
17
22
P4/ADC
P0
18
21
XTAL
P3
19
20
XTAL
Pin Configuration TUA6036 in PG-TSSOP-38 Package
14
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
37 LOWIN
38 MIDIN
39 MIDIN
40 HIGHIN
41 HIGHIN
42 n.c.
43 OSCLOWOUT
44 OSCLOWIN
45 OSCGND
46 OSCMIDIN
47 OSCMIDOUT
48 n.c.
Functional Description
n.c. 1
36 n.c.
n.c. 2
35 RFGND
OSCHIGHIN 3
34 MIXOUT
OSCHIGHOUT 4
33 MIXOUT
OSCHIGHOUT 5
32 IFIN
OSCHIGHIN 6
31 IFIN
TUA6034-V
VQFN-48 package
VCC 7
30 n.c.
IFGND 8
29 P2
IFOUT 9
28 AGC
IFOUT 10
27 GND
PLLGND 11
26 SDA
49
Figure 3
Specification
25 SCL
n.c. 24
AS 23
P1 22
P0 21
P3 20
XTAL 19
XTAL 18
n.c. 17
P4/ADC 16
CP 15
n.c. 14
n.c. 13
VT 12
package
GND
Pin Configuration TUA6034 in PG-VQFN-48 Package
15
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
2.2
Pin Definition and Functions
Table 4
Pin No.
Pin Definition and Functions
Symbol
PG- PGTSS VQ
OP- FN38
48
Average DC voltage
Equivalent I/O Schematic
pin designation in parenthesis
refer to PG-VQFN-48 package
LOW
1/38 43
OSCLOWOUT
2.1 V
2/37 44
OSCLOWIN
1.45 V
MID
HIGH
0.0 V
0.0 V
1
(43)
2
(44)
3/36 45
OSCGND
oscillator ground
4/35 46
OSCMIDIN
1.45 V
5/34 47
OSCMIDOUT
2.1 V
0.0 V
5
(47)
4
(46)
Specification
16
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
Pin No.
Symbol
PG- PGTSS VQ
OP- FN38
48
Average DC voltage
Equivalent I/O Schematic
pin designation in parenthesis
refer to PG-VQFN-48 package
LOW
MID
HIGH
6/33 3
OSCHIGHIN
1.5 V
7/32 4
OSCHIGHOUT
2.4 V
8/31 5
OSCHIGHOUT
9/30 6
OSCHIGHIN
2.4 V
7
(4)
8
(5)
6
(3)
9
(6)
1.5 V
10/
29
7
VCC
supply voltage
5.0 V
5.0 V
5.0 V
11/
28
8
IFGND
IF ground
0.0 V
0.0 V
0.0 V
12/
27
9
IFOUT
2.2 V
2.2 V
2.2 V
13/
26
10
IFOUT
2.2 V
2.2 V
2.2 V
14/
25
11
0.0 V
0.0 V
0.0 V
12
(9)
PLLGND
Specification
13
(10)
PLL ground
17
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
Pin No.
Symbol
PG- PGTSS VQ
OP- FN38
48
Average DC voltage
Equivalent I/O Schematic
pin designation in parenthesis
refer to PG-VQFN-48 package
LOW
MID
HIGH
15/
24
12
VT
VT
VT
VT
16/
23
15
CP
2.0 V
2.0 V
2.0 V
5 V or
VCE
5 V or
VCE
5 V or
VCE
1.7 V
1.7 V
1.7 V
1.7 V
1.7 V
1.7 V
16
(15)
15
(12)
17/
22
16
P4/ADC
17
(16)
18/
21
18
XTAL
19/
20
19
XTAL
Specification
18
(18)
19
(19)
18
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
Pin No.
Symbol
PG- PGTSS VQ
OP- FN38
48
Equivalent I/O Schematic
pin designation in parenthesis
refer to PG-VQFN-48 package
20/
19
20
P3
21/
18
21
P0
22/
17
22
P1
23/
16
23
AS
20 (20) or
21 (21) or
22 (22)
Average DC voltage
LOW
MID
HIGH
0 V or
VCC VCE
0 V or
VCC VCE
0 V or
VCC VCE
VCC VCE
n.a.
n.a.
n.a.
VCC VCE
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
23
(23)
24/
15
25
SCL
24
(25)
Specification
19
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
Pin No.
Symbol
PG- PGTSS VQ
OP- FN38
48
25/
14
26
Average DC voltage
Equivalent I/O Schematic
pin designation in parenthesis
refer to PG-VQFN-48 package
SDA
LOW
MID
HIGH
n.a
n.a
n.a
0.0
0.0
0.0
3.5 V
3.5 V
3.5 V
n.a.
n.a.
0 V or
VCC VCE
n.a.
n.a.
n.a.
n.a.
n.a.
n.a.
25
(26)
26/
13
27
GND
27/
12
28
AGC
ground
27
(28)
28/
11
29
P2
28
(29)
29/
10
31
IFIN
30/9 32
IFIN
Specification
29
(31)
30
(32)
20
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
Pin No.
Symbol
PG- PGTSS VQ
OP- FN38
48
Average DC voltage
Equivalent I/O Schematic
pin designation in parenthesis
refer to PG-VQFN-48 package
31/8 33
MIXOUT
32/7 34
MIXOUT
31
(33)
32
(34)
LOW
MID
HIGH
4.0 V
4.0 V
4.0 V
4.0 V
4.0 V
4.0 V
0.0 V
0.0 V
0.0 V
Oscillator
33/6 35
RFGND
34/5 37
LOWIN
RF ground
1.9 V
34
(37)
35/4 38
MIDIN
0.75 V
35
(38)
36
(39)
36/3 39
MIDIN
37/2 40
HIGHIN
0.75 V
38/1 41
HIGHIN
0.75 V
0.75 V
37
(40)
---
49
package GND
Specification
38
(41)
Exposed pad ground
21
0.0 V
0.0 V
0.0 V
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
2.3
Functional Block Diagram
OSCLOWOUT
Oscillator
LOW
OSCLOWIN
2
OSCGND
3
P0
OSCMIDIN
4
Oscillator
MID
OSCMIDOUT
5
Mixer
HIGH
P0.P1
7
OSCHIGHOUT
8
OSCHIGHIN
9
IFGND
37
HIGHIN
P1
36
MIDIN
RF Input
MID
35
MIDIN
34
LOWIN
33
RFGND
32
MIXOUT
31
MIXOUT
30
IFIN
29
IFIN
28
P2
27
AGC
P1
6
OSCHIGHOUT
VCC
HIGHIN
P0.P1
Mixer
MID
P1
OSCHIGHIN
38
RF Input
HIGH
1
10
Oscillator
HIGH
Mixer
LOW
RF Input
LOW
P0
P0.P1
SAW
Filter
Driver
P0
VCC
ATC
11
AGC
Detector
AGC
IFOUT
Prog.
Divider
12
I 2C Bus
FL
IFOUT
13
PLLGND
14
VT
15
CP
16
P4/ADC
17
XTAL
18
XTAL
19
Figure 4
Specification
Charge
Pump
Phase/
Freq
Comp
26
Lock
Detector
f div
f ref
PORTS
CP, OS
Crystal
Oscillator
Reference
Divider
ADC
GND
25
SDA
24
SCL
23
AS
22
P1
21
P0
20
P3
Block Diagram TUA6034 in PG-TSSOP-38 Package
22
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
HIGHIN
1
HIGHIN
2
MIDIN
3
MIDIN
4
LOWIN
5
RF Input
HIGH
Mixer
HIGH
Oscillator
LOW
P1
P0
P0.P1
P0.P1
RF Input
MID
Mixer
MID
Oscillator
MID
P1
RFGND
MIXOUT
7
MIXOUT
8
P0
IFIN
9
IFIN
P2
Mixer
LOW
Oscillator
HIGH
P0
SAW
Filter
Driver
P0.P1
VCC
10
AGC
Detector
11
OSCLOWOUT
37
OSCLOWIN
36
OSCGND
35
OSCMIDIN
34
OSCMIDOUT
33
OSCHIGHIN
32
OSCHIGHOUT
31
OSCHIGHOUT
30
OSCHIGHIN
29
VCC
28
IFGND
27
IFOUT
26
IFOUT
25
PLLGND
24
VT
23
CP
22
P4/ADC
21
XTAL
20
XTAL
P1
6
RF Input
LOW
38
ATC
AGC
AGC
12
Prog.
Divider
I 2C Bus
FL
GND
SDA
13
14
SCL
15
AS
16
P1
17
P0
18
P3
19
Figure 5
Specification
Lock
Detector
PORTS
f div
f ref
Phase/
Freq
Comp
CP, OS
ADC
Reference
Divider
Crystal
Oscillator
Charge
Pump
Block Diagram TUA6036 in PG-TSSOP-38 Package
23
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
LOWIN
HIGHIN
41
37
n.c.
42
MIDIN
OSCLOWOUT
43
38
OSCLOWIN
44
MIDIN
OSCGND
45
39
OSCMIDIN
46
HIGHIN
OSCMIDOUT
47
40
n.c.
48
Functional Description
n.c. 1
Oscillator
LOW
Mixer
HIGH
36
n.c.
35
RFGND
34
MIXOUT
33
MIXOUT
32
IFIN
31
IFIN
30
n.c.
29
P2
28
AGC
27
GND
26
SDA
25
SCL
RF Input
HIGH
n.c. 2
P1
P0
OSCHIGHIN
3
OSCHIGHOUT
4
OSCHIGHOUT
5
OSCHIGHIN
6
P0.P1
P0.P1
Oscillator
MID
Mixer
MID
P1
RF Input
MID
P1
Oscillator
HIGH
Mixer
LOW
RF Input
LOW
P0
P0.P1
P0
SAW
Filter
Driver
VCC 7
IFGND
AGC
Detector
Lock
Detector
VCC
8
AGC
Prog.
Divider
IFOUT
9
FL
f div
f ref
I 2C Bus
IFOUT 10
Phase/
Freq
Comp
Reference
Divider
PLLGND 11
Charge
Pump
Crystal
Oscillator
PORTS
ADC
VT 12
Figure 6
23
AS
24
22
P1
n.c.
21
18
XTAL
P0
17
n.c.
20
16
P4/ADC
P3
15
CP
19
14
n.c.
XTAL
13
n.c.
CP, OS
Block Diagram TUA6034 in PG-VQFN-48 package
2.4
Circuit Description
2.4.1
Mixer-Oscillator block
The mixer-oscillator block includes three balanced mixers (one mixer with an unbalanced
high-impedance input and two mixers with a balanced low-impedance input), two 2-pin
asymmetrical oscillators for the LOW and the MID band, one 4-pin symmetrical oscillator
for the HIGH band, an IF amplifier, a reference voltage, and a band switch.
Specification
24
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
Filters between tuner input and IC separate the TV frequency signals into three bands.
The band switching in the tuner front-end is done by using three PNP port outputs. In the
selected band the signal passes a tuner input stage with a MOSFET amplifier, a doubletuned bandpass filter and is then fed to the mixer input of the IC which has in case of
LOW band a high-impedance input and in case of MID or HIGH band a low-impedance
input. The input signal is mixed there with the signal from the activated on chip oscillator
to the IF frequency. The IF is filtered by means of an IF filter in between the 2 mixer
output pins and the 2 input pins of the following IF amplifier. The IF amplifier has a low
output impedance to drive the SAW filter directly.
2.4.2
PLL block
The oscillator signal is internally DC-coupled as a differential signal to the programmable
divider inputs. The signal subsequently passes through a programmable divider with
ratio N = 256 through 32767 and is then compared in a digital frequency/phase detector
with a reference frequency fref = 31.25, 50, 62.5, 125, 142.86 or 166.67 kHz. This
frequency is derived from a balanced, low-impedance 4 MHz crystal oscillator (pins
XTAL, XTAL) divided by 128, 80, 64, 32, 28 or 24. The reference frequencies will be
different with a quartz other than 4 MHz.
The phase detector has two outputs which drive four current sources of a charge pump.
If the negative edge of the divided VCO signal appears prior to the negative edge of the
reference signal, the positive current source pulses for the duration of the phase
difference. In the reverse case the negative current source pulses. If the two signals are
in phase, the charge pump output (CP) goes into the high-impedance state (PLL is
locked). An active low-pass filter integrates the current pulses to generate the tuning
voltage for the VCO (internal amplifier, external pull-up resistor at VT and external RC
circuitry). The charge pump output is also switched into the high-impedance state if the
control bits T2, T1, T0 = 0, 1, 0. Here it should be noted, however, that the tuning voltage
can alter over a long period in the high impedance state as a result of self discharge in
the peripheral circuity. VT may be switched off by the control bit OS to allow external
adjustments.
If the VCO is not oscillating the PLL locks to a tuning voltage of 33V (VTH).
By means of control bits CP, T0, T1 and T2 the pump current can be switched between
four values by software. This programmability permits alteration of the control response
of the PLL in the locked-in state. In this way different VCO gains can be compensated,
for example.
Specification
25
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
The software controlled ports P0 to P4 are general purpose open-collector outputs. The
test bits T2, T1, T0 =1, 0, 0 switch the test signals fdiv (divided input signal) and fref (i.e
.4 MHz / 64) to P0 and P1 respectively.
The lock detector resets the lock flag FL if the width of the charge pump current pulses
is greater than the period of the crystal oscillator (i.e. 250 ns). Hence, if FL = 1, the
maximum deviation of the input frequency from the programmed frequency is given by
∆f = ± IP ∗ (KVCO / fXTAL) ∗ (C1+C2) / (C1∗C2)
where IP is the charge pump current, KVCO the VCO gain, fXtal the crystal oscillator
frequency and C1, C2 the capacitances in the loop filter (see Chapter 3 on page 28). As
the charge pump pulses at i.e. 62.5 kHz (= fref), it takes a maximum of 16 µs for FL to be
reset after the loop has lost lock state.
Once FL has been reset, it is set only if the charge pump pulse width is less than 250 ns
for eight consecutive fref periods. Therefore it takes between 128 and 144 µs for FL to be
set after the loop regains lock.
2.4.3
AGC
The wide band AGC stage detects the level of the IF output signal and generates an
AGC voltage for gain control of the tuners input transistors. The AGC take-over and the
time constant are selectable by the I2C bus.
2.4.4
I2C-Bus Interface
Data is exchanged between the processor and the PLL via the I2C bus. The clock is
generated by the processor (input SCL). Pin SDA functions as an input or output
depending on the direction of the data (open collector, external pull-up resistor). Both
inputs have a hysteresis and a low-pass characteristic, which enhance the noise
immunity of the I2C bus.
The data from the processor pass through an I2C bus controller. Depending on their
function the data are subsequently stored in registers. If the bus is free, both lines will be
in the marking state (SDA, SCL are high). Each telegram begins with the start condition
and ends with the stop condition. Start condition: SDA goes low, while SCL remains high.
Stop condition: SDA goes high while SCL remains high. All further information transfer
takes place during SCL = low, and the data is forwarded to the control logic on the
positive clock edge.
The table ’Bit Allocation’ (see Table 8 Bit Allocation Read/Write on page 50) should be
referred to for the following description. All telegrams are transmitted byte-by-byte,
followed by a ninth clock pulse, during which the control logic returns the SDA line to low
Specification
26
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Functional Description
(acknowledge condition). The first byte is comprised of seven address bits. These are
used by the processor to select the PLL from several peripheral components (address
select). The LSB bit (R/W) determines whether data are written into (R/W = 0) or read
from (R/W = 1) the PLL.
In the data portion of the telegram during a WRITE operation, the MSB bit of the first or
third data byte determines whether a divider ratio or control information is to follow. In
each case the second byte of the same data type has to follow the first byte. Appropriate
setting of the test bits will decide whether the band-switch byte or the auxiliary byte will
be transmitted (see Table 11 Test modes on page 51).
If the address byte indicates a READ operation, the PLL generates an acknowledge and
then shifts out the status byte onto the SDA line. If the processor generates an
acknowledge, a further status byte is output; otherwise the data line is released to allow
the processor to generate a stop condition. The status word consists of three bits from
the A/D converter, the lock flag and the power-on flag.
Four different chip addresses can be set by an appropriate DC level at pin AS (see
Table 10 Address selection on page 51).
While the supply voltage is applied, a power-on reset circuit prevents the PLL from
setting the SDA line to low, which would block the bus. The power-on reset flag POR is
set at power-on and if VCC falls below 3.2 V. It will be reset at the end of a READ
operation.
Specification
27
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Applications
3
Applications
3.1
Application Circuit TUA6034-T for ATSC
BB659C
2k7
2p2
22p
1
100p
2k7
BB659C
3
4
5
L2
OSCGND
MID
37
OSCMIDIN
MIDIN
6
36
35
1n
LOW
Input
34
OSCHIGHIN
RFGND
OSCHIGHOUT
MIXOUT
OSCHIGHOUT
MIXOUT
33
32
9
OSCHIGHIN
4n7
560
10
+5V
11
100n
transformer
2:10
12
VCC
IFGND
IFOUT
12p
13
TOKO 7KL600
GCS-A1010DX
14
R2
560
IFOUT
TUA6034-T
1p2
8
31
L4
IFIN
30
68p
IFIN
P2
29
P2
28
150n
AGC
4n7
27
AGC
GND
26
SDA
PLLGND
SDA
25
220
100p
C1 15
100n
C2
1n5
R1
15k
33k
TOKO B4F
617DB-1023
1n
LOWIN
OSCMIDOUT
1p2
100n
MID
Input
balun
1:1
1n
68p
7
L3
+ 33 V
TOKO B4F
617DB-1023
22p
1p2
IFOUT
HIGH
Input
balun
1:1
1p2
1k8
C3
22n
HIGHIN
1p2
1k8
BB565
P4/
ADC
OSCLOWIN
1p5
82p
47n
38
2p2
2
L1
15p
HIGHIN
2p7
12
8R2
OSCLOWOUT
16
VT
SCL
AS
CP
24
100p
23
17
18
4 MHz
AS
4n7
P4/ADC
P1
4n7
P0
XTAL
P0
21
39p
19
P1
22
39p
4n7
SCL
220
4n7
P3
XTAL
P3
20
4n7
Recommended band limits for ATSC in MHz
RF input
Oscillator
LOW
MID
HIGH
Figure 7
min
55.25
163.25
457.25
max
157.25
451.25
861.25
min
101
201
503
Coils for ATSC application
turns
diam.
wire diam.
max
203
479
907
L1
L2
L3
L4
8.5
2.5
1.5
12.5
3.2 mm
3 mm
2.4 mm
3.5 mm
0.5 mm
0.5 mm
0.5 mm
0.3 mm
Application Circuit TUA6034-T for ATSC
Remark: TUA 6036 has reversed pinning.
Specification
28
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Applications
3.2
Application Circuit TUA6034-T for DVB-T
2k7
BB659C
2p2
22p
1
100p
2k7
38
3
BB659C
HIGHIN
OSCLOWIN
OSCGND
MID
37
36
5
15p
MID
Input
balun
1:1
1n
TOKO B4F
617DB-1023
MIDIN
OSCMIDIN
35
1n
1p2
L2
TOKO B4F
617DB-1023
22p
1p5
4
HIGH
Input
balun
1:1
2p2
2
82p
8R2
HIGHIN
2p7
L1
12
OSCLOWOUT
1n
LOW
Input
LOWIN
OSCMIDOUT
34
1p2
6
1k8
OSCHIGHIN
RFGND
OSCHIGHOUT
MIXOUT
33
1p2
L3
1p2
8
OSCHIGHOUT
1p2
1k8
9
OSCHIGHIN
4n7
10
VCC
+5V
11
100n
IFOUT
transformer
2:10
C3
22n
12
12p
13
TOKO 7KL600
GCS-A1010DX
14
R2
220
IFGND
IFOUT
MIXOUT
31
1k5
L4
330n
22p
22p
47p
L5
330n
100p
IFIN
30
IFIN
P2
29
P2
28
150n
AGC
IFOUT
GND
PLLGND
SDA
4n7
27
AGC
26
SDA
25
220
100p
C2
100p
+ 33 V
C1
4n7
R1
68k
33k
P4/
ADC
32
TUA6034-T
BB565
100p
7
100n
15
SCL
VT
24
SCL
220
100p
16
CP
AS
P4/ADC
P1
XTAL
P0
4n7
17
18
4 MHz
4n7
P0
21
39p
19
P1
22
39p
4n7
AS
23
4n7
P3
XTAL
P3
20
4n7
Recommended band limits for DVB-T in MHz
RF input
Oscillator
LOW
MID
HIGH
min
48.25
161.25
447.25
max
154.25
439.25
863.25
min
87.15
200.15
486.15
Coils for DVB-T application
turns
diam.
wire diam.
max
193.15
478.15
902.15
L1
L2
L3
L4, L5
8.5
2.5
1.5
SMD
3.2 mm
3 mm
2.4 mm
0805
0.5 mm
0.5 mm
0.5 mm
330n
SMD = Surface Mounted Device
Figure 8
Application Circuit TUA6034-T for DVB-T
Remark: TUA 6036 has reversed pinning.
Specification
29
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Applications
Application Circuit TUA6034-T for ISDB-T
BB659C
2k7
2p2
22p
1
100p
2k7
BB659C
3
OSCGND
MID
37
36
4
5
L2
HIGH
Input
balun
1:1
TOKO B4F
617DB-1023
22p
MID
Input
balun
1:1
1n
TOKO B4F
617DB-1023
MIDIN
OSCMIDIN
35
1p2
1n
1n
LOW
Input
LOWIN
OSCMIDOUT
34
1p2
6
1k8
OSCHIGHIN
RFGND
OSCHIGHOUT
MIXOUT
33
1p2
56p
7
L3
BB555
9
OSCHIGHIN
4n7
10
+5V
100n
11
transformer
2:10
12
TOKO 7KL600
GCS-A1010DX
14
R2
100
C1
6n8
15
16
R1
33k
33k
100n
IFGND
IFOUT
1k5
L4
220n
12p
12p
30p
L5
220n
IFIN
30
IFIN
29
P2
P2
28
150n
AGC
4n7
27
AGC
IFOUT
GND
PLLGND
SDA
26
SDA
25
SCL
VT
220
CP
AS
P4/ADC
P1
24
100p
23
AS
4n7
17
18
4 MHz
SCL
220
4n7
P0
XTAL
P0
21
39p
19
P1
22
39p
4n7
56p
31
100p
C2
270p
+ 33 V
VCC
12p
13
MIXOUT
OSCHIGHOUT
1p2
1k8
IFOUT
32
1p2
8
P4/
ADC
HIGHIN
OSCLOWIN
1p5
82p
C3
22n
38
2p2
2
L1
15p
HIGHIN
2p7
12
8R2
OSCLOWOUT
TUA6034-T
3.3
4n7
P3
XTAL
P3
20
4n7
Recommended band limits for ISDB-T in MHz
RF input
Oscillator
LOW
MID
HIGH
min
93
173
473
max
167
467
767
min
150
230
530
Coils for ISDB-T application
turns
diam.
wire diam.
max
224
524
824
L1
L2
L3
L4, L5
8.5
2.5
1.5
SMD
3.2 mm
3 mm
2.4 mm
0805
0.5 mm
0.5 mm
0.5 mm
220n
SMD = Surface Mounted Device
Figure 9
Application Circuit TUA6034-T for ISDB-T
Remark: TUA 6036 has reversed pinning.
Specification
30
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Applications
12
2k7
L1
BB659C
BB659C
22p
2
15p
1n
LOW
Input
1n
38
39
MIDIN
40
MID
HIGHIN
41
42
44
43
n.c .
HIGHIN
n.c .
36
RFGND
35
1p2
68p
3
1k8
OSCHIGHIN
MIXOUT
OSCHIGHOUT
MIXOUT
34
1p2
4
L3
1p2
5
OSCHIGHOUT
1p2
1k8
OSCHIGHIN
6
4n7
560
7
VCC
+5V
8
100n
9
68p
IFIN
31
n.c .
30
P2
P2
29
150n
AGC
IFOUT
GND
PLLGND
SDA
4n7
28
12p
AGC
SDA
4n7
4n7
4n7
n.c .
AS
220
100p
24
4n7
23
22
P1
P0
21
P3
XTAL
XTAL
18
17
39p
SCL
25
39p
4 MHz
R1
15k
SCL
20
C1
100n
220
100p
n.c .
P4/ADC
16
VT
13
12
27
26
CP
11
15
10
14
TOKO 7KL600
GCS-A1010DX
R2
560
L4
32
IFOUT
n.c .
transformer
2:10
IFGND
n.c .
IFOUT
33
IFIN
19
BB565
TUA6034-V
47n
C3
22n
22p
2p2
2p2
OSCLOWOUT
45
OSCLOWIN
46
47
2p7
OSCGND
n.c .
n.c .
1p5
OSCMIDIN
n.c .
OSCMIDOUT
48
1p2
balun
1:1
1n
balun
1:1
L2
1
MID
Input
100p
37
2k7
82p
LOWIN
8R2
TOKO B4F
617DB-1023
HIGH
Input
Application Circuit TUA6034-V for ATSC
TOKO B4F
617DB-1023
3.4
C2
1n5
33k
P4/
ADC
+ 33 V
Figure 10
Specification
AS
LOW
MID
HIGH
max
157.25
451.25
861.25
P1
4n7
Recommended band limits for ATSC in MHz
RF input
Oscillator
min
55.25
163.25
457.25
P0
P3
100n
min
101
201
503
Coils for ATSC application
turns
diam.
wire diam.
max
203
479
907
L1
L2
L3
L4
8.5
2.5
1.5
12.5
3.2 mm
3 mm
2.4 mm
3.5 mm
0.5 mm
0.5 mm
0.5 mm
0.3 mm
Application Circuit TUA6034-V for ATSC
31
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Applications
12
2k7
BB659C
22p
2
15p
LOW
Input
1n
37
38
39
MIDIN
40
MID
HIGHIN
n.c .
41
42
43
44
45
OSCLOWIN
46
47
1n
n.c .
36
RFGND
35
1p2
100p
3
1k8
MIXOUT
OSCHIGHIN
34
1k5
1p2
1p2
5
OSCHIGHOUT
1p2
1k8
OSCHIGHIN
6
4n7
7
VCC
+5V
8
100n
9
22p
100p
22p
IFIN
32
47p
L5
330n
IFIN
31
n.c .
30
P2
P2
29
150n
AGC
IFOUT
GND
PLLGND
SDA
4n7
28
12p
AGC
4n7
4n7
4n7
n.c .
AS
SCL
25
220
100p
24
4n7
23
22
P1
P0
21
P3
XTAL
XTAL
18
17
39p
4 MHz
39p
SCL
20
C1
4n7
R1
68k
SDA
220
100p
n.c .
P4/ADC
16
13
12
27
26
VT
CP
11
15
10
14
TOKO 7KL600
GCS-A1010DX
R2
220
33
IFOUT
n.c .
transformer
2:10
IFGND
n.c .
IFOUT
L4
330n
MIXOUT
OSCHIGHOUT
TUA6034-V
4
L3
19
BB565
C3
22n
22p
2p2
2p2
OSCLOWOUT
n.c .
2p7
OSCGND
n.c .
1p5
OSCMIDIN
n.c .
OSCMIDOUT
48
1p2
balun
1:1
1n
L1
BB659C
HIGHIN
L2
1
MID
Input
100p
LOWIN
2k7
82p
balun
1:1
8R2
TOKO B4F
617DB-1023
HIGH
Input
Application Circuit TUA6034-V for DVB-T
TOKO B4F
617DB-1023
3.5
C2
100p
33k
AS
P4/
ADC
+ 33 V
LOW
MID
HIGH
max
154.25
439.25
863.25
P1
4n7
Recommended band limits for DVB-T in MHz
RF input
Oscillator
min
48.25
161.25
447.25
P0
P3
100n
min
87.15
200.15
486.15
Coils for DVB-T application
turns
diam.
wire diam.
max
193.15
478.15
902.15
L1
L2
L3
L4, L5
8.5
2.5
1.5
SMD
3.2 mm
3 mm
2.4 mm
0805
0.5 mm
0.5 mm
0.5 mm
330n
SMD = Surface Mounted Device
Figure 11
Specification
Application Circuit TUA6034-V for DVB-T
32
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Applications
12
2k7
100p
L1
BB659C
BB659C
22p
2
15p
LOW
Input
1n
37
38
39
MIDIN
40
MID
HIGHIN
HIGHIN
n.c .
41
42
43
44
45
OSCLOWIN
46
1n
n.c .
36
RFGND
35
1p2
56p
3
1k8
MIXOUT
OSCHIGHIN
34
1k5
1p2
1p2
5
OSCHIGHOUT
1p2
1k8
OSCHIGHIN
6
4n7
7
VCC
+5V
8
100n
9
33
12p
IFIN
32
30p
L5
220n
31
n.c .
30
P2
P2
29
150n
AGC
IFOUT
GND
PLLGND
SDA
4n7
28
12p
AGC
SDA
22
4n7
4n7
4n7
n.c .
AS
SCL
25
220
100p
24
21
4n7
23
20
P3
P0
P1
SCL
XTAL
XTAL
39p
4 MHz
39p
18
16
n.c .
P4/ADC
C1
6n8
R1
33k
220
100p
17
13
12
27
26
VT
CP
11
R2
100
15
10
14
TOKO 7KL600
GCS-A1010DX
56p
12p
IFIN
IFOUT
n.c .
transformer
2:10
IFGND
n.c .
IFOUT
L4
220n
MIXOUT
OSCHIGHOUT
TUA6034-V
4
L3
19
BB555
C3
22n
22p
2p2
2p2
OSCLOWOUT
n.c .
2p7
OSCGND
47
n.c .
1
1p5
OSCMIDIN
n.c .
OSCMIDOUT
48
1p2
balun
1:1
1n
balun
1:1
L2
LOWIN
2k7
82p
MID
Input
HIGH
Input
8R2
TOKO B4F
617DB-1023
Application Circuit TUA6034-V for ISDB-T
TOKO B4F
617DB-1023
3.6
C2
270p
33k
AS
P4/
ADC
+ 33 V
LOW
MID
HIGH
max
167
467
767
P1
4n7
Recommended band limits for ISDB-T in MHz
RF input
Oscillator
min
93
173
473
P0
P3
100n
min
150
230
530
Coils for ISDB-T application
turns
diam.
wire diam.
max
224
524
824
L1
L2
L3
L4, L5
8.5
2.5
1.5
SMD
3.2 mm
3 mm
2.4 mm
0805
0.5 mm
0.5 mm
0.5 mm
220n
SMD = Surface Mounted Device
Application Circuit TUA6034-V for ISDB-T
Specification
33
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
4
Reference
4.1
Electrical Data
4.1.1
Absolute Maximum Ratings
Attention: The maximum ratings may not be exceeded under any circumstances,
not even momentarily and individually, as permanent damage to the IC
will result.
Table 5
#
Absolute Maximum Ratings
Parameter1)
Symbol
Limit Values
min.
1.
Supply voltage
VCC
2.
Ambient temperature
TA
3.
Junction temperature
TJ
Unit Remarks
max.
-0.3
6
-40
TAmax2)
V
°C
+125
°C
+125
°C
2
K
3
V
4.
Storage temperature
TStg
5.
Temperature
difference junction to
case3)
TJC
CP
VCP
ICP
1
mA
Crystal oscillator pin
XTAL
VQ
6
V
-40
PLL
6.
7.
8.
9.
IQ
10. Bus input/output SDA
VSDA
11. Bus output current
SDA
ISDA(L)
-0.3
-5
-0.3
mA
6
V
10
mA
12. Bus input SCL
VSCL
-0.3
6
V
13. Chip address switch
AS
VAS
-0.3
6
V
14. VCO tuning output
(loop filter)
VVT
-0.3
35
V
15. NPN port output
voltage of P4
VP4
-0.3
6
V
Specification
34
open collector
open collector
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter1)
Symbol
Limit Values
Unit Remarks
min.
max.
-1
10
mA
16. NPN port output
current of P4
IP4(L)
open collector,
tmax = 0.1 s at 5.5 V
17. P4/ADC input/output
voltage
VP4/ADC
-0.3
6
V
18. NPN port output
current of P4
IP4/ADC(L)
-1
10
mA
open collector,
tmax = 0.1 s at 5.5 V
19. PNP port output
voltage
of P0, P1, P2, P3
VP0, 1, 2, 3
-0.3
6
V
open collector
20. PNP port output
current of P1
IP1(L)
+1
-25
mA
open collector,
tmax = 0.1 s at 5.5 V
21. PNP port output
current of P0
IP0(L)
+1
-10
mA
open collector,
tmax = 0.1 s at 5.5 V
22. PNP port output
current of P2, P3
IP2, 3(L)
+1
-5
mA
open collector,
tmax = 0.1 s at 5.5 V
23. 7 Total port output
current of
PNP ports
ΣIP(L)
-40
mA
tmax = 0.1 s at 5.5 V
Mixer-Oscillator
24. Mix inputs LOW band
VLOW
25. Mix inputs MID/HIGH
26. band
VMID/HIGH
27. VCO base voltage
VB
28. VCO collector voltage
VC
IMID/HIGH
29. AGC output
VAGC
30.
IAGC
31. Voltage on all other
input and output pins
except GNDs
Vmax
Specification
-0.3
3
V
2
V
-5
6
mA
-0.3
3
V
LOW, MID and
HIGH band
oscillators
6
V
LOW, MID and
HIGH band
oscillators
4
V
1
mA
-0.3
-0.3
35
VCC
V
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter1)
Symbol
Limit Values
min.
Unit Remarks
max.
ESD-Protection4)
32. all pins
VESD
2
kV
1) All values are referred to ground (pin), unless stated otherwise.
Currents with a positive sign flow into the pin and currents with a negative sign flow out of pin.
2) The maximum ambient temperature depends on the mounting conditions of the package. Any application
mounting must guarantee not to exceed the maximum junction temperature of 125 °C. As reference the
temperature difference junction to case is given.
3) Referred to top center of package.
4) According to EIA/JESD22-A114-B (HBM incircuit test), as a single device incircuit contact discharge test.
4.1.2
Operating Range
Table 6
#
Operating Range
Parameter
Symbol
Limit Values
Unit Remarks
min.
max.
1.
Supply voltage
VCC
+4.5
+5.5
2.
Programmable divider
factor
N
256
32767
3.
LOW mixer input
frequency range
fMIXV
30
200
MHz
4.
MID and HIGH band
mixer input frequency
range
fMIXU
130
900
MHz
5.
LOW oscillator
frequency range
fOH
65
250
MHz
6.
MID band oscillator
frequency range
fOU
165
530
MHz
7.
HIGH band oscillator
frequency range
fOU
400
950
MHz
8.
Ambient temperature
TA
-20
TAmax1)
°C
V
1) see 4.1.1 Absolute Maximum Ratings on page 34.
Specification
36
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
4.1.3
Table 7
#
AC/DC Characteristics
AC/DC Characteristics, TA = 25°C, VCC = 5V
Parameter
Symbol
Limit Values
min.
typ.
max.
Unit Test Conditions
■
Supply
1.
Supply voltage
VCC
4.5
5
5.5
V
2.
Current
consumption in
active mode
IVCC
59
74
89
mA
LOW band
IVCC
59
74
89
mA
MID band
IVCC
57
71
85
mA
HIGH band
mA
P0, P1 = 1
3.
4.
5.
Current
Istby
consumption in
power down mode
20
Digital Part
PLL
Crystal oscillator connections XTAL
6.
Crystal frequency
fXTAL
7.
Crystal resistance
RXTAL
8.
Oscillation
frequency
fXTAL
9.
Input impedance
ZXTAL
3.2
4.0
4.8
MHz series resonance
30
300
Ω
series resonance
3,9997 4,000 4,0002 MHz fXTAL = 4 MHz
5
5
-650
-500 Ω
fXTAL = 4 MHz
Charge pump output CP
10. Output current,
11. see Table 15
Charge pump
12. current on page 53
13.
ICPDH
± 430 ± 650 ± 860 µA
ICPH
± 180 ± 250 ± 360 µA
VCP = 1.8 V
ICPDL
± 90
± 125 ± 180 µA
VCP = 1.8 V
ICPL
± 35
± 50
VCP = 1.8 V
14. Tristate current
ICPZ
15. Output voltage
VCP
± 70 µA
±1
1.0
VCP = 1.8 V
nA
T2, T1, T0 = 0,1,0,
VCP = 2 V
2.5
V
loop locked
10
µA
VTH = 33 V, OS = 1
Tuning voltage output VT (open collector)
16. Leakage current
Specification
ITH
37
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
Symbol
Limit Values
min.
17. Output voltage
VTL
when the loop is
closed, (test mode
in normal
operation)
typ.
Unit Test Conditions
■
max.
0.4
32.7 V
OS = 0,
RLoad = 33 kΩ,
tuning supply =
33 V
I2C-Bus
Bus inputs SCL, SDA
18. High-level input
voltage
VIH
2.3
5.5
V
19. Low-level input
voltage
VIL
0
1.5
V
20. High-level input
current
IIH
10
µA
Vbus = 5.5 V,
VCC = 0 V
21.
IIH
10
µA
Vbus = 5.5 V,
VCC = 5.5 V
22. Low-level input
current
IIL
10
µA
Vbus = 1.5 V,
VCC = 0 V
23.
IIL
µA
Vbus = 0 V,
VCC = 5.5 V
-10
Bus output SDA (open collector)
24. Leakage current
IOH
10
µA
VOH = 5.5 V
25. Low-level output
voltage
VOL
0.4
V
IOL = 3 mA
26. Rise time
tr
300
ns
27. Fall time
tf
300
ns
Edge speed SCL,SDA
Clock timing SCL
28. Frequency
fSCL
29. High pulse width
tH
0.6
µs
30. Low pulse width
tL
1.3
µs
tsusta
0.6
µs
0
100
400
kHz
Start condition
31. Set-up time
Specification
38
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
Symbol
Limit Values
min.
32. Hold time
typ.
Unit Test Conditions
■
max.
thsta
0.6
µs
33. Set up time
tsusto
0.6
µs
34. Bus free
tbuf
1.3
µs
35. Set-up time
tsudat
0.1
µs
36. Hold time
thdat
0
µs
37. Input hysteresis
SCL, SDA
Vhys
38. Pulse width of
spikes which are
suppressed
tsp
Stop condition
Data transfer
200
0
mV
50
ns
400
pF
0.05
0.4
V
IPOLH0to3 = 0 mA,
port disabled
39. Capacitive load for CL
each bus line
PNP port outputs P0, P1, P2, P3 (open collector)
40. Port output voltage VPOH0to3
41. Output saturation
voltage port 0
VPL0 =
VCC VCESat0
0.25
0.4
V
IPOL0 = 10 mA,
port enabled
42. Output saturation
voltage port 1
VPL1 =
VCC VCESat1
0.25
0.4
V
IPOL1 = 15 mA
port enabled
43. Output saturation
voltage ports 2, 3
VPL2 ,3 =
VCC VCESat2,3
0.25
0.4
V
IPOL2, 3 = 5 mA
port enabled
10
µA
VCC = 5.5,
VPn4 = 6 V
0.4
V
IPOL4 = 5 mA
5.5
V
NPN port output P4 (open collector)
44. Output leakage
current
IPOH4
45. Output saturation
voltage
VPL04
0.25
ADC input
46. ADC input voltage VADC
Specification
0
39
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
Symbol
Limit Values
min.
47. High-level input
current
IADCH
48. Low-level input
current
IADCL
typ.
Unit Test Conditions
■
max.
10
-10
µA
µA
Address selection input AS
49. High-level input
current
IASH
50. Low-level input
current
IASL
50
-50
µA
VASH = 5.5 V
µA
VASL = 0 V
Analog Part
LOW band mixer mode (P0 = 1, P1 = 0, including IF amplifier)
51. RF frequency
fRF
44.25
52. Voltage gain
GV
23.5
170.25 MHz picture carrier 1)
26
28.5 dB
fRF = 44.25 MHz,
see 4.5.1 on page 59
53.
GV
23.5
26
28.5 dB
fRF =170.25 MHz,
see 4.5.1 on page 59
54. Noise figure
NF
8
10
dB
fRF = 50 MHz,
see 4.5.4 on page 60
see 4.5.3 on page 60
55.
NF
8
10
dB
fRF =150 MHz,
see 4.5.4 on page 60
see 4.5.3 on page 60
56. Output voltage
Vo
causing 0.8% of
57. crossmodulation in Vo
channel
113
dBµV fRF = 48.25 MHz,
113
dBµV fRF = 154.25 MHz,
58. Input IP2
IIP2
160
dBµV fRF1 = 48.25 MHz
fRF2 = 97.50 MHz,
PRF1 = PRF2
59.
IIP2
145
dBµV fRF1 = 154.25 MHz
fRF2 = 309.50 MHz,
PRF1 = PRF2
Specification
see 4.5.6 on page 61
see 4.5.6 on page 61
40
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
Symbol
Limit Values
min.
typ.
Unit Test Conditions
max.
60. Input IP3
IIP3
118
dBµV fRF1 = 48.25 MHz
fRF2 = 49.25 MHz
PRF1 = PRF2
61.
IIP3
117
dBµV fRF1 = 154.25 MHz
fRF2 = 155.25 MHz,
PRF1 = PRF2
124
dBµV fRF = 48.25 MHz
124
dBµV fRF = 154.25 MHz
62. Output voltage
Vo
causing
63.
Vo
1 dB compression
64. Output voltage
65. causing 1.1 kHz
incidental FM
Vo
108
111
dBµV fRF = 48.25 MHz 2)
Vo
108
111
dBµV fRF = 154.25 MHz 2.)
66. Local oscillator FM FMI2C
caused by I2C
communication
67. 750 Hz Pulling
Vi
2.12 kHz
fRF = 154.25 MHz 3)
dBµV fRF = 154.25 MHz 4)
88
68. Channel S02 beat INTS02
57
60
dBc
PRF = 115 dBµV
at IF output 5)
69. Channel A-5 beat
57
60
dBc
PRF = 115 dBµV
at IF output 6)
63
66
dBc
PRF1 = PRF2 = 80
dBµV7)
dBµV
8)
0.15
mS
fRF = 48.25 to
154.25 MHz,
1
pF
INTA-5
70. Channel CH6 color INTCH6
beat
71. RF input level
without lock-out
Vi
120
72. Input conductance gp
Yi = (gp + jωCp)
■
see 4.4.1 on page 56
73. Input capacitance
Cp
fRF = 48.25 to
154.25 MHz,
see 4.4.1 on page 56
Mid band mixer mode (P0 = 0, P1 =1, including IF amplifier)
74. RF frequency
Specification
fRF
454.25 MHz picture carrier 1.)
154.25
41
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
75. Voltage gain
Symbol
GV
Limit Values
Unit Test Conditions
min.
typ.
max.
33
36
39
dB
■
fRF = 161.25 MHz,
see 4.5.2 on page 59
76.
GV
33
36
39
dB
fRF = 439.25 MHz,
see 4.5.2 on page 59
77. Noise figure
(not corrected for
78. image)
NF
6
8
dB
NF
6
8
dB
fRF = 161.25 MHz,
see 4.5.5 on page 61
fRF = 300 MHz,
see 4.5.5 on page 61
79. Output voltage
Vo
causing 0.8% of
80. crossmodulation in Vo
channel
112
dBµV fRF = 161.25 MHz,
112
dBµV fRF = 439.25 MHz,
81. Input IP2
IIP2
146
dBµV fRF1 = 161.25 MHz
fRF2 = 323.50 MHz,
PRF1 = PRF2
82.
IIP2
140
dBµV fRF1 = 440.25 MHz
fRF2 = 818.50 MHz,
PRF1 = PRF2
83. Input IP3
IIP3
105
dBµV fRF1 = 161.25 MHz
fRF2 = 162.25 MHz
PRF1 = PRF2
84.
IIP3
106
dBµV fRF1 = 439.25 MHz
fRF2 = 440.25 MHz
PRF1 = PRF2
124
dBµV fRF = 161.25 MHz
124
dBµV fRF = 439.25 MHz
111
dBµV fRF = 161.25 MHz
see 4.5.7 on page 62
see 4.5.7 on page 62
85. Output voltage
Vo
causing
86.
Vo
1 dB compression
87. Output voltage
causing 1.1 kHz
88. incidental FM
Vo
108
Vo
108
2.)
111
2.)
89. Local oscillator FM FMI2C
caused by I2C
communication
Specification
dBµV fRF = 439.25 MHz
2.12 kHz
42
fRF
3.)
= 439.25 MHz
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
Symbol
90. N+5 - 1 MHz pulling N+5
- 1 MHz
Limit Values
min.
typ.
77
80
Unit Test Conditions
■
max.
dBµV fRFw = 359.25 MHz,
fOSC = 398.15 MHz,
fRFu = 399.25 MHz
9)
91. 750 Hz Pulling
Vi
92. RF input level
without lock-out
Vi
93. Input impedance
Zi = (Rs + jωLs)
94.
Rs
78
dBµV fRF = 439.25 MHz
4.)
120
dBµV
Ω
35
8.)
fRF = 161.25 MHz,
see 4.4.2 on page 56
Rs
Ω
35
fRF = 439.25 MHz,
see 4.4.2 on page 56
95.
Ls
8
nH
fRF = 161.25 MHz,
see 4.4.2 on page 56
96.
Ls
8
nH
fRF = 439.25 MHz,
see 4.4.2 on page 56
HIGH band mixer mode (P0 = 0, P1 = 0, including IF amplifier)
97. RF frequency
fRF
399.25
98. Voltage gain
GV
33
863.25 MHz picture carrier 1.)
36
39
dB
fRF = 447.25 MHz,
see 4.5.2 on page 59
99.
GV
33
36
39
dB
fRF = 863.25 MHz,
see 4.5.2 on page 59
100. Noise figure
(not corrected for
101. image)
NF
6
8
dB
fRF = 447.25 MHz,
see 4.5.5 on page 61
NF
7
9
dB
fRF = 863.25 MHz,
see 4.5.5 on page 61
102. Output voltage
Vo
causing 0.8% of
103. crossmodulation in Vo
channel
112
dBµV fRF = 447.25 MHz,
112
dBµV fRF = 863.25 MHz,
104. Input IP2
136
dBµV fRF1 = 447.25 MHz
fRF2 = 895.50 MHz
PRF1 = PRF2
Specification
IIP2
see 4.5.7 on page 62
see 4.5.7 on page 62
43
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
Symbol
Limit Values
min.
typ.
Unit Test Conditions
max.
105. Input IP3
IIP3
106
dBµV fRF1 = 447.25 MHz
fRF2 = 448.25 MHz
PRF1 = PRF2
106.
IIP3
106
dBµV fRF1 = 863.25 MHz
fRF2 = 864.25 MHz
PRF1 = PRF2
124
dBµV fRF = 447.25 MHz
124
dBµV fRF = 863.25 MHz
111
dBµV fRF = 447.25 MHz
107. Output voltage
Vo
causing
108.
Vo
1 dB compression
109. Output voltage
causing 1.1 kHz
110. incidental FM
Vo
108
Vo
108
2.)
111
dBµV fRF = 454.25 MHz
2.)
111. Local oscillator FM FMI2C
caused by I2C
communication
112. N+5 - 1 MHz pulling N+5
- 1 MHz
■
2.12 kHz
77
80
fRF
3.)
= 863.25 MHz
dBµV fRFw = 823.25 MHz,
fOSC = 862.15 MHz,
fRFu = 862.25 MHz
9.)
113. 750 Hz Pulling
Vi
114. RF input level
without lock-out
Vi
115. Input impedance
Zi = (Rs + jωLs)
Rs
116.
Rs
78
dBµV fRF = 855.25 MHz
4.)
120
dBµV
Ω
35
8.)
fRF = 447.25 MHz,
see 4.4.3 on page 57
Ω
35
fRF = 863.25 MHz,
see 4.4.3 on page 57
117.
Ls
8
nH
fRF = 447.25 MHz,
see 4.4.3 on page 57
118.
Ls
8
nH
fRF = 863.25 MHz,
see 4.4.3 on page 57
LOW band oscillator, (see Chapter 3 on page 28)
119. Oscillator
frequency
Specification
fOSC
80
210
44
MHz
10)
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
Symbol
Limit Values
min.
120. Oscillator
121. frequency shift
122. Oscillator
frequency drift
typ.
max.
∆fOSC(V)
20
70
∆fOSC(V)
110
∆fOSC(T)
300
500
Unit Test Conditions
kHz
∆VCC = 5% 11)
kHz
∆VCC = 10% 11.)
kHz
∆T = 25 °C,
with compensation
■
12)
123. Oscillator
frequency drift
∆fOSC(t)
124. Phase noise,
carrier to noise
sideband
ΦOSC
125.
126.
150
250
5 s to 15 min. after
switch on 13)
77 14)
85
dBc/ ±1 kHz frequency
Hz
offset, worst case
in frequency range
88 15)
92
dBc/ ±10 kHz frequency
Hz
offset, worst case
in frequency range
108
112
dBc/ ±100 kHz
Hz
frequency offset,
worst case in
frequency range
20
mV
4.75 < VP < 5.25 V,
worst case in
frequency range,
ripple frequency
500 kHz 16)
493
MHz
10.)
70
kHz
∆VCC = 5% 11.)
kHz
∆VCC = 10% 11.)
14), 15)
127. Ripple
RSC
susceptibility of VP
kHz
15
MID band oscillator, (see Chapter 3 on page 28)
128. Oscillator
frequency
fOSC
129. Oscillator
130. frequency shift
∆fOSC(V)
20
∆fOSC(V)
110
131. Oscillator
frequency drift
∆fOSC(T)
500
750
kHz
∆T = 25 °C; with
compensation 12.)
132. Oscillator
frequency drift
∆fOSC(t)
250
500
kHz
5 s to 15 min. after
switch on 13.)
Specification
201
45
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
Symbol
Limit Values
min.
133. Phase noise,
carrier to noise
sideband
ΦOSC
134.
135.
typ.
80
dBc/ ±1 kHz frequency
Hz
offset, worst case
in frequency range
88 15)
92
dBc/ ±10 kHz frequency
Hz
offset, worst case
in frequency range
106
112
dBc/ ±100 kHz
Hz
frequency offset,
worst case in
frequency range
20
mV
4.75 < VP < 5.25 V,
worst case in
frequency range,
ripple frequency
500 kHz 14.)
905
MHz
10.)
70
kHz
∆VCC = 5% 11.)
∆VCC = 10% 11.)
73
15
■
max.
14)
14), 15)
136. Ripple
RSC
susceptibility of VP
Unit Test Conditions
HIGH band oscillator, (see Chapter 3 on page 28)
137. Oscillator
frequency
fOSC
138. Oscillator
139. frequency shift
∆fOSC(V)
20
∆fOSC(V)
300
kHz
140. Oscillator
frequency drift
∆fOSC(T)
600
1000 kHz
∆T = 25 °C; with
compensation 12.)
141. Oscillator
frequency drift
∆fOSC(t)
250
500
5 s to 15 min. after
switch on 13).
142. Phase noise,
carrier to noise
sideband
ΦOSC
143.
144.
435
70 14)
77
dBc/ ±1 kHz frequency
Hz
offset, worst case
in frequency range
86 15)
90
dBc/ ±10 kHz frequency
Hz
offset, worst case
in frequency range
106
109
dBc/ ±100 kHz
Hz
frequency offset,
worst case in
frequency range
14), 15)
Specification
kHz
46
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
Symbol
145. Ripple
RSC
susceptibility of VP
Limit Values
Unit Test Conditions
min.
typ.
15
20
mV
4.75 < VP < 5.25 V,
worst case in
frequency range,
ripple frequency
500 kHz 14.)
■
max.
IF amplifier
146. Input impedance
Zi = (Rs + jωLs)
RS
460
Ω
at 36 MHz,
147.
LS
10
nH
at 36 MHz,
148. Output reflection
coefficient
S22
10
dB
149.
S22
see 4.4.4 on page 57
see 4.4.4 on page 57
magnitude,
see 4.4.4 on page 57
0.85
°
phase,
see 4.4.4 on page 57
150. Output impedance RS
Zo = (Rs + jωLs)
151.
LS
Ω
65
at 36 MHz,
see 4.4.6 on page 58
20
nH
at 36 MHz,
see 4.4.6 on page 58
Rejection at the IF outputs
152. Level of divider
INTDIV
interferences in the
IF signal
153. Crystal oscillator
interferences
rejection
INTXTAL
154. Reference
INTREF
frequency rejection
20
dBµV
17)
, worst case
60
66
dBc
VIF = 100 dBµV,
worst case in
frequency range18)
60
66
dBc
VIF = 100 dBµV,
worst case in
frequency range 19)
112
dBµV AL2, AL1, AL0 =
0, 1, 0
AGC output
155. AGC take-over
point
AGCTOP
156. Source current 1
IAGCfast
7.2
9.0
10.8 µA
157. Source current 2
IAGCslow
210
300
390
nA
158. Peak sink to ground IAGCpeak
80
100
120
µA
Specification
47
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
#
Parameter
Symbol
Limit Values
min.
typ.
max.
159. AGC output voltage VAGCmax
3.6
3.8
4.0
160. AGC output voltage VAGCmin
0
0
163. AGC output voltage AGCRMH
3.3
164. AGC leakage
current
-50
AGCLEAK
165. AGC output voltage AGCOFF
V
0.25 V
161. RF voltage range to AGCSLIP
switch the AGC
from active to
inactive mode
162. AGC output voltage AGCRML
Unit Test Conditions
3.8
0.5
dB
2.9
V
VCC- V
0.5
or 4
50
3.3
3.8
nA
VCC- V
0.5
or 4
■
maximum level,
IAGC = 9 µA
minimum level
AGC bit high or
AGC active
AGC bit low or
AGC inactive
AL2, AL1, AL0 =
1,1,0
0 < VAGC < VCC
AL2, AL1, AL0 =
1,1,1
AGC is disabled
■ This value is only guaranteed in lab.
1) The RF frequency range is defined by the oscillator frequency range and the intermediate frequency (IF).
2) This is the level of the RF unwanted signal (50% amplitude modulated with 1kHz) that causes a 1.1 kHz FM
modulation of the local oscillator and thus of the wanted signal; Vwanted = 100 dBµV; funwanted = fwanted + 5.5 MHz.
3) Local oscillator FM modulation resulting from I2C communication is measured at the IF output using a
modulation analyzer with a peak to peak detector ((P+ +P-)/2) and a post detection filter 30 Hz - 200 kHz. The
I2C messages are sent to the tuner in such a way that the tuner is addressed but the content of the PLL registers
are not altered. The refresh interval between each data set shall be 20 ms to 1s.
4) This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency
deviation on the oscillator signal producing sidebands 30 dB below the level of the oscillator signal.
5) Channel S02 beat is the interfering product of fRFpix, fIF and fOSC of channel S02, fBEAT = 37.35 MHz. The possible
mechanisms are fOSC - 2 x fIF or 2 x fRFpix - fOSC.
6) Channel A-5 beat is the interfering product of fRFpix, fIF and fOSC of channel A-5; fBEAT= 45.5 MHz. The possible
mechanisms are: fOSC - 2 x fIF or 2 x fRFpix - fOSC.
7) Channel 6 beat is the interfering product of fRFpix + fRFsnd - fOSC of channel 6 at 42 MHz.
8) The IF output signal stays stable within the range of the fref step for a low level RF input up to 120 dBµV.
9) N+5 -1 MHz is defined as the input level of channel N+5, at frequency 1 MHz lower, causing FM sidebands
30 dB below the wanted carrier.
Specification
48
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
10) Limits are related to the tank circuit used in the application board (see Chapter 3 on page 28). Frequency bands
may be adjusted by the choice of external components.
11) The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from
VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free running during this
measurement.
12) The frequency drift is defined as a change in oscillator frequency if the ambient temperature varies from TA =
25 to 50 °C or from TA = 25 to 0 °C. The oscillator is free running during this measurement.
13) The switch-on drift is defined as a change in oscillator frequency between 5 s and 15 min. after switch-on. The
oscillator is free running during this measurement.
14) see Figure 8 Application Circuit TUA6034-T for DVB-T on page 29.
15) see Figure 7 Application Circuit TUA6034-T for ATSC on page 28.
16) The supply ripple susceptibility is measured in the application board (see Chapter 3 on page 28), using a
spectrum analyzer connected to the IF output. An unmodulated RF signal is applied to the test board RF input.
A sinewave signal with a frequency of 500 kHz is superposed onto the supply voltage (see 4.5.8 on page 62).
The amplitude of this ripple is adjusted to bring the 500 kHz sidebands around the IF carrier to a level of 53.5
dBc referred to the carrier.
17) This is the level of divider interferences close to the IF frequency. For example channel S3: fOSC = 158.15 MHz,
1/4 fOSC = 39.5375 MHz. Divider interference is measured with the application board (see Chapter 3 on page
28). All ground pins are connected to a single ground plane under the IC. The LOWIN input must be left open
(i.e. not connected to any load or cable). The MIDIN and HIGHIN inputs are connected to a hybrid. The
measured level of divider interference are influenced by layout, grounding and port decoupling. The
measurement results between various applications and the reference board could vary as much as 10 dB.
18) Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has
to be greater than 60 dB for an IF output of 100 dBµV.
19) The reference frequency rejection is the level of reference frequency sidebands (e.g. 62.5 kHz) related to the
carrier. The rejection has to be greater than 60 dB for an IF output of 100 dBµV.
Specification
49
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
4.2
Programming
Table 8
Bit Allocation Read/Write
Name
Byte
Bits
MSB bit6
bit5
bit4
bit3
Ack
bit2
bit1
LSB
Write Data
Address Byte
ADB
1
1
0
0
0
MA1 MA0 R/W=0
A
Divider Byte 1
DB1
0
N14
N13
N12
N11
N10
N9
N8
A
Divider Byte 2
DB2
N7
N6
N5
N4
N3
N2
N1
N0
A
Control byte
CB
1
CP
T2
T1
T0
OS
A
P4
P3
P2
P1
P0
A
ATC
AL2
AL1
AL0
0
0
0
0
A
1
1
0
0
0
POR
FL
1
1
AGC
Bandswitch byte BB
Auxiliary byte 1)
AB
RSA RSB
Read data
Address byte
ADB
Status byte
SB
MA1 MA0 R/W=1
A2
A1
A0
A
A
1) AB replaces BB when T2, T1, T0 = 0, 1, 1, see Table 11 Test modes on page 51.
Table 9
Symbol
A
Description of Symbols
Description
Acknowledge
MA0, MA1
Address selection bits, see Table 10 Address selection on page 51
N14 to N0
programmable divider bits:
N = 214 x N14 + 213 x N13 + ... + 23 x N3 + 22 x N2 + 21 xN1 + N0
CP
charge pump current bit:
bit = 0: charge pump current = 50 µA or 125 µA
bit = 1: charge pump current = 250 µA (default) or 650 µA,
see Table 15 Charge pump current on page 53
T0, T1, T2
test bits, see Table 11 Test modes on page 51
RSA, RSB
reference divider bits, see Table 12 Reference divider ratios on page 52
OS
tuning amplifier control bit:
bit = 0: enable VT; bit = 1: disable VT (default)
P0, P1, P2, PNP ports control bits
P3
bit = 0: Port is inactive, high impedance state (default)
bit = 1: Port is active, VOUT= VCC-VCESAT
Specification
50
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
P4
NPN port control bit
bit = 0: Port is inactive, high impedance state (default)
bit = 1: Port is active, VOUT= VCESAT
ATC
AGC time constant bit
bit = 0: IAGC=300 nA; ∆t=2s with C=160 nF (default)
bit = 1: IAGC=9 µA; ∆t=50ms with C=160 nF
AL0, AL1,
AL2
AGC take-over point bits, see Table 13 AGC take-over point on page 52
POR
Power-on reset flag; POR =1 at power-on
FL
PLL lock flag; bit = 1: loop is locked
AGC
internal AGC flag. AGC=1 when internal AGC is active (level below 3V)
A0, A1, A2 digital output of the 5-level ADC
Table 10
Address selection
Voltage at AS
MA1
MA0
(0 to 0.1) x VCC
0
0
open circuit or (0.2 to 0.3) x VCC
0
1
(0.4 to 0.6) x VCC
1
0
(0.9 to 1) x VCC
1
1
Table 11
Test modes
Mode
T2
T1
T0
Normal mode, charge pump currents 50 and 250 µA selectable
0
0
0
Normal mode, charge pump currents 50 and 250 µA selectable
(default)
0
0
1
CP is in high-impedance state
0
1
0
byte AB will follow (otherwise byte BB will follow)
0
1
1
P0 = fdiv output, P1 = fref output
1
0
0
not in use
1
0
1
Extended mode, charge pump currents 50 and 250 µA selectable
1
1
0
Extended mode, charge pump currents 125 and 650 µA selectable
1
1
1
Specification
51
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
Table 12
Reference divider ratios
fref1)
Mode
T2
T1
RSA
RSB
80
50 kHz
normal
0
0
0
0
128
31.25 kHz
normal
0
0
0
1
24
166.67 kHz
x
x
x
1
0
64
62.5 kHz
x
x
x
1
1
32
125 kHz
extended
1
1
0
0
28
142.86 kHz
extended
1
1
0
1
Reference divider ratio
1) With a 4 MHz quartz.
Table 13
AGC take-over point
IF output level,
Remark
symmetrical mode
AL2
AL1
AL0
115 dBµV
0
0
0
115 dBµV
0
0
1
112 dBµV
0
1
0
109 dBµV
default mode at POR
0
1
1
106 dBµV
1
0
0
103 dBµV
1
0
1
1
1
0
1
1
1
IAGC = 0
3.8 V
External AGC
Disabled
1)
2)
1) The AGC detector is disabled. Both the sinking and sourcing current from the IC is disabled. The AGC output
goes into a high impedance state and an external AGC source can be connected in parallel and will not be
influenced.
2) The AGC detector is disabled.
Specification
52
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
Table 14
A to D converter levels
Voltage at ADC
A2
A1
A0
(0 to 0.15) * VCC
0
0
0
(0.15 to 0.3) * VCC
0
0
1
(0.3 to 0.45) * VCC
0
1
0
(0.45 to 0.6) * VCC
0
1
1
(0.6 to 1) * VCC
1
0
0
1) No erratic codes in the transition.
Table 15
Charge pump current
Charge pump current
Mode
50 µA
CP
T2
T1
x1)
0
250 µA (default)
normal
50 µA
1
0
0
0
125 µA
extended
250 µA
650 µA
0
1
T0
x
0
1
1
1
1
0
1
1) x = don‘t care.
Table 16
Internal band selection
Band
Mixer
LOW
P0.P1
1)
Oscillator
P0.P1
MID
P1.P0
P1.P0
HIGH (default)
P0.P1
P0.P1
Power down mode
P0, P1
P0, P1
1) Means: (P0 AND NOT P1); that is: LOW mixer is switched on if (P0=1 and P1=0).
Specification
53
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
Table 17
Defaults at power-on reset
Name
Byte
Bits
MSB
bit6
bit5
bit4
bit3
bit2
bit1
LSB
Write Data
Address Byte
ADB
1
1
0
0
0
MA1
MA0
R/W=0
Divider byte 1
DB1
0
x1)
x
x
x
x
x
x
Divider byte 2
DB2
x
x
x
x
x
x
x
x
Control byte
CB
1
1
0
0
1
x
x
1
Bandswitch byte
BB
0
0
0
0
0
0
0
0
Auxiliary byte
AB
0
0
1
0
1) x = don‘t care.
Table 18
Mode
Description of modes
Description
normal
Reference divider ratios 24, 64, 80, 128 selectable.
Charge pump currents 50, 250 µA selectable.
Auxiliary byte to follow Control byte (T2=0, T1=1, T0=1),
otherwise Bandswitch byte to follow
Control byte.
extended
Reference divider ratios 24, 28, 32, 64 selectable.
Charge pump currents 50, 125, 250, 650 µA selectable.
Auxiliary byte to follow Control byte (T2=0, T1=1, T0=1),
otherwise Bandswitch byte to follow
Control byte.
Specification
54
V 2.51, 2006-01-11
1
1
Specification
55
ADB= address byte
DB1= prog. divider byte 1
DB2= prog. divider byte 2
CB= Control byte
BB= Bandswitch byte
AB= Auxiliary byte
Start-ADB-DB1-DB2-CB-AB-Stop
Start-ADB-CB-BB-DB1-DB2-Stop
Start-ADB-CB-AB-DB1-DB2-Stop
Start-ADB-DB1-DB2-Stop
Start-ADB-CB-BB-Stop
Start-ADB-CB-AB-Stop
Stop= stop condition
Start= start condition
Ack. 3rd
Start-ADB-DB1-DB2-CB-BB-Stop
Ack. 2nd
Abbreviations:
Ack. 1st
Telegram examples:
SCL
M MA R/
Addressing
Ack. 4th
Ack.
Stop
4.3
Note:
Start
TUA6034, TUA6036
TAIFUN
Reference
I2C Bus Timing Diagram
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
4.4
Electrical Diagrams
4.4.1
Input admittance (S11) of the LOW band mixer (40 to 150 MHz)
0.8
2
0.5
0.6
0.7
1
1.5
0.9
Y0 = 20mS
0.4
3
0.3
4
0.2
5
0.1
10
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1
0.9
0.8
1.5
2
3
4
5
10
20
20
150MHz
0
20
10
0.1
5
0.2
4
0.3
3
0.7
0.8
0.9
1
1.5
0.6
2
0.5
0.4
4.4.2
Input impedance (S11) of the MID band mixer (150 to 455 MHz)
1.5
1
0.9
0.8
0.5
2
0.6
0.7
Z0 = 50 Ω
0.4
3
0.3
4
5
0.2
10
455 MHz
20
10
5
4
3
2
1.5
20
0.8
0.9
1
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.1
0
150 MHz
20
0.1
10
0.2
5
4
0.3
3
Specification
1.5
1
0.9
0.8
0.7
0.6
2
0.5
0.4
56
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
4.4.3
Input impedance (S11) of the HIGH band mixer (450 to 865 MHz)
1.5
1
0.9
0.8
0.5
2
0.6
0.7
Z0 = 50 Ω
0.4
3
0.3
4
5
0.2
865 MHz
10
450 MHz
0.1
20
10
5
4
3
2
1.5
0.8
0.9
1
0.7
0.6
0.5
0.4
0.3
0.2
0.1
20
0
20
0.1
10
0.2
5
4
0.3
3
4.4.4
1.5
1
0.9
0.8
0.7
0.6
2
0.5
0.4
Output admittance (S22) of the of the mixers (30 to 50 MHz)
0.8
2
0.5
0.6
0.7
0.9
1.5
1
Y0 = 20ms
0.4
3
0.3
4
0.2
5
0.1
10
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1
0.9
0.8
1.5
2
3
4
5
10
20
20
0
38.9 MHz
20
10
0.1
5
0.2
4
0.3
3
57
0.7
0.8
0.9
1
1.5
0.6
2
0.5
0.4
Specification
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
4.4.5
Input impedance (S11) of the IF amplifier (30 to 50 MHz)
1
0.9
0.5
2
0.6
1.5
0.7
0.8
Z0 = 50 Ω
0.4
3
0.3
4
5
0.2
10
0.1
10
5
4
3
2
1.5
0.8
0.9
1
0.7
0.6
0.5
0.4
0.3
0.2
20
20
0.1
20
0
38.9 MHz
0.1
10
0.2
5
4
0.3
3
4.4.6
1
0.9
0.8
0.7
1.5
0.6
2
0.5
0.4
Output impedance (S22) of the IF amplifier (30 to 50 MHz)
1.5
1
0.9
0.8
0.5
2
0.6
0.7
Z0 = 50 Ω
0.4
3
0.3
4
5
0.2
10
0.1
20
20
10
5
4
3
2
1.5
0.8
0.9
1
0.7
0.6
0.5
0.4
0.3
0
0.2
0.1
38.9 MHz
20
0.1
10
0.2
5
4
0.3
3
Specification
1.5
1
0.9
0.8
0.7
0.6
2
0.5
0.4
58
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
4.5
Measurement Circuits
4.5.1
Gain (GV) measurement in LOW band
LOWIN IFOUT
50 Ω
Vmeas
50 Ω
V
RMS
Voltmeter
Vi
Device
under
Test
Transformer
N1
V0
N2
C
50 Ω
spectrum
analyser
V'meas
IFOUT
N1 : N2 = 10 : 2 turns
Gain (GV) measurement in LOW band
Figure 12
•
•
•
•
Zi >> 50 Ω => Vi = 2 x Vmeas = 80 dBµV
Vi = Vmeas + 6dB = 80 dBµV
V0 = V’meas + 16 dB (transformer ratio N1:N2 and transformer loss)
Gv = 20 log(V0 / Vi)
4.5.2
Gain (GV) measurement in MID and HIGH bands
MIDIN
IFOUT
HIGHIN
50 Ω
Vmeas
RMS
Voltmeter
V
50 Ω
Vi
Balun
1:1
Device
under
Test
Transformer
N1
N2
V0
C
V'meas
MIDIN
IFOUT
HIGHIN
50 Ω
spectrum
analyser
N1 : N2 = 10 : 2 turns
Figure 13
•
•
•
Gain (GV) measurement in MID and HIGH bands
Vi = Vmeas = 70 dBµV
V0 = V’meas + 16 dB (transformer ratio N1:N2 and transformer loss
Gv = 20 log(V0 / Vi) + 1 dB (1 dB = insertion loss of balun)
Specification
59
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
4.5.3
Matching circuit for optimum noise figure in LOW band
15p
22p
1n
1n
In
In
Out
Out
7 turns
wire Ε 0.5 mm
coil Ε 5.5 mm
22p
50 Ω semi rigid cable
300 mm long
96 pF/m
33dB/100m
22p
Figure 14
Matching circuit for optimum noise figure in LOW band
For fRF = 50 MHz
For fRF = 150 MHz
loss = 0 dB
loss = 1.3 dB
image suppression = 16 dB
image suppression = 13 dB
4.5.4
Noise figure (NF) measurement in LOW band
Noise
Source
IN
OUT
Matching
Circuit
LOWIN IFOUT
Transformer
Device
under
Test
N1
N2
Noise
Figure
Meter
C
IFOUT
N1 : N2 = 10 : 2 turns
NF = NFmeas - loss of matching circuit (dB)
Figure 15
Specification
Noise figure (NF) measurement in LOW band
60
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
4.5.5
Noise figure (NF) measurement in MID and HIGH bands
Noise
Source
MIDIN
IFOUT
HIGHIN
Balun
1:1
Noise
Figure
Meter
Transformer
Device
under
Test
N1
N2
C
MIDIN
IFOUT
HIGHIN
N1 : N2 = 10 : 2 turns
loss of balun = 1 dB
NF = NFmeas - loss of balun (dB)
Figure 16
4.5.6
Noise figure (NF) measurement in MID and HIGH bands
Cross modulation measurement in LOW band
Vmeas
V
50 Ω
RMS
Voltmeter
unwanted
signal source
AM = 80 %, 1 kHz
A
C
LOWIN IFOUT
Hybrid
50 Ω
B
wanted
signal
source
Figure 17
•
•
•
•
D
Vi
Device
under
Test
N1
N2
38.9 MHz
V0
C
V
V'meas
IFOUT
N1 : N2 = 10 : 2 turns
50 Ω
18 dB
attenuator
Transformer
50 Ω
50 Ω
modulation
analyser
RMS
Votmeter
Cross modulation measurement in LOW band
Zi >> 50 Ω => Vi = 2 x Vmeas
V’meas = V0 - 16 dB (transformer ratio N1:N2 and transformer loss)
wanted output signal at fpix, Vo = 100 dBµV
unwanted output signal at fsnd
Specification
61
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Reference
4.5.7
Cross modulation measurement in MID and HIGH bands
Vmeas
50 Ω
V
RMS
Voltmeter
unwanted
signal source
AM = 80 %, 1 kHz
A
MIDIN
IFOUT
HIGHIN
C
50 Ω
Hybrid
Vi
50 Ω
B
wanted
signal
source
Figure 18
•
•
•
Device
under
Test
Balun
1:1
Transformer
N1
18 dB
attenuator
N2
38.9 MHz
V0
C
V
V'meas
MIDIN
HIGHIN IFOUT
D
N1 : N2 = 10 : 2 turns
50 Ω
50 Ω
modulation
analyser
RMS
Votmeter
Cross modulation measurement in MID and HIGH bands
V’meas = V0 - 16 dB (transformer ratio N1:N2 and transformer loss)
wanted output signal at fpix, Vo = 100 dBµV
unwanted output signal at fsnd
4.5.8
Ripple susceptibility measurement
Vsupply
10 µF
6k8
50 Ω
BC847B
to application
board
10 µF
500 kHz sine
Vripple
50 Ω
VCC + V ripple
Circuit to superimpose a 500 kHz ripple on VCC
Figure 19
Specification
Ripple susceptibility measurement
62
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Package Outlines
5
Package Outlines
5.1
Package TSSOP-38
Figure 20
PG-TSSOP-38 Vignette
Figure 21
PG-TSSOP-38 Outline Drawing
Specification
63
V 2.51, 2006-01-11
TUA6034, TUA6036
TAIFUN
Package Outlines
5.2
Package VQFN-48
Figure 22
PG-VQFN-48 Vignette
Figure 23
PG-VQFN-48 Outline Drawing
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
SMD = Surface Mounted Device
Specification
64
V 2.51, 2006-01-11
w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG