TI SN761662

SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
Low-Phase-Noise Mixer/Oscillator and PLL
Synthesizer
VHF-L, VHF-H, UHF Three-Band Local
Oscillator
I2C Bus Protocol (Bidirectional Data
Transmission)
30-V Tuning Voltage Output
Four NPN-Type Band-Switch Drivers
One Auxiliary-Port, Five-Level ADC
RF AGC Detector Circuit
Crystal Oscillator Output
Programmable Reference Divider Ratio
(24/28/50/64/80/128)
Standby Mode
5-V Power Supply
38-Pin TSSOP Package
APPLICATIONS
•
•
•
Digital TV
Digital CATV
Set-Top Box
DBT PACKAGE
(TOP VIEW)
VLO OSC B
VLO OSC C
OSC GND
VHI OSC B
VHI OSC C
UHF OSC B1
UHF OSC C1
UHF OSC C2
UHF OSC B2
IF GND
IF OUT1
IF OUT2
VCC
CP
VTU
P5/ADC
XTAL1
XTAL2
XTALOUT
1
38
2
37
3
36
4
35
5
34
6
33
7
32
8
9
31
30
10
29
11
28
12
27
13
26
14
25
15
24
16
23
17
22
18
21
19
20
UHF RF IN2
UHF RF IN1
VHI RF IN
VLO RF IN
BS4
RF GND
MIXOUT2
MIXOUT1
NC
BUS GND
RF AGC
AGC FIL2
AGC FIL1
BS3
BS2
BS1
SDA
SCL
AS
P0034-02
DESCRIPTION
The SN761662 is a low-phase-noise synthesized
tuner IC designed for digital TV tuning systems. The
circuit consists of a PLL synthesizer, three-band local
oscillator and mixer, 30-V output tuning amplifier, four
NPN band-switch drivers, and is available in a
small-outline package. A 15-bit programmable
counter and reference divider are controlled by I2C
bus protocol. Tuning step frequency is selectable by
this reference divider ratio for a crystal oscillator.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
MIXOUT1 and MIXOUT2 (pins 31 and 32) withstand 1.5 kV, and all other pins withstand 2 kV, according
to the human body model (1.5 kΩ, 100 pF).
VHF-L
Osc
VHF-H
Osc
IF GND
MIX OUT1
MIX OUT2
UHF OSC B2
UHF OSC C2
UHF OSC B1
UHF OSC C1
VHI OSC C
VHI OSC B
OSC GND
VLO OSC C
VLO OSC B
Functional Block Diagram
IF
Amp
UHF
Osc
IF OUT1
IF OUT2
VLO RF IN
VHF-L
Mixer
VHF-H
Mixer
AGC FIL1
RF
AGC
Detect
UHF
Mixer
AGC FIL2
RF AGC
VHI RF IN
VCC
UHF RF IN1
N.C.
UHF RF IN2
CP
Programmable
Divider
VTU
RF GND
XTAL1
XTAL2
Op
Amp
XTAL
Osc
128/80/64/50/
28/24 Div
Phase
Detector
Charge
Pump
XTAL OUT
NPN Band Switch Port
SCL
SDA
2
I C Bus
Interface
AS
BS1
BS2
BS3
BS4
5-Level
ADC
P5/ADC
BUS GND
B0089-01
2
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
Pin Assignments
Pin Description
TERMINAL
NAME
DESCRIPTION
NO.
SCHEMATIC
AGC FIL1
26
Additional peak-hold capacitor pin
Figure 1
AGC FIL2
27
RF AGC LPF capacitor pin
Figure 1
AS
20
Address selection input
Figure 2
BS1
23
Band-switch1 output
Figure 3
BS2
24
Band-switch2 output
Figure 3
BS3
25
Band-switch3 output
Figure 3
BS4
34
Band-switch4 output
Figure 3
BUS GND
29
Serial bus/band-switch ground
CP
14
Charge pump output
IF GND
10
IF ground
IF OUT1
11
IF amplifier output
Figure 5
IF OUT2
12
IF amplifier output
Figure 5
MIX OUT1
31
Mixer output
Figure 6
MIX OUT2
32
Mixer output
Figure 6
N.C.
30
No connection
OSC GND
3
Oscillator ground
P5/ADC
16
Port 5 output/ADC input
Figure 7
RF AGC
28
RF AGC output
Figure 8
RF GND
33
RF ground
SCL
21
Serial clock input
Figure 9
SDA
22
Serial data input/output
Figure 10
UHF OSC B1
6
UHF oscillator base1
Figure 11
UHF OSC B2
9
UHF oscillator base2
Figure 11
UHF OSC C1
7
UHF oscillator collector1
Figure 11
UHF OSC C2
8
UHF oscillator collector2
Figure 11
UHF RFIN1
37
UHF RF input
Figure 12
UHF RFIN2
38
UHF RF input
Figure 12
VCC
13
Supply voltage for mixer/oscillator/PLL: 5 V
VHI OSC B
4
VHF HIGH oscillator base
Figure 13
VHI OSC C
5
VHF HIGH oscillator collector
Figure 13
VHI RFIN
36
VHF-H RF input
Figure 14
VLO OSC B
1
VHF LOW oscillator base
Figure 15
VLO OSC C
2
VHF LOW oscillator collector
Figure 15
VLO RFIN
35
VHF-L RF input
Figure 18
VTU
15
Tuning voltage amplifier output
Figure 4
XTAL1
17
4-MHz crystal oscillator output
Figure 16
XTAL2
18
4-MHz crystal oscillator input
Figure 16
XTALOUT
19
4-MHz oscillator output
Figure 17
Figure 4
3
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
27
30 W
25 W
3 kW
25 kW
20
26
20 pF
S0136-01
S0139-01
Figure 1.
Figure 2.
15
23
10 W
24
14
25
50 kW
34
S0138-01
S0132-01
Figure 3.
Figure 4.
31
20 W
25 W
32
25 W
11
12
25 W
25 W
S0131-01
S0141-01
Figure 5.
4
Figure 6.
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
55 W
25 W
1 kW
28
16
S0140-01
S0133-01
Figure 7.
Figure 8.
1 kW
25 W
21
1 kW
22
S0136-02
S0137-01
Figure 9.
Figure 10.
37
8
7
9
6
3 kW
38
3 kW
S0142-03
S0130-01
Figure 11.
Figure 12.
5
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
4
36
3 kW
5
3 kW
3 kW
S0142-02
S0129-02
Figure 13.
Figure 14.
18
17
1
20 W
10 W
2
3 kW
3 kW
50 kW
S0134-01
S0129-01
Figure 15.
Figure 16.
35
3 kW
25 W
19
S0142-01
S0135-01
Figure 17.
6
Figure 18.
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
Supply voltage, VCC (2)
VCC
–0.4 V to 6.5 V
Input voltage 1, VGND (2)
RF GND, OSC GND, BUS GND
–0.4 V to 0.4 V
Input voltage 2, VVTU (2)
VTU
–0.4 V to 35 V
Other pins
–0.4 V to 6.5 V
Input voltage 3, VIN
(2)
TA ≤ 25°C
Continuous total dissipation, PD (3)
1276 mW
Operating free-air temperature, TA
–20°C to 85°C
Storage temperature range, Tstg
–65°C to 150°C
Maximum junction temperature, TJ
150°C
Maximum short-circuit time, tSC(max)
(1)
(2)
(3)
Each pin to VCC or to GND
10 s
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Voltage values are with respect to the IF GND of the circuit.
Derating factor is 10.2 mW/°C for TA ≥ 25°C.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
Supply voltage, VCC
4.5
Tuning supply voltage, VTU
Output current of band switch, IBS
One band switch on
Output current of port 5, IP5
Operating free-air temperature, TA
–20
NOM
MAX
UNIT
5
5.5
30
33
V
10
mA
–5
mA
85
°C
V
7
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
ELECTRICAL CHARACTERISTICS, Total Device and Serial Interface
VCC = 4.5 V to 5.5 V, TA = –20°C to 85°C, unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
ICC1
Supply current 1
ICC2
Supply current 2
One band switch on (IBS = 10 mA)
ICC-STBY
Standby supply current
STBY = 1
VIH
High-level input voltage (SCL, SDA)
VIL
Low-level input voltage (SCL, SDA)
IIH
High-level input current (SCL, SDA)
IIL
Low-level input current (SCL, SDA)
–10
VPOR
Power-on-reset supply voltage
(threshold of supply voltage between
reset and operation mode)
2.1
TYP
MAX
UNIT
75
mA
87
mA
8
mA
2.3
V
1.35
V
10
µA
µA
2.8
3.5
V
I2C INTERFACE
VASH
Address-select high-input voltage
(AS)
VCC = 5 V
4.5
5
V
VASM1
Address-select mid-input1 voltage
(AS)
VCC = 5 V
2
3
V
VASM2
Address-select mid-input2 voltage
(AS)
VCC = 5 V
1
1.5
V
VASL
Address-select low-input voltage
(AS)
VCC = 5 V
0.5
V
IASH
Address-select high-input current
(AS)
10
µA
IASL
Address-select low-input current
(AS)
VADC
ADC input voltage
See Table 10
IADH
ADC high-level input current
VADC = VCC
IADL
ADC low-level input current
VADC = 0 V
VOL
Low-level output voltage (SDA)
VCC = 5 V, IOL = 3 mA
0.4
V
lSDAH
High-level output leakage current
(SDA)
VSDA = 5.5 V
10
µA
fSCL
Clock frequency (SCL)
400
kHz
tHD-DAT
Data hold time
0
µs
tBUF
Bus free time
1.3
µs
tHD-STA
Start hold time
0.6
µs
tLOW
SCL-low hold time
0.6
µs
tHIGH
SCL-high hold time
0.6
µs
tSU-STA
Start setup time
0.6
µs
tSU-DAT
Data setup time
0.1
µs
tr
SCL, SDA rise time
0.3
µs
tf
SCL, SDA fall time
0.3
µs
tSU-STO
Stop setup time
8
µA
–10
0
V
10
µA
µA
–10
100
See timing chart, Figure 19
VCC
0.6
µs
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
ELECTRICAL CHARACTERISTICS, PLL and Band Switch
VCC = 4.5 V to 5.5 V, TA = –20°C to 85°C, unless otherwise noted
PARAMETER
TEST CONDITIONS
N
Divider ratio
15-bit frequency word
fXTAL
Crystal oscillator frequency
RXTAL = 25 Ω to 300 Ω
ZXTAL
Crystal oscillator input impedance
VXLO
XTALOUT output voltage
Load = 10 pF/5.1 kΩ, VCC = 5 V,
TA = 25°C
VVTUL
Tuning amplifier low-level output
voltage
RL = 20 kΩ, VTU = 33 V
IVTUOFF
Tuning amplifier leakage current
Tuning amplifier = off, VTU = 33 V
ICP11
ICP10
ICP01
Charge-pump current
ICP00
Band-switch port sink current
(P5/ADC)
VP5ON
Band-switch port output voltage
(P5/ADC)
0.3
70
Band-switch driver output current
(BS1–BS4)
IP5
Vp-p
CP[1:0] = 00
IBS
Band-switch driver leakage current
(BS1–BS4)
0.37
140
VCP = 2 V, TA = 25°C
IBS = 10 mA
IBS = 10 mA, VCC = 5 V, TA = 25°C
MHz
kΩ
300
PLL locked
IBSOFF
0.2
0.46
V
10
µA
µA
1.95
–15
V
15
nA
10
mA
3
3.5
UNIT
1.6
CP[1:0] = 01
Charge-pump leakage current
Band-switch driver output voltage
(BS1–BS4)
4
CP[1:0] = 10
Charge-pump output voltage
MAX
32767
600
ICPOFF
VBS2
TYP
512
CP[1:0] = 11
VCP
VBS1
MIN
V
3.9
VBS = 0 V
IP5 = –2 mA, VCC = 5 V, TA = 25°C
8
µA
–5
mA
0.6
V
ELECTRICAL CHARACRTERISTICS, RF AGC
VCC = 5 V, TA = 25°C, measured in Figure 20 reference measurement circuit at 50-Ω system, IF = 44 MHz, IF filter
characteristics: fpeak = 44 MHz, unless otherwise noted
PARAMETER
IOAGC0
IOAGC1
RF AGC output current
TEST CONDITIONS
MIN
TYP
900
nA
ATC = 1
9
µA
T1/ATSS = 0, ATP[2:0] = 000
117
VAGCSP01
T1/ATSS = 0, ATP[2:0] = 001
114
VAGCSP02
T1/ATSS = 0, ATP[2:0] = 010
111
VAGCSP03
T1/ATSS = 0, ATP[2:0] = 011
108
VAGCSP04
T1/ATSS = 0, ATP[2:0] = 100
105
VAGCSP05
T1/ATSS = 0, ATP[2:0] = 101
102
VAGCSP06
T1/ATSS = 0, ATP[2:0] = 110
99
T1/ATSS = 1, ATP[2:0] = 000
112
VAGCSP11
T1/ATSS = 1, ATP[2:0] = 001
109
VAGCSP12
T1/ATSS = 1, ATP[2:0] = 010
106
VAGCSP13
T1/ATSS = 1, ATP[2:0] = 011
103
VAGCSP14
T1/ATSS = 1, ATP[2:0] = 100
100
VAGCSP15
T1/ATSS = 1, ATP[2:0] = 101
97
VAGCSP16
T1/ATSS = 1, ATP[2:0] = 110
94
Start-point IF output level
UNIT
ATC = 0
VAGCSP00
VAGCSP10
MAX
dBµV
9
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
ELECTRICAL CHARACTERISTICS, Mixer, Oscillator, IF Amplifier
VCC = 5 V, TA = 25°C, measured in Figure 20 reference measurement circuit at 50-Ω system, IF = 44 MHz, IF filter
characteristics: fpeak = 44 MHz (unless otherwise noted)
PARAMETER
Gc1
Gc3
Gc4
Gc6
Gc7
Gc9
NF1
NF4
NF7
35
(1)
Conversion gain (mixer-IF amplifier), fin = 473 MHz
VHF-UHF
fin = 864 MHz (1)
35
CM1
CM3
CM4
CM6
CM7
CM9
VIFO1
9
fin = 177 MHz
9
fin = 467 MHz
9
fin = 473 MHz
12
fin = 864 MHz
12
1% cross-modulation distortion,
VHF-LOW
fin = 57 MHz (2)
79
MHz (2)
79
1% cross-modulation distortion,
VHF-HIGH
fin = 177 MHz (2)
79
fin = 467 MHz (2)
79
fin = 473 MHz (2)
77
fin = 864 MHz (2)
77
fin = 57 MHz
117
fin = 171 MHz
117
fin = 177 MHz
117
fin = 467 MHz
117
fin = 473 MHz
117
fin = 864 MHz
117
ΦPLVL11
fin = 57 MHz, offset = 1 kHz (3)
–90
ΦPLVL12
fin = 57 MHz, offset = 10 kHz (4)
–95
kHz (5)
–85
VIFO3
VIFO4
VIFO6
VIFO7
VIFO9
ΦPLVL31
IF output voltage, VHF-LOW
IF output voltage, VHF-HIGH
IF output voltage, UHF
Phase noise, VHF-LOW
fin = 171 MHz, offset = 1
ΦPLVL32
fin = 171 MHz, offset = 10 kHz (4)
–95
ΦPLVL41
fin = 177 MHz, offset = 1 kHz (3)
–85
ΦPLVL42
ΦPLVL61
Phase noise, VHF-HIGH
fin = 177 MHz, offset = 10
kHz (4)
–90
fin = 467 MHz, offset = 1 kHz (5)
–77
ΦPLVL62
fin = 467 MHz, offset = 10 kHz (4)
–90
ΦPLVL71
fin = 473 MHz, offset = 1 kHz (3)
–80
ΦPLVL72
ΦPLVL91
ΦPLVL92
(1)
(2)
(3)
(4)
(5)
10
Phase noise, UHF
dB
dB
dB
35
9
1% cross-modulation distortion, UHF
UNIT
35
fin = 171 MHz
fin = 171
MAX
35
fin = 57 MHz
Noise figure, UHF
NF9
TYP
(1)
Conversion gain (mixer-IF amplifier), fin = 177 MHz
VHF-HIGH
fin = 467 MHz (1)
Noise figure, VHF-HIGH
NF6
MIN
35
Noise figure, VHF-LOW
NF3
TEST CONDITIONS
(1)
Conversion gain (mixer-IF amplifier), fin = 57 MHz
VHF-LOW
fin = 171 MHz (1)
fin = 473 MHz, offset = 10
kHz (4)
–85
fin = 864 MHz, offset = 1 kHz (5)
–77
fin = 864 MHz, offset = 10 kHz (4)
–90
RF input level = 70 dBµV, differential output
fundes = fdes ±6 MHz, Pin = 80 dBµV, AM 1 kHz, 30%, DES/CM = S/I = 46 dB
CP[1:0] = 10 (CP current 350 µA), RS[2:0] = 011 (reference divider 64)
CP[1:0] = 00 (CP current 70 µA), RS[2:0] = 100 (reference divider 128)
CP[1:0] = 11 (CP current 600 µA), RS[2:0] = 100 (reference divider 128)
dB
dB
dB
dBµV
dBµV
dBµV
dBµV
dBµV
dBµV
dBc/Hz
dBc/Hz
dBc/Hz
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
Functional Description
I2C Bus Mode
I2C Write Mode (R/W = 0)
Table 1. Write Data Format
MSB
(1)Address
byte (ADB)
LSB
1
1
0
0
0
MA1
MA0
R/W = 0
A
Divider byte 1 (DB1)
0
N14
N13
N12
N11
N10
N9
N8
A
Divider byte 2 (DB2)
N7
N6
N5
N4
N3
N2
N1
N0
A
Control byte 1 (CB1)
1
0
ATP2
ATP1
ATP0
RS2
RS1
RS0
A
CP1
CP0
0
P5
BS4
BS3
BS2
BS1
A
1
1
ATC
STBY
T3
T2
T1/ATSS
T0/XLO
A
Band-switch byte (BB)
Control byte 2 (CB2)
(1)
A: Acknowledge
Table 2. Description of Data Symbols
SYMBOL
DESCRIPTION
MA[1:0]
Address-set bits (see Table 3, Address Selection)
N[14:0]
Programmable counter set bits
DEFAULT
N14 = N13 = N12 = ... = N0 = 0
N = N14 × 214 + N13 × 213 + ... + N1 × 2 + N0
CP[1:0]
Charge-pump current-set bit
CP = 1
T[2:0}
RF AGC start-point control bits (see Table 4, RF AGC Start Point)
ATP[2:0] = 011
RSA, RSB
Reference divider ratio-selection bits (see Table 5, Reference Divider Ratio)
RSA = 0, RSB = 1
OS
Tuning amplifier control bit
OS = 0
60 µA (CP = 0); 280 µA (CP = 1)
Tuning voltage on (OS = 0)
Tuning voltage off, high impedance (OS = 1)
BS[4:1]
Band-switch control bits
BSn = 0: OFF
BSn = 0
BSn = 1: ON
Band selection by BS[1:2]
X
BS1
BS2
1
0
0
1
0
1
0
1
VHF-LO
VHF-HI
UHF
Reserved
Don't care
11
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
Table 3. Address Selection
MA1
MA0
Voltage Applied on AS Input
0
0
0 V to 0.1 VCC
0
1
OPEN, or 0.2 VCC to 0.3 VCC
1
0
0.4 VCC to 0.6 VCC
1
1
0.9 VCC to VCC
Table 4. RF AGC Start Point
T1/ATSS
ATP2
ATP1
ATP0
IFOUT Level, dBµV
0
0
0
0
117
0
0
0
1
114
0
0
1
0
111
0
0
1
1
108
0
1
0
0
105
0
1
0
1
102
0
1
1
0
99
0
1
1
1
Disabled
1
0
0
0
112
1
0
0
1
109
1
0
1
0
106
1
0
1
1
103
1
1
0
0
100
1
1
0
1
97
1
1
1
0
94
1
1
1
1
Disabled
Table 5. Reference Divider Ratio
RS2
RS1
RS0
Reference Divider Ratio
0
0
0
24
0
0
1
28
0
1
0
50
0
1
1
64
1
0
0
128
1
X
1
80
Table 6. Charge Pump Current
12
CP1
CP0
Charge Pump Current, µA
0
0
70
0
1
140
1
0
350
1
1
600
SN761662
DTV TUNER IC
www.ti.com
SLES161 – NOVEMBER 2005
Table 7. Test Bits/XTALOUT Control
(1)
(1)
T3
T2
T1/ATSS
T0/XLO
Device Operation
XTALOUT 4-MHz Output
0
0
X
0
Normal operation
Enabled
0
0
X
1
Normal operation
Disabled
X
1
X
X
Test mode
Not available
1
X
X
X
Test mode
Not available
RFAGC and XTALOUT are not available in test mode.
Example I2C Data Write Sequences
Telegram examples:
Start-ADB-DB1-DB2-CB1-BB-CB2-Stop
Start-ADB-DB1-DB2-Stop
Start-ADB-CB1-BB-CB2-Stop
Start-ADB-CB1-BB-Stop
Start-ADB-CB2-Stop
Abbreviations:
ADB: Address byte
BB: Band-switch byte
CB1: Control byte 1
CB2: Control byte 2
DB1: Divider byte 1
DB2: Divider byte 2
Start: Start condition
Stop: Stop condition
I2C Read Mode (R/W = 1)
Table 8. Read Data Format (A: Acknowledge)
MSB
Address byte (ADB)
Status byte (SB)
LSB
1
1
0
0
0
MA1
MA0
R/W = 1
A
POR
FL
1
1
X
A2
A1
A0
–
Table 9. Description of Data Symbols
SYMBOL
DESCRIPTION
MA[1:0]
Address set bits (see Table 3, Address Selection)
POR
Power-on-reset flag
DEFAULT
POR = 1
POR set: power on
POR reset: end-of-data transmission procedure
FL
In-lock flag
PLL locked (FL = 1), unlocked (FL = 0)
A[2:0]
Digital data of ADC (see Table 10, ADC Level)
Bit P5 must be set to 0.
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SLES161 – NOVEMBER 2005
Table 10. ADC Level (1)
(1)
A2
A1
A0
Voltage Applied on ADC Input
1
0
0
0.6 VCC to VCC
0
1
1
0.45 VCC to 0.6 VCC
0
1
0
0.3 VCC to 0.45 VCC
0
0
1
0.15 VCC to 0.3 VCC
0
0
0
0 V to 0.15 VCC
Accuracy is 0.03 × VCC.
t(High)
tr
t(Low)
SCL
thd(STA)
tsu(DAT)
tf
thd(DAT )
tsu(STA)
tsu(STO)
SDA
t(BUF)
T0101-01
2
Figure 19. I C Timing Chart
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SLES161 – NOVEMBER 2005
APPLICATION INFORMATION
Reference Measurement Circuit
C4
R1
VC1
C3
C37
C1
R30
C35
38
1
VLO OSC B
UHF RF IN2
VLO OSC C
UHF RF IN1
URF2
C2
L1
37
2
C46
C33
36
3
OSC GND
R2
VC2
C11
VC4
VHI RF IN
35
4
R52
L2
VHIRF
C32
C45
C6
VHI OSC B
VLO RF IN
VHI OSC C
BS4
VLORF
34
5
BS4
C34
C31
C7
VC3
L4
C15
R4
R32
C8
33
6
UHF OSC B1
RF GND
UHF OSC C1
MIXOUT2
32
7
L10
L3
C30
C9
31
8
C12
UHF OSC C2
MIXOUT1
UHF OSC B2
NC
L9
R33
R3
30
9
R5
C10
29
10
C36
IF GND
R41
BUS GND
C13
R15
28
11
IF OUT1
IF OUT1
RF AGC
RFAGC
C29
R21
R42
C14
27
12
IF OUT2
AGC FIL2
C38
C16
VCC
VCC
AGC FIL1
C18
C19
R14
26
13
C28
C17
25
14
CP
BS3
VTU
BS2
P5/ADC
BS1
XTAL1
SDA
BS3
R6
R8
C20
24
15
TU
R9
23
16
C21
BS2
BS1
C22
22
17
P5/ADC
R13
SDA
C27
X1
21
18
XTAL2
R12
SCL
SCL
C26
C23
20
19
XTALOUT
XTALOUT
C24
R10
R11
AS
AS
C25
C39
S0143-01
NOTE: This application information is advisory and a performance-check is required for actual application circuits. TI
assumes no responsibility for the consequences of the use of this circuit nor for any infringement of patent or patent
rights of third parties which may result from its use.
Figure 20. Reference Measurement Circuit
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DTV TUNER IC
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SLES161 – NOVEMBER 2005
APPLICATION INFORMATION (continued)
Component Values for Measurement Circuit
PART NAME
VALUE
PART NAME
VALUE
C1 (VLO OSCB)
1 pF
C39 (XTALOUT)
2.2 nF
C2 (VLO OSCC)
2 pF
C45 (VHI OSC)
7 pF
C3 (VLO OSC)
47 pF
C46 (URF1)
2.2 nF
C4 (VLO OSC)
Open
L1 (VLO OSC)
φ 3,0 mm, 7T, wire 0,32 mm
C6 (VHI OSCC)
5 pF
L2 (VHI OSC)
φ2,0 mm, 3T, wire 0,4 mm
C7 (UHF OSCB1)
1 pF
L3 (UHF OSC)
φ1,8 mm, 3T, wire 0,4 mm
C8 (UHF OSCC1)
1 pF
L4 (UHF OSC)
φ1,8 mm, 3T, wire 0,4 mm
C9 (UHF OSCC2)
1 pF
L9 (MIXOUT)
680 nH (LK1608R68K-T)
C10 (UHF OSCB2)
1 pF
L10 (MIXOUT)
680 nH (LK1608R68K-T)
C11 (VHI OSC)
51 pF
R1 (VLO OSC)
3.3 kΩ
C12 (UHF OSC)
10 pF
R2 (VHI OSC)
3.3 kΩ
C13 (IFOUT)
2.2 nF
R3 (UHF OSC)
2.2 kΩ
C14 (IFOUT)
2.2 nF
R4 (UHF OSC)
1 kΩ
C15 (UHF OSC)
100 pF
R5 (VTU)
3 kΩ
C16 (VCC)
4.7 nF
R6 (CP)
47 kΩ
C17 (CP)
0.01 µF/50 V
R8 (VTU)
20 kΩ
C18 (CP)
22 pF/50 V
R9 (P5/ADC)
Open
C19 (VCC)
2.2 nF
R10 (XTALOUT)
5.1 kΩ
C20 (VTU)
2.2 nF/50 V
R11 (AS)
330 Ω
C21 (P5/ADC)
Open
R12 (SCL)
330 Ω
C22 (XTAL)
27 pF
R13 (SDA)
330 Ω
C23 (XTAL)
27 pF
R14 (VCC)
0
C24 (XTALOUT)
10 pF
R15 (RFAGC)
0
C25 (AS)
Open
R21 (IFOUT)
1 kΩ
C26 (SCL)
Open
R30 (VLO OSC)
10
C27 (SDA)
Open
R32 (UHF OSC)
0
C28 (AGCFIL1)
0.1 µF
R33 (UHF OSC)
0
C29 (RFAGC)
0.15 µF
R41 (IFOUT)
1 kΩ
C30 (MIXOUT)
5 pF
R42 (IFOUT)
0
C31 (MIXOUT)
2.2 nF
R52 (VHI OSC)
3.3 kΩ
C32 (VLORF)
2.2 nF
U1
SN761662
C33 (VHIRF)
2.2 nF
VC1 (VLO OSC)
MA2S374
C34 (VHI OSC)
0.5 pF
VC2 (VHI OSC)
MA2S374
C35 (URF2)
2.2 nF
VC3 (UHF OSC)
MA2S372
C36 (VTU)
Open
VC4 (VHI OSC)
MA2S372
C37 (VTU)
2.2 nF/50 V
X1
4-MHz crystal
C38 (RGCFIL2)
Open
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Test Circuits
DUT
SG
50 W
50 W
VIN
IF OUT1
VLO RF IN
(VHI RF IN)
Spectrum
Analyzer
VOUT Diff
VOUT
IF OUT2
50 W
Gc = 20log(VOUT Diff/VIN)
= 20log(VOUT/VIN) + 6
50 W
S0144-01
Figure 21. VHF-Conversion Gain-Measurement Circuit
DUT
SG
UHF RF IN1
50 W
50 W
VIN
IF OUT1
UHF RF IN2
Spectrum
Analyzer
VOUT Diff
VOUT
IF OUT2
50 W
Gc = 20log(VOUT Diff/VIN)
= 20log(VOUT/VIN) + 6
50 W
S0145-01
Figure 22. UHF-Conversion Gain-Measurement Circuit
NF
Meter
Noise
Source
DUT
B0090-01
Figure 23. Noise-Figure Measurement Circuit
Signal
Generator
fdes: P = 80 dBmV
Signal
Generator
Mix
Pad
fdes ±6 MHz
AM 30%, 1 kHz
DUT
Modulation
Analyzer
B0091-01
Figure 24. 1% Cross-Modulation Distortion Measurement Circuit
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TYPICAL CHARACTERISTICS
Band-Switch Driver Output Voltage (BS1–BS4)
VBS – Band-Switch Driver Output Voltage – V
BS OUTPUT CURRENT
vs
OUTPUT VOLTAGE
5
VCC = 5.5 V
VCC = 5 V
4
VCC = 4.5 V
3
2
1
0
−2
−4
−6
−8 −10 −12 −14 −16 −18 −20
IBS – BS Current – mA
G001
Figure 25. Band-Switch Driver Output Voltage
S-Parameter
1
0
¥
50 MHz
430 MHz
1
M0047-01
Figure 26. VLO RFIN, VHI RFIN
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SLES161 – NOVEMBER 2005
TYPICAL CHARACTERISTICS (continued)
1
0
¥
440 MHz
660 MHz
1
M0047-02
Figure 27. UHF RFIN
1
60 MHz
0
¥
30 MHz
1
M0047-03
Figure 28. IFOUT
19
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