IPB06N03LA IPI06N03LA, IPP06N03LA OptiMOS®2 Power-Transistor Product Summary Features • Ideal for high-frequency dc/dc converters • N-channel V DS 25 V R DS(on),max (SMD version) 5.9 mΩ ID 50 A • Logic level • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance R DS(on) • Superior thermal resistance P-TO263-3-2 P-TO262-3-1 P-TO220-3-1 • 175 °C operating temperature • dv /dt rated Type Package Ordering Code Marking IPB06N03LA P-TO263-3-2 Q67042-S4146 06N03LA IPI06N03LA P-TO262-3-1 Q67042-S4147 06N03LA IPP06N03LA P-TO220-3-1 Q67042-S4148 06N03LA Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 °C1) 50 T C=100 °C 50 Pulsed drain current I D,pulse T C=25 °C2) 350 Avalanche energy, single pulse E AS I D=45 A, R GS=25 Ω 225 Reverse diode dv /dt dv /dt I D=50 A, V DS=20 V, di /dt =200 A/µs, T j,max=175 °C 6 Gate source voltage3) V GS Power dissipation P tot Operating and storage temperature T j, T stg T C=25 °C IEC climatic category; DIN IEC 68-1 Rev. 1.3 Unit A mJ kV/µs ±20 V 83 W -55 ... 175 °C 55/175/56 page 1 2003-12-18 IPB06N03LA IPI06N03LA, IPP06N03LA Parameter Values Symbol Conditions Unit min. typ. max. - - 1.8 minimal footprint - - 62 6 cm2 cooling area4) - - 40 Thermal characteristics Thermal resistance, junction - case R thJC SMD version, device on PCB R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA 25 - - Gate threshold voltage V GS(th) V DS=V GS, I D=40 µA 1.2 1.6 2 Zero gate voltage drain current I DSS V DS=25 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=25 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=30 A - 7.9 9.9 mΩ V GS=4.5 V, I D=30 A, SMD version - 7.6 9.5 V GS=10 V, I D=30 A - 5.2 6.2 V GS=10 V, I D=30 A, SMD version - 4.9 5.9 - 1.2 - Ω 26 52 - S Gate resistance RG Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=30 A 1) Current is limited by bondwire; with an R thJC=1.8 K/W the chip is able to carry 91 A. 2) See figure 3 3) T j,max=150 °C and duty cycle D <0.25 for V GS<-5 V 4) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.3 page 2 2003-12-18 IPB06N03LA IPI06N03LA, IPP06N03LA Parameter Values Symbol Conditions Unit min. typ. max. - 1995 2653 - 848 1128 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 124 186 Turn-on delay time t d(on) - 11 16 Rise time tr - 25 38 Turn-off delay time t d(off) - 30 45 Fall time tf - 7.0 10 Gate to source charge Q gs - 7 9 Gate charge at threshold Q g(th) - 3.2 4.2 Gate to drain charge Q gd - 5 7 Switching charge Q sw - 8 12 Gate charge total Qg - 16 22 Gate plateau voltage V plateau - 3.3 - Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 5 V - 14 19 Output charge Q oss V DD=15 V, V GS=0 V - 18 22 - - 50 - - 350 V GS=0 V, V DS=15 V, f =1 MHz V DD=15 V, V GS=10 V, I D=25 A, R G=2.7 Ω pF ns Gate Charge Characteristics5) V DD=15 V, I D=25 A, V GS=0 to 5 V nC V nC Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=50 A, T j=25 °C - 0.94 1.2 V Reverse recovery charge Q rr V R=15 V, I F=I S, di F/dt =400 A/µs - - 10 nC 5) T C=25 °C A See figure 16 for gate charge parameter definition Rev. 1.3 page 3 2003-12-18 IPB06N03LA IPI06N03LA, IPP06N03LA 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 90 60 80 70 60 40 I D [A] P tot [W] 50 40 30 20 20 10 0 0 0 50 100 150 0 200 50 100 T C [°C] 150 200 T C [°C] 3 Safe operation area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 1000 10 1 µs limited by on-state resistance 1 10 µs 100 0.5 0.2 Z thJC [K/W] I D [A] 100 µs DC 1 ms 10 0.1 0.1 0.05 0.02 0.01 single pulse 10 ms 0.01 1 0.001 0.1 1 10 100 10 0 -5 100-4 100-3 10 -2 0 10-10 10 0 1 t p [s] V DS [V] Rev. 1.3 010-6 page 4 2003-12-18 IPB06N03LA IPI06N03LA, IPP06N03LA 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 25 120 3.2 V 4.5 V 10 V 3.5 V 3.8 V 4.1 V 3V 100 20 80 R DS(on) [mΩ] I D [A] 4.1 V 60 3.8 V 15 10 4.5 V 5 10 V 40 3.5 V 3.2 V 20 3V 2.8 V 0 0 0 1 2 0 3 20 40 V DS [V] 60 80 100 I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 100 90 90 80 80 70 70 60 g fs [S] I D [A] 60 50 40 40 30 30 20 20 175 °C 10 10 25 °C 0 0 0 1 2 3 4 5 0 20 40 60 80 I D [A] V GS [V] Rev. 1.3 50 page 5 2003-12-18 IPB06N03LA IPI06N03LA, IPP06N03LA 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=30 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 12 2.5 11 10 2 9 400 µA 98 % 7 6 V GS(th) [V] R DS(on) [mΩ] 8 typ 5 1.5 40 µA 1 4 3 0.5 2 1 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. Capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 10000 1000 25 °C 25°C 98% 100 IF [A] C [pF] Coss 1000 175°C 98% 175 °C Ciss 10 Crss 1 100 0 5 10 15 20 25 30 V DS [V] Rev. 1.3 page 6 0.0 0.5 1.0 1.5 2.0 VSD [V] 2003-12-18 IPB06N03LA IPI06N03LA, IPP06N03LA 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=25 A pulsed parameter: T j(start) parameter: V DD 100 12 15 V 25 °C 10 100 °C 150 °C 5V 20 V V GS [V] IAV [A] 8 10 6 4 2 1 0 1 10 100 1000 0 10 20 30 40 Q gate [nC] t AV [µs] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 29 V GS 28 Qg 27 V BR(DSS) [V] 26 25 24 V g s(th) 23 22 Q g (th) 21 Q sw Q gs 20 -60 -20 20 60 100 140 Q gate Q gd 180 T j [°C] Rev. 1.3 page 7 2003-12-18 IPB06N03LA IPI06N03LA, IPP06N03LA Package Outline P-TO263-3-2: Outline Footprint Packaging Dimensions in mm Rev. 1.3 page 8 2003-12-18 IPB06N03LA IPI06N03LA, IPP06N03LA P-TO262-3-1: Outline P-TO220-3-1: Outline Packaging Dimensions in mm Rev. 1.3 page 9 2003-12-18 IPB06N03LA IPI06N03LA, IPP06N03LA Published by Infineon Technologies AG Bereich Kommunikation St.-Martin-Straße 53 D-81541 München © Infineon Technologies AG 1999 All Rights Reserved. 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Infineon Technologies' components may only be used in life-support devices or systems with the expressed written approval of Infineon Technologies if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.3 page 10 2003-12-18