IPB100N04S2L-03 IPP100N04S2L-03 OptiMOS® Power-Transistor Product Summary Features • N-channel Logic Level - Enhancement mode • Automotive AEC Q101 qualified V DS 40 V R DS(on),max (SMD version) 3.0 mΩ ID 100 A • MSL1 up to 260°C peak reflow • 175°C operating temperature PG-TO263-3-2 • Green package (lead free) PG-TO220-3-1 • Ultra low Rds(on) • 100% Avalanche tested Type Package Ordering Code Marking IPB100N04S2L-03 PG-TO263-3-2 SP0002-19065 PN04L03 IPP100N04S2L-03 PG-TO220-3-1 SP0002-19062 PN04L03 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continuous drain current1) ID Conditions T C=25 °C, V GS=10 V T C=100 °C, V GS=10 V2) Value 100 Unit A 100 Pulsed drain current2) I D,pulse T C=25 °C 400 Avalanche energy, single pulse2) E AS I D=80A 810 mJ Gate source voltage4) V GS ±20 V Power dissipation P tot 300 W Operating and storage temperature T j, T stg -55 ... +175 °C Rev. 1.0 T C=25 °C page 1 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 Parameter Symbol Values Conditions Unit min. typ. max. Thermal characteristics2) Thermal resistance, junction - case R thJC - - 0.5 Thermal resistance, junction ambient, leaded R thJA - - 62 SMD version, device on PCB R thJA minimal footprint - - 62 6 cm2 cooling area5) - - 40 K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D= 1 mA 40 - - Gate threshold voltage V GS(th) V DS=V GS, I D=250 µA 1.2 1.6 2.0 Zero gate voltage drain current I DSS V DS=40 V, V GS=0 V, T j=25 °C - 0.01 1 - 1 100 V DS=40 V, V GS=0 V, T j=125 °C2) V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 1 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=80 A, SMD version - 3.2 4.4 mΩ V GS=4.5 V, I D=80 A, SMD version - 2.9 4.1 V GS=10 V, I D=80 A, - 2.4 3.3 V GS=10 V, I D=80 A, SMD version - 2.1 3 Drain-source on-state resistance Rev. 1.0 RDS(on) page 2 mΩ 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 Parameter Symbol Values Conditions Unit min. typ. max. - 6000 - - 2200 - Dynamic characteristics2) Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 700 - Turn-on delay time t d(on) - 19 - Rise time tr - 51 - Turn-off delay time t d(off) - 77 - Fall time tf - 27 - Gate to source charge Q gs - 19 25 Gate to drain charge Q gd - 56 85 Gate charge total Qg - 163 230 Gate plateau voltage V plateau - 3.3 - V - - 100 A - - 400 V GS=0 V, V DS=25 V, f =1 MHz V DD=20 V, V GS=10 V, I D=80 A, R G=1.1 Ω pF ns Gate Charge Characteristics2) V DD=32 V, I D=100 A, V GS=0 to 10 V nC Reverse Diode Diode continous forward current2) IS Diode pulse current2) I S,pulse Diode forward voltage V SD V GS=0 V, I F=80 A, T j=25 °C - 0.9 1.3 V Reverse recovery time2) t rr V R=20 V, I F=I S, di F/dt =100 A/µs - 80 100 ns Reverse recovery charge2) Q rr V R=20 V, I F=I S, di F/dt =100 A/µs - 150 190 nC T C=25 °C 1) Current is limited by bondwire; with an R thJC = 0.5K/W the chip is able to carry 220A at 25°C. For detailed information see Application Note ANPS071E at www.infineon.com/optimos 2) Defined by design. Not subject to production test. 3) See diagram 13 4) Qualified at -20V and +20V. 5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.0 page 3 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 1 Power dissipation 2 Drain current P tot = f(T C); V GS ≥ 4 V I D = f(T C); V GS ≥ 10 V 120 350 300 100 250 200 I D [A] P tot [W] 80 60 150 40 100 20 50 0 0 0 50 100 150 200 0 50 T C [°C] 100 150 200 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(V DS); T C = 25 °C; D = 0 Z thJC = f(t p) parameter: t p parameter: D =t p/T 1000 100 1 µs 0.5 10 µs 100 µs 10-1 100 0.1 I D [A] Z thJC [K/W] 1 ms 0.05 10-2 10 0.01 10-3 1 0.1 1 10 100 10-6 10-5 10-4 10-3 10-2 10-1 100 t p [s] V DS [V] Rev. 1.0 10-7 single pulse page 4 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(V DS); T j = 25 °C R DS(on) = (I D); T j = 25 °C parameter: V GS parameter: V GS 300 20 3V 18 4V 250 16 14 R DS(on) [mΩ] I D [A] 200 150 3.5 V 3.5 V 12 10 8 100 6 50 4V 4 3V 4.5 V 2 2.5 V 0 0 2 4 10 V 0 6 8 10 0 20 40 60 80 100 120 I D [A] V DS [V] 7 Typ. transfer characteristics 8 Typ. Forward transconductance I D = f(V GS); V DS = 6V g fs = f(I D); T j = 25°C parameter: T j parameter: g fs 200 300 180 250 160 140 200 g fs [S] I D [A] 120 100 150 80 100 60 40 50 175 °C 20 25 °C -55 °C 0 0 1 2 3 4 Rev. 1.0 0 50 100 150 200 I D [A] V GS [V] page 5 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 9 Typ. Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(ON) = f(T j) V GS(th) = f(T j); V GS = V DS parameter: I D = 80 A; VGS = 10 V parameter: I D 5 2.5 2 4 V GS(th) [V] R DS(on) [mΩ] 1250µA 3 1.5 250µA 1 2 0.5 1 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances 12 Typical forward diode characteristicis C = f(V DS); V GS = 0 V; f = 1 MHz IF = f(VSD) parameter: T j 104 103 Ciss 102 I F [A] C [pF] Coss 103 Crss 102 100 0 5 10 15 20 25 30 V DS [V] Rev. 1.0 25 °C 175 °C 101 0 0.2 0.4 0.6 0.8 1 1.2 1.4 V SD [V] page 6 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 13 Typical avalanche energy 14 Typ. gate charge E AS = f(T j) V GS = f(Q gate); I D = 80 A pulsed parameter: I D=80A 900 12 800 32V 8V 10 700 600 E AS [mJ] 8 V GS [V] 500 400 300 6 4 200 2 100 0 0 25 75 125 0 175 40 80 120 160 Q gate [nC] T j [°C] 15 Typ. drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS) = f(T j); I D = 1 mA 48 V GS 46 Qg V BR(DSS) [V] 44 42 40 Q gate 38 Q gs Q gd 36 -60 -20 20 60 100 140 180 T j [°C] Rev. 1.0 page 7 2006-03-02 IPB100N04S2L-03 IPP100N04S2L-03 Published by Infineon Technologies AG St.-Martin-Straße 53 D-81541 München © Infineon Technologies AG 2004 All Rights Reserved. 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If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.0 page 8 2006-03-02