IPD50N06S2-14 OptiMOS® Power-Transistor Product Summary Features V DS • N-channel - Enhancement mode 55 R DS(on),max (SMD version) • Automotive AEC Q101 qualified ID V 14.4 mΩ 50 A • MSL1 up to 260°C peak reflow • 175°C operating temperature PG-TO252-3-11 • Green package (lead free) • Ultra low Rds(on) • 100% Avalanche tested Type Package Marking IPD50N06S2-14 PG-TO252-3-11 PN0614 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Continuous drain current ID Conditions T C=25 °C, V GS=10 V T C=100 °C, V GS=10 V2) Value 501) Unit A 49 Pulsed drain current2) I D,pulse T C=25 °C 200 Avalanche energy, single pulse E AS I D=50A 240 mJ Gate source voltage V GS ±20 V Power dissipation P tot 136 W Operating and storage temperature T j, T stg -55 ... +175 °C T C=25 °C IEC climatic category; DIN IEC 68-1 Rev. 1.1 55/175/56 page 1 2008-10-21 IPD50N06S2-14 Parameter Symbol Values Conditions Unit min. typ. max. Thermal characteristics Thermal resistance, junction - case R thJC - - 1.1 Thermal resistance, junction ambient, leaded R thJA - - 100 SMD version, device on PCB R thJA minimal footprint - - 75 6 cm2 cooling area3) - - 50 K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D= 1 mA 55 - - Gate threshold voltage V GS(th) V DS=V GS, I D=80 µA 2.1 3.0 4.0 Zero gate voltage drain current I DSS V DS=55 V, V GS=0 V, T j=25 °C - 0.01 1 - 1 100 V DS=55 V, V GS=0 V, T j=125 °C2) V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 1 100 nA Drain-source on-state resistance RDS(on) V GS=10 V, I D=32 A, - 10.8 14.4 mΩ Rev. 1.1 page 2 2008-10-21 IPD50N06S2-14 Parameter Symbol Values Conditions Unit min. typ. max. - 1485 - - 464 - Dynamic characteristics2) Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 167 - Turn-on delay time t d(on) - 13 - Rise time tr - 29 - Turn-off delay time t d(off) - 30 - Fall time tf - 19 - Gate to source charge Q gs - 8 11 Gate to drain charge Q gd - 16 24 Gate charge total Qg - 39 52 Gate plateau voltage V plateau - 5.4 - V - - 50 A - - 200 V GS=0 V, V DS=25 V, f =1 MHz V DD=30 V, V GS=10 V, I D=50 A, R G=7.5 Ω pF ns Gate Charge Characteristics2) V DD=44 V, I D=50 A, V GS=0 to 10 V nC Reverse Diode Diode continous forward current2) IS Diode pulse current2) I S,pulse Diode forward voltage V SD V GS=0 V, I F=50 A, T j=25 °C - 1 1.3 V Reverse recovery time2) t rr V R=30 V, I F=I S, di F/dt =100 A/µs - 45 - ns Reverse recovery charge2) Q rr V R=30 V, I F=I S, di F/dt =100 A/µs - 74 - nC T C=25 °C 1) Current is limited by bondwire; with an RthJC=1.1 K/W the chip is able to carry 69 A. For detailed information see Application Note ANPS071E at www.infineon.com/optimos 2) Defined by design. Not subject to production test. 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm 2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 1.1 page 3 2008-10-21 IPD50N06S2-14 1 Power dissipation 2 Drain current P tot = f(T C); V GS ≥ 6 V I D = f(T C); V GS ≥ 10 V 160 50 140 120 40 I D [A] P tot [W] 100 80 60 30 20 40 10 20 0 0 0 50 100 150 200 0 50 100 T C [°C] 150 200 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D = f(V DS); T C = 25 °C; D = 0 Z thJC = f(t p) parameter: t p parameter: D =t p/T 1000 1 µs 100 100 Z thJC [K/W] 10 µs I D [A] 100 µs 1 ms 0.1 10-1 0.05 0.02 10 0.01 -2 10 single pulse 10-3 1 0.1 1 10 100 10-6 10-5 10-4 10-3 10-2 10-1 100 t p [s] V DS [V] Rev. 1.1 10-7 page 4 2008-10-21 IPD50N06S2-14 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D = f(V DS); T j = 25 °C R DS(on) = (I D); T j = 25 °C parameter: V GS parameter: V GS 200 50 10 V 6V 5.5 V 160 7V 40 R DS(on) [mΩ] 120 I D [A] 6.5 V 80 6V 20 5.5 V 40 30 6.5 V 5V 7V 0 0 1 2 3 4 5 6 10 V 10 7 0 20 40 V DS [V] 60 80 100 80 100 I D [A] 7 Typ. transfer characteristics 8 Typ. Forward transconductance I D = f(V GS); V DS = 6V g fs = f(I D); T j = 25°C parameter: T j parameter: g fs 100 80 90 70 80 60 70 50 g fs [S] I D [A] 60 50 40 40 30 30 20 20 10 10 175 °C 25 °C -55 °C 0 0 2 3 4 5 6 7 Rev. 1.1 0 20 40 60 I D [A] V GS [V] page 5 2008-10-21 IPD50N06S2-14 10 Typ. gate threshold voltage R DS(ON) = f(T j) V GS(th) = f(T j); V GS = V DS parameter: I D = 32 A; VGS = 10 V parameter: I D 30 4 25 3.5 20 3 400 µA V GS(th) [V] R DS(on) [mΩ] 9 Typ. Drain-source on-state resistance 15 80 µA 2.5 10 2 5 1.5 0 1 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances 12 Typical forward diode characteristicis C = f(V DS); V GS = 0 V; f = 1 MHz IF = f(VSD) parameter: T j 104 103 102 I F [A] C [pF] Ciss 103 Coss 101 175 °C 25 °C Crss 102 100 0 5 10 15 20 25 30 V DS [V] Rev. 1.1 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 V SD [V] page 6 2008-10-21 IPD50N06S2-14 13 Typical avalanche energy 14 Typ. gate charge E AS = f(T j) V GS = f(Q gate); I D = 50 A pulsed parameter: I D 12 1000 12.5 A 10 800 8 11 V V GS [V] E AS [mJ] 600 25 A 44 V 6 400 4 50 A 200 2 0 0 25 50 75 100 125 150 0 175 10 20 T j [°C] 30 40 Q gate [nC] 15 Typ. drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS) = f(T j); I D = 1 mA 66 V GS 64 Qg 62 V BR(DSS) [V] 60 58 56 54 Q gate 52 Q gs Q gd 50 -60 -20 20 60 100 140 180 T j [°C] Rev. 1.1 page 7 2008-10-21 IPD50N06S2-14 Published by Infineon Technologies AG 81726 Munich, Germany © Infineon Technologies AG 2008 All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 1.1 page 8 2008-10-21 IPD50N06S2-14 Revision History Version Date Changes Correction of RthJC from 3.4K/W 20.10.2008 to 1.1K/W Revision 1.1 Rev. 1.1 page 9 2008-10-21