UT54ACS138E*

UT54ACS138E
3-Line to 8-Line Decoders/Demultiplexers
July, 2013
Datasheet
www.aeroflex.com/Logic
PINOUT
FEATURES
 0.6mCRH CMOS process
- Latchup immune
 High speed
 Low power consumption
 Wide power supply operating range of 3.0V to 5.5V
 Available QML Q or V processes
 16-pin flatpack
B
C
G2A
 UT54ACS138E - SMD - 5962-96544
G2B
16-Lead Flatpack
Top View
A
G1
Y7
DESCRIPTION
The UT54ACS138E is a 3-line to 8-line decoder/demultiplexer
designed to be used in high-performance memory-decoding or
data-routing applications requiring very short propagation delay
times.
16
VDD
2
15
Y0
3
14
Y1
4
5
13
12
Y2
Y3
6
11
7
8
10
9
Y4
Y5
1
VSS
Y6
The conditions at the binary select inputs and the three enable
inputs select one of eight output lines. Two active-low and one
active-high enable inputs reduce the need for external gates of
inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only
one inverter. An enable input can be used as a data input for
demultiplexing applications.
The device is characterized over full military temperature range
of -55C to +125C.
FUNCTION TABLE
ENABLE INPUTS
SELECT INPUTS
OUTPUT
G1
G2A
G2B
C
B
A
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
X
H
X
X
X
H
H
H
H
H
H
H
H
L
X
X
X
X
X
H
H
H
H
H
H
H
H
X
H
X
X
X
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
L
H
H
H
H
H
H
H
L
L
L
H
L
H
H
L
H
H
H
H
H
H
L
L
L
H
H
H
H
H
L
H
H
H
H
H
L
L
H
L
L
H
H
H
H
L
H
H
H
H
L
L
H
L
H
H
H
H
H
H
L
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
H
H
L
L
H
H
H
H
H
H
H
H
H
H
L
1
LOGIC SYMBOL
A
(1)
B (2)
(3)
C
BIN/OCT
1
0
2
1
4
2
3
4
G1
G2A
G2B
(6)
(4)
&
5
EN
6
7
(5)
(15)
(14)
(13)
(12)
(11)
(10)
(9)
(7)
A
Y0
B
Y1
C
Y2
(1)
(2)
(3)
DMUX
1
0
0
7
G ---
2
1
4
2
Y3
3
Y4
4
G1
Y5
Y6
G2A
Y7
G2B
(6)
(4)
&
5
EN
6
7
(5)
(15)
(14)
(13)
(12)
(11)
(10)
(9)
(7)
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Note:
1. Logic symbols in accordance with ANSI/IEEE standard 91-1984 and IEC Publication 617-12.
LOGIC DIAGRAM
(15)
(14)
G1
ENABLE
(6)
Y0
Y1
(13) Y2
G2A (4)
G2B (5)
(12)
Y3
DATA
(11)
A
SELECT
B
(1)
(10)
(2)
(9)
(7)
C (3)
2
Y4
Y5
Y6
Y7
3
B
C
EN
Y0 Y2
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
A
H
B
C
EN
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
A
B
C
EN
Expansion to 1-of-32 Decoding
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
A
B
C
EN
Y31
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
A
OPERATIONAL ENVIRONMENT1
PARAMETER
LIMIT
UNITS
Total Dose
1.0E6
rads(Si)
SEU Threshold 2
108
MeV-cm2/mg
SEL Threshold
120
MeV-cm2/mg
Neutron Fluence
1.0E14
n/cm2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
LIMIT
UNITS
VDD
Supply voltage
-0.3 to 7.0
V
VI/O
Voltage any pin
-.3 to VDD +.3
V
TSTG
Storage Temperature range
-65 to +150
C
TJ
Maximum junction temperature
+175
C
TLS
Lead temperature (soldering 5 seconds)
+300
C
JC
Thermal resistance junction to case
15.0
C/W
II
DC input current
10
mA
PD2
Maximum power dissipation permitted @ Tc=125oC
3.3
W
Note:
1.Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at
these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2. Per MIL-STD-883, method 1012.1, Section 3.4.1, PD = (Tj(max) - Tc(max) ) / jc
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMIT
UNITS
VDD
Supply voltage
3.0 to 5.5
V
VIN
Input voltage any pin
0 to VDD
V
TC
Temperature range
-55 to + 125
C
4
DC ELECTRICAL CHARACTERISTICS (Pre and Post-Radiation)*
(VDD = 3.0V to 5.5V; VSS = 0V 6, -55C < TC < +125C); Unless otherwise noted, Tc is per the temperature range ordered
SYMBOL
DESCRIPTION
CONDITION
VIL
Low-level input voltage 1
VDD from 3.0V to 5.5V
VIH
High-level input voltage 1
VDD from 3.0V to 5.5V
IIN
Input leakage current
VIN = VDD or VSS
Low-level output voltage 3
IOL = 100A
VOL
MIN
MAX
UNIT
0.3 VDD
V
0.7 VDD
-1
V
1
A
0.25
V
VDD from 3.0V to 5.5V
VOH
High-level output voltage 3
IOH = -100A
VDD -0.25
V
VDD from 3.0V to 5.5V
IOS1
Short-circuit output current 2 ,4
VO = VDD and VSS
-200
200
mA
-100
100
mA
VDD from 4.5V to 5.5V
IOS2
Short-circuit output current 2 ,4
VO = VDD and VSS
VDD from 3.0V to 3.6V
IOL1
Low level output current8
VIN = VDD or VSS
(sink)
VOL = 0.4V
8
mA
6
mA
-8
mA
-6
mA
VDD from 4.5V to 5.5V
IOL2
Low level output current8
VIN = VDD or VSS
(sink)
VOL = 0.4V
VDD from 3.0V to 3.6V
IOH1
High level output current8
VIN = VDD or VSS
(source)
VOH = VDD-0.4V
VDD from 4.5V to 5.5V
IOH2
High level output current8
VIN = VDD or VSS
(source)
VOH = VDD-0.4V
VDD from 3.0V to 3.6V
Ptotal1
Power dissipation 7,8
CL = 50pF
1.1
mW/
MHz
0.5
mW/
MHz
10
A
VDD = 4.5V to 5.5V
Ptotal2
Power dissipation 7,8
CL = 50pF
VDD = 3.0V to 3.6V
IDDQ
Quiescent Supply Current
VIN = VDD or VSS
VDD from 3.6V to 5.5V
5
CIN
Input capacitance 5
 = 1MHz
15
pF
15
pF
VDD = 0V
COUT
Output capacitance 5
 = 1MHz
VDD = 0V
Notes:
* For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25×C per MIL-STD-883 Method 1019, Condition
A up to the maximum TID level procured.
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are
guaranteed to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/
MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. Power dissipation specified per switching output.
8. Parameter guaranteed by design and characterization, but is not tested.
AC ELECTRICAL CHARACTERISTICS (Pre and Post-Radiation)*
(VDD = 3.0V to 5.5V; VSS = 0V 1, -55C < TC < +125C); Unless otherwise noted, Tc is per the temperature range ordered
SYMBOL
tPLH1
tPHL1
tPLH2
tPHL2
PARAMETER
Binary select to Yn
Binary select to Yn
Enable to Output Yn
Enable to Output Yn
CONDITION
VDD
CL = 50pF
3.0V to 3.6V
CL = 50pF
CL = 50pF
CL = 50pF
MINIMUM
MAXIMUM
UNIT
4
19
ns
4.5V to 5.5V
3
10
3.0V to 3.6V
4
19
4.5V to 5.5V
3
10
3.0V to 3.6V
3
19
4.5V to 5.5V
3
10
3.0V to 3.6V
4
19
4.5V to 5.5V
3
10
Notes:
* For devices procured with a total ionizing dose tolerance guarantee, the post-irradiation performance is guaranteed at 25×C per MIL-STD-883 Method 1019, Condition
A up to the maximum TID level procured.
1. Maximum allowable relative shift equals 50mV.
6
ns
ns
ns
Packaging
Figure 1. 16-lead Flatpack
UT54ACS138E: SMD
5962 * ***** ** * * *
Lead Finish: (Notes 1 & 2)
A = Solder
C = Gold
X = Optional
Package Type:
X = 16-lead ceramic bottom-brazed dual-in-line Flatpack
Class Designator:
Q = QML Class Q
V = QML Class V
Device Type:
02 = 1 rad(Si)/sec
03 = 50 to 300 rads(Si)/sec
Drawing Number:
96544 = UT54ACS138E
Total Dose: (Notes 3 & 4)
R = 1E5 rads(Si)
F = 3E5 rads(Si)
G = 5E5 rads(Si)
H = 1E6 rads(Si)
Notes:
1. Lead finish (A,C, or X) must be specified.
2. If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold).
3. Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. For prototype inquiries, contact factory.
4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test Method 1019
Condition A and section 3.11.2. Device type 03 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5 rads(Si), and is tested in
accordance with MIL-STD-883 Test Method 1019 Condition A.
Aeroflex Colorado Springs - Datasheet Definition
Advanced Datasheet - Product In Development
Preliminary Datasheet - Shipping Prototype
Datasheet - Shipping QML & Reduced Hi-Rel
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