UT54ACTS245E*

UT54ACTS245E
Octal Bus Transceiver with Three-State Outputs
July 20013
www.aeroflex.com/Logic
Datasheet
FEATURES
PINOUTS
 Three-state outputs drive bus line directly
 m CRH CMOS process
- Latchup immune
 High speed
 Low power consumption
 Wide power supply operating range of 3.0V to 5.5V
 Available QML Q or V processes
Flexible package
 - 20-lead flatpack
UT54ACTS245E-SMD-5962-96573
20-Lead Flatpack
Top View
DESCRIPTION
The UT54ACTS245E is a non-inverting octal bus transceiver
designed for asynchronous two-way communication between
data buses. The control function implementation minimizes
external timing requirements.
The device allows data transmission from the A bus to the B
bus or from the B bus to the A bus depending upon the logic
level at the direction control (DIR) input. The enable input (G)
disables the device so that the buses are effectively isolated.
20
VDD
2
19
G
A2
3
18
B1
A3
A4
4
5
17
16
B2
B3
A5
6
15
B4
A6
7
14
B5
A7
A8
VSS
8
9
10
13
12
11
B6
B7
B8
G
DIR
A1
FUNCTION TABLE
ENABLE
G
DIRECTION
CONTROL DIR
OPERATION
L
L
B Data To A Bus
L
H
A Data To B Bus
X
1
A1
LOGIC SYMBOL
The device is characterized over full HiRel temperature range
of -55C to +125C.
H
DIR
A2
A3
A4
A5
A6
A7
Isolation
A8
(19)
(1)
(2)
(3)
G3
3 EN1 (BA)
3 EN2 (AB)
(18)
1
B1
2
(17)
(4)
(16)
(5)
(6)
(15)
(7)
(8)
(9)
(14)
B2
B3
B4
B5
(13)
B6
(12)
B7
(11)
B8
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
1
LOGIC DIAGRAM
DIR
(1)
(19)
A1
(18)
A2
B6
(8)
(12)
A8
B5
(7)
(13)
A7
B4
(6)
(14)
A6
B3
(5)
(15)
A5
B2
(4)
(16)
A4
B1
(3)
(17)
A3
G
(2)
B7
(9)
(11)
2
B8
OPERATIONAL ENVIRONMENT1
PARAMETER
LIMIT
UNITS
Total Dose
1.0E6
rads(Si)
SEU Threshold 2
108
MeV-cm2/mg
SEL Threshold
120
MeV-cm2/mg
Neutron Fluence
1.0E14
n/cm2
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
LIMIT
UNITS
VDD
Supply voltage
-0.3 to 7.0
V
VI/O
Voltage any pin
-.3 to VDD +.3
V
TSTG
Storage Temperature range
-65 to +150
C
TJ
Maximum junction temperature
+175
C
TLS
Lead temperature (soldering 5 seconds)
+300
C
JC
Thermal resistance junction to case
15
C/W
II
DC input current
10
mA
PD2
Maximum package power dissipation
3.3
W
o
permitted @ Tc = +125 C
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at
these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2. Per MIL-STD-883, method 1012.1, section 3.4.1, PD=(Tj(max) - Tc(max)) / jc
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMIT
UNITS
VDD
Supply voltage
3.0 to 5.5
V
VIN
Input voltage any pin
0 to VDD
V
TC
Temperature range
-55 to +125
C
3
DC ELECTRICAL CHARACTERISTICS FOR THE UT54ACTS245E7
( VDD = 3.0V to 5.5V; VSS = 0V6; -55C < TC < +125C)
SYMBOL
DESCRIPTION
CONDITION
MIN
MAX
UNIT
VIL1
Low-level input voltage 1
VDD from 4.5V to 5.5V
0.8
V
VIL2
Low-level input voltage 1
VDD from 3.0V to 3.6V
0.8
V
VIH1
High-level input voltage 1
VDD from 4.5V to 5.5V
0.5 VDD
V
VIH2
High-level input voltage 1
VDD from 3.0V to 3.6V
2.0
V
Input leakage current
VIN = VDD or VSS
-1
Low-level output voltage 3
IOL = 12mA
IIN
VOL1
1
A
0.4
V
0.4
V
VDD = 4.5V to 5.5V
VOL2
Low-level output voltage 3
IOL = 8mA
VDD = 3.0V to 3.6V
VOH1
High-level output voltage 3
IOH = -12mA
0.7 VDD
V
2.4
V
VDD from 4.5V to 5.5V
VOH2
High-level output voltage 3
IOH = -8mA
VDD from 3.0V to 3.6V
IOS1
Short-circuit output current 2 ,4
VO = VDD and VSS
-300
300
mA
-200
200
mA
VDD from 4.5V to 5.5V
IOS2
Short-circuit output current 2 ,4
VO = VDD and VSS
VDD from 3.0V to 3.6V
IOL1
Low level output current 9
VIN = VDD or VSS
12
mA
8
mA
-12
mA
-8
mA
VOL = 0.4V
VDD from 4.5V to 5.5V
IOL2
Low level output current 9
VIN = VDD or VSS
VOL = 0.4V
VDD from 3.0V to 3.6V
IOH1
High level output current 9
VIN = VDD or VSS
VOH = VDD-0.4V
VDD from 4.5V to 5.5V
IOH2
High level output current 9
VIN = VDD or VSS
VOH = VDD-0.4V
VDD from 3.0V to 3.6V
4
IOZH
Three-state output leakage current, high
G = 5.5V; for all other inputs
30
A
-30
A
1.5
mW/
MHZ
.75
mW/
MHZ
10
A
1.6
mA
VIN = VDD or VSS; VOUT = VDD
VDD = 5.5V
IOZL
Three-state output leakage current, low
G = 5.5V; for all other inputs
VIN = VDD or VSS; VOUT = VSS
VDD = 5.5V
Ptotal1
Power dissipation 2, 8
CL = 50pF
VDD = 4.5V to 5.5V
Ptotal2
Power dissipation 2, 8
CL = 50pF
VDD = 3.0V to 3.6V
IDDQ
Quiescent Supply Current
VIN = VDD or VSS
VDD from 3.0V to 5.5V
IDDQ
Quiescent Supply Current
For input under test
Delta
VIN = VDD -2.1V
For all other inputs
VIN = VDD or VSS
VDD = 5.5V
CIN
COUT
Input capacitance 5
 = 1MHz, VDD = 0V
15
pF
Output capacitance 5
 = 1MHz, VDD = 0V
15
pF
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, - 50%,
as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed
to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density  5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765
pF/MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for the maximum radiation dose available for the respective device types.
8. Power does not include power contribution of any TTL output sink current.
9. Guaranteed by characterization, but not tested.
5
AC ELECTRICAL CHARACTERISTICS FOR UT54ACTS2452
(VDD = 3.0V to 5.5V; VSS = 0V 1, -55C < TC < +125C)
SYMBOL
tPHL1
tPLH2
tPZH1
tPZL2
tPHZ3
tPLZ3
PARAMETER
Data to bus
Data to bus
G low to bus active
G low to bus active
G high to bus three-state
G high to bus three-state
CONDITION
VDD
CL = 50pF
3.0V to 3.6V
CL = 50pF
CL = 50pF
CL = 50pF
CL = 50pF
CL = 50pF
MAXIMUM
UNIT
3
23
ns
4.5V to 5.5V
2
13
3.0V to 3.6V
2
18
4.5V to 5.5V
1
11
3.0V to 3.6V
2
15
4.5V to 5.5V
2
10
3.0V to 3.6V
2
14
4.5V to 5.5V
2
9
3.0V to 3.6V
3
16
4.5V to 5.5V
3
12
3.0V to 3.6V
2
10
4.5V to 5.5V
2
9
Notes:
1. Maximum allowable relative shift equals 50mV.
2. All specifications valid for the maximum radiation dose available for the respective device types.
6
MINIMUM
ns
ns
ns
ns
ns
Packaging
1. All exposed metallized areas are gold plated over
electroplated nickel per MIL-PRF-38535.
2. The lid is electrically connected to VSS.
3. Lead finishes are in accordance with MIL-PRF38535.
4. Dimension symbol is in accordance with MILPRF-38533.
5. Lead position and colanarity are not measured.
Figure 1. 20-lead Flatpack
7
Ordering Information: UT54ACTS245E: SMD
5962 * ***** ** * * *
Lead Finish: (Notes 1 & 2)
A = Solder
C = Gold
X = Optional
Package Type:
X = 20-lead ceramic bottom-brazed dual-in-line Flatpack
Class Designator:
Q = QML Class Q
V = QML Class V
Device Type:
02 = 1 rad(Si)/sec
03 = 50 to 300 rads(Si)/sec
Drawing Number:
96573 = UT54ACTS245E
Total Dose: (Note 3 and 4)
R = 1E5 rads(Si)
F = 3E5 rads(Si)
G = 5E5 rads(Si)
H = 1E6 rads(Si)
Notes:
1. Lead finish (A,C, or X) must be specified.
2. If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold).
3. Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hardening. For prototype inquiries, contact
factory.
4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test
Method 1019 Condition A and section 3.11.2. Device type 03 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5
rads(Si), and is tested in accordance with MIL-STD-883 Test Method 1019 Condition A.
Aeroflex Colordo Springs - Datasheet Definition
Advanced Datasheet - Product In Development
Preliminary Datasheet - Shipping Prototype
Datasheet - Shipping QML & Reduced HiRel
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