BW6562A

BW6562A
High PFC LED Driver
Description
The BW6562A is a cost effective high performance
transition-mode (TM) power factor correction (PFC)
controller IC optimized for high PFC LED driver, battery
chargers and pre-regulator applications. The BW6562A
integrates an internal start-up timer, a highly linear
SOP-8 PACKAGE OUTLINE
multiplier with Total Harmonics Distortion (THD)
optimizer for near unity power factor, a Zero Current
Detector (ZCD) to ensure transition-mode operation and
a current sensing comparator with built-in leading edge
blanking. With ZCD control, power MOSFET is always
turned on with zero inductor current. Consequently,
transition-mode control achieves lower switching loss
and reduced noise. The BW6562A offers great protection
coverage including system accurate adjustable
over-voltage protection (OVP), input under-voltage
lockout (UVLO), multiplier output clamp and GD output
clamp for external power MOSFET protection. The totem
pole output stage is capable of delivering sink/source
Pin Configurations (Top View)
drive current of +800mA/-600mA.
The BW6562A is available in SOP-8 package.
Features
• Single stage fly-back controller with PFC
• Transition-mode operation
• Ultra-low start-up current
• Internal start-up timer
• Low operating supply current
• Low quiescent current
• Disable function on error amplifier (E/A) input
Applications
• Totem pole, push-pull output drive
• Fly-back power converters
• Adjustable output over-voltage protection
• PFC pre-regulators to meet IEC61000-3-2
• Under-voltage lockout with hysteresis
• Hi-end AC-DC adapter/charger
• 1% Precision internal reference voltage
• Electronic single stage LED driver
Packing & Order Information
• Electronic Ballast
3,000/Reel
Publication Order Number: [BW6562A]
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
Typical Application Circuit
PIN DESCRIPTIONS
Pin Name
Function
Current sense input pin to the internal PWM comparator.
The current flowing in the MOSFET is sensed through a resistor; the resulting voltage is
CS
applied to this pin and compared with an internal sinusoidal-shaped reference, generated by
the multiplier, to switch on or off the external MOSFET. The pin is equipped with 200ns
leading-edge blanking for improved noise immunity.
GND
Ground pin.
Current return for both the signal part of the IC and the gate driver.
Main input to the multiplier.
MULT
This pin is connected to the rectified mains voltage via a resistor divider and provides the
sinusoidal reference to the current loop.
Output pin of the error amplifier.
COMP
A compensation network is placed between this pin and INV to achieve stability of the voltage
control loop and ensure high power factor and low THD.
Inverting input pin of the error amplifier.
INV
The information on the output voltage of the PFC controller is fed into this pin through a
resistor divider. The pin can also be used as chip enable/disable control pin.
Zero current detection pin.
ZCD
Boost inductor’s demagnetization sensing input for transition-mode operation. A
negativegoing edge triggers MOSFET’s turn-on.
Publication Order Number: [BW6562A]
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
PIN DESCRIPTIONS
Pin Name
Function
Gate driver output pin.
GD
The totem pole output stage is able to drive power MOSFET’s with a peak current of 600mA
source and 800mA sink. The high-level voltage of this pin is clamped at about 12V to avoid
excessive gate voltages in case the pin is supplied with a high VCC.
System power input pin.
VCC
Supply voltage of both the signal part of the IC and the gate driver. Upper limit is extended to
a maximum of 32V to provide a more headroom for supply voltage changes. This pin has an
internal 34V (min.) Zener diode to protect the IC itself from over-voltage transients.
ABSOLUTE MAXIMUM RATINGS (Note 1)
Parameter
Symbol
Range
Unit
IC supply voltage
VCC
-0.3 ~ +40
V
Output totem pole peak current
IGD
-600 (source) / +800 (sink)
mA
*(Note 2)
-0.3 ~ +8.0
V
IZCD
±10
mA
0.63
W
TJ
+150
°C
TSTG
-65 ~ +150
°C
θJA
165
°C/W
Analog inputs & outputs
Zero current detector maximum current
Continuous power dissipation (TA +25°C)
8 Pin SOP (de-rating 6.3mW/°C above +25°C)
Junction temperature
Storage temperature range
Junction-to-ambient thermal resistance
Note :
1. Exceeding these ratings could cause damage to the device. All voltages are with respect to ground.
Currents are positive into, negative out of the specified terminal.
2. * : Pin 1 (INV), pin 2 (COMP), pin 3 (MULT), pin 4 (CS)
RECOMMENDED OPERATING CONDITIONS (Note 4)
Parameter
Symbol
Min.
Max.
Unit
DC input supply voltage range, VCC to GND
VCC
10.5
32
V
INV input pin voltage range relative to GND
VINV
2.455
2.545
V
VMULT
0
3
V
VCS
0
1.2
V
TA
-40
+85
°C
MULT input pin voltage range relative to GND
CS input pin voltage range relative to GND
Ambient temperature range
(Note 3)
Note :
3. Maximum ambient temperature range is limited by allowable power dissipation.
Publication Order Number: [BW6562A]
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
BLOCK DIAGRAM
ELECTRICAL CHARACTERISTICS
(Over recommended operating conditions unless otherwise specified. VCC 12V, TJ - 25°C ~ +125°C, CO 1nF)
Supply voltage
Parameter
Symbol
Conditions
Min
Operating range
VCC
After turn-on
10.5
Turn-on threshold
VCC(ON)
11.7
Turn-off threshold
V CC(OFF)
8.7
Hysteresis
ΔVCC
Zener voltage
VZ
ICC = 20mA
Typ.
Max.
Units
32
V
12.5
13.3
V
9.0
9.3
V
3.0
4.0
V
34
38
V
Typ.
Max.
Units
30
60
μA
Supply current
Parameter
Symbol
Conditions
Start-up current
ISTART
Before turn-on, VCC=11V
Quiescent current
IQ
After turn on
2.50
3.75
mA
Operating supply current
ICC
70kHz
3.5
5.0
mA
Quiescent current
IQ(OVP)
During OVP, or VINV ≤ 150mV
1.7
2.2
mA
Publication Order Number: [BW6562A]
Min
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
Error amplifier
Parameter
Symbol
Conditions
Voltage feedback input threshold
VINV
10.5V < VCC < 32V
Line regulation
ΔVLINE
VCC=10.5V ~ 32V
Input bias current
IINV
VINV=0V ~ 3V
Voltage gain
GV
Open loop
Gain-bandwidth product
GB
Source current
ICOMP(SOURCE)
VCOMP=4V, VINV=2.4V
-2.0
-3.5
Sink current
ICOMP(SINK)
VCOMP=4V, VINV=2.6V
2.4
4.5
Upper clamp voltage
VCOMP(UP)
ISOURCE=0.5mA
5.3
5.7
6.0
V
Lower clamp voltage
VCOMP(LOW)
ISINK=0.5mA
2.10
2.25
2.40
V
Disable threshold
VINV(DIS)
150
200
250
mV
Re-start threshold
VINV(EN)
380
450
520
mV
Min
Typ.
Max.
Units
-1
μA
Multiplier input
Parameter
Symbol
Conditions
Input bias current
IMULT
VMULT=0V ~ 4V
Linear operation range
VMULT
Output max. slope
ΔVCS /ΔVMULT
(Note 4)
Min
Typ.
Max.
Units
2.455
2.500
2.545
V
2
5
mV
-1
μA
60
80
Db
1
MHz
-5.0
mA
0~3
VMULT=0V ~ 1V,
VCOMP=Upper clamp
mA
V
1.0
1.1
V/V
K
VMULT=1V, VCOMP=4V
0.32
0.38
0.44
V
Zero current detector
Parameter
Symbol
Conditions
Min
Typ.
Max.
Units
Upper clamp voltage
VZCDH
IZCD=2.5mA
5.0
5.7
6.5
V
Lower clamp voltage
VZCDL
IZCD=-2.5mA
-0.3
0
0.3
V
VZCDA
Positive-going edge
1.4
V
Triggering voltage (Note 5)
VZCDT
Negative-going edge
0.7
V
Input bias current
IZCDB
VZCD=1.0V ~ 4.5V
2
μA
Source current capability
IZCD(SOURCE)
-2.5
mA
Sink current capability
IZCD(SINK)
2.5
mA
Gain
Arming voltage
(Note 5)
Output over-voltage
Parameter
Symbol
Dynamic OVP triggering current
IOVP
27
μA
Hysteresis (Note 5)
ΔIOVP
20
μA
Static OVP threshold
VOVP(TH)
Publication Order Number: [BW6562A]
Conditions
Min
2.10
Typ.
2.25
Max.
2.40
Units
V
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
Current sense comparator
Parameter
Symbol
Conditions
Input bias current
ICS
VCS=0V
Leading edge blanking
tLEB
Delay to output
tD(H-L)
Current sense clamp
VCS
Min
100
Typ.
200
Max.
Units
-1
μA
300
ns
175
VCOMP=Upper clamp,
VMULT=1.5V
1.00
1.08
ns
1.16
V
VCS(OS_0V)
VMULT=0V
25
mV
VCS(OS_2.5V)
VMULT=2.5V
5
mV
Starter
Parameter
Symbol
Conditions
Start timer period
tSTART
Current sense offset
Min
Typ.
Max.
Units
75
190
300
μs
Min
Typ.
Max.
Units
0.6
1.2
V
Zero current detector
Parameter
Symbol
Conditions
Output low voltage
VOL
ISINK=100mA
Output high voltage
VOH
ISOURCE=5mA
Peak source current
ISOURCE(PK)
-0.6
A
Peak sink current
ISINK(PK)
0.8
A
Voltage fall time
tFAL
30
70
ns
Voltage rise time
tRISE
60
110
ns
Output clamp voltage
VO(CLAMP)
ISOURCE=5mA, VCC=20V
12
15
V
UVLO saturation
VUVLO(SAT)
VCC=0V ~ VCC(ON),
ISINK=2mA
1.1
V
9.8
10
10.3
V
Note :
4. The multiplier output is given by :VCS=K x VMULT x (VCOMP – 2.5)
5. Parameters guaranteed by design, functionality tested in production.
Publication Order Number: [BW6562A]
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
Figure 4. Single-Stage PFC, Constant Voltage and Constant Current
Figure 5. High Power Factor Battery Charger
Publication Order Number: [BW6562A]
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
APPLICATION INFORMATION
(PF) is defined by the ratio of average power and apparent
Operation Overview
power :
The BW6562A is an excellent transition-mode power factor
The major cause of this THD distortion is the inability of the
correction controller for AC-DC switching mode power supply
system to transfer energy effectively when the instantaneous line
applications. It meets the IEC61000-3-2 requirement and is
voltage is very low. This effect is magnified by the high-frequency
intended for the use in those applications that demand low
filter capacitor placed after the bridge rectifier, which retains
power harmonics distortion. It integrates more functions to
some residual voltage that causes the diodes of the bridge
reduce the external components counts and the size. Its major
rectifier to be reverse-biased and the input current flow to
features are described as below.
temporarily stop.
Power Factor Correction and THD
To overcome this issue, the circuit section designed in the
The BW6562A features a one linear multiplier with THD
BW6562A forces the PFC regulator to process more energy
optimizer for near unity power factor. To explain PFC and THD
near the line voltage zero-crossings, as compared to that
relation. First, average power is defined by
commanded by the control loop. This results in both, minimizing
the time interval when energy transfer is lacking, and fully
discharging the high-frequency filter capacitor after the bridge.
where θ is phase shift between input voltage and current.
Effective value of input voltage and current are defined by as
The BW6562A is designed with a special circuit that reduces the
follows :
conduction dead-angle occurring to the AC
where vs(t) is instantaneous value of input voltage,is(t) is
To quantify degree of current waveform distortion, THD is written
instantaneous value of input current,T is the cycle.
by
Therefore, PAV is written as :
And apparent power is defined by
If the current and voltage are in phase, then θ 0, which will lead
where IRMS is the root mean square (RMS) value of iRMS.
to cos(θ) 1, and the PF will be simplified as
Therefore, based on the above equations, obtained power factor
Publication Order Number: [BW6562A]
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
where R3 and R4 are top and bottom feedback resistor values
(as shown in the Typical Application Circuit on page 1).
Based on the equation 16, if THD is very small, then it will get
If any abrupt change of output voltage, ΔVO > 0, occurs due to a
near unity power factor.
load drop, the voltage at pin INV will be kept at 2.5V by the local
feedback of the EA, the network connected between INV and
is shown in Typical Application Circuit on page 1. During the
COMP would introduces a time constant to achieve high PF.
start-up transient, the VCC is lower than the UVLO threshold
The current through R4 will remain equal to 2.5/R4 but IR3 will
voltage (VCC(ON)) thus there is no gate pulse produced from
become :
the BW6562A to drive power MOSFET. Therefore, the current
through R6 will provide the startup current and to charge the
capacitor C2. Whenever the VCC voltage is high enough to turn
on the BW6562A and further to deliver the gate drive signal.
type protection. The INV pin also provides additional function as
Once the BW6562A is in normal operation, the supply current is
a non-latched IC disable. A voltage below 0.2V shuts down the
switched to and provided from the auxiliary winding of the PFC
IC and reduces its consumption below 1.7mA. To re-start the IC,
choke (transformer). Lower start-up current requirement on the
the voltage on this pin must exceed 0.45V. The main usage of
PFC controller will help to increase the value of R6 and then
this function is a remote ON/OFF control input that can be driven
reduce the power consumption on R6. By using CMOS process
by a PWM controller for power management purposes.
and the special circuit design, the maximum start-up current of
However, it also offers a certain degree of additional safety since
the BW6562A is only 60μA. If a higher resistance value of R6 is
it will cause the IC to shutdown in case lower resistor of the
chosen, it usually takes more time to start-up. To carefully select
output divider is shorted to ground or if the upper resistor is
the value of R6 and C2 will optimize the power consumption and
missing or fails open.
start-up time.
Zero Current Detection
Output Voltage Setting
The zero current detection block switches on the external
The BW6562A monitors the output voltage signal at INV pin
MOSFET as the current through the boost inductor has gone to
through a resistor divider pair R3 and R4. A transconductance
zero using an auxiliary winding coupled with the inductor. This
amplifier is used instead of the conventional voltage amplifier.
feature allows transitionmode operation. If the voltage of the
This trans-conductance amplifier (voltage controlled current
ZCD pin goes higher than 1.4V, the ZCD comparator waits until
source) also provides the additional OVP function. Neglecting
the voltage goes below 0.7V. If the voltage goes below OVP is
ripple current, current flowing through R3, IR3, will equal to
calculate by
current through R4, IR4, As the non-inverting input of the error
amplifier is biased inside the BW6562A at 2.5V, and output
voltage is determined by the following relationship.
An important advantage of this technique is that the over voltage
level can be set independently from the regulated output voltage;
the latter depends on the ratio of R3 to R4, the former on the
individual value of R3. Another advantage is the precision
because the tolerance of the detection current is about 12%, i.e.
Publication Order Number: [BW6562A]
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
12% tolerance on ΔVO. Since ΔVO << VO, the tolerance on the
However, the total pulse width of the turn-on spike is decided by
absolute value will be proportionally reduced.
the output power, circuit design and layout. It is strongly
When the loading of PFC pre-regulator becomes very low, the
recommended to adopt a smaller RC filter for higher power
output voltage tends to stay steadily above the nominal value,
application to avoid the CS pin being damaged by the negative
which is not the case that OVP is triggered by abrupt voltage
turn-on spike.
increase. If this situation happens, the error amplifier output will
saturate low, hence, when this is detected, the external power
Multiplier
transistor is switched OFF, and the IC is put in an idle state
The internal multiplier takes two inputs, one from a portion of the
(Static OVP). Normal operation is resumed as the error amplifier
instantaneous rectified line voltage (via pin 3 MULT) and the
goes back into its linear region. As a result, the device will work in
other from the output of the E/A (via pin 2 COMP), to feed the
burstmode, with a repetition rate that can be very low. When
PWM comparator to determine the exact instant when the
either OVP is activated, the quiescent consumption of the IC is
MOSFET is to be switched off. The output of multiplier would be
reduced to minimum by the discharge of the VCC capacitor and
rectified sinusoid as similar as instantaneous rectified line voltage
increase the hold-up capability of the IC supply.
different only with scaling factor determined by output of E/A.
The output is then fed into PWM comparator to compare with
The OVP function in the BW6562A is an auto-recovery 0.7V, the
current sense clamp voltage VCS (at 1.08V), to switch MOSFET
zero current detection turns on the MOSFET. The ZCD pin is
off.
protected internally by two clamps, 5.7V upper clamp and 0V
lower clamp. The 190μs timer generates a MOSFET turn on
signal if the driver output has been low for more than 190μs from
the falling edge of the driver output.
Current Sensing and Leading Edge Blanking
The typical current mode of PFC controller feedbacks the
current signals to close the control loop and achieve regulation.
The BW6562A detects the primary MOSFET current from the
CS pin; this is for the pulse-by-pulse current limit. The maximum
voltage threshold of the current sensing pin is set at 1.08V. From
above, the MOSFET peak current can be obtained from below.
The formula governing all parameters is given by multiplier
output :
A 200ns leading edge blanking (LEB) time is included in the
input of CS pin to prevent the false-trigger from the current spike.
In the low power application, if the total pulse width of the turn-on
where K is the multiplier gain. System designer needs to
spikes is less than 200ns and the negative spike on the CS pin
calculate R1 and R2, for different input mains circumstances.
doesn’t exceed -0.3V, it could eliminated the RC filter.
Figure 1 and 2 explain multiplier characteristics and VCS clamps
vs. TJ respectively.
Publication Order Number: [BW6562A]
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BW6562A
High PFC LED Driver
Output Drive Stage
●The input capacitance can be reduced to replace bulky and
An output stage of a push-pull buffer, with typical
expensive high voltage electrolytic capacitor (as required by
+800mA/-600mA driving capability is incorporated to drive a
regular offline SMPS) by a small size, cheaper film capacitor
power MOSFET directly. The output voltage is clamped at 12V
●Transition-mode ensures low turn-on losses in MOSFET and
to protect the MOSFET gate even when the VCC voltage is
higher efficiency can be achieved.
higher than 12V.
●Lower parts count means lower material cost as well as lower
assembly cost for limited space.
Few details information about this, please refer separate
Application Note for details.
High PF Battery Charger
The single stage PFC can also be adopted as battery charger.
Figure 5 presents an off-line universal mains battery charger that
can drive up to 30W.
This solution also uses an isolated feedback with an optocoupler
and the BW7103. To use the BW6562A IC in a lead-acid battery
charger circuit with high PFC, the DC output voltage and the
maximum permissible DC output charging current needs to be
Example Applications
decided on the basis of the specific battery to be charged. For
Single Stage LED Driver with PFC
the lead-acid batteries of different nominal voltages, the fixed
One of major applications of the BW6562A is to provide a single
constant-voltage, current limited, charging mode, the typical
stage power module with high PF for LED lighting. The following
voltage level suggested by most lead-acid battery manufactures
circuit, Figure 4, shows a simplified fly-back AC-DC converter
are as follows :
with both constant current (CC) and constant voltage (CV)
feedback from output side, to prevent overload and also provide
an over-voltage protection facility.
This solution uses an isolated feedback with an optocoupler and
the SQ7103 (+2.5V voltage reference and dual Op-Amps), each
one for voltage and current regulation respectively. As LED
The maximum lead-acid battery charging current is decided by
lighting application, the BW6562A offers the following
the battery amp-hour capacity, represented as 'C'. The lead-acid
advantages that make this solution an appropriate method
battery manufacturers in general prefer a low battery charging
against the traditionally PWM controller, where a good PF value
current set at “C/20” Amp for slow-charging, for improved life of
is required :
the battery. However, in case of ‘fast-charging’ and if permitted
by the battery manufacturer, the maximum battery charging
current can be set at “C/10” Amp. A charge-depleted battery will
Publication Order Number: [BW6562A]
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
initially draw the maximum charging current. As the battery
amplifier is set to be narrow within 20kHz, the output would be a
gradually gets charged, the charging current will gradually
DC value over a given half-cycle. Output of E/A fed into
reduce.
multiplier, multiplied by portion of the rectified mains voltage, will
generate a scaled rectified sinusoid whose peak amplitude
PFC Pre-Regulator
depends on the rectified mains peak voltage as well as the value
Major application of the BW6562A is to implement a wide-range
of error signal.
mains input PFC pre-regulator, which will be acting the input
stage for the cascaded isolation DC-DC converter, and can
The output of the multiplier is fed into the non-inverting pin of the
deliver above 350W in general. Typical application circuit
internal PWM comparator. As the output from multiplier, a
diagram is showed on page 1. There are two methods; in
sinusoidal reference for PWM, equals to the voltage on the
general, to design preregulator stage, one is with fixed frequency
current sense CS pin (#4), the MOSFET will be turned off. As a
while the other is with fixed on time.
consequence, the peak inductor current will be enveloped by a
rectified sinusoid. After the MOSFET is turned off, the boost
The BW6562A can be implemented by fixed on time due to its
inductor discharges its stored energy to the load until zero
simplicity and less expensive, while the fixed frequency
current is detected and turns on MOSFET again.
technique is more complicated and beyond the scope of this
application note. In fixed on time mode, the BW6562A is also
In case there is no auxiliary winding on the boost inductor, a
working in transition mode where the inductor current will be turn
solution can be implemented by simply connecting the ZCD pin
on when zero crossing is detected. By using boost switching
to the drain of the power MOSFET through an RC network as
techniques, a PFC is shape the input current by drawing a
shown in Figure 3. In this way the high-frequency edges
quasi-sinusoidal current to be in-phase with the line voltage. A
experienced by the drain will be transferred to the ZCD pin,
simplified circuit, shown in Figure 3, can explain the operation as
hence arming and triggering the ZCD comparator.
follows :
Also in this case the resistance value must be properly chosen
to limit the current sourced/sunk by the ZCD pin. In typical
applications with output voltages around 400V, recommended
values for these components as 22pF (or 33pF) for CZCD and
330kΩ for RZCD. With these values proper operation is ensured
even with few volts difference between the regulated output
voltage and the peak input voltage.
The AC mains voltage is rectified by a diode bridge and
delivered to the boost converter which boosts the rectified input
voltage to a higher regulated DC bus VO.
The error amplifier compares a portion of the output voltage with
an internal reference and generates a signal error proportional to
the difference between them. The bandwidth of the internal error
Publication Order Number: [BW6562A]
© Bruckewell Technology Corporation Rev. A -2014
BW6562A
High PFC LED Driver
Disclaimer
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