Schematic for the NCP59749MN2ADJTBGEVB Evaluation Board R4 100K VIN TP1 GND PG VOUT VIN C5 N.A. C1 1µF VBIAS IN OUT IN OUT IN OUT IN OUT BIAS TP2 1.2V / 0 to 3A VOUT R1 2K49 C2 C6 4.7µF N.A. FB EN EN 1 2 3 SS JP1 C3 R3 GND 100K 4.7µF C4 GND PG GND R2 560pF IC1 NCP59749 4K99 Exposed Pad connected to GND Jumper JP1 setup: 123 all pins open 1-2 3 pins1 and 2 joined 1 2-3 pins2 and 3 joined 7/23/2014 = Demo Board controlled by voltage on the Enable input pin = Demo Board allways ON. Do not connect the Enable input pin to any external voltage. = Demo Board controlled by voltage on the Enable input pin with Pull Down Resistor to GND. -1- www.onsemi.com