ມཚ ڢ12/14/16࿋ 1GSPSຕఇገ࣑ഗ AD9776A/AD9778A/AD9779A ༬Ⴀ ߁ຎ )ࡼࠀگඇև߾ፕཉॲူ*ǖ1.0 W (1 GSPS)Lj!!!!!!!!!!!!!! 100ᆅগĂࡰಎTQFPހጎ AD9776A/AD9778A/AD9779Aݴ՚ມཚڢĂ12/14/16࿋Ă ߛۯༀྷݔຕఇገ࣑ഗ(DAC)Lj༵ࠃ1 GSPS֑ᄣ୲Lj ᅜׂิፌߛٳలઊຯ༬ೕ୲ܠڦሜհăኄၵഗॲਏᆶኍܔ থՎೕدᆌᆩႜᆫࣅڦ༬ႠLjԈઔްຕຕጴۙᅜ तሺᅮᇑ฿ۙցăDACঢ়ࡗᆫࣅLjᅜᇑఇెኟ ۙഗފথ੨Lj૩සADIࠅິڦADL537x FMODဣଚۙ ഗăෙ၍๕থ੨ሎႹܔႹాܠև֖ຕႜՊ܁࣮ࢅײă ଉײୁۉᅜሞ10 mA30 mAాྷݔႜՊײăኄ ၵഗॲ֑ᆩံڦ0.18 μm CMOS߾ᅝሰLj֑ᆩ1.8 Vࢅ 3.3 VۉᇸࠃۉLjጺࠀࡼྺ1.0 WLjժ֑ᆩ100ᆅগגԋ຺ݛ Ռೝހጎ(TQFP)ă ᆌᆩ ׂঋ! ၍एإยแǖW-CDMAĂCDMA2000ĂTD-SCDMAĂWiMAXĂ 1. 600 mW (500 MSPS) ڇሜհW-CDMA ACLR = 80 dBc (80 MHz ዐೕ) ۙఇెǖ8.7 mA31.7 mA)RL = 25 Ω50 Ω* ႎᆗڦ2×Ă4×Ă8×֭ኵഗ/ٚۙްຕۙഗᅜॽሜհݣሞDAC ټዐڦඪࢆ࿋ዃ ޤዺDACᅜ੦ྔևVGAत฿ۙ ܠႊೌཞօথ੨ ߛႠీĂگሯำ၎࣍(PLL)้ዓԠೕഗ ຕጴݒsinc୳հഗ GSMĂLTE 2. 3. ຕጴߛ/گዐೕࢇׯ ాևຕጴฉՎೕࠀీ ݀พݴण 4. 5. ټཚ႑ǖLMDS/MMDSĂۅܔۅ ૧ᆩگגሯำᇑۙ฿ኈ(IMD)༬ႠLjٗएߛڟټዐ ೕټڦ႑ࡽᅜํ၄ߛዊଉࢇׯă ጆᆶڦDACਸ࠲रຍሺഽۯༀႠీă ୁۉದዃ०ՍLjᅜᆩᇀ߳ዖ܋ڇईֶۉݴୟྊ ೫ࠓă CMOSຕথ੨Ljਏᆶۙॺڦ૬ᇑԍీࠀă ႎᆗڦ2×Ă4×Ă8×֭ኵഗ/ٚۙްຕۙഗᅜॽሜհ ݣሞDACټዐڦඪࢆ࿋ዃă ۆ႙႑ࡽ૾ QUADRATURE MODULATOR/ MIXER/ AMPLIFIER COMPLEX I AND Q DC LO DC DIGITAL INTERPOLATION FILTERS I DAC POST DAC ANALOG FILTER Q DAC AD9776A/AD9778A/AD9779A A 06452-114 FPGA/ASIC/DSP 1 Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007–2008 Analog Devices, Inc. All rights reserved. ADIዐ࿔Ӳຕ֩ᆈ࿔Ӳຕ֩ڦᅳ࿔Lj൩ଌᅳዐీ٪ሞڦᇕჾፇኯईᅳٱဃLjADIփܔᅳዐ٪ሞֶڦᅴईᆯׂُิٱڦဃሴăසႴඓණඪࢆَᇕڦጚඓႠLj൩֖ADI༵ࠃ ڦፌႎᆈ࿔Ӳຕ֩ă AD9776A/AD9778A/AD9779A ణ ༬Ⴀ 1 ! ᆌᆩ 1 DAC֑ᄣ้ዓᇸ 39 ߁ຎ ݒSinc୳հഗ 38 1 ! থ้ዓ 39 ׂঋ 1 ! ้ዓԠೕ 39 ۆ႙႑ࡽ૾ 1 ! ൻۯREFCLK 42 Ⴊ۩૦๏ 3 ׂิଉୁۉײ 43 ࠀీ 4 ! 43 रຍࡀ߭ 5 ሺᅮࢅ฿ۙၯኟ ! ୁࡀ߭ 5 ! ຕጴࡀ߭ 6 ! ຕጴຕ้Ⴞࡀ߭ 7 ! ୁࡀ߭ 8 ! ਨܔፌۨܮٷኵ 9 ຕ܋੨ 46 ! ඤፆ 9 ! ܋ڇ੨ఇ๕ 46 ! ాևएጚۉუᇸ 44 I/Qཚڢሺᅮದ 44 ޤዺDAC֡ፕ 44 LOઍཚց 45 ሺᅮࢅ฿ۙၯኟࡕ 45 9 ! ມ܋੨ఇ๕ 46 ᆅগದዃࢅࠀీ௮ຎ 10 ! ຕᅜDATACLKྺ֖ 46 ۆ႙߾ፕ༬Ⴀ 16 ! ຕᅜREFCLKྺ֖ 47 ຍᇕ 24 ! ᆫࣅຕ้Ⴞ 48 ߾ፕᇱ 25 ഗॲཞօ 49 ! ཞօஇड߁ຎ 49 25 ! ഗॲᇑဣཥ้ዓཞօ 50 ෙ၍๕থ੨ 26 ! ዐ൩൱֡ፕ 50 ! زႜথ੨ڦཚᆩ֡ፕ 26 ࠀࡼ 51 ! ኸସጴব 26 ! 52 ! زႜথ੨܋੨ᆅগࠀీ௮ຎ 27 ೠࠚӱ߁ຎ 53 27 ! 53 ෙ၍๕থ੨स٪ഗᆙพ 28 ྔႚ٫ 55 ֭ኵ୳հഗࠓ 33 ! 55 ! ֭ኵ୳հഗټ၌ 37 ESDয়ߢ AD9776/AD9778/AD9779ᇑAD9776A/AD9778A/ AD9779Aڦ൶՚ MSB/LSBد Rev. B | Page 2 of 56 ۖࢅۉႩఇ๕ ೠࠚӱ֡ፕ ۩ࠔኸళ AD9776A/AD9778A/AD9779A Ⴊ۩૦๏ 20089ሆ—Ⴊ۩ӲAႪ۩ӲB زႜྔยথ੨(SPI)ඇև߀ྺෙ၍๕থ੨ 1 أ79ǗዘႎӀႾՊࡽ 41 ߸߀༬Ⴀևݴ 1 ߸߀LOઍཚցևݴ 45 ߸߀ᆌᆩևݴ 1 ߸߀28 47 ߸߀1ڦओݥݴ၍Ⴀ(INL)֖ຕ 5 ߸߀ᆫࣅຕ้Ⴞևݴ 48 ߸߀2ڦDAC้ዓ(REFCLK+, REFCLK−)֖ຕ 6 ߸߀ཞօஇड߁ຎևݴ 49 ߸߀3ڦຕ֖ຕ 7 ߸߀88 49 ߸߀3ڦԍ้क़֖ຕ 7 ߸߀101 53 3ሺेෙ၍๕থ੨֖ຕ 7 أ๑ᆩADL5372ኟۙഗևࢅݴ104 51 3ሺेް࿋֖ຕ 7 أೠࠚӱᇱևࢅݴ105ǗዘႎӀႾՊࡽ 52 ߸߀3ڦ࿂ጀ 7 أ106 53 3ሺेࡰಎጀLj߸߀7 10 أ107 54 4ሺेࡰಎጀLj߸߀8 12 أ108 55 5ሺेࡰಎጀLj߸߀9 14 أ109 56 ߸߀DATACLKჽྷݔևݴ 25 أ110 57 ߸߀ӲԨस٪ഗևݴ 25 أ111 58 ߸߀10 25 أ112 59 ߸߀12 26 ߸ႎྔႚ٫ 60 ߸߀13 28 ߸߀14 29 20083ሆ—Ⴊ۩Ӳ0Ⴊ۩ӲA ߸߀֭ኵ୳հഗࠓևݴ 33 ߸߀༬Ⴀ 1 ߸߀60 34 ሺेጀ2 4 ߸߀19 36 ߸߀2 5 ߸߀֭ኵ୳հഗټ၌ևݴ 37 ߸߀3 6 ߸߀70 37 ߸߀ඤፆևݴ 7 ሺेຕጴۙևݴ 37 ֭6 8 ሺे20ࢅ21ǗዘႎӀႾՊࡽ 38 ߸߀7ڦᆅগ39௮ຎ 9 ሺेݒSinc୳հഗևݴ 38 ߸߀8ڦᆅগ39௮ຎ 10 ሺे71ǗዘႎӀႾՊࡽ 38 ߸߀9ڦᆅগ39௮ຎ 12 ߸߀้ዓԠೕևݴ 39 ߸߀߾ፕᇱևݴ 23 ߸߀72 39 ߸߀10 23 ߸߀ದዃPLLೕስኵևݴ 39 ߸߀13 26 ߸߀૧ᆩ࿒܈ॠ֪ದዃPLLೕስևݴ 41 ߸߀14 27 ߸߀૧ᆩ٪ئഗႜᅙኪ࿒܈ၯጚևݴ 41 ߸߀֭ኵ୳հഗࠓևݴ 33 ߸߀“ᅃહᆦᅥ”ڦഗॲၜևݴ 41 ༺࣑DAC֑ᄣ้ዓᇸևݴ 36 ሺे26 41 ༺࣑݀พୟ০ሺᅮࢅ฿ۙၯኟևݴ 40 ߸߀ాևएጚۉუᇸևݴ 43 ༺࣑ຕ܋੨ևݴ 42 ݀พୟ০ሺᅮࢅ฿ۙၯኟՔ༶߀ྺሺᅮࢅ฿ۙၯኟ 44 ༺࣑ഗॲཞօևݴ 45 ߸߀I/Qཚڢሺᅮದևݴ 44 أ112117 58 ߸߀ޤዺDAC֡ፕևݴ 44 ߸࣑79 45 20078ሆ—Ⴊ۩Ӳ0ǖ؛๔Ӳ Rev. B | Page 3 of 56 AD9776A/AD9778A/AD9779A ࠀీ DELAY LINE CLOCK GENERATION/DISTRIBUTION SYNC_I DATACLK CLOCK MULTIPLIER 2×/4×/8× DELAY LINE DATA ASSEMBLER SINC^-1 2× 2× 2× n × fDAC /8 n = 0, 1, 2 ... 7 Q LATCH 2× 2× 2× SINC^-1 DIGITAL CONTROLLER 10 16-BIT I DAC 16-BIT Q DAC OUT1_P OUT1_N OUT2_P OUT2_N VREF I120 GAIN 10 GAIN SERIAL PERIPHERAL INTERFACE POWER-ON RESET 10 AD9779A GAIN AUX1_P AUX1_N GAIN AUX2_P AUX2_N 06452-001 10 SDO SDIO SCLK CSB P2D[15:0] REFCLK– COMPLEX MODULATOR P1D[15:0] I LATCH REFCLK+ REFERENCE AND BIAS SYNC_O 2. AD9779Aࠀీ Rev. B | Page 4 of 56 AD9776A/AD9778A/AD9779A रຍࡀ߭! ୁࡀ߭ TMINTMAXLjAVDD33 = 3.3 VLjDVDD33 = 3.3 VLjDVDD18 = 1.8 VLjCVDD18 = 1.8 VLjIOUTFs = 20 mALjፌ֑ٷᄣ୲Lj ݥأଷᆶຫLj 1 ֖ຕ ݴՐ୲ ܈ ! ྲݥݴ၍Ⴀ(DNL) ! ओݥݴ၍Ⴀ(INL) ዷDAC ! ฿ۙဃֶ ! ሺᅮဃֶ(๑ᆩాևएጚۉუᇸ) ! ଉײୁۉ1 ! ۉუྷݔ ! ۉፆ ! ዷDACۙڇႠ ዷDAC࿒܈ᅎ ฿ۙ ሺᅮ एጚۉუ ޤዺDAC ݴՐ୲ ଉײୁۉ1 ۉუྷݔDŽᇸDž ۉუྷݔDŽဌDž ۉፆ ޤዺDACۙڇႠ ፌၭኵ 1 एᇀ10 kΩྔևۉፆ 2 ၘ൧९ࠀࡼևݴă ፌၭኵ ±0.1 ±0.86 −0.001 8.66 −1.0 0 ±2 20.2 AD9778A ۆ႙ኵ ፌٷኵ 14 ፌၭኵ ±0.65 ±1.5 +0.001 −0.001 31.66 +1.0 8.66 −1.0 0 ±2 20.2 AD9779A ۆ႙ኵ ፌٷኵ ڇ࿋ 16 Bits ±2.1 ±6.0 +0.001 −0.001 31.66 +1.0 8.66 −1.0 0 ±2 20.2 10 ԍኤ 10 ԍኤ 10 ԍኤ 0.04 100 30 0.04 100 30 0.04 100 30 10 −1.998 0 0.8 एጚۉუ ాևएጚۉუ. ۉፆ ఇెۉᇸۉუ AVDD33 CVDD18 ຕጴۉᇸۉუ DVDD33 DVDD18 ࠀࡼ2 1×ఇ๕LjfDAC=100 MSPSLjIF=1MHz 2×ఇ๕LjfDAC = 320 MSPSLjIF = 16 MHzLjPLL࠲ 2×ఇ๕LjfDAC = 320 MSPSLjIF = 16 MHzLjPLLਸ 4×ఇ๕LjfDAC/4ۙLjfDAC=500 MSPSLj IF = 137.5 MHzLjQ DAC࠲ 8×ఇ๕LjfDAC/4ۙLjfDAC = 1 GSPSLj IF = 262.5 MHz ! ۖۉఇ๕ ! ۉᇸۉუᅞԲ(AVDD33) ߾ፕྷݔ AD9776A ۆ႙ኵ ፌٷኵ 12 10 +1.998 1.6 1.6 −1.998 0 0.8 LSB LSB +0.001 31.66 +1.0 ppm/°C ppm/°C ppm/°C 10 +1.998 1.6 1.6 −1.998 0 0.8 +1.998 1.6 1.6 1 ԍኤ 1 ԍኤ 1 ԍኤ 1.2 5 1.2 5 1.2 5 % FSR % FSR mA V MΩ Bits mA V V MΩ V kΩ 3.13 1.70 3.3 1.8 3.47 2.05 3.13 1.70 3.3 1.8 3.47 2.05 3.13 1.70 3.3 1.8 3.47 2.05 V V 3.13 1.70 3.3 1.8 3.47 2.05 3.13 1.70 3.3 1.8 3.47 2.05 3.13 1.70 3.3 1.8 3.47 2.05 V V 250 498 588 572 300 250 498 588 572 300 250 498 588 572 300 mW mW mW mW 980 2.5 −0.3 −40 +25 980 9.8 +0.3 +85 2.5 −0.3 −40 Rev. B | Page 5 of 56 +25 980 9.8 +0.3 +85 2.5 −0.3 −40 +25 mW 9.8 +0.3 +85 mW % FSR/V °C AD9776A/AD9778A/AD9779A ຕጴࡀ߭ TMINTMAXLjAVDD33 = 3.3 VLjDVDD33 = 3.3 VLjDVDD18 = 1.8 VLjCVDD18 = 1.8 VLjIOUTFs = 20 mALjፌ֑ٷᄣ୲Ljݥأ ଷᆶຫLjLVDSൻۯഗࢅথഗग़ඹIEEE-1596ၭ૾ྷݔୟLjݥأଷᆶຫă 2 ֖ຕ! CMOSஇडۉೝ VINஇडߛ VINஇडگ ֭ኵ้ፌٷຕ୲ 1× 2× 4× 8× CMOSஇडۉೝ(DATACLK, PIN 37)1 ! VOUTஇडߛ ! VOUTஇडگ DATACLKԲ LVDSথഗ(SYNC_I+, SYNC_I−) ! ۉუྷݔVIAईVIB ! ֶݴពኵVIDTH ! ֶݴውVIDTHH − VIDTHL ! থഗֶݴፆੇRIN LVDS୲ SYNC_IREFCLKॺ૬้क़ SYNC_IREFCLKԍ้क़ LVDSൻۯഗ(SYNC_O+, SYNC_O−) ۉუߛVOAईVOB ۉუگVOAईVOB ۉݴֶუ|VOD| ฿ۙۉუVOS ፆੇRO DAC้ዓ(REFCLK+, REFCLK−) ! ֶރރݴኵۉუ ! ࠌఇۉუ ! ፌ้ٷዓ୲ 1 ཉॲ! ፌၭኵ!ۆ႙ኵ!ፌٷኵ! ڇ࿋ 2.0 0.8 DVDD18, CVDD18 = 1.8 V ± 5% DVDD18, CVDD18 = 1.9 V ± 5% DVDD18, CVDD18 = 2.0 V ± 2% 300 250 200 112.5 125 137.5 MSPS MSPS MSPS MSPS MSPS MSPS 2.4 250 MHzೕ୲Lj5 pFሜ 40 V V 50 0.4 60 V V % SYNC_I+ = VIA, SYNC_I− = VIB 825 −100 1575 +100 20 80 120 250 fSYNC_Iᆌᆩे၌Ǘ֖९14ዐस٪ഗ0x05Lj ࿋[3:1]ڦ௮ຎ 0.4 0.55 mV mV mV Ω MSPS ns ns SYNC_O+ = VOA, SYNC_O− = VOB, 100 Ω ܋থۉፆ 1375 ܋ڇ 1025 150 1150 80 DVDD18, CVDD18 = 1.8 V ± 5%, PLL࠲ DVDD18, CVDD18 = 1.9 V ± 5%, PLL࠲ DVDD18, CVDD18 = 2.0 V ± 2%, PLL࠲ DVDD18, CVDD18 = 2.0 V ± 2%, PLLਸ 400 300 900 1000 1100 250 ཉॲǖ100 MHz DATACLKೕ୲Lj1 kΩሜLjፌٷ8 mAൻీۯ૰ăܔᇀ߸ߛ܈ई߸ٷሜLjፌॅፔُ݆ܔ႑ࡽ๑ᆩྔև࣐؋ഗă Rev. B | Page 6 of 56 200 100 250 1250 120 800 400 2000 500 mV mV mV mV Ω mV mV MHz MHz MHz MHz AD9776A/AD9778A/AD9779A ຕጴຕ้Ⴞࡀ߭! ᆶఇ๕Lj−40°C+85°Că 3 ֖ຕ! ຕ1 ! ॺ૬้क़ ! ԍ้क़ ! ॺ૬้क़ ! ԍ้क़ ჽ 1×֭ኵ 2×֭ኵ 4×֭ኵ 8×֭ኵ ! ݒSinc ෙ၍๕থ੨ ! ፌ้ٷዓ୲(SCLK) ! ፌ܌ஞ؋ۉߛ(܈ೝ)tPWH ! ፌ܌ஞ؋ۉگ(܈ೝ)tPWL ! ॺ૬้क़tDS ! ԍ้क़tDH ! ॺ૬้क़tDS ! ຕᆶၳtDV ཉॲ ፌၭኵ! ຕDATACLK ຕDATACLK ຕREFCLK ຕREFCLK 3.0 −0.05 −0.80 3.80 ᆶईۙ! ᆶईۙ! ᆶईۙ! ᆶईۙ! 2 ፌٷኵ DACCLKዜ DACCLKዜ DACCLKዜ DACCLKዜ DACCLKዜ 40 12.5 12.5 SDIOSCLK SDIOSCLK CSBSCLK SDOSCLK ڇ࿋ ns ns ns ns 25 70 146 297 18 2.8 0.0 2.8 2.0 ฉ้ۉक़2 ް࿋ ! ፌ܌ஞ؋ۉߛ(܈ೝ) 1 ۆ႙ኵ 260 2 MHz ns ns ns ns ns ns ms DACCLKዜ ۨܮኵሞPLL্ᆩཉॲူ֪ڥă้Ⴞᇑ࿒࠲ڦ܈ဣᅜतຕᆶၳፆشڔ੨(ྺඓԍኟඓ֑ᄣLjഗॲᆶၳຕՂႷ၄ !ڦፌ ้܌क़)९28ă ړस٪ഗ0x00࿋4ٗ1ႀྺ0้LjٗCSBฉืᄂ֪ڦڥኵǗVREFඁ᳘ۉඹྺ0.1 μFă Rev. B | Page 7 of 56 AD9776A/AD9778A/AD9779A ୁࡀ߭ TMINTMAXLjAVDD33 = 3.3 VLjDVDD33 = 3.3 VLjDVDD18 = 1.8 VLjCVDD18 = 1.8 VLjIOUTFs = 20 mALjፌ֑ٷᄣ୲Lj ݥأଷᆶຫLj 4 参数 AD9776A AD9778A AD9779A ፌၭኵ!ۆ႙ኵ ፌٷኵ ፌၭኵ!ۆ႙ኵፌٷኵ ፌၭኵ!ۆ႙ኵፌٷኵ ڇ࿋! ሗොۯༀ(ྷݔSFDR) fDAC = 100 MSPS, fOUT = 20 MHz fDAC = 200 MSPS, fOUT = 50 MHz fDAC = 400 MSPS, fOUT = 70 MHz fDAC = 800 MSPS, fOUT = 70 MHz 82 81 80 85 82 81 80 85 82 82 80 87 dBc dBc dBc dBc 87 80 75 75 87 85 81 80 91 85 81 81 dBc dBc dBc dBc −152 −155 −157.5 −155 −159 −160 −158 −160 −161 dBm/Hz dBm/Hz dBm/Hz 76 69 78 73 79 74 dBc dBc 77.5 76 80 78 81 78 dBc dBc ມᅼۙ฿ኈ(IMD) fDAC = 200 MSPS, fOUT = 50 MHz fDAC = 400 MSPS, fOUT = 60 MHz fDAC = 400 MSPS, fOUT = 80 MHz fDAC = 800 MSPS, fOUT = 100 MHz ሯำ(܈NSD)LjӗᅼLj500 kHzᅼक़ਐ fDAC = 200 MSPS, fOUT = 80 MHz fDAC = 400 MSPS, fOUT = 80 MHz fDAC = 800 MSPS, fOUT = 80 MHz W-CDMAତڢႅԲ(ACLR)Ljڇሜհ fDAC = 491.52 MSPS, fOUT = 100 MHz fDAC = 491.52 MSPS, fOUT = 200 MHz W-CDMAܾڼତڢႅԲ(ACLR)Ljڇሜհ fDAC = 491.52 MSPS, fOUT = 100 MHz fDAC = 491.52 MSPS, fOUT = 200 MHz Rev. B | Page 8 of 56 AD9776A/AD9778A/AD9779A ਨܔፌۨܮٷኵ 5 ֖ຕ! AVDD33, DVDD33 DVDD18, CVDD18 AGND DGND CGND I120, VREF, IPTAT ၎ܔᇀ! AGND, DGND, CGND AGND, DGND, CGND DGND, CGND AGND, CGND AGND, DGND AGND AGND OUT1_P, OUT1_N, OUT2_P, OUT2_N, AUX1_P, AUX1_N, AUX2_P, AUX2_N P1D[15:0], P2D[15:0] DGND DATACLK, TXENABLE DGND REFCLK+, REFCLK− CGND RESET, IRQ, PLL_LOCK, SYNC_O+, SYNC_O−, SYNC_I+, SYNC_I−, CSB, SCLK, SDIO, SDO ࿒! ٪ئ࿒!!ྷݔ܈ DGND ۨܮኵ −0.3 V +3.6 V −0.3 V +2.1 V −0.3 V +0.3 V −0.3 V +0.3 V −0.3 V +0.3 V −0.3 V AVDD33 + 0.3 V −1.0 V AVDD33 + 0.3 V −0.3 V DVDD33 + 0.3 V −0.3 V DVDD33 + 0.3 V −0.3 V CVDD18 + 0.3 V −0.3 V DVDD33 + 0.3 V ጀᅪLjגฉຎਨܔፌۨܮٷኵీࣷڞዂഗॲᆦ৳Ⴀ ࣋ăኄၵኻፌۨܮٷኵLjփᅪ࿆ጣഗॲᅜሞኄၵईኁ ඪࢆഄגԨरຍࡀ߭ກዐࠀీႠ֡ፕቤবՔڦཉ ॲူీࠕኟ߾ፕăሞਨܔፌۨܮٷኵཉॲူ߾ፕࣷ ᆖၚഗॲڦ੍Ⴀă ඤፆ ܔᇀ100ᆅগĂොඤሺഽ႙TQFPހጎLjྺํ၄ፌॅොඤႠ ీLjᆌॽࡰಎ(EPAD)ࡰথথ֫ںă ۆ႙θJAࢅθJCࡀ߭ᆩᇀৢኹഘူڦ4֫ۉୟӱăഘୁ ۯሺഽොඤLjᆶၳইگθJAă 6. ඤፆ ހጎૌ႙! 100ᆅগTQFP ! ࡰথEPAD ! փࡰEPAD θJA θJB θJC ڇ࿋ 19.1 27.4 12.4 7.1 °C/W °C/W ESD য়ߢ +125°C −65°C +150°C Rev. B | Page 9 of 56 ESD(ৢߌ௺)ۉݣۉഗॲă ۉټഗॲࢅۉୟӱీࣷሞுᆶִਥڦ൧ူۉݣă ࠶Ԩׂਏᆶጆ૧ईጆᆶԍࢺۉୟLjڍሞᇜీߛڟ ଉESD้Ljഗॲీࣷ࣋ăᅺُLjᆌ֑ړൽڦړ ESDٯݔݞแLjᅜՆ௨ഗॲႠీူইईࠀీෟ฿ă AD9776A/AD9778A/AD9779A AVDD33 AGND AVDD33 AGND AVDD33 AGND AGND OUT2_P OUT2_N AGND AUX2_P AUX2_N AGND AUX1_N AUX1_P AGND OUT1_N OUT1_P AGND AGND AGND AVDD33 AVDD33 AGND AVDD33 ᆅগದዃࢅࠀీ௮ຎ 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 CVDD18 1 CVDD18 2 75 I120 74 CGND 3 VREF 73 CGND IPTAT 4 72 AGND REFCLK+ 5 71 IRQ REFCLK– 6 70 RESET CGND 7 69 CSB CGND 8 68 SCLK CVDD18 9 AD9776A 67 SDIO TOP VIEW (Not to Scale) 66 SDO 65 PLL_LOCK AGND 12 64 DGND SYNC_I+ 13 63 SYNC_O+ SYNC_I– 14 62 SYNC_O– DGND 15 61 DVDD33 DVDD18 16 60 DVDD18 P1D11 17 59 NC P1D10 18 58 NC P1D9 19 57 NC P1D8 20 56 NC P1D7 21 55 P2D0 DGND 22 54 DGND DVDD18 23 53 DVDD18 P1D6 24 52 P2D1 P1D5 25 51 P2D2 PIN 1 ANALOG DOMAIN DIGITAL DOMAIN CVDD18 10 CGND 11 06452-002 P2D3 P2D4 P2D5 P2D6 P2D7 P2D8 DGND DVDD18 P2D9 P2D10 P2D11 TXENABLE/IQSELECT NOTES 1. FOR OPTIMAL THERMAL PERFORMANCE, THE EXPOSED PAD SHOULD BE SOLDERED TO THE GROUND PLANE FOR THE 100-LEAD, THERMALLY ENHANCED TQFP PACKAGE. DVDD33 DATACLK NC NC NC DVDD18 NC DGND P1D0 P1D1 P1D2 P1D3 P1D4 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 NC = NO CONNECT 3. AD9776Aᆅগದዃ 7. AD9776Aᆅগࠀీ௮ຎ ᆅগ Պࡽ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ᆅগఁ! CVDD18 CVDD18 CGND CGND REFCLK+ REFCLK− CGND CGND CVDD18 CVDD18 CGND AGND SYNC_I+ SYNC_I− DGND DVDD18 ௮ຎ 1.8 V้ዓۉᇸ 1.8 V้ዓۉᇸ ้ዓں ้ዓں ֶ้ݴዓ ֶ้ݴዓ ้ዓں ้ዓں 1.8 V้ዓۉᇸ 1.8 V้ዓۉᇸ ้ዓں ఇెں ֶݴཞօ ֶݴཞօ ຕጴں 1.8 Vຕጴۉᇸ ᆅগ Պࡽ 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Rev. B | Page 10 of 56 ᆅগఁ! P1D11 P1D10 P1D9 P1D8 P1D7 DGND DVDD18 P1D6 P1D5 P1D4 P1D3 P1D2 P1D1 P1D0 NC DGND ௮ຎ ܋੨1ຕD11(MSB) ܋੨1ຕD10 ܋੨1ຕD9 ܋੨1ຕD8 ܋੨1ຕD7 ຕጴں 1.8 Vຕጴۉᇸ ܋੨1ຕD6 ܋੨1ຕD5 ܋੨1ຕD4 ܋੨1ຕD3 ܋੨1ຕD2 ܋੨1ຕD1 ܋੨1ຕD0(LSB) փথ ຕጴں AD9776A/AD9778A/AD9779A ᆅগ Պࡽ 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 ᆅগఁ! DVDD18 NC NC NC DATACLK DVDD33 TXENABLE/ IQSELECT P2D11 P2D10 P2D9 DVDD18 DGND P2D8 P2D7 P2D6 P2D5 P2D4 P2D3 P2D2 P2D1 DVDD18 DGND P2D0 NC NC NC NC DVDD18 DVDD33 SYNC_O− SYNC_O+ DGND PLL_LOCK SDO SDIO SCLK ௮ຎ 1.8 Vຕጴۉᇸ փথ փথ փথ ຕ้ዓ 3.3 Vຕጴۉᇸ ݀ໃ๑ీă܋ڇ੨ఇ๕ူLj ُᆅগᄺᆩፕIQSELECTă ܋੨2ຕD11 (MSB) ܋੨2ຕD10 ܋੨2ຕD9 1.8 Vຕጴۉᇸ ຕጴں ܋੨2ຕD8 ܋੨2ຕD7 ܋੨2ຕD6 ܋੨2ຕD5 ܋੨2ຕD4 ܋੨2ຕD3 ܋੨2ຕD2 ܋੨2ຕD1 1.8 Vຕጴۉᇸ ຕጴں ܋੨2ຕD0 (LSB) փথ փথ փথ փথ 1.8 Vຕጴۉᇸ 3.3 Vຕጴۉᇸ ֶݴཞօ ֶݴཞօ ຕጴں PLLۨኸ๖ ෙ၍๕থ੨܋੨ຕ ෙ၍๕থ੨܋੨ຕ/ ෙ၍๕থ੨܋੨้ዓ ᆅগ Պࡽ 69 70 71 72 73 ᆅগఁ! CSB RESET IRQ AGND IPTAT 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 VREF I120 AVDD33 AGND AVDD33 AGND AVDD33 AGND AGND OUT2_P OUT2_N AGND AUX2_P AUX2_N AGND AUX1_N AUX1_P AGND OUT1_N OUT1_P AGND AGND AVDD33 AGND AVDD33 AGND AVDD33 Rev. B | Page 11 of 56 ௮ຎ ෙ၍๕থ੨܋੨ೌ႑ࡽ ް࿋Ljߛۉೝᆶၳ ዐ൩൱ ఇెں ߾֪ᆅগă ୁۉᇑਨܔ࿒ׯ܈Բ૩Lj 25°C้ሀྺ14 μALjၽ୲ሀྺ20 nA/°Că ُᆅগᆌԍޝă एጚۉუ 120 μAएጚୁۉ 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ ఇెں ఇెں ཚڢ2ֶݴDACୁۉ ཚڢ2ֶݴDACୁۉ ఇెں ཚڢ2ޤዺDACୁۉ ཚڢ2ޤዺDACୁۉ ఇెں ཚڢ1ޤዺDACୁۉ ཚڢ1ޤዺDACୁۉ ఇెں ཚڢ1ֶݴDACୁۉ ཚڢ1ֶݴDACୁۉ ఇెں ఇెں 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ AGND AVDD33 AGND AVDD33 AGND AVDD33 OUT2_P AGND OUT2_N AUX2_P AGND AGND AUX2_N AUX1_P AUX1_N AGND OUT1_N OUT1_P AGND AGND AVDD33 AGND AVDD33 AGND AVDD33 AD9776A/AD9778A/AD9779A 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 CVDD18 1 CVDD18 2 75 I120 74 CGND 3 VREF 73 CGND IPTAT 4 72 AGND REFCLK+ 5 71 IRQ REFCLK– 6 70 RESET CGND 7 69 CSB CGND 8 68 SCLK CVDD18 9 AD9778A 67 SDIO TOP VIEW (Not to Scale) 66 SDO 65 PLL_LOCK AGND 12 64 DGND SYNC_I+ 13 63 SYNC_O+ SYNC_I– 14 62 SYNC_O– DGND 15 61 DVDD33 DVDD18 16 60 DVDD18 P1D13 17 59 NC P1D12 18 58 NC P1D11 19 57 P2D0 P1D10 20 56 P2D1 P1D9 21 55 P2D2 DGND 22 54 DGND DVDD18 23 53 DVDD18 P1D8 24 52 P2D3 P1D7 25 51 P2D4 PIN 1 ANALOG DOMAIN DIGITAL DOMAIN CVDD18 10 CGND 11 P2D6 P2D5 P2D7 P2D8 P2D9 P2D10 DGND P2D11 DVDD18 P2D13 DVDD33 P2D12 06452-003 NOTES 1. FOR OPTIMAL THERMAL PERFORMANCE, THE EXPOSED PAD SHOULD BE SOLDERED TO THE GROUND PLANE FOR THE 100-LEAD, THERMALLY ENHANCED TQFP PACKAGE. TXENABLE/IQSELECT DATACLK NC NC P1D0 DVDD18 DGND P1D1 P1D2 P1D3 P1D4 P1D5 P1D6 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 NC = NO CONNECT 4. AD9778Aᆅগದዃ 8. AD9778Aᆅগࠀీ௮ຎ ᆅগ Պࡽ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 ᆅগఁ! CVDD18 CVDD18 CGND CGND REFCLK+ REFCLK− CGND CGND CVDD18 CVDD18 CGND AGND SYNC_I+ SYNC_I− DGND DVDD18 P1D13 P1D12 ௮ຎ 1.8 V้ዓۉᇸ 1.8 V้ዓۉᇸ ้ዓں ้ዓں ֶ้ݴዓ ֶ้ݴዓ ้ዓں ้ዓں 1.8 V้ዓۉᇸ 1.8 V้ዓۉᇸ ้ዓں ఇెں ֶݴཞօ ֶݴཞօ ຕጴں 1.8 Vຕጴۉᇸ ܋੨1ຕD13 (MSB) ܋੨1ຕD12 ᆅগ Պࡽ 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Rev. B | Page 12 of 56 ᆅগఁ! P1D11 P1D10 P1D9 DGND DVDD18 P1D8 P1D7 P1D6 P1D5 P1D4 P1D3 P1D2 P1D1 DGND DVDD18 P1D0 NC NC ௮ຎ ܋੨1ຕD11 ܋੨1ຕD10 ܋੨1ຕD9 ຕጴں 1.8 Vຕጴۉᇸ ܋੨1ຕD8 ܋੨1ຕD7 ܋੨1ຕD6 ܋੨1ຕD5 ܋੨1ຕD4 ܋੨1ຕD3 ܋੨1ຕD2 ܋੨1ຕD1 ຕጴں 1.8 Vຕጴۉᇸ ܋੨1ຕD0 (LSB) փথ փথ AD9776A/AD9778A/AD9779A ᆅগ Պࡽ 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 ᆅগఁ! ௮ຎ DATACLK ຕ้ዓ 3.3 Vຕጴۉᇸ ݀ໃ๑ీă܋ڇ੨ఇ๕ူLj ُᆅগᄺᆩፕIQSELECTă ܋੨2ຕD13 (MSB) ܋੨2ຕD12 ܋੨2ຕD11 1.8 Vຕጴۉᇸ ຕጴں ܋੨2ຕD10 ܋੨2ຕD9 ܋੨2ຕD8 ܋੨2ຕD7 ܋੨2ຕD6 ܋੨2ຕD5 ܋੨2ຕD4 ܋੨2ຕD3 1.8 Vຕጴۉᇸ ຕጴں ܋੨2ຕD2 ܋੨2ຕD1 ܋੨2ຕD0 (LSB) փথ փথ 1.8 Vຕጴۉᇸ 3.3 Vຕጴۉᇸ ֶݴཞօ ֶݴཞօ ຕጴں PLLۨኸ๖ ෙ၍๕থ੨܋੨ຕ ෙ၍๕থ੨܋੨ຕ/ ෙ၍๕থ੨܋੨้ዓ ෙ၍๕থ੨܋੨ೌ႑ࡽ ް࿋Ljߛۉೝᆶၳ DVDD33 TXENABLE/ IQSELECT P2D13 P2D12 P2D11 DVDD18 DGND P2D10 P2D9 P2D8 P2D7 P2D6 P2D5 P2D4 P2D3 DVDD18 DGND P2D2 P2D1 P2D0 NC NC DVDD18 DVDD33 SYNC_O− SYNC_O+ DGND PLL_LOCK SDO SDIO SCLK CSB RESET ᆅগ Պࡽ 71 72 73 ᆅগఁ! IRQ AGND IPTAT ௮ຎ 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 VREF I120 AVDD33 AGND AVDD33 AGND AVDD33 AGND AGND OUT2_P OUT2_N AGND AUX2_P AUX2_N AGND AUX1_N AUX1_P AGND OUT1_N OUT1_P AGND AGND AVDD33 AGND AVDD33 AGND AVDD33 एጚۉუ 120 μAएጚୁۉ 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ ఇెں ఇెں ཚڢ2ֶݴDACୁۉ ཚڢ2ֶݴDACୁۉ ఇెں ཚڢ2ޤዺDACୁۉ ཚڢ2ޤዺDACୁۉ ఇెں ཚڢ1ޤዺDACୁۉ ཚڢ1ޤዺDACୁۉ ఇెں ཚڢ1ֶݴDACୁۉ ཚڢ1ֶݴDACୁۉ ఇెں ఇెں 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ Rev. B | Page 13 of 56 ዐ൩൱ ఇెں ߾֪ᆅগă ୁۉᇑਨܔ࿒ׯ܈Բ૩Lj 25°C้ሀྺ14 μALjၽ୲ሀྺ20 nA/°Că ُᆅগᆌԍޝă AVDD33 AGND AVDD33 AGND AVDD33 AGND AGND OUT2_P OUT2_N AGND AUX2_P AUX2_N AGND AUX1_N AUX1_P AGND OUT1_N OUT1_P AGND AGND AGND AVDD33 AVDD33 AGND AVDD33 AD9776A/AD9778A/AD9779A 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 CVDD18 1 CVDD18 2 75 I120 74 CGND 3 VREF 73 CGND IPTAT 4 72 AGND REFCLK+ 5 71 IRQ REFCLK– 6 70 RESET CGND 7 69 CSB CGND 8 68 SCLK CVDD18 9 AD9779A 67 SDIO TOP VIEW (Not to Scale) 66 SDO 65 PLL_LOCK AGND 12 64 DGND SYNC_I+ 13 63 SYNC_O+ SYNC_I– 14 62 SYNC_O– DGND 15 61 DVDD33 DVDD18 16 60 DVDD18 P1D15 17 59 P2D0 P1D14 18 58 P2D1 P1D13 19 57 P2D2 P1D12 20 56 P2D3 P1D11 21 55 P2D4 DGND 22 54 DGND DVDD18 23 53 DVDD18 P1D10 24 52 P2D5 P1D9 25 51 P2D6 PIN 1 ANALOG DOMAIN DIGITAL DOMAIN CVDD18 10 CGND 11 P2D7 P2D8 P2D9 P2D10 P2D11 P2D12 DGND DVDD18 P2D13 P2D14 P2D15 06452-004 NOTES 1. FOR OPTIMAL THERMAL PERFORMANCE, THE EXPOSED PAD SHOULD BE SOLDERED TO THE GROUND PLANE FOR THE 100-LEAD, THERMALLY ENHANCED TQFP PACKAGE. TXENABLE/IQSELECT DVDD33 DATACLK P1D0 P1D1 P1D2 DVDD18 P1D3 DGND P1D4 P1D5 P1D6 P1D7 P1D8 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 5. AD9779Aᆅগದዃ 9. AD9779Aᆅগࠀీ௮ຎ ᆅগ Պࡽ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 ᆅগఁ! CVDD18 CVDD18 CGND CGND REFCLK+ REFCLK− CGND CGND CVDD18 CVDD18 CGND AGND SYNC_I+ SYNC_I− DGND DVDD18 P1D15 P1D14 ௮ຎ 1.8 V้ዓۉᇸ 1.8 V้ዓۉᇸ ้ዓں ้ዓں ֶ้ݴዓ ֶ้ݴዓ ้ዓں ้ዓں 1.8 V้ዓۉᇸ 1.8 V้ዓۉᇸ ้ዓں ఇెں ֶݴཞօ ֶݴཞօ ຕጴں 1.8 Vຕጴۉᇸ ܋੨1ຕD15 (MSB) ܋੨1ຕD14 ᆅগ Պࡽ 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Rev. B | Page 14 of 56 ᆅগఁ! P1D13 P1D12 P1D11 DGND DVDD18 P1D10 P1D9 P1D8 P1D7 P1D6 P1D5 P1D4 P1D3 DGND DVDD18 P1D2 P1D1 P1D0 ௮ຎ ܋੨1ຕD13 ܋੨1ຕD12 ܋੨1ຕD11 ຕጴں 1.8 Vຕጴۉᇸ ܋੨1ຕD10 ܋੨1ຕD9 ܋੨1ຕD8 ܋੨1ຕD7 ܋੨1ຕD6 ܋੨1ຕD5 ܋੨1ຕD4 ܋੨1ຕD3 ຕጴں 1.8 Vຕጴۉᇸ ܋੨1ຕD2 ܋੨1ຕD1 ܋੨1ຕD0 (LSB) AD9776A/AD9778A/AD9779A ᆅগ Պࡽ 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 ᆅগఁ! ௮ຎ DATACLK ຕ้ዓ 3.3 Vຕጴۉᇸ ݀ໃ๑ీă܋ڇ੨ఇ๕ူLj ُᆅগᄺᆩፕIQSELECTă ܋੨2ຕD15 (MSB) ܋੨2ຕD14 ܋੨2ຕD13 1.8 Vຕጴۉᇸ ຕጴں ܋੨2ຕD12 ܋੨2ຕD11 ܋੨2ຕD10 ܋੨2ຕD9 ܋੨2ຕD8 ܋੨2ຕD7 ܋੨2ຕD6 ܋੨2ຕD5 1.8 Vຕጴۉᇸ ຕጴں ܋੨2ຕD4 ܋੨2ຕD3 ܋੨2ຕD2 ܋੨2ຕD1 ܋੨2ຕD0 (LSB) 1.8 Vຕጴۉᇸ 3.3 Vຕጴۉᇸ ֶݴཞօ ֶݴཞօ ຕጴں PLLۨኸ๖ ෙ၍๕থ੨܋੨ຕ ෙ၍๕থ੨܋੨ຕ/ ෙ၍๕থ੨܋੨้ዓ ෙ၍๕থ੨܋੨ೌ႑ࡽ ް࿋Ljߛۉೝᆶၳ DVDD33 TXENABLE/ IQSELECT P2D15 P2D14 P2D13 DVDD18 DGND P2D12 P2D11 P2D10 P2D9 P2D8 P2D7 P2D6 P2D5 DVDD18 DGND P2D4 P2D3 P2D2 P2D1 P2D0 DVDD18 DVDD33 SYNC_O− SYNC_O+ DGND PLL_LOCK SDO SDIO SCLK CSB RESET ᆅগ Պࡽ 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 Rev. B | Page 15 of 56 ᆅগఁ! IRQ AGND IPTAT VREF I120 AVDD33 AGND AVDD33 AGND AVDD33 AGND AGND OUT2_P OUT2_N AGND AUX2_P AUX2_N AGND AUX1_N AUX1_P AGND OUT1_N OUT1_P AGND AGND AVDD33 AGND AVDD33 AGND AVDD33 ௮ຎ ዐ൩൱ ఇెں ߾֪ᆅগăୁۉᇑਨܔ࿒ׯ܈Բ૩Lj 25°C้ሀྺ14 μALjၽ୲ሀྺ20 nA/°Că ُᆅগᆌԍޝă एጚۉუ 120 μAएጚୁۉ 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ ఇెں ఇెں ཚڢ2ֶݴDACୁۉ ཚڢ2ֶݴDACୁۉ ఇెں ཚڢ2ޤዺDACୁۉ ཚڢ2ޤዺDACୁۉ ఇెں ཚڢ1ޤዺDACୁۉ ཚڢ1ޤዺDACୁۉ ఇెں ཚڢ1ֶݴDACୁۉ ཚڢ1ֶݴDACୁۉ ఇెں ఇెں 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ ఇెں 3.3 Vఇెۉᇸ AD9776A/AD9778A/AD9779A ۆ႙߾ፕ༬Ⴀ 100 4 3 fDATA = 160MSPS 90 2 fDATA = 200MSPS SFDR (dBc) INL (16-BIT LSB) 1 0 –1 –2 80 70 fDATA = 250MSPS –3 60 –4 –5 10k 20k 30k 50k 40k 60k 50 CODE 0 20 40 60 80 100 fOUT (MHz) 06452-008 0 06452-005 –6 9. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj 2×֭ኵ 6. AD9779Aۆ႙INL 100 1.5 fDATA = 200MSPS fDATA = 100MSPS 1.0 90 SFDR (dBc) DNL (16-BIT LSB) 0.5 0 –0.5 80 fDATA = 150MSPS 70 –1.0 60 –1.5 20k 30k 40k 50k 60k 50 CODE 0 20 40 60 100 50 fOUT (MHz) 7. AD9779Aۆ႙DNL 10. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj 4×֭ኵ 100 100 fDATA = 100MSPS fDATA = 50MSPS 90 80 06452-009 10k 06452-010 0 06452-006 –2.0 90 fDATA = 160MSPS SFDR (dBc) 80 fDATA = 200MSPS 70 60 80 fDATA = 125MSPS 70 60 50 50 0 20 40 60 80 fOUT (MHz) 100 06452-007 SFDR (dBc) fDATA = 250MSPS 0 10 20 30 40 fOUT (MHz) 11. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj 8×֭ኵ 8. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj1×֭ኵ Rev. B | Page 16 of 56 AD9776A/AD9778A/AD9779A 100 100 90 90 PLL OFF PLL ON SFDR (dBc) fDATA = 200MSPS 70 fDATA = 250MSPS 60 80 70 60 50 50 20 40 60 80 100 fOUT (MHz) 0 06452-011 0 10 20 30 40 fOUT (MHz) 06452-014 SFDR (dBc) fDATA = 160MSPS 80 15. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj 4×֭ኵLjfDATA = 100 MSPSLjPLLਸ/࠲ 12. AD9779AྔټSFDRᇑfOUT ࠲ڦဣLj 2×֭ኵ 100 100 0dBFS –3dBFS 90 SFDR (dBc) SFDR (dBc) 90 80 fDATA = 150MSPS 70 80 –6dBFS 70 fDATA = 100MSPS 60 60 fDATA = 200MSPS 40 60 80 100 fOUT (MHz) 0 06452-012 20 20 40 60 80 06452-015 50 0 80 06452-016 50 fOUT (MHz) 13. AD9779AྔټSFDRᇑfOUT ࠲ڦဣLj 4×֭ኵ 16. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj ຕጴଉײ 100 100 10mA 90 90 SFDR (dBc) fDATA = 50MSPS 80 fDATA = 100MSPS 70 80 70 30mA fDATA = 125MSPS 60 60 50 50 0 10 20 30 40 fOUT (MHz) 50 06452-013 SFDR (dBc) 20mA 0 20 40 60 fOUT (MHz) 17. AD9779AాټSFDRᇑfOUT ࠲ڦဣLj ଉୁۉײ 14. AD9779AྔټSFDRᇑfOUT ࠲ڦဣLj 8×֭ኵ Rev. B | Page 17 of 56 AD9776A/AD9778A/AD9779A 100 100 fDATA = 160MSPS fDATA = 200MSPS 90 fDATA = 250MSPS 80 IMD (dBc) IMD (dBc) 90 70 80 fDATA = 75MSPS 70 fDATA = 100MSPS fDATA = 50MSPS 60 450 425 400 375 350 325 300 200 175 150 125 75 fOUT (MHz) 06452-020 fOUT (MHz) 100 120 100 50 80 0 60 25 40 06452-017 20 275 fDATA = 125MSPS 50 0 250 50 225 60 21. AD9779AෙIMDᇑfOUT ࠲ڦဣLj 8×֭ኵ 18. AD9779AෙIMDᇑfOUT ࠲ڦဣLj 1×֭ኵ 100 100 90 90 80 80 IMD (dBc) IMD (dBc) fDATA = 160MSPS fDATA = 200MSPS 70 PLL OFF 70 PLL ON fDATA = 250MSPS 60 60 40 60 80 100 120 140 160 180 200 220 fOUT (MHz) 0 20 40 60 80 100 120 140 160 180 200 06452-021 20 06452-018 0 360 400 06452-022 50 50 fOUT (MHz) 22. AD9779AෙIMDᇑfOUT ࠲ڦဣLj 4×֭ኵLjfDAT A = 100 MSPSLjPLLਸ/࠲ 19. AD9779AෙIMDᇑfOUT ࠲ڦဣLj 2×֭ኵ 100 100 95 90 90 IMD (dBc) fDATA = 150MSPS 70 80 75 70 fDATA = 100MSPS 65 60 60 fDATA = 200MSPS 55 50 50 0 40 80 120 160 200 240 280 320 fOUT (MHz) 360 400 06452-019 IMD (dBc) 85 80 0 40 80 120 160 200 240 280 320 fOUT (MHz) 23. AD9779AෙIMDᇑfOUT ࠲ڦဣLj50߲ᅜฉഗॲLj 4×֭ኵLjfDATA = 200 MSPS 20. AD9779AෙIMDᇑfOUT ࠲ڦဣLj 4×֭ኵ Rev. B | Page 18 of 56 AD9776A/AD9778A/AD9779A 100 *ATTEN 20dB REF 0dBm *PEAK Log 10dB 95 EXT REF DC-COUPLED 90 0dBFS IMD (dBc) 85 –3dBFS 80 75 LGAV 51 W1 S2 S3 FC AA £(f): FTUN SWP –6dBFS 70 65 60 55 40 80 120 160 200 240 280 320 360 400 fOUT (MHz) START 1.0MHz *RES BW 20kHz 24. AD9779A IMDႠీᇑfOUT ࠲ڦဣLj ຕጴଉײ)ೕ୲*ాྷݔLj 4×֭ኵLjfDATA = 200 MSPS STOP 400.0MHz SWEEP 1.203s (601 pts) VBW 20kHz 06452-024 0 06452-117 50 27. AD9779AມᅼೕLj4×֭ኵLj fDATA = 100 MSPSLjfOUT = 30 MHzĂ35 MHz 100 –142 95 –146 90 20mA 85 –150 NSD (dBm/Hz) IMD (dBc) 10mA 80 75 30mA 70 65 –3dBFS –154 0dBFS –158 –6dBFS –162 60 –166 55 –170 40 80 120 160 200 240 280 320 360 400 fOUT (MHz) 0 06452-118 0 40 60 80 fOUT (MHz) 28. AD9779Aሯำ܈ᇑfOUT࠲ڦဣLjຕጴଉײ )ೕ୲*ాྷݔLjڇᅼLj2×֭ኵLjfDATA = 200 MSPS 25. AD9779A IMDႠీᇑfOUT ࠲ڦဣLjଉײୁۉ (ೕ୲)ాྷݔLj4×֭ኵLjfDATA = 200 MSPS *ATTEN 20dB REF 0dBm *PEAK log 10dB 20 06452-025 50 –150 EXT REF DC-COUPLED –154 NSD (dBm/Hz) fDAC = 400MSPS LGAV 51 W1 S2 S3 FC AA £(f): FTUN SWP fDAC = 200MSPS –158 –162 fDAC = 800MSPS –166 26. AD9779AڇᅼೕLj 4×֭ኵLjfDATA = 100 MSPSLjfOUT = 30 MHz 0 20 40 60 fOUT (MHz) 80 100 06452-026 VBW 20kHz STOP 400.0MHz SWEEP 1.203s (601 pts) 06452-023 –170 START 1.0MHz *RES BW 20kHz 29. AD9779Aሯำ܈ᇑfOUT ࠲ڦဣLjfDAC (ೕ୲)ాྷݔLj क़ਐ500 kHzڦӗᅼLjfDATA = 200 MSPS Rev. B | Page 19 of 56 AD9776A/AD9778A/AD9779A –150 –55 –60 –154 –158 ACLR (dBc) NSD (dBm/Hz) –65 fDAC = 200MSPS fDAC = 400MSPS –162 fDAC = 800MSPS 0dBFS, PLL ENABLED –70 –6dBFS, PLL DISABLED –75 –80 –166 –85 –170 0dBFS, PLL DISABLED –3dBFS, PLL DISABLED 40 60 100 80 0 06452-027 20 fOUT (MHz) 20 40 60 80 100 120 140 160 180 200 220 240 260 fOUT (MHz) 30. AD9779Aሯำ܈ᇑfOUT ࠲ڦဣLj fDAC (ೕ୲)ాྷݔLj−6 dBFSڇᅼ 06452-301 –90 0 33. AD9779Aܾڼ၎ତೕW-CDMAڦACLRLj4×֭ኵLj fDATA = 122.88 MSPSLjೌాۙॽएټ႑ࡽገ࣑ྺIF –55 –55 –60 –60 0dBFS, PLL ENABLED –65 0dBFS, PLL DISABLED ACLR (dBc) ACLR (dBc) –65 –70 –75 –70 –6dBFS, PLL DISABLED –75 0dBFS, PLL ENABLED –3dBFS, PLL DISABLED –80 –80 –6dBFS, PLL DISABLED –85 –85 –90 –3dBFS, PLL DISABLED 0dBFS, PLL DISABLED 40 60 80 100 120 140 160 180 200 220 240 260 fOUT (MHz) 20 40 60 80 100 120 140 160 180 200 220 240 260 fOUT (MHz) 34. AD9779Aڼෙ၎ତೕW-CDMAڦACLRLj4×֭ኵLj fDATA = 122.88 MSPSLjೌాۙॽएټ႑ࡽገ࣑ྺIF 31. AD9779Aڼᅃ၎ତೕW-CDMAڦACLRLj4×֭ኵLj fDATA = 122.88 MSPSLjೌాۙॽएټ႑ࡽገ࣑ྺIF REF –25.28dBm *AVG log 10dB 0 06452-300 20 06452-302 –90 0 *ATTEN 4dB REF –30.28dBm *AVG log 10dB *ATTEN 4dB EXT REF EXT REF PAVG 10 W1 S2 VBW 300kHz RMS RESULTS FREQ OFFSET REF BW CARRIER POWER 5.000MHz 10.00MHz –12.49dBm/ 15.00MHz 3.84000MHz 3.840MHz 3.840MHz 3.840MHz CENTER 151.38MHz *RES BW 30kHz SPAN 50MHz SWEEP 162.2ms (601 pts) LOWER dBm dBc –76.75 –89.23 –80.94 –93.43 –79.95 –92.44 UPPER dBm dBc –77.42 –89.91 –80.47 –92.96 –78.96 –91.45 VBW 300kHz TOTAL CARRIER POWER –12.61dBm/15.3600MHz REF CARRIER POWER –17.87dBm/3.84000MHz 06452-031 CENTER 143.88MHz *RES BW 30kHz 1 –17.87dBm 2 –20.65dBm 3 –18.26dBm 4 –18.23dBm 32. AD9779A W-CDMA႑ࡽLj4×֭ኵLj fDATA = 122.88 MSPSLjfDAC /4ۙ FREQ OFFSET 5.000MHz 10.00MHz 15.00MHz INTEG BW 3.840MHz 3.840MHz 3.840MHz SPAN 50MHz SWEEP 162.2ms (601 pts) LOWER dBm dBc –67.70 –85.57 –70.00 –97.87 –71.65 –99.52 UPPER dBm dBc –67.70 –85.57 –69.32 –87.19 –71.00 –88.88 35. AD9779AܠሜհW-CDMA႑ࡽLj 4×֭ኵLjfDAC = 122.88 MSPSLjfDAC /4ۙ Rev. B | Page 20 of 56 06452-032 PAVG 10 W1 S2 AD9776A/AD9778A/AD9779A 100 1.5 1.0 90 0.5 SFDR (dBc) INL (14-BIT LSB) fDATA = 200MSPS fDATA = 160MSPS 0 80 fDATA = 250MSPS 70 –0.5 60 –1.0 4k 6k 8k 10k CODE 0 20 40 60 100 80 06452-036 2k 0 06452-033 50 –1.5 fOUT (MHz) 36. AD9778Aۆ႙INL 4:/!BE:889BాټTGESᇑgPVU ࠲ڦဣLj 3ġ֭ኵ 0.6 0.4 –60 0 ACLR (dBc) DNL (14-BIT LSB) 0.2 –0.2 –70 FIRST ADJACENT CHANNEL THIRD ADJACENT CHANNEL –0.4 –80 –0.6 SECOND ADJACENT CHANNEL –0.8 –90 4k 6k 8k 10k 12k 14k 16k CODE 0 37. AD9778Aۆ႙DNL 25 50 75 100 125 150 175 200 225 250 06452-037 2k 0 06452-034 –1.0 fOUT (MHz) 40. AD9778A ACLRLjڇሜհW-CDMA႑ࡽLj4×֭ኵLj fDATA = 122.88 MSPSLjޗኵ = −3 dBFS REF –25.39dBm *AVG log 10dB 100 *ATTEN 4dB 90 80 4× 200MSPS 70 4× 100MSPS PAVG 10 W1 S2 CENTER 143.88MHz *RES BW 30kHz 50 0 40 80 120 160 200 240 280 320 fOUT (MHz) 360 400 VBW 300kHz RMS RESULTS FREQ OFFSET REF BW CARRIER POWER 5.000MHz –12.74dBm/ 10.00MHz 3.84000MHz 15.00MHz 3.884MHz 3.840MHz 3.840MHz SPAN 50MHz SWEEP 162.2ms (601 pts) LOWER dBc dBm –76.49 –89.23 –80.13 –92.87 –80.90 –93.64 UPPER dBc dBm –76.89 –89.63 –80.02 –92.76 –79.53 –92.27 41. AD9778A ACLRLjfDATA = 122.88 MSPSLj 4×֭ኵLjfDAC /4ۙ 38. AD9778A IMDᇑfOUT ࠲ڦဣLj 4×֭ኵ Rev. B | Page 21 of 56 06452-038 60 06452-035 IMD (dBc) 4× 150MSPS AD9776A/AD9778A/AD9779A –150 0.20 0.15 –154 0.10 –158 DNL (12-BIT LSB) NSD (dBm/Hz) fDAC = 200MSPS fDAC = 400MSPS –162 fDAC = 800MSPS 0.05 0 –0.05 –0.10 –166 –170 –0.20 20 40 60 100 80 fOUT (MHz) 0 06452-039 0 512 1024 1536 2048 2560 3072 3584 4096 CODE 42. AD9778Aሯำ܈ᇑfOUT ࠲ڦဣLj क़ਐ500 kHzڦӗᅼLjfDATA = 200 MSPS 06452-042 –0.15 45. AD9776Aۆ႙DNL –150 100 95 90 –154 85 fDAC = 400MSPS –162 fDAC = 800MSPS 80 75 4× 100MSPS 4× 200MSPS 70 65 60 –170 50 4× 150MSPS 55 20 40 60 100 80 fOUT (MHz) 0 06452-040 0 40 80 120 160 200 240 280 320 360 400 06452-043 –166 100 06452-044 –158 IMD (dBc) NSD (dBm/Hz) fDAC = 200MSPS fOUT (MHz) 54/!BE:889Bሯำ܈ᇑgPVU ࠲ڦဣLj −7!eCGTڇᅼLjgEBUB !>!311!NTQT 46. AD9776A IMDᇑfOUT ࠲ڦဣLj 4×֭ኵ 100 0.4 0.3 90 SFDR (dBc) fDATA = 160MSPS 0.1 0 80 fDATA = 250MSPS 70 fDATA = 200MSPS –0.1 –0.2 60 –0.3 50 –0.4 0 512 1024 1536 2048 2560 3072 CODE 3584 4096 06452-041 INL (12-BIT LSB) 0.2 0 20 40 60 80 fOUT (MHz) 47. AD9776AాټSFDRᇑfOUT ࠲ڦဣLj 2×֭ኵ Figure 44. AD9776A Typical INL 44. AD9776Aۆ႙INL Rev. B | Page 22 of 56 AD9776A/AD9778A/AD9779A –55 –150 fDAC = 200MSPS –60 –154 fDAC = 400MSPS –65 –70 NSD (dBm/Hz) ACLR (dBc) FIRST ADJACENT CHANNEL THIRD ADJACENT CHANNEL –75 –158 fDAC = 800MSPS –162 –80 SECOND ADJACENT CHANNEL –166 –85 –90 75 100 125 150 175 200 225 250 FOUT (MHz) 0 20 30 40 50 60 70 80 90 100 100 fOUT (MHz) 48. AD9776A ACLRᇑfOUT ࠲ڦဣLjfDATA = 122.88 MSPSLj 4×֭ኵLjfDAC /4ۙ REF –25.29dBm *AVG log 10dB 10 06452-047 50 06452-048 25 06452-045 –170 0 50. AD9776Aሯำ܈ᇑfOUT ࠲ڦဣLj क़ਐ500 kHzڦӗᅼLjfDATA = 200 MSPS *ATTEN 4dB –150 fDAC = 200MSPS fDAC = 400MSPS NSD (dBm/Hz) –154 –158 fDAC = 800MSPS –162 –166 PAVG 10 W1 S2 VBW 300kHz RMS RESULTS FREQ OFFSET REF BW CARRIER POWER 5.000MHz 10.00MHz –12.67dBm/ 15.00MHz 3.84000MHz 3.884MHz 3.840MHz 3.840MHz SPAN 50MHz SWEEP 162.2ms (601 pts) LOWER dBm dBc –75.00 –87.67 –78.05 –90.73 –77.73 –90.41 UPPER dBm dBc –75.30 –87.97 –77.99 –90.66 –77.50 –90.17 –170 0 10 20 30 40 50 60 70 80 90 fOUT (MHz) 06452-046 CENTER 143.88MHz *RES BW 30kHz 51. AD9776Aሯำ܈ᇑfOUT ࠲ڦဣLj −6 dBFSڇᅼLjfDATA = 200 MSPS 49. AD9776AڇሜհW-CDMA႑ࡽLj4×֭ኵLj fDATA = 122.88 MSPSLjޗኵ = −3 dBFS Rev. B | Page 23 of 56 AD9776A/AD9778A/AD9779A ຍᇕ ओݥݴ၍Ⴀ(INL) ాټሗොۯༀ(ྷݔSFDR) INLۨᅭྺํाఇెᇑၙڦፌٷೋֶLjၙ ᆯٗଭۉೝڟଉײࣃڦ၍ඓۨă ాټSFDRኸ႑ࡽރڦኵ܈ޗᇑރኵሗො႑ࡽኮֶLjᆩ ݴԞ๖Ǘރኵሗො႑ࡽ࿋ᇀୁࢅຕ୲ᅃӷ ڦೕ୲ኮक़ă ྲݥݴ၍Ⴀ(DNL) DNL࢚ଉڦຕጴஓ߀Վ1 LSB้ఇెኵ)ࡃᅃࣅྺ ଉڦ*ײՎࣅă ۙڇႠ සࡕᅃ߲DACڦໜጣຕጴڦሺेܸሺेLjईኁԍ փՎLjሶDACڦۙڇă ฿ۙဃֶ ஓ0้ڦୁۉᇑၙ0ኵڦೋֶྺ฿ۙဃֶăܔᇀ IOUTALjړྺඇ0้Ljྭྺ0 mAăܔᇀIOUTBLjړ ྺඇ1้Ljྭྺ0 mAă ሺᅮဃֶ ሺᅮဃֶኸํाྷݔᇑၙྷݔኮֶLjํाྷݔ ᆯਗ਼܈ᇑڹևਗ਼܈ኮֶඓۨă ۉუ!ྷݔ ۉუྷݔኸୁۉDAC܋ඹႹۉუྷݔڦăג ፌٷ၌ኵ߾ፕీࣷᆅഐपԏࢅईऍحLjڞዂݥ၍ ႠႠీă ࿒܈ᅎ! ࿒܈ᅎ࢚ଉڦ࣍ৣ࿒(܈25°C)ኵᇑTMINईTMAXኵኮक़ڦ ፌٷՎࣅྷݔă฿ۙࢅሺᅮᅎᆩฝ܈ଉྷݔײ (FSR)ڦppm๖Ǘएጚۉუᅎᆩฝ܈ppm๖ă ۉᇸᅞ(PSR) PSR࢚ଉڦۉᇸٗፌၭۉۨܮუՎྺፌۉۨܮٷუ้Lj ଉײڦፌٷՎࣅă ॺ૬้क़! ॺ૬้क़ኸڟٳժԍሞፌዕኵᅃۨဃֶాྷݔႴ ้ڦक़Ljٗገ࣑ਸ๔ഐ֪ଉă ྔټሗොۯༀ(ྷݔSFDR) ྔټSFDRኸ႑ࡽރڦኵ܈ޗᇑރኵሗො႑ࡽኮֶLjᆩ ݴԞ๖Ǘރኵሗො႑ࡽ࿋ᇀຕ୲ڦೕ୲ DAC֑ᄣ୲ڦలઊຯ༬ೕ୲ڦೕྷݔኮాăُೕ ాీڦଉᅃӯࣷԥ֭ኵ୳հഗᅞăᅺُLj༬Ⴀ࢚ଉ ڦ֭ኵ୳հഗڦ၄ࡻ࣋ᅜतDACڦ܋ഄसิ ᳘ࢇୟ০ڦᆖၚă ጺၿհ฿ኈ(THD) THDኸമୃ߲ၿհڦݴׯࢅߵݛᇑ֪ڥएհڦߵݛ ኵኮԲLjᆩӥݴԲईݴԞ๖ă ႑ሯԲ(SNR) SNRኸ֪ڥ႑ࡽڦߵݛኵᇑأമୃ߲ၿհࢅୁ ኮྔڦᆶೕݴଉڦࢅߵݛኮԲLjᆩݴԞ๖ă ֭ኵ୳հഗ! සࡕᅜfDATAڦԠ୲)֭ኵ୲*ܔDACڦຕጴႜ֑ᄣLj ሶᅜࠓॺᅃ߲ሞf DATA /2ৎਏᆶࡗڦټ܉ຕጴ୳հ ഗăኄᄣᅜٷٷᅞཚ࿋ᇀfDAC)ຕ୲*ৎڦ ၟă ତڢႅԲ(ACLR) ACLRኸᅃ߲ཚ֪ڦాڢଉࠀ୲ᇑഄ၎ତཚ֪ڦాڢଉࠀ ୲ኮԲLjᆩdBc๖ă ްຕၟᅞ! ሞدཥڦଇฉՎೕዐLj੍ৎܾڼዐೕೕ୲ׂࣷิଇ߲ ၟăኄၵၟࣷሰ݀ׯพഗࠀ୲ࢅဣཥڦټષݯăॽڼ ܾްຕۙഗํڦևᇑڼᅃްຕۙഗزLjՍᅜᅞ ܾڼዐೕৎڦডߛईডگೕ୲ၟă Rev. B | Page 24 of 56 AD9776A/AD9778A/AD9779A ߾ፕᇱ AD9776A/AD9778A/AD9779AਏᆶႹܠ༬ႠLjݥࢇᆶ ၍ࢅ၍ཚ႑ဣཥăยऺڇՉ݀ټพഗ้Ljഄມୟຕጴ႑ ࡽୟ০ࢅມཚڢDACࠓඹᅟᇑཚኟۙഗথ੨ă ᇑᅜമ༵ࠃڦDAC၎ԲLjኄၵഗॲڦࢅ܈Ⴀీኧߛ߸ ټڦत߸ܠሜհׯࢇڦăຕጴᆅ֑ᆩण֭ኵ୳հഗࢅ ຕጴኟۙഗᇀᅃ༹ظڦႎ୳հഗࠓLjᅺܸኄၵഗॲ ీࠕኴႜຕጴኟฉՎೕă૧ᆩೌాཞօۉୟLj߲ܠഗॲ ᅜԵُཞօLjईኁᇑဣཥ้ዓཞօă AD9776/AD9778/AD9779ᇑAD9776A/AD9778A/ AD9779Aڦ൶՚ REFCLKፌٷೕ୲ᇑۉᇸ࠲ڦဣ AD9776A/AD9778A/AD9779Aኧፌٷ1100 MHz֑ڦᄣ ୲LjܔڍDVDD18ࢅCVDD18ᆶᅃၵ၌ă2ଚକ߳ۉ ᇸۉუܔᆌڦᆶၳ߾ፕೕ୲ă REFCLKޗኵ ॽᅃֶ߲ݴኟ၀้ዓแेᇀREFCLK้LjAD9776/AD9778/ AD9779ฉڦPLL݆ํ၄ፌॅሯำႠీLjॽݥأREFCLK ֶޗݴኵ༵ߛڟ2 Vރރኵă൩ጀᅪLjසࡕAD9776/AD9778 /AD9779๑ ᆩ LVPECLൻ ۯഗ Lj ሶ ړREFCLK ޗኵ ሞ LVPECLۨܮኵ<(ాྷݔ1.6 Vֶރރݴኵ)้LjPLLॽ၄ ፌॅႠీăAD9779AڦPLLยऺᅙ߀ڟڥLjनՍኟ၀ ้ዓLjසࡕӦྺޗ1.6 VރރኵLjPLLධీํ၄ፌॅޗኵă PLLۨྷݔ AD9776A/AD9778A/AD9779A PLLڦۨྷݔᇀAD9776/ AD9778/AD9779ăኄᅪ࿆ጣLjAD9776A/AD9778A/AD9779A PLLሞߴۨాྷݔԍۨڦ࿒ྷݔ܈ᇀ AD9776/AD9778/AD9779ăAD9776A/AD9778A/AD9779A ڦPLLۨྷݔ९23ă PLLᆫࣅยዃ AD9776/AD9778/AD9779ڦᆫࣅยዃᇑAD9776A/AD9778A/ AD9779Aփཞăၘ൧൩֖PLLೋዃยዃևݴă ຕჽ၍Ăࢅۯጲۯၯኟఇ๕! ᅜܔAD9776A/AD9778A/AD9779AႜՊײLj๑ഄփৈ ᄲॠ֪ຕ้ڦႾᇆଉࢆ้ူইڟᇨยពኵᅜူLjܸ ᄲ֑ൽٯแăਏ༹ٯแᆶଇዖǖᅃIRQዃ1)ᆅগࢅस ٪ഗ*Ljᅃጲۯዘႎᆫࣅຕ้Ⴞă ຕ้Ⴞ! ้ Ⴞ ࡀ ߭ ᇑ ࿒ ࠲ ڦ ܈ဣ ९ 28ă AD9776A/AD9778A/ AD9779Aڦຕ้Ⴞࡀ߭)ॺ૬ࢅԍ*ᇑAD9776/ AD9778/AD9779փཞă DATACLKჽྷݔ ሞAD9776/AD9778/AD9779ዐLjຕჽᆯस٪ഗ0x04 ࿋[7:4]੦ă25°C้Ljჽօޗሀྺ180 ps/ሺଉăAD9776A/ AD9778A/AD9779Aሺेକᅃ߲ྔܮ࿋Ljჽྷݔᅺܸे Ԡă࿋࿋ᇀस٪ഗ0x01࿋1ăAD9776A/ AD9778A/AD9779A ڦօޗධٷሀ180 ps/ሺଉă ӲԨस٪ഗ! AD9776A/AD9778A/AD9779AӲԨस٪ഗ)स٪ഗ0x1F*ڦ ܁ൽኵྺ0x07LjAD9776/AD9778/AD9779ӲԨस٪ഗ܁ڦ ൽኵሶྺ0x03ă 10. AD9776/AD9778/AD9779ᇑAD9776A/AD9778A/AD9779Aڦस٪ഗኵֶᅴ ׂ႙ࡽ AD9776/AD9778/AD9779 AD9776A/AD9778A/AD9779A PLL࣍ୟټ स٪ഗ0x0A࿋[4:0] 11111 01111 PLLೋዃ स٪ഗ0x09࿋[2:0] 111 011 Rev. B | Page 25 of 56 VCO੦ۉუ स٪ഗ0x0A࿋[7:5] 010 011 PLL VCOൻۯ स٪ഗ0x08࿋[1:0] 00 11 AD9776A/AD9778A/AD9779A ෙ၍๕থ੨! ෙ၍๕܋੨ᅃዖଳऄڦཞօزႜཚრ܋੨LjᅜݛՍ ںᇑܠዖ߾ᄽՔጚྲ੦ഗࢅྲتഗথ੨ă܋੨ग़ඹ ܠٷຕཞօد߭๕LjԈઔMotorola SPIࢅIntel® SSRၹᅱă ُ থ ੨ ႜ ܁ႀ ֡ ፕ Lj ݡ࿚ ᆩ ઠ ದ ዃ AD9776A/ AD9778A/AD9779Aڦᆶस٪ഗăኧڇጴবࢅܠጴব دLjᅜतMSBᆫံࢅLSBᆫံد߭๕ăཚࡗ߲ڇມၠ ᆅগ(SDIO)ईଇ߲ڇၠᆅগ(SDIO/SDO)Ljᅜํ၄زႜຕ /ă زႜ܋੨ದዃᆯस٪ഗ0x00࿋[7:6]੦ăՂႷጀᅪLjزܔ ႜ܋੨ದዃፔڦඪࢆ߸߀Ljࣷۼሞႀُጴবڦፌࢫᅃ ࿋้૬नิၳăᅺُLjᅜ๑ᆩܠጴবدႀُस٪ ഗLjժሞཚ႑ዜႜዐ߸߀ದዃăՂႷጀᅪLjܔᇀړമ ཚ႑ዜڦᇆጴবLjᄲ๑ᆩႎڦದዃă ߸߀زႜ܋੨ದዃ้Ljॺᅱ๑ᆩڇጴবدLjᅜ௨ഗॲ݀ ิ݆ᇨଙڦႜྺă සԨবຎLjႀഗॲईٗഗॲڦ܁ᆶزႜ܋੨ຕ دᇑSCLKᆅগཞօăසࡕཞօ۪฿Ljഗॲᆶీ૰ᅴօ ዕኹI/O֡ፕLjॽزႜ܋੨੦ഗዃᇀᅙኪጒༀLjܸٗም ْइڥཞօă SPI PORT SCLK 68 ኸସጴব ኸସጴবԈࡤڦ႑တ९11ă 11. ෙ၍๕থ੨ኸସጴব MSB I7 I6 I5 I4 I3 I2 I1 LSB I0 R/W N1 N0 A4 A3 A2 A1 A0 ኸସጴব࿋7)R/W*ਦۨኸସጴবႀዜຐࢫႜ֡܁ ፕ࣏ႀ֡ፕăஇड1๖֡܁ፕăஇड0๖ႀ֡ፕă A4ĂA3ĂA2ĂA1ࢅA0—ኸସጴবڦ࿋4Ă࿋3Ă࿋2Ă࿋1 ࢅ࿋0ਦۨཚ႑ዜڦຕدक़ݡ࿚నᅃ߲स٪ഗă ܔᇀܠጴবدLjُںഐ๔ጴবںăഄᇆस٪ഗں ᆯഗॲߵLSBᆫံ࿋)स٪ഗ0x00࿋6*ׂิă 06452-049 CSB 69 ഄᇆSCLKᄂᆩᇀཚ႑ዜܾڼڦăܾڼഗॲᇑ ဣཥ੦ഗኮक़ํाႜຕدڦăߵኸସጴব ༵ࠃڦ႑တLjܾڼدᅃ߲Ăଇ߲Ăෙ߲ई຺߲ຕ ጴবăፌࡻ๑ᆩᅃ߲ܠጴবدăړस٪ഗݡ࿚ኻႴᄲ ᅃ߲ጴব้Ljᅜ๑ᆩڇጴবຕدLjᅜইگCPUਸ ၨăႀ߳دጴবڦፌࢫᅃ࿋ࢫLjस٪ഗ૬न߀Վă ኸସጴব࿋6(N1)ࢅ࿋5(N0)ਦۨຕدዜႴدڦጴ বຕă12ଚକႴدڦጴবຕܔቷă SDO 66 SDIO 67 CSBᆅগڦஇडۉೝံߛࢫگLj๑ෙ၍๕থ੨܋੨้ڦႾ ް࿋ڟኸସዜ؛ڦ๔ጒༀăᆯُጒༀਸ๔LjࢫჄ8߲ SCLKฉืᄂپړമI/O֡ፕڦኸସ࿋Ljܸᇑాևस٪ഗ ڦጒༀईෙ၍๕থ੨܋੨ڦഄ႑ࡽۉೝ࠲ăසࡕ ُ้ෙ၍๕থ੨܋੨تᇀኸସዜईຕدዜLjሶփ ࣷႀඪࢆ၄ᆶຕă 52. ෙ၍๕থ੨܋੨ زႜথ੨ڦཚᆩ֡ፕ! AD9776A/AD9778A/AD9779Aڦཚ႑ዜྺݴଇ߲ ăڼᅃኸସዜ)ॽኸସጴবႀഗॲ*Ljᇑമ8߲ SCLKฉืᄂዘࢇăኸସጴবၠزႜ܋੨੦ഗ༵ࠃᆶ࠲ຕ دዜLjनཚ႑ዜܾڼڦ႑တăڼᅃڦኸ ସጴবۨᅭनॽ݀ิڦຕد֡܁ፕ࣏ႀ֡ፕLjຕ دᆶܠณጴবLjᅜतຕدڼڦᅃ߲ጴবڦഐ๔स ٪ഗں๊ă߳ཚ႑ዜڦമ8߲SCLKฉืᄂᆩઠॽ ኸସጴবႀഗॲă 12. ጴবدऺຕ N1 0 0 1 1 Rev. B | Page 26 of 56 N0 0 1 0 1 ௮ຎ دᅃ߲ጴব! دଇ߲ጴব! دෙ߲ጴব د຺߲ጴব AD9776A/AD9778A/AD9779A زႜথ੨܋੨ᆅগࠀీ௮ຎ زႜ้ዓ(SCLK) زႜ้ዓᆅগᆩᇀཞօ/ഗॲڦຕLjժ੦ాև ጒༀऐăSCLKڦፌߛೕ୲ྺ40 MHzăᆶຕۼሞ SCLKڦฉืᄂᆶၳăᆶຕۼሞSCLKူڦইᄂă INSTRUCTION CYCLE DATA TRANSFER CYCLE CSB ۉگೝᆶၳഔۯժཚᅃ߲ཚ႑ዜăሎႹཞᅃز ႜཚ႑၍ୟথ߲ܠഗॲăُړߛۉೝ้LjSDOࢅ SDIOᆅগࣷߛፆੇጒༀăሞኝ߲ཚ႑ዜLjೌᆌԍ ۉگೝă SDIO R/W N1 N0 A4 A3 A2 A1 A0 SDO D7 D6 N D5 N D30 D2 0 D1 0 D00 D7 D6 N D5N D30 D20 D1 0 D00 06452-050 SCLK ೌ(CSB) 53. زႜस٪ഗথ੨้ႾLjMSBᆫံ زႜຕ/(SDIO) زႜຕ(SDO) සࡕၹᅱስᆩփཞڦཚ႑၍ઠ݀ໃࢅথຕLjఫຕ ٗᆅগڦ܁ăړഗॲᅜڦ܀ڇມၠI/Oఇ๕ሏႜ ้LjُᆅগփࣷຕLjժዃྺߛፆੇጒༀă INSTRUCTION CYCLE DATA TRANSFER CYCLE CSB SCLK SDIO A0 A1 A2 A3 A4 N0 N1 R/W D0 0 D10 D20 D4N D5N D6N D7 N D00 D10 D20 D4N D5 N D6N D7N SDO 06452-051 ၠഗॲႀຕՂႷཚࡗُᆅগႜăփࡗLjᆅগᄺీ ፕྺມၠຕ၍๑ᆩăस٪ഗ0x00ڦ࿋7੦ُᆅগದ ዃăඍูྺஇड0LjॽSDIOᆅগದዃྺڇၠຕ၍ă 54. زႜस٪ഗথ੨้ႾLjLSBᆫံ MSB/LSBد tDS tSCLK CSB ړስMSBᆫံ߭๕(LSB/MSBᆫံ=0)้Ljኸସࢅຕ࿋ ՂႷӀቷٗMSBڟLSBڦຩႾႀă֑ᆩMSBᆫံ߭๕ڦ ܠጴবຕدᅜᅃ߲ኸସጴবਸ๔LjኸସጴবԈઔፌ ߛຕጴবڦस٪ഗںăࢫჄຕጴবᆌӀቷٗߛں ںگڟڦຩႾدăሞMSBᆫံఇ๕ူLjܠጴবཚ႑ዜ دᅃ߲ຕጴবLjزႜ܋੨ాևጴবں݀ิഗՍ ڿ३1ă SCLK ړLSB/MSBᆫံ=1(LSBᆫံ)้Ljኸସࢅຕ࿋ՂႷӀቷٗ LSBڟMSBڦຩႾႀă֑ᆩLSBᆫံ߭๕ܠڦጴবຕد ᅜᅃ߲ኸସጴবਸ๔LjኸସጴবԈઔፌگຕጴবڦ स٪ഗںLjഄࢫ߲ܠຕጴবăܠጴবཚ႑ዜد ᅃ߲ጴবLjزႜ܋੨ాևጴবں݀ิഗՍڿሺ1ă SCLK tDS SDIO tPWL tDH INSTRUCTION BIT 7 INSTRUCTION BIT 6 06452-052 tPWH 55. ෙ၍๕থ੨स٪ഗႀ֡ፕ้Ⴞ CSB tDV SDIO SDO සࡕMSBᆫံ߭๕ᆶၳLjܔᇀܠጴবI/O֡ፕLjزႜ܋੨ ੦ഗຕںॽٗႀ0x00ڦຕںਸ๔ڿ३ăසࡕ LSBᆫံ߭๕ᆶၳLjܔᇀܠጴবI/O֡ፕLjزႜ܋੨੦ഗ ںॽٗႀ0x1Fڦຕںਸ๔ڿሺă Rev. B | Page 27 of 56 DATA BIT n DATA BIT n – 1 56. ෙ၍๕থ੨स٪ഗ֡܁ፕ้Ⴞ 06452-053 زႜ܋੨ᅜኧMSBᆫံࢅLSBᆫံଇዖຕ߭๕ăُ ࠀీᆯLSB/MSBᆫံस٪ഗ࿋(स٪ഗ0x00ڦ࿋6)੦ăඍ ูྺMSBᆫံ߭๕(LSB/MSBᆫံ=0)ă AD9776A/AD9778A/AD9779A ෙ၍๕থ੨स٪ഗᆙพ! ൩ጀᅪLjᆶփᆩڦस٪ഗ࿋ᆌԍഗॲఐණኵă! 13 स٪ഗ ఁ! ཚ႑ ຕጴ੦ ں ๆୃ! ๆ 0x00 00 ࿋7 SDIOມၠ ࿋6 LSB/MSB ᆫံ ࿋5 ॲް࿋ ֭ኵဣຕ[1:0] ࿋4 ۖۉఇ๕ ࿋3 ጲۯ ۖۉ ๑ీ ࿋2 ୳հഗۙఇ๕[3:0] ࿋0 DATACLK ჽ[4] ଭኵ ག؊๑ీ 0x00 TxEnable 反相 Qᆫံ 0x00 0x01 01 0x02 02 ຕ߭๕! ܋ڇ੨ 0x03 03 DATACLK ჽఇ๕ ԍା(ዃ1) 0x04 04 DATACLKჽ[3:0] SYNC_Oݴೕ[2:0] 0x05 05 SYNC_Oჽ[3:0] SYNC_IԲኵ[2:0] 0x06 0x07 06 07 0x08 0x09 08 09 ഄ੦ 0x0A 10 I DAC ੦ 0x0B 0x0C 11 12 ޤዺ DAC1 ੦ 0x0D 0x0E 13 14 Q DAC ੦ 0x0F 0x10 15 16 ޤዺ DAC2 ੦ 0x11 0x12 17 18 1924 ዐ 0x13 to 0x18 0x19 25 ӲԨ 0x1F 31 ཞօ੦ PLL੦ ํຕఇ๕ DATACLK ჽ๑ీ ݒsinc ๑ీ DATACLK ݒ၎ ຕ้Ⴞᇆଉ[3:0] DATACLKݴೕ[1:0] SYNC_I ๑ీ SYNC_Iჽ[3:0] SYNC_O SYNC_O ๑ీ ݀ةᄂ PLL๑ీ PLLೕስ[5:0] PLL VCOݴೕԲ[1:0] PLL࣍ୟݴೕԲ[1:0] 0x00 SYNC_O ჽ[4] SYNC_I ჽ[4] SYNC_I้Ⴞᇆଉ[3:0] ้ዓጒༀ[4:0] VCO੦ۉუ[2:0]DŽኻ܁Dž I DACۖۉ 辅助DAC1 符号 辅助DAC1 电流方向 PLL VCOൻ[ۯ1:0] PLLೋዃ[2:0] PLL࣍ୟ[ټ4:0] Q DAC sleep Q DAC powerdown ޤዺDAC2 ࡽޙ ޤዺDAC2 ݛୁۉၠ 0xE7 0x52 0xF9 0x01 0x00 0x00 ޤዺDAC1 ຕ[9:8] Q DAC增益调整[7:0] Q DAC ሺᅮۙኝ[9:8] ޤዺDAC2ຕ[7:0] ޤዺDAC2 ۖۉ 0x00 0x1F I DACሺᅮۙኝ[9:8] ޤዺDAC1ຕ[7:0] 辅助DAC1 掉电 0x00 0x00 0x00 I DACሺᅮۙኝ[7:0] I DACႩ ඍู ኵ 0x00 ࿋1 PLL ۨኸ๖ (ኻ)܁ 0xF9 0x01 0x00 0x00 ޤዺDAC2 ຕ[9:8] ԍା ຕ้Ⴞ ٱဃIRQ ཞօ้Ⴞ ٱဃIRQ ຕ้Ⴞ ٱဃૌ႙ ӲԨ[7:0] Rev. B | Page 28 of 56 ຕ้Ⴞ ཞօ้Ⴞ ٱဃIRQ ٱဃIRQ ๑ీ ๑ీ ాևཞօ ࣮ໃ 0x00 0x07 AD9776A/AD9778A/AD9779A 14. ෙ၍๕থ੨स٪ഗ௮ຎ स٪ഗఁ ཚ႑! ຕጴ੦ स٪ഗ ں! 0x00 ࿋! 7 ֖ຕ! SDIOມၠ 0x00 6 LSB/MSBᆫံ 0x00 5 ॲް࿋ 0x00 4 ۖۉఇ๕ 0x00 3 ጲۉۖۯ๑ీ 0x00 1 PLLۨኸ๖(ኻ)܁ 0x01 7:6 ֭ኵဣຕ[1:0] 0x01 0x01 5:2 1 ୳հഗۙఇ๕[3:0] DATACLKჽ[4] 0x01 0 ଭኵག؊๑ీ 0x02 7 ຕ߭๕ 0x02 6 ܋ڇ੨ 0x02 5 ํຕఇ๕ 0x02 4 DATACLKჽ๑ీ 0x02 3 ݒsinc๑ీ 0x02 2 DATACLKݒ၎ 0x02 1 TxEnableݒ၎ 0x02 0 Qᆫံ ࠀీ! 0: SDIOᆅগৈᆩᇀຕă 1: SDIOᆅগᆩᇀࢅຕă 0: زႜຕڼڦᅃ࿋ຕጴবڦMSBă 1: زႜຕڼڦᅃ࿋ຕጴবڦLSBă ࿋ՂႷံႀ1Ljምႀ0Lj ֍ీ๑ෙ၍๕থ੨स٪ഗᆙพް࿋ă 0: ᆶۉୟᆶၳă 1: ্ᆩᆶຕጴࢅఇెۉୟLj ৈෙ၍๕থ੨܋੨ᆶၳă ੦ጲۉۖۯఇ๕ă ֖९ۖࢅۉႩఇ๕ևݴă 0: PLL࿄ۨă 1: PLLۨă 00: 1×֭ኵă 01: 2×֭ኵă 10: 4×֭ኵă 11: 8×֭ኵă ୳հഗఇ๕९19ă ยዃREFCLK၎ܔᇀDATACLK ڦჽڦMSBă 0: ଭኵག؊࠲ă 1: ଭኵག؊ਸă 0: ܾցஓă 1: ܾࡽޙă 0: P1DࢅP2Dຕ܋੨๑ీă 1: ଇ߲DACڦຕཚࡗP1Dຕ܋੨থă 0: ๑ీQୟ০ႜ႑ࡽتă 1: ্ᆩQୟ০ຕ (ాևQཚ้ڢዓ্ᆩLjIࢅQۙഗ্ᆩ)ă ๑ీDATACLKჽ༬Ⴀă ࠲ᇀُ༬Ⴀܠ߸ڦ႑တ९ᆫࣅຕ ้Ⴞևݴă 0: ݒSinc୳հഗ্ᆩă 1: ݒSinc୳հഗ๑ీă 0: DATACLKᇑాևຕ֑ᄣ้ዓ DCLK_SMP႑ࡽཞ၎ă 1: DATACLKᇑాևຕ֑ᄣ้ዓ DCLK_SMP႑ࡽ၎࿋၎ݒă ᆅগ39—TXENABLEᆅগ (ᄺᆩፕIQSELECT)ڦटႠݒ၎ă 0: ٱఇ๕ူLj܋੨ฉIຕံᇀQຕă 1: ٱఇ๕ူLj܋੨ฉQຕံᇀIຕă Rev. B | Page 29 of 56 ඍูኵ! 0 0 0 0 00 0000 0 0 0 0 0 0 0 0 AD9776A/AD9778A/AD9779A स٪ഗఁ ཞօ੦ स٪ഗ ں! 0x03 ࿋! 7 ֖ຕ! DATACLKჽఇ๕ 0x03 0x03 6 5:4 ԍା DATACLKݴೕ[1:0] 0x03 3:0 ຕ้Ⴞᇆଉ[3:0] 0x04 7:4 DATACLKჽ[3:0] 0x04 3:1 SYNC_Oݴೕ[2:0] 0x04 0x05 0 7:4 SYNC_Oჽ[4] SYNC_Oჽ[3:0] 0x05 3:1 SYNC_IԲኵ[2:0] 0x05 0x06 0 7:4 SYNC_Iჽ[4] SYNC_Iჽ[3:0] 0x06 0x07 0x07 0x07 3:0 7 6 5 SYNC_I้Ⴞᇆଉ[3:0] SYNC_I๑ీ SYNC_O๑ీ SYNC_O݀ةᄂ 0x07 4:0 ้ዓጒༀ[4:0] ࠀీ! 0: ۯຕ้Ⴞٱဃॠ֪ఇ๕ă 1: ጲۯຕ้Ⴞٱဃॠ֪ఇ๕ă ᆌ๔ዕዃ1ă DATACLKݴೕഗኵă 00: 1ݴೕă 01: 2ݴೕă 10: 4ݴೕă 11: 1ݴೕă ยዃݞኹຕ้ႾٱဃIRQ࿋ዃ࿋ Ⴔᄲ้ڦႾᇆଉă ยዃREFCLK၎ܔᇀDATACLK ڦჽၘ(൧९29)ă SYNC_O႑ࡽڦೕ୲ڪᇀfDAC/NLj ഄዐNยዃසူǖ 000: N = 32. 001: N = 16. 010: N = 8. 011: N = 4. 100: N = 2. 101: N = 1. 110: N = ࿄ۨᅭă 111: N = ࿄ۨᅭă SYNC_Oჽ[4:0]ڦኵยዃSYNC_O႑ࡽჽ၍ڦኵă SYNC_Oڦჽ၎ܔᇀREFCLKܸჾă ჽ၍ݴՐ୲ྺօ80 psă 00000: Քჽă 00001: ሞSYNC_Oฉሺे80 psჽă 00010: ሞSYNC_Oฉሺे160 psჽă … 11111: ሞSYNC_Oฉሺे2480 psჽă ُኵ੦ׂิཞօஞ؋ႴڦSYNC_I ஞ؋ຕ(ၘ൧९30)ă SYNC_Iჽ[4:0]ڦኵยዃSYNC_I႑ࡽჽ၍ڦኵă ჽ၍ݴՐ୲ྺօ80 psă 00000: Քჽă 00001: ሞSYNC_Iฉሺे80 psჽă 00010: ሞSYNC_Iฉሺे160 psჽă … 11111: ሞSYNC_Iฉሺे2480 psჽă 1: ๑ీSYNC_Iă 1: ๑ీSYNC_Oă 0: SYNC_OሞREFCLKူইᄂ߀Վă 1: SYNC_OሞREFCLKฉืᄂ߀Վă ُኵඓۨཞօ้ాև้ዓ݀ิጒༀऐڦጒༀă Rev. B | Page 30 of 56 ඍูኵ! 0 0 00 0000 0000 000 0 0000 000 0 0000 0000 0 0 0 0 AD9776A/AD9778A/AD9779A स٪ഗఁ! PLL੦ ഄ੦ I DAC੦ ޤዺDAC1੦ Q DAC੦ स٪ഗ ں 0x08 ࿋! 7:2 ֖ຕ! PLLೕስ[5:0] ࠀీ 0x08 1:0 PLL VCOൻ[ۯ1:0] ੦VCOڦ႑ࡽഽ܈ă ยྺ11ํ၄ፌॅႠీă ยዃVCO߾ڦፕೕ୲ྷݔăၘ൧९23ă ඍูኵ! 111001 11 0x09 7 PLL๑ీ 0: PLL࠲LjDAC֑ᄣ้ዓথᆯREFCLK༵ࠃă 1: PLLਸLjDAC้ዓᆯREFCLK ཚࡗPLL้ዓԠೕഗሞాևׂิă 0 0x09 6:5 PLL VCOݴೕԲ[1:0] ยዃVCOݴೕഗڦኵLjᅜඓۨVCOೕ୲ ᇑDAC֑ᄣ้ዓೕ୲ڦԲǖfVCO/fDACCLKă 00: fVCO/fDACCLK = 1. 01: fVCO/fDACCLK = 2. 10: fVCO/fDACCLK = 4. 11: fVCO/fDACCLK = 8. 10 0x09 4:3 PLL࣍ୟݴೕԲ[1:0] ยዃDACCLKݴೕഗڦኵLjᅜඓۨDAC֑ᄣ้ዓ ೕ୲ᇑREFCLKೕ୲ڦԲǖfDACCLK/fREFCLKă 00: fDACCLK/fREFCLK = 2. 01: fDACCLK/fREFCLK = 4. 10: fDACCLK/fREFCLK = 8. 11: fDACCLK/fREFCLK = 16. 10 0x09 2:0 PLLೋዃ[2:0] ੦VCOೋዃୁۉăยྺ011ํ၄ፌॅႠీă 010 0x0A 7:5 VCO੦ۉუ[2:0](ኻ)܁ 000111LjᇑVCO੦ۉუۉڦ܋უׯԲ૩Lj 000 ኻీ࣮܁ăኵ011๖VCO࿋ᇀഄೕ୲ྷݔዐ႐ 0x0A 4:0 PLL࣍ୟ[ټ4:0] ੦PLL୳հഗټڦăሺٷኵॽইگ ࣍ୟټăยྺ01111ํ၄ፌॅႠీă 11111 0x0C 0x0B 1:0 7:0 I DACሺᅮۙኝ[9:8] I DACሺᅮۙኝ[7:0] I DACሺᅮۙኝ[9:0]ኵྺI DAC 10࿋ሺᅮยዃ ጴă࿋9ྺMSBLj࿋0ྺLSBă 01 11111001 0x0C 7 I DACႩ 0 0x0C 6 I DACۖۉ 0x0E 0x0D 1:0 7:0 ޤዺDAC1ຕ[9:8] ޤዺDAC1ຕ[7:0] 0: I DACਸă 1: I DAC࠲Ljڍएጚۉუᇸධᆶۉă 0: I DACਸă 1: I DAC࠲ă ޤዺDAC1ຕ[9:0]ኵྺޤዺDAC1 10࿋ୁۉ ੦ጴăޤዺDACޗڦୁۉኵໜጣኵሺܸٷ ሺٷă࿋9ྺMSBLj࿋0ྺLSBă 0x0E 7 ޤዺDAC1ࡽޙ 0: AUX1_Pᆶၳă 1: AUX1_Nᆶၳă 0 0x0E 6 ޤዺDAC1ݛୁۉၠ 0 0x0E 5 ޤዺDAC1ۖۉ 0x10 0x0F 1:0 7:0 Q DACሺᅮۙኝ[9:8] Q DACሺᅮۙኝ[7:0] 0: ᇸୁۉă 1: ဌୁۉă 0: ޤዺDAC1ਸă 1: ޤዺDAC1࠲ă Q DACሺᅮۙኝ[9:0]ኵྺQ DAC 10࿋ሺᅮยዃ ጴă࿋9ྺMSBLj࿋0ྺLSBă 0x10 7 Q DACႩ 0x10 6 Q DACۖۉ 0: Q DACਸă 1: Q DAC࠲ă 0: Q DACਸă 1: Q DAC࠲ă Rev. B | Page 31 of 56 0 00 00000000 0 01 11111001 0 0 AD9776A/AD9778A/AD9779A स٪ഗఁ! ޤዺDAC2੦ ዐ! ӲԨ! स٪ഗ ں 0x12 0x11 ࿋! ֖ຕ! ࠀీ ඍูኵ! 1:0 7:0 ޤዺDAC2ຕ[9:8] ޤዺDAC2ຕ[7:0] ޤዺDAC2ຕ[9:0]ྺ10࿋ୁۉ੦ጴă ޤዺDACޗڦୁۉኵໜጣኵሺܸٷሺٷă ࿋9ྺMSBLj࿋0ྺLSBă 00 00000000 0x12 7 ޤዺDAC2ࡽޙ 0 0x12 6 ޤዺDAC2ݛୁۉၠ 0x12 5 ޤዺDAC2ۖۉ 0: AUX2_Pᆶၳă 1: AUX2_Nᆶၳă 0: ᇸୁۉă 1: ဌୁۉă 0: ޤዺDAC2ਸă 1: ޤዺDAC2࠲ă 0 0 ԍା 0x13 to 0x18 0x19 7 ຕ้ႾٱဃIRQ ኻ܁ăߛۉೝᆶၳLj๖ຕ܋੨݀ิ้Ⴞ ٱဃăIRQ٪ă܁ൽዐस٪ഗࢫLjُ࿋ൣ0ă 0 0x19 6 ཞօ้ႾٱဃIRQ ኻ܁ăߛۉೝᆶၳLj๖SYNC_I݀ิ้Ⴞ ٱဃăIRQ٪ă܁ൽዐस٪ഗࢫLjُ࿋ൣ0ă 0 0x19 4 ຕ้Ⴞٱဃૌ႙ 0 0x19 3 ຕ้ႾٱဃIRQ๑ీ 0 0x19 2 ཞօ้ႾٱဃIRQ๑ీ 0x19 0 ాևཞօ࣮ໃ ኻ܁ă๖้Ⴞٱဃૌ႙ă 0: ԍ้क़ٱဃă 1: ॺ૬้क़ٱဃă ຕ้ႾٱဃIRQᆶၳ้ᆶᅪᅭă 0: ຕ้ႾٱဃIRQೡԸă 1: ຕ้ႾٱဃIRQ๑ీă 0: ཞօ้ႾٱဃIRQೡԸă 1: ཞօ้ႾٱဃIRQ๑ీă থڦڟSYNC_O႑ࡽ࣮ໃSYNC_I႑ࡽă 0x1F 7:0 ӲԨ\8;1^! ๖ഗॲᆘॲӲԨࡽă! 00000111 Rev. B | Page 32 of 56 0 0 AD9776A/AD9778A/AD9779A ֭ኵ୳հഗࠓ! AD9776A/AD9778A/AD9779Aᅜ༵ࠃፌߛٳ8×֭ኵLjᄺ ᅜྜඇ্ᆩ֭ኵ୳հഗăՂႷጀᅪLjྺକՆ௨֭ኵ୳հ ഗᅯLj႑ࡽᆌԲଉཽ࣮ײ0.01 dBă1518ߴ କگཚ୳հഗࢅݒsinc୳հഗڦဣຕă୳հഗၚᆌڦೕ ස5759๖ă ኝຕኵ −4 0 +13 0 −34 0 +72 0 −138 0 +245 0 −408 0 +650 0 −1003 0 +1521 0 −2315 0 +3671 0 −6642 0 +20,755 +32,768 ߛဣຕ H(23) H(22) H(21) H(20) H(19) H(18) H(17) H(16) H(15) H(14) H(13) ኝຕኵ −2 0 +17 0 −75 0 +238 0 −660 0 +2530 +4096 ߛဣຕ H(15) H(14) H(13) H(12) H(11) H(10) H(9) ኝຕኵ −39 0 +273 0 −1102 0 +4964 +8192 ߛဣຕ H(9) H(8) H(7) H(6) ኝຕኵ +2 −4 +10 −35 +401 17. گཚ୳հഗ3 گဣຕ H(1) H(2) H(3) H(4) H(5) H(6) H(7) H(8) 18. ݒSinc୳հഗ گဣຕ H(1) H(2) H(3) H(4) H(5) 10 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –4 –3 –2 –1 0 1 2 3 fOUT (× Input Data Rate) 57. 2×֭ኵLjگཚၚᆌLj±4×ຕ୲ )Ⴕ၍๖1 dBࡐই* Rev. B | Page 33 of 56 4 06452-054 ߛဣຕ H(55) H(54) H(53) H(52) H(51) H(50) H(49) H(48) H(47) H(46) H(45) H(44) H(43) H(42) H(41) H(40) H(39) H(38) H(37) H(36) H(35) H(34) H(33) H(32) H(31) H(30) H(29) ATTENUATION (dB) 15. گཚ୳հഗ1 گဣຕ H(1) H(2) H(3) H(4) H(5) H(6) H(7) H(8) H(9) H(10) H(11) H(12) H(13) H(14) H(15) H(16) H(17) H(18) H(19) H(20) H(21) H(22) H(23) H(24) H(25) H(26) H(27) H(28) 16. گཚ୳հഗ2 گဣຕ H(1) H(2) H(3) H(4) H(5) H(6) H(7) H(8) H(9) H(10) H(11) H(12) AD9776A/AD9778A/AD9779A 10 0 –10 –20 –20 –50 –60 –30 –40 –50 –60 –70 –70 –80 –80 –90 –90 –100 –4 –100 –4 –3 –2 –1 0 1 2 4 3 fOUT (× Input Data Rate) –3 –2 –1 0 1 2 3 4 3 4 3 4 fOUT (× Input Data Rate) 58. 4×֭ኵLjگཚၚᆌLj±4×ຕ୲ (Ⴕ၍๖1 dBࡐই) 06452-058 –40 06452-059 –30 06452-060 ATTENUATION (dB) 0 –10 06452-055 ATTENUATION (dB) 10 61. 4fDAC /8୳հഗ֭ڦኵ/ۙፇࢇ 10 10 0 0 –10 –10 ATTENUATION (dB) –20 ATTENUATION (dB) –20 –30 –40 –50 –60 –40 –50 –60 –70 –70 –80 –80 –90 –90 –100 –4 –3 –2 –1 0 1 2 4 3 fOUT (× Input Data Rate) 06452-056 –100 –4 –30 –3 –2 –1 0 1 2 fOUT (× Input Data Rate) 62. −3fDAC /8୳հഗ֭ڦኵ/ۙፇࢇ 59. 8×֭ኵLjگཚၚᆌLj±4×ຕ୲ (Ⴕ၍๖1 dBࡐই) 10 60၂๖କፌߛٳຕ୲4Ԡڦలઊຯ༬൶ă –4 –3× –2× –1× DC 1 2 3 1× 4 2× 5 6 3× 7 8 4× –10 –20 –30 –40 –50 –60 –70 06452-086 –8 –7 –6 –5 –4 –3 –2 –1 0 0 ATTENUATION (dB) ֭ኵ୳հഗᇑۙഗ၎ࢇLj๑႑ࡽᅜݣሞDAC ֑ᄣ୲ڦలઊຯ༬൶ాڦඪᅪ࿋ዃăړ႑ࡽྺް ຕ้Ljُࠓᅜॽ႑ࡽۙڟኟईలઊຯ༬൶ DŽ९19Džă –80 –90 60. లઊຯ༬൶ 57Ă58ࢅ59၂๖କ้ۙຕጴ୳հഗگڦཚၚ ᆌăഔᆩۙ༬ႠࢫLjᅜॽຕጴ୳հഗڦၚᆌۙၿڟ DACڦాټඪᅪ࿋ዃăፕྺ๖૩Lj6167၂๖କ8× ֭ኵݥڦೋᅎఇ๕୳հഗၚᆌ)ೋᅎ/ݥೋᅎఇ๕୳հഗၚ ᆌ९19*ă Rev. B | Page 34 of 56 –100 –4 –3 –2 –1 0 1 2 fOUT (× Input Data Rate) 63. −2fDAC /8୳հഗ֭ڦኵ/ۙፇࢇ AD9776A/AD9778A/AD9779A 10 0 –10 –20 –20 –30 –40 –50 –60 –50 –60 –70 –80 –80 –90 –90 –100 –4 –100 –4 –3 –2 –1 0 1 2 3 4 –2 –1 0 1 2 3 4 67. 3fDAC /8୳հഗ֭ڦኵ/ۙፇࢇ ೋᅎఇ๕୳հഗၚᆌሎႹཚټᅜ±0.5 f DATAñ1.5 f DATAĂ ±2.5 fDATAࢅ±3.5 fDATAྺዐ႐ăൎ࣑ڟೋᅎఇ๕ၚᆌփࣷᆖ ၚ႑ࡽڦዐ႐ೕ୲Ljኻփࡗ๑୳հഗڦཚټೋᅎăᅜ 67๖ڦၚᆌྺ૩Ljժ्ยాټ႑ࡽྺ3.2 fDATA3.3 fDATA ްڦాټຕ႑ࡽăࢫስೋᅎఇ๕୳հഗၚᆌLjཚټ ڦዐ႐ೕ୲Վྺ3.5 fDATAăڍLj႑ࡽሞೕዐڦ࿋ዃԍ փՎăೋᅎఇ๕ࠀీ๑୳հഗཚీټԥݣሞDACలઊຯ༬ ټዐڦඪᅪ࿋ዃă 10 0 –10 –20 –30 –40 –50 –60 –70 –80 –3 –2 –1 0 1 2 3 4 fOUT (× Input Data Rate) 06452-062 –90 –100 –4 –3 fOUT (× Input Data Rate) 75/!−gEBD 09୳հഗ֭ڦኵ0ۙፇࢇ ATTENUATION (dB) –40 –70 fOUT (× Input Data Rate) 65. fDAC /8୳հഗ֭ڦኵ/ۙፇࢇ AD9776A/AD9778A/AD9779AྺມཚڢDACLjాևްຕ ۙഗणׯᇀ֭ኵ୳հഗၚᆌዐăມཚڢఇ๕ူLjഗॲ ྭްຕ႑ࡽํڦևࢅႵևݴ՚၄ሞຕጴ܋੨1ࢅຕ ጴ܋੨2)नIࢅQ*ăঢ়ࡗްຕሜհ)f DAC /2Ăf DAC /4ई fDAC/8DžۙڦLjDACپ႑ࡽํڦևࢅႵևă स٪ഗ0x02ڦ࿋6ዃ1้Ljഗॲሞ܋੨1ฉথIĂQĂIĂQ … Ⴞଚڦٱຕă൩ጀᅪLjሞٱఇ๕ူLjᆯᇀຕ ٱLjIࢅQຕୟ০ਸ๔ڦتཚڢຕ୲ኻᆶຕ ୲ڦᅃӷăፌٷຕ୲ධഗॲፌۨܮٷኵ ڦ၌Ljᅺܸٱఇ๕ူ܋ᆩټׯࢇڦᄺࣷڟ ၌ă 10 0 –10 –20 –30 स٪ഗ0x02ڦ࿋5)ํຕఇ๕࿋*ዃ1้LjQཚాࢅڢևIĂQ ຕጴۙ࠲Կăঢ়ࡗ1×Ă2×Ă4×ई8×֭ኵLjI DACೕ پຕጴ܋੨1ڦ႑ࡽă –40 –50 –60 –70 ᅃӯॺᅱLjසࡕႴ႑ࡽሞ±0.4 × fDATAాྷݔLjᆌ๑ᆩ ݥೋᅎ୳հഗఇ๕ă้ྷݔُגLjᆌ๑ᆩೋᅎ୳հഗఇ ๕ăඪࢆ൧ူLj႑ࡽڦጺۼټၭᇀ0.8 × fDATAă –80 –90 –100 –4 –3 –2 –1 0 1 2 3 fOUT (× Input Data Rate) 4 06452-063 ATTENUATION (dB) –30 06452-064 ATTENUATION (dB) 0 –10 06452-061 ATTENUATION (dB) 10 66. 2fDAC /8୳հഗ֭ڦኵ/ۙፇࢇ Rev. B | Page 35 of 56 AD9776A/AD9778A/AD9779A 19. ֭ኵ୳հഗఇ๕DŽस٪ഗ0x01࿋[5:2]Dž ֭ኵဣຕ[7:6] ୳հഗ ۙఇ๕[5:2] 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 4 4 4 4 4 4 2 2 2 2 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x00 0x01 0x02 0x03 ۙ DC DCೋᅎ fDAC/8 fDAC/8ೋᅎ fDAC/4 fDAC/4ೋᅎ 3fDAC/8 3fDAC/8ೋᅎ fDAC/2 fDAC/2ೋᅎ −3fDAC/8 −3fDAC/8ೋᅎ −fDAC/4 −fDAC/4ೋᅎ −fDAC/8 −fDAC/8ೋᅎ DC DCೋᅎ fDAC/4 fDAC/4ೋᅎ fDAC/2 fDAC/2ೋᅎ −fDAC/4 −fDAC/4ೋᅎ DC DCೋᅎ fDAC/2 fDAC/2ೋᅎ లઊຯ༬൶ ཚټ 0 +1 +2 +3 +4 +5 +6 +7 ±8 −7 −6 −5 −4 −3 −2 −1 0 +1 +2 +3 ±4 −3 −2 −1 0 +1 ±2 −1 ࡃᅃࣅྺfDACڦೕ୲ گ ዐ ߛ −0.05 0 +0.05 +0.0125 +0.0625 +0.1125 +0.075 +0.125 +0.175 +0.1375 +0.1875 +0.2375 +0.2 +0.25 +0.3 +0.2625 +0.3125 +0.3625 +0.325 +0.375 +0.425 +0.3875 +0.4375 +0.4875 −0.55 −0.5 −0.45 −0.4875 −0.4375 −0.3875 −0.425 −0.375 −0.343 −0.3625 −0.3125 −0.2625 −0.3 −0.25 −0.2 −0.2375 −0.1875 −0.1375 −0.175 −0.125 −0.075 −0.1125 −0.0625 −0.0125 −0.1 0 +0.1 +0.025 +0.125 +0.225 +0.15 +0.25 +0.35 +0.275 +0.375 +0.475 −0.6 −0.5 −0.4 −0.475 −0.375 −0.275 −0.35 −0.25 −0.15 −0.225 −0.125 −0.025 −0.2 0 +0.2 +0.05 +0.25 +0.45 −0.7 −0.5 −0.3 −0.45 −0.25 −0.05 Rev. B | Page 36 of 56 Ԣጀ 8×֭ኵǗ BW)ፌၭኵ*=0.0375 × fDAC BW)ፌٷኵ*=0.1 × fDAC 4×֭ኵǗ BW(ፌၭኵ)= 0.075 × fDAC BW(ፌٷኵ)= 0.2 × fDAC 2×֭ኵǗ BW(ፌၭኵ)= 0.15 × fDAC BW(ፌٷኵ)= 0.4 × fDAC AD9776A/AD9778A/AD9779A 10 SHIFTED + 3 × fDAC /8 SHIFTED + fDAC/4 SHIFTED + fDAC/8 SHIFTED + DC SHIFTED – DC –40 –50 +fDAC /2 –80 –4 –30 –3 –2 –1 0 1 2 fOUT (× Input Data Rate), ASSUMING 8× INTERPOLATION 3 4 06452-087 +fDAC /4 –70 –40 70. ୳հഗࠓ๑ᆩڦೋᅎټ –50 –60 –70 –3 –2 –1 0 1 2 4 3 06452-065 –80 –4 fOUT (× Input Data Rate), ASSUMING 8× INTERPOLATION 68. TxDACIFدڦཥټၜ ୳հഗࠓփৈሎႹ֭ኵ୳հഗཚټᅜలઊຯ༬൶ ዐڦೕ୲ྺዐ႐)සฉবຎ*Ljܸሞ๑ᆩ8×֭ኵ้Lj࣏ ሎႹ၄3 × fDAC/8ۙఇ๕ă૧ᆩᆶኄၵ୳հഗፇࢇLj ᅜॽߴۨڦټሜհݣሞೕዐڦඪᅪ࿋ዃLjժሞ֭ ኵ୳հഗڦీཚాټă69ࢅ70၂๖କ୳հഗࠓ ๑ᆩڦీټă൩ጀᅪLjೋᅎࢅݥೋᅎ୳հഗఇ๕ۼ ᅜ๑ᆩLjኻᄲߵ༬֭ۨኵ୲ยዃ୳հഗఇ๕ă 10 +fDAC /2 +3 × fDAC /8 +fDAC /4 +fDAC /8 BASEBAND –fDAC /8 –fDAC /4 –20 –3 × fDAC /8 –10 –fDAC /2 0 ૧ᆩኄዖ୳հഗࠓLjᅜॽ႑ࡽݣሞೕዐڦඪᅪ࿋ ዃăփࡗLj႑ࡽټᄲڟDAC֑ᄣ୲ࢅሜհሞೕ ዐڦ༬ۨ࿋ዃڦ၌ă୳հഗၚᆌࢅ֑ᄣ୲ፇࢇ ᆅഐټڦ၌ཚټׯࢇྺLjᅺྺኄDACᅜ ࢇڦׯፌټٷă සࡕॽሜհথݣሞഄዐᅃ߲୳հഗཚڦټዐ႐Ljሶ٪ሞ ፌټٷཉॲăُ้Lj֭ኵ୳հഗڦ0.1 dBጺڪټᇀ0.8 × fDATAăස19๖Lj֭ኵ୲༵ߛᅃԠLjፕྺDAC ֑ᄣ୲ݴڦೕټׯࢇڦইگᅃԠăසࡕॽሜհݣሞ 0.25 × fDATAڪ࿋ዃLjሶ٪ሞፌၭټཉॲăُ้Ljසࡕݥ ೋᅎ୳հഗၚᆌ๑ీLj୳հഗၚᆌॽ܋ߛڦሞ0.4 × fDATAت পኹLjܸٗ၌႑ࡽ܋ߛڦټăසࡕ๑ీڦೋᅎ୳հ ഗၚᆌLj୳հഗၚᆌॽ܋گڦሞ0.1 × fDATAتপኹLjܸٗ၌ ႑ࡽ܋گڦټăᅺُLjܔᇀݣሞ0.25 × fDATAڦتሜ հLjፌၭྺۨࡀټ0.3 × fDATAăܔᇀݣሞ(±n ± 0.25) × fDATA ڦتሜհ)ഄዐnྺඪᅪኝຕ*Ljፌၭټႜྺࣷሞኝ߲ೕ ాዘް၄ă ຕጴۙ! ຕጴኟۙ݀ิሞ֭ኵ୳հഗాևăۙ๑ຕڦ ೕೋᅎڦೕ୲ăᆩೕ୲ೋᅎྺຕ୲ڦԠ ຕăۙ၎ړᇀॽኟ႑ࡽױᅜᅃ߲සူႚ๕ްڦຕ ሜհ႑ࡽC(t)ǖ –30 –40 –50 C(t) = cos(ωct) + j sin(ωct) –60 –70 –80 –4 –3 –2 –1 0 1 2 3 fOUT (× Input Data Rate), ASSUMING 8× INTERPOLATION 4 06452-066 ATTENUATION (dB) –30 –60 +fDAC /8 BASEBAND –fDAC /8 –20 –fDAC /2 ATTENUATION (dB) –10 –fDAC /4 0 –20 SHIFTED – fDAC /8 ATTENUATION (dB) –10 SHIFTED – fDAC /4 0 AD9776A/AD9778A/AD9779A֑ᆩႎᆗ֭ڦኵ୳հഗ ࠓLjDAC IFೕ୲ᅜሞೕዐڦඪᅪ࿋ዃׂิă68၂๖ DAC IFټ࿋ዃدڦཥስă൩ጀᅪLjഄዐփీᆶ ኄᄣ୳ڦհഗఇ๕Ljनॽሜհݣሞ0.5 × fDATAĂ1.5 × fDATAĂ 2.5 × fDATAڪೕ୲ৎă SHIFTED – 3 × fDAC /8 10 ֭ኵ୳հഗټ၌! 69. ୳հഗࠓ๑ᆩݥڦೋᅎټ Rev. B | Page 37 of 56 AD9776A/AD9778A/AD9779A 20. ۙंೕႾଚ fDAC/4 −fDAC/4 fDAC/8 ंೕႾଚ!! I = I, −I, I, −I, … Q = Q, −Q, Q, −Q, … I = I, Q, −I, −Q, … Q = Q, −I, −Q, I, … I = I, −Q, −I, Q, … Q = Q, I, −Q, −I, … I = I, r(I + Q), Q, r(−I + Q), −I, −r(I + Q), −Q, r(I − Q), … Q = Q, r(Q − I), −I, −r(Q + I), −Q, r(−Q + I), I, r(Q + I), … ഄዐ r = √2/2 گဣຕ H(1) H(2) H(3) H(4) H(5) ߛဣຕ H(9) H(8) H(7) H(6) N/A ኝຕኵ +2 −4 +10 −35 +401 ݒsinc୳հഗఐණ্ᆩăॽस٪ഗ0x02ዐݒڦsinc๑ీ࿋ (࿋3)ዃ1ᅜॽഄ๑ీă 0 –0.5 –1.0 –1.5 SINC–1 RESPONSE –2.0 –2.5 –3.0 –3.5 ݒSinc୳հഗ COMBINED SINC AND SINC –1 RESPONSE ݒSinc୳հഗᆯᅃ߲9؏ཀྵFIR୳հഗํ၄ăᅜܔፌߛ ٳ0.4 × fDATAڦೕ୲༵ࠃ±0.05 dBᅜူཚټ࿖հăྺକሞཚ ڦټฉࠃ༵܋ՂᄲڦሺᅮLjݒsinc୳հഗਏᆶ3.4 dBڦԨኙ ֭ࡼăഄࡧڿدຕස71๖Lj؏ཀྵဣຕස21 ๖ă Rev. B | Page 38 of 56 –4.0 –4.5 0 0.05 0.10 0.15 0.20 0.25 0.30 f/fSAMPLE 0.35 0.40 0.45 0.50 71. ݒSinc୳հഗࡧڿدڦຕLjDAC sin(x)/x 06452-088 ۙ!! fDAC/2 21. ݒSinc୳հഗ (dB) ස20๖Ljሞܠٷຕఇ๕ူLjंೕࠀీࣷڞዂᄣԨሞIཚ ڢᇑQཚڢኮक़᳘֮ࢇăኻᆶሞfS/2ఇ๕LjIཚࢅڢQཚڢ ֍Եُ܀૬߾ፕăኄᅪ࿆ጣLjཞ้๑ᆩIࢅQ DACํڦ ຕۙኻీሞfS/2ఇ๕ူႜăᆶഄۙఇ๕ۼႴᄲ ްຕຕLjժׂิްຕ႑ࡽă AD9776A/AD9778A/AD9779A DAC֑ᄣ้ዓᇸ AD9776A/AD9778A/AD9779Aᅜཚࡗଇዖఇ๕༵ࠃDAC ֑ᄣ้ዓ(DACCLK)ăڼᅃዖఇ๕֑ᆩೌా้ዓԠೕഗLj ᅜথᅃ߲ᅜডگೕ୲(ཚຕೕ୲)߾ ፕ้֖ڦዓăࢫLjೌాPLLॽ้֖ዓԠױডߛ ೕ୲LjᅜᆩઠׂิDACႴڦඇևాև้ዓă้ዓԠೕ ഗ༵ࠃߛڦዊଉ้ዓLjፁܠٷຕᆌᆩڦႠీᄲ൱ă๑ ᆩೌా้ዓԠೕഗᅜՆ௨ሞۉୟӱฉׂิࢅݴದߛ DACCLKڦઓవăܾڼዖఇ๕ಖୟ้ዓԠೕഗۉୟLjඟ DACCLKথཚࡗREFCLKᆅগ༵ࠃă૧ᆩኄዖఇ๕Ljᆩ ࢽᅜॽڦߛݥ้ዓথ༵ࠃߴDACాࢃăܔᇀᄲ ൱ሞডߛೕ୲้DACሯำీڦگਗ਼ᆌᆩLj ཚࡗREFCLKᆅগথ༵ࠃDACCLKీՂႴڦă ஃࢆዖ൧(๑ᆩೌా้ዓԠೕഗईཚࡗREFCLKᆅগ থ༵ࠃDACCLK)Ljᄲ൱REFCLK႑ࡽڦ۶گۯLjᅜ ీ༵ߛDACሯำႠీă PLL্ᆩ้(स٪ഗ0x09ڦ࿋7 = 0)LjREFCLKথᆩፕ DAC֑ᄣ้ዓ(DACCLK)ăREFCLKೕ୲Ⴔᄲڪᇀຕ ୲ױᅜ֭ኵဣຕ(සࡕଭኵག؊๑ీLjሶ࣏Ⴔᄲምױᅜ 2)ă ้ዓԠೕ! PLL๑ీ้(स٪ഗ0x09ڦ࿋7 = 1)Lj้ዓԠೕۉୟٗডگೕ ୲ڦREFCLKׂิDAC֑ᄣ้ዓă้ዓԠೕഗీࠀڦ ස72๖ă PLL๑ీ้Ljፌٷ้ዓೕ୲fREFCLKྺ250 MHzăՂႷ ړስN1ࢅN2ڦኵLj๑ڥfVCOጺሞ1.0 GHz2.0 GHzڦ ፌॅ߾ፕాྷݔăᅃڋኪڢVCOೕ୲LjՍᅜስኟ ඓڦPLLೕስ(स٪ഗ0x08ڦ࿋[7:2])ኵă PLLೋዃยዃ PLLۉୟᆶෙዖೋዃยዃLjᆌॽኄၵยዃՊྺײഄՔ ኵă22๖ڦPLLኵኄၵ֖ຕླྀڦ४ยዃă 22. PLLยዃ 0x0A[7:5] PLL CONTROL VOLTAGE ADC LOOP FILTER PHASE DETECTOR 0x08[7:2] VCO BAND SELECT VCO ÷N2 ÷N1 0x09[4:3] PLL LOOP DIVISOR 0x09[6:5] PLL VCO DIVISOR ÷IF DACCLK ں स٪ഗ 0x0A 0x08 0x09 ࿋ [4:0] [1:0] [2:0] ᆫࣅยዃ 01111 11 011 PLL࣍ୟټՎଉದዃPLL࣍ୟ୳հഗټڦăยዃྺ 00000้Ljټሀྺ1 MHzăยዃྺ11111้Ljټሀྺ10 MHzăᆫࣅኵྺ01111Ljُ้࣍ୟټሀྺ3 MHză ದዃPLLೕስኵ PLL VCOڦᆶၳ߾ፕྷݔሀྺ1.0 GHz2.0 GHzăྷݔ ᆯ63߲ᆶዘ۠ڦೕፇׯLjස23๖ăܔᇀඪࢆႴᄲڦ VCOೕ୲Ljۼ٪ሞ߲ܠᆶၳڦPLLೕስኵăՂႷ ጀᅪLj23๖ڦຕኍۆܔ႙ഗॲܸჾăഗॲኮक़ֶڦ ᅴీࣷ๑ํाVCOೕ୲ྷݔೋᅎ30 MHzڟ40 MHză ُྔLjVCOೕ୲ໜጣ࿒ܸ܈ՎࣅăᅺُLjፌॅPLLೕ ስኵՂႷߵਏ༹ഗॲࢅ༬ۨ߾ፕ࿒܈ඓۨă ഗॲਏᆶೌాPLLೕጲۯስ༬Ⴀăړ༬Ⴀ๑ీ้Lj ഗॲॽጲۯඓۨߴۨ࿒ڦူ܈ፌॅPLLೕยዃăሞ࣍ৣ ࿒ڦ܈±60°CՎࣅా܈ޗLjُยዃ๔ዕᆶၳăසࡕഗॲ ሞ߾ڦፕ࣍ৣ݀ิ߸ڦ܈ޗٷ࿒܈հۯLjሶႴᄲܔጲۯ ስڦPLLೕፔᅃ߲ೋᅎă DATACLK OUT (PIN 37) 0x01[7:6] INTERPOLATION FACTOR PLL࣍ୟټ PLL VCOൻۯ PLLೋዃ 06452-092 PIN 65 AND 0x00[1] PLL LOCK DETECT 0x09[7] PLL ENABLE DAC֑ᄣ้ዓೕ୲fDACCLKڪᇀ PLLෙ၍๕থ੨੦ থ้ዓ REFCLK (PIN 5, PIN 6) ้ዓԠೕഗۉୟڦፕᆩ๑VCOೕ୲fVCOڪᇀREFCLK ႑ࡽೕ୲ױᅜN1 × N2ă 83/!้ዓԠೕഗۉୟ Rev. B | Page 39 of 56 AD9776A/AD9778A/AD9779A 23. ۆ႙VCOೕ୲ྷݔᇑPLLೕስኵ −40°C+85°C࿒ڦాྷݔ܈PLLۨྷݔ VCOೕ୲(ྷݔMHz) PLLೕስ fLOW fHIGH 111111 (63) ጲۯఇ๕ 111110 (62) 1975 2026 111101 (61) 1956 2008 111100 (60) 1938 1992 111011 (59) 1923 1977 111010 (58) 1902 1961 111001 (57) 1883 1942 111000 (56) 1870 1931 110111 (55) 1848 1915 110110 (54) 1830 1897 110101 (53) 1822 1885 110100 (52) 1794 1869 110011 (51) 1779 1853 110010 (50) 1774 1840 110001 (49) 1748 1825 110000 (48) 1729 1810 101111 (47) 1730 1794 101110 (46) 1699 1780 101101 (45) 1685 1766 101100 (44) 1684 1748 101011 (43) 1651 1729 101010 (42) 1640 1702 101001 (41) 1604 1681 101000 (40) 1596 1658 100111 (39) 1564 1639 100110 (38) 1555 1606 100101 (37) 1521 1600 100100 (36) 1514 1575 100011 (35) 1480 1553 100010 (34) 1475 1529 100001 (33) 1439 1505 100000 (32) 1435 1489 −40°C+85°C࿒ڦాྷݔ܈PLLۨྷݔ VCOೕ୲(ྷݔMHz) PLLೕስ fLOW fHIGH 011111 (31) 1402 1468 011110 (30) 1397 1451 011101 (29) 1361 1427 011100 (28) 1356 1412 011011 (27) 1324 1389 011010 (26) 1317 1375 011001 (25) 1287 1352 011000 (24) 1282 1336 010111 (23) 1250 1313 010110 (22) 1245 1299 010101 (21) 1215 1277 010100 (20) 1210 1264 010011 (19) 1182 1242 010010 (18) 1174 1231 010001 (17) 1149 1210 010000 (16) 1141 1198 001111 (15) 1115 1178 001110 (14) 1109 1166 001101 (13) 1086 1145 001100 (12) 1078 1135 001011 (11) 1055 1106 001010 (10) 1047 1103 001001 (9) 1026 1067 001000 (8) 1019 1072 000111 (7) 998 1049 000110 (6) 991 1041 000101 (5) 976 1026 000100 (4) 963 1011 000011 (3) 950 996 000010 (2) 935 981 000001 (1) 922 966 000000 (0) 911 951 Rev. B | Page 40 of 56 AD9776A/AD9778A/AD9779A ૧ᆩ࿒܈ॠ֪ದዃPLLೕስ ૧ᆩ٪ئഗႜᅙኪ࿒܈ၯጚ ူຎօየຫକྺ߾ፕሞ༬ۨ࿒ڦ܈ഗॲยዃPLLೕ ስኵ݆ݛڦǗৣ࣍ړ࿒܈ሞഗॲ߾ڦፕ࿒(ྷݔ܈−40°C +85°C)ాՎࣅ้Ljኵ๔ዕᆶၳLjႴᆩࢽᅃօ߅ᇨă ൩ጀᅪLjሞኴႜُօየײࡗڦዐLjՂႷॽREFCLKแेᇀ ഗॲă සࡕဣཥփ༵ࠃ࿒܈ॠ֪ࠀీLjሶሞᅙኪ࿒܈ႜ߾ၯ ጚԍኤሞ࿒ྷݔ܈ۨڦଷᅃዖ݆ݛă߾ၯጚᅜӀ ቷူຎօየኴႜǖ 1. 2. 3. 4. 5. ՊײยዃN1(स٪ഗ0x09ڦ࿋[6:5])ࢅN2DŽस٪ഗ0x09 ڦ࿋[4:3]DžڦኵLjᅜत22๖ڦPLLยዃă ॽPLLೕ(स٪ഗ0x08ڦ࿋[7:2])ยྺ63Ljᅜ๑ీPLL ጲۯఇ๕ă ځڪPLL_LOCKᆅগईPLLۨኸ๖(स٪ഗ0x00ڦ࿋ 1)Վྺߛăኄᆌړሞ5 msా݀ิă ࣮܁6࿋PLLೕ(स٪ഗ0x08ڦ࿋[7:2])ă ߵኴႜPLLጲۯೕስ้ڦ࿒܈Ljॽڦ࣮܁ኵӀ ቷ24ई25๖ڦPLLೕย݆ۨݛዘႎႀPLLೕ ስ֖ຕ(स٪ഗ0x08ڦ࿋[7:2])ă ྺକስీࠕሞኝ߲߾ፕ࿒ాྷݔ܈ԍᆶၳڦፌॅPLL ೕስኵLjُօየᄲ൱ሞഗॲഔۯईް࿋้ႜ࿒܈ॠ ֪ăසࡕᆫࣅೕتᇀ031(ডڦگVCOೕ୲)ኮాLj൩֖ 24ă 1. 2. 3. 4. 5. ՊײยዃN1(स٪ഗ0x09ڦ࿋[6:5])ࢅN2DŽस٪ഗ0x09 ڦ࿋[4:3])ڦኵLjᅜत22๖ڦPLLยዃă ॽPLLೕ(स٪ഗ0x08ڦ࿋[7:2])ยྺ63Ljᅜ๑ీPLL ጲۯఇ๕ă ځڪPLL_LOCKᆅগईPLLۨኸ๖(स٪ഗ0x00ڦ࿋1) Վྺߛăኄᆌړሞ5 msా݀ิă ࣮܁6࿋PLLೕ(स٪ഗ0x08ڦ࿋[7:2])ă ߵኴႜPLLጲۯೕስ้ڦ࿒܈Ljॽ24ई25 ๖ڦPLLೕ٪ݥᅟ฿Ⴀ٪ئഗăሞဣཥฉۉईዘ ႎഔ้ۯLjॽ٪ڦئPLLೕኵሜPLLೕስ֖ຕ (स٪ഗ0x08ڦ࿋[7:2])ă “ᅃહᆦᅥ”ڦഗॲၜ සࡕሞ༬ۨဣཥዐ݆ํแฉຎPLLೕስದዃ݆ݛLj ሶీᆶᅃ߲ᆆ֠ڦഗॲၜᅜፁဣཥᄲ൱ăሎႹ ᆩࢽᇨሜࢇᆶഗॲڦ༬ۨPLLೕስኵLjኵሞ ኝ߲࿒ాྷݔ܈๔ዕᆶၳăREFCLKࢅVCOೕ୲๖૩ස 26๖ă 24. ړೕتᇀড)ྷݔگ031*้LjยዃᆫࣅPLLೕ සࡕဣཥ ഔۯ࿒ྺ܈ −40°C −10°C −10°C +15°C 15°C 55°C 55°C 85°C 26. ۆ႙VCOೕ୲ྷݔᇑPLLೕስኵ Ӏᅜူ݆ݛยۨPLLೕ ๑PLLೕ=࣮܁ೕ+2 ๑PLLೕ=࣮܁ೕ+1 ๑PLLೕ=࣮܁ೕ ๑PLLೕ=࣮܁ೕ−1 සࡕᆫࣅೕتᇀ3262)ডߛڦVCOೕ୲*ኮాLj൩֖ 25ă 25. ړೕتᇀডߛ)ྷݔ3262*้LjยዃᆫࣅPLLೕ සࡕဣཥ ഔۯ࿒ྺ܈ −40°C −30°C −30°C −10°C −10°C +15°C 15°C 55°C 55°C 85°C Ӏᅜူ݆ݛยۨPLLೕ fREFCLK (MHz) 59.73335 61.44 67.2 76.8 80.01 81.92 92.16 112.0 119.4667 122.88 ๑PLLೕ=࣮܁ೕ+3 ๑PLLೕ=࣮܁ೕ+2 ๑PLLೕ=࣮܁ೕ+1 ๑PLLೕ=࣮܁ೕ ๑PLLೕ=࣮܁ೕ−1 Rev. B | Page 41 of 56 fVCO (MHz) 955.7336 1966.08 1075.2 1228.8 1280 1310.72 1474.56 1792.0 955.7336 1966.08 ԍኤPLL ೕ 2 61 11 20 23 25 34 50 2 61 ጺPLL ݴೕԲ 16 32 16 16 16 16 16 16 8 16 AD9776A/AD9778A/AD9779A ൻۯREFCLK TTL OR CMOS CLK INPUT 0.1μF REFCLK+ 50Ω REFCLK+ REFCLK– 50Ω BAV99ZXCT HIGH SPEED DUAL DIODE VCM = 400mV 74. TTLईCMOS REFCLKൻۉۯୟ A simple bias network for generating VCM is shown in Figure 75. It is important to use CVDD18 and CGND for the clock bias circuit. Any noise or other signal that is coupled onto the clock is multiplied by the DAC digital input signal and can degrade DAC performance. VCM = 400mV VCM = 400mV LVDS_N_IN REFCLK– 0.1μF 06452-068 50Ω CVDD18 1kΩ 1nF 73. LVDS REFCLKൻۉۯୟ 287Ω 0.1μF 1nF CGND සࡕᆶ߅৫ڦኟ၀้ዓᆩLjሶᅜॽഄཚࡗՎუഗ᳘ࢇ SFGDMLLjස84๖ăܔᇀড֑ڦگᄣ୲Ljᄺᅜ ๑ᆩDNPTईUUM้ዓăᅜঢ়ࡗᅃ߲DNPTገMWET ገ࣑ഗLjࢫምӀቷԨবຎႜୁ᳘ࢇăईኁLjᄺ ᅜॽഄཚࡗՎუഗ᳘ࢇժᶏ࿋Ljස85๖ă! Rev. B | Page 42 of 56 75. REFCLK VCM ݀ิഗۉୟ 06452-070 LVDS_P_IN 50Ω 06452-069 REFCLKᄲ൱ᅃ߲گ۶ݴֶۯൻۯ႑ࡽă႑ࡽۉڦ ೝᅜሞᅜ400 mVࠌఇۉუྺዐ႐ڦ400 mVރރኵֶ ݴ1.6 Vރރኵֶాྷݔݴăֱੂ܋ڇREFCLK+ई REFCLK−Lj߳ᆅগీሞᅜ400 mVࠌఇۉუྺዐ႐ڦ 200 mVރރኵ800 mVރރኵాྷݔӦۯăኄၵ ۉೝժփথग़ඹLVDSLjڍREFCLKᅜᆯᅃ߲ೋᅎୁ ᳘ࢇLVDS႑ࡽൻۯLjස73๖ă 0.1μF AD9776A/AD9778A/AD9779A ׂิଉ!ୁۉײ AD9776A/AD9778A/AD9779A ాևएጚۉუᇸ! I DAC GAIN I DAC 1.2V BAND GAP VREF ాևୁۉ༵ࠃୁۉሺᅮݣLjഄዐI DACईQ DACሺᅮ ྺෙ၍๕থ੨܋੨स٪ഗዐڦᅃ߲10࿋ጴ)स٪ഗ0x0BĂस ٪ഗ0x0CĂस٪ഗ0x0Fࢅस٪ഗ0x10*ăDACሺᅮस٪ഗ ڦఐණኵ๑IFSሀྺ20 mAăIFSڪᇀǖ DAC FULL-SCALE REFERENCE CURRENT CURRENT SCALING I120 0.1μF 06452-073 10kΩ Q DAC Q DAC GAIN 76. एጚۉუۉୟ 35 30 25 IFS (mA) I DACࢅQ DACڦଉୁۉײᅜሞ8.66 mA31.66 mAݔ ྷాยዃăਸ๔้Lj๑ᆩ1.2 VټဤएጚۉუᇸยዃᇑI120 ᆅগ)ᆅগ75*၎ྔڦևۉፆዐୁۉڦăएጚۉუۉୟڦ ०ࣅස76๖ăྔևۉፆॺڦᅱኵྺ10 kΩLjยዃ ۉፆዐڦएጚୁۉIREFERENCEྺ120 μALjܸ༵ࠃDAC ଉୁۉײ20 mAăሺᅮဃֶُۉፆڦ၍ႠࡧຕLjᅺُ ߛۉ܈ፆᅜ߀ᇑഗॲాևದ༬Ⴀڦሺᅮದăሺ ᅮڦ࿒܈ᅎᄺُࣷۉፆᆖၚăሞᄲ൱ଆࡻሺᅮ࿘ۨႠ ڦᆌᆩዐLjॺᅱ๑ᆩگ࿒܈ဣຕۉڦፆă 20 15 10 0 0 200 400 600 800 DAC GAIN CODE 77. IFS ᇑDACሺᅮஓጴ࠲ڦဣ Rev. B | Page 43 of 56 1000 06452-074 5 AD9776A/AD9778A/AD9779A ሺᅮࢅ฿ۙၯኟ x x ሺᅮ฿ದǖኟۙഗํຕࢅႵຕ႑ࡽୟ০ڦሺᅮ ీփྜඇದăኄࣷڞዂၟᅞႠీٳփڟፌॅLj ᅺྺೕ୲ၟփీྜඇڸၩă Ԩና(LO)ઍཚǖኟۙഗਏᆶᆶ၌ڦୁ฿ۙLjܸ ٪ሞLO܋੨႑ࡽڦ܋᳘ࢇăኄᅺ໎ీࣷڞ ዂሞኟۙഗLOೕ୲ت၄၂ڦೕሗොă ᆶၳᅜᆩፕᇸୁۉईဌୁۉă༵ࠃᇸ้ୁۉLj ຩٗۉუྺ0 V1.6 Vă༵ࠃဌ้ୁۉLjຩٗۉუྺ 0.8 V1.6 Văᆅগፕྺᇸ࣏ୁۉဌୁۉLjൽਦᇀ ܔस٪ഗ0x0Eࢅ0x12ڦ࿋6ႀڦኵă ޤዺDACࠓස78๖ăޤዺDACڦଇ߲ᆅগሞඪ ᅃ้क़ኻᆶᅃ߲ᆶၳăၳ܋Վྺߛፆੇጒༀ(>100 kΩ)ă నᅃ߲ᆅগᆶၳLjൽਦᇀܔस٪ഗ0x0Eࢅ0x12ڦ࿋7 ႀڦኵă 0mA TO 2mA (SOURCE) AD9776A/AD9778A/AD9779Aీࠕၩأᆶኄၵփ૧ᆖ ၚă൩ጀᅪLjኄၵᆖၚࣷໜጣ࿒ܸ܈ᅎǗᅺُLjසࡕထ ྭํ၄ৎࢭፌॅڇڦՉټႠీLjీႴᄲॠ֪ኄၵᆖၚໜ ࿒ڦ܈ՎࣅLjժᇎᅜၯኟă AUXP VBIAS 0mA TO 2mA (SINK) AUXN P/N SOURCE/ SINC I/Qཚڢሺᅮದ ሺᅮದཚࡗۙኝDACሺᅮस٪ഗڦኵܸํ၄ăܔᇀI DACLjኄၵኵ࿋ᇀ0x0Bࢅ0x0C I DAC੦स٪ഗዐăܔᇀ Q DACLjኄၵኵ࿋ᇀ0x0Fࢅ0x10 Q DAC੦स٪ഗዐăኄ ၵኵᆶ10࿋ăኴႜሺᅮց้LjӀቷࠦۨڦօޗሺٷई३ ၭഄዐᅃ߲स٪ഗڦኵLjࢫ֪ଉ߅ඡၟޗڦኵăසࡕ ߅ඡၟޗڦኵሺٷLjሶᆌཕኹLjገܸܔଷᅃ߲DAC੦ स٪ഗཞᄣۙڦኝLjڟ݆ཚࡗۙኝኄၵस٪ഗ๑ ၟᅞڟڥᅃօ߀ྺኹă ᆌړጀᅪLjLOઍཚց܀૬ᇀሺᅮăփࡗLjሺᅮցీ ࣷᆖၚLOցLjᅺྺሺᅮցీࣷ߀Վ႑ࡽࠌڦఇۉ ೝăగၵۙഗڦୁ฿ۙᇑࠌఇۉೝ၎࠲ăᅺُLjॺᅱ ሺᅮۙኝံᇀLOցኴႜă ޤዺDAC֡ፕ AD9776A/AD9778A/AD9779A༵ࠃକଇ߲ޤዺDACăኄၵ DACڦଉײୁۉᆯ1.2 VټဤएጚۉუᇸࢅI120ᆅ গᇑںኮक़ྔڦևۉፆਦۨăޤړዺDACሺᅮยዃྺଉ )้ײ10࿋ኵLjෙ၍๕থ੨स٪ഗ0x0Dࢅ0x11*Ljٗएጚۉ უٷݣഗ(ୁۉIREFERENCE)ޤڟዺDACएጚڦୁۉሺᅮԲ૩ྺ 16.67ăኄ๑ޤڥዺDAC1ࢅޤዺDAC2ڦଉୁۉײሀྺ 2 mAă 06452-303 ૧ᆩఇెኟۙഗLjݥඹᅟํ၄ڇՉټ၍ۉăփ ࡗLjኟۙഗᆶ߲ܠইگఇెႠీݥڦၙ༬ႠLjഄዐ Ԉઔǖ 78. AD9776A/AD9778A/AD97779AޤڦዺDACᇸୁۉ/ဌୁۉ ޤዺDAC1ޗୁۉڦኵᆯ0x0Dࢅ0x0EޤዺDAC1੦स٪ഗ ੦LjޤዺDAC2ޗୁۉڦኵᆯ0x11ࢅ0x12ޤዺDAC2੦ स٪ഗ੦ăኄၵޤዺDACీࠕ༵ࠃᇸୁۉईဌୁۉLjਏ ༹ᆯ߳ޤዺDAC੦स٪ഗڦ࿋6੦ă༵ࠃᇸୁۉई ဌୁۉLjᆌሞۉୟยऺፔስăۉୟۨ႙ࢫLjሞۉ ୁᇸࢅୁۉဌഗኮक़ൎ࣑ժᅮتă ړDACࢫ܋থኟۙഗ้LjޤዺDACᅜᆩᇀLO ڸၩăLOઍཚᆯኟۙഗڦ֖ୁ฿ۙۉუ )ᅜतDAC฿ۙۉუ฿ದ*ᆅഐڦLjీࣷইگဣཥႠ ీă DACᇑኟۙഗۆڦ႙থ੨ස79๖ăۙഗڦ ࠌఇۉუᅃӯᇺߛᇀDACڦۉუLjᅺُᆶՂᄲ๑ᆩ ୁ᳘ࢇईୁۉೝገ࣑ăසࡕኟۙഗႴࠌڦఇ ۉუᇑDACۉუದLjሶᅜ๑ᆩ79๖ڦୁݛ๕ă ړኟۙഗ܋ઠጲDACڦሗො႑ࡽ)฿ኈࢅDAC ၟ*ీᆖၚဣཥႠీ้Ljॺᅱ๑ᆩگཚईټཚ୳հഗăॽ ୳հഗݣሞ79๖࿋ዃᅜ०ࣅ୳հഗยऺLjᅺྺᇸፆ ੇࢅሜፆੇඹᅟยऺྺথৎ50 Ωă Rev. B | Page 44 of 56 AD9776A/AD9778A/AD9779A ሺᅮࢅ฿ۙၯኟࡕ! 90 AUX1_P AD9779A 500Ω 250Ω 93 OUT1_P RBIP 50Ω 82pF C1I RBIN 92 50Ω 89 39pF C2I 21 82pF C3I ሺᅮࢅ฿ۙၯኟڦࡕᅜٗ80ࢅ81ੂă80၂๖ କሺᅮࢅ฿ۙၯኟኮമኟۙഗڦೕă81၂๖ କၯኟኮࢫڦೕă2.1 GHzೕ୲ڦتLOઍཚᅙԥᅞ ڟሯำೝăሏᆩၯኟᅜํ၄ࡕLjڍසࡕ࿒݀܈ ิডٷՎࣅLjሶႴᄲዘႎၯኟă IBBP RSLI 100Ω 22 OUT1_N 250Ω LPI 390nH LNI 390nH IBBN ൩ጀᅪLjሺᅮದ߀କೕ୲ၟᅞLjڍධ٪ሞ ၂ڦၟăᇆၟઠᇸᇀኟۙഗڦ၎࿋฿ದă၎࿋ ฿ದᇑሺᅮ฿ದᅜཚࡗၟڦႚጒઠ൶ݴăጀᅪ80ዐ ڦၟ၎ܔডೝ།Lj81ዐڦၟሶໜೕ୲ሺेܸူইă ၎࿋฿ದᇑೕ୲၎࠲Ljᅺُ၎࿋฿ದዷڦڞၟਏᆶኄ ዖൡၽ༬ኙă AUX1_N 500Ω 87 AUX2_N 250Ω 84 LNQ 390nH RBQN 50Ω 82pF C1Q 9 RBQP 83 50Ω 250Ω 82pF C3Q LPQ 390nH QBBN RSLQ 100Ω 10 OUT2_P 86 39pF C2Q QBBP AUX2_P 500Ω 0 06452-093 500Ω OUT2_N REF LVL 0dBm RBW VBW SWT 3kHz 3kHz 56s REF ATT MIXER UNIT 30dB –40dBm dBm –10 –20 –30 79. ޤዺDACୁ᳘ࢇኟۙഗۆڦ႙ᆩ݆ –40 LOઍཚց –50 LOઍཚցᆶෙዖ֡ፕዐፌްሗڦᅃዖăኄᆯ฿ۙ ޤዺDACڦࠓਦۨڦLjස78๖ăྺሞۉୟዐํ၄ LOઍཚցLjኄၵޤዺDAC຺ڦୟ߳ጲۼᅜཚࡗ ᅃ߲500 ΩۉፆথںLjժཚࡗᅃ߲250 Ωۉፆথ຺ڟୟኟ ۙഗ႑ࡽ܋ኮᅃăኄၵথڦፕᆩॽݥၭڦ ୁۉൻۯኟۙഗڦ܋ۅLj๑ഄዐᅃୟኟۙ ഗ႑ࡽ܋ሺेྲၭୁೋዃă –60 ྺํ၄LOઍཚցLjᆩࢽᆌٗޤዺDACࡽޙस٪ഗڦఐ ණཉॲਸ๔Ljࢫڿሺగ߲ޤዺDACޗڦୁۉኵăྜ ׯኮࢫLjᆌॠ֪ኟۙഗ܋LOઍཚޗڦኵăසࡕ LOઍཚޗኵሺٷLj൩߸߀ۙኝޤڦዺDACޙڦ ࡽLjईኁۙኝଷᅃ߲ޤዺDACڦୁۉăྺକइڥᆶၳ ڦ໙݆LjీႴᄲႜଁသă –70 –80 –100 CENTER 2.1GHz 20MHz SPAN 200MHz 06452-304 –90 81. AD9779AࢅADL5372Lj2.1 GHzܠᅼ႑ࡽLjঢ়ࡗሺᅮࢅ LOցᆫࣅ 0 REF LVL 0dBm RBW VBW SWT 20kHz 20kHz 1.25s REF ATT MIXER UNIT 20dB –40dBm dBm –10 –20 –30 –40 ๑ᆩAD9776A/AD9778A/AD9779AೠࠚӱLjLOઍཚཚ ᅜۙኝڟԨڹሯำೝLjփࡗኄժփ࿘ۨLjࣷໜ࿒ܸ܈Վ ࣅă –50 –60 –70 –80 CENTER 2.1GHz 20MHz SPAN 200MHz 06452-305 –90 –100 81. AD9779AࢅADL5372Lj2.1 GHzܠᅼ႑ࡽLjঢ়ࡗሺᅮࢅ LOցᆫࣅ Rev. B | Page 45 of 56 AD9776A/AD9778A/AD9779A ຕ܋੨! ມ܋੨ఇ๕! AD9776A/AD9778A/AD9779Aీᅜଇዖຕఇ๕߾ ፕǖມ܋੨ఇ๕ࢅ܋ڇ੨ఇ๕ăఐණఇ๕ມ܋੨ఇ๕(ڇ ܋੨࿋ = 0)Lj߳DACٗጆᆩ܋੨থຕă܋ڇ੨ఇ ๕(܋ڇ੨࿋ = 1)ူLjଇ߲DACٗ܋੨1থຕLjDAC1 ࢅDAC2ຕٱLjTXENABLEᆩઠॽຕᆅڞణ ՔDACăມ܋੨ఇ๕ူLjTXENABLEᆩઠ࠲ຕጴຕ ୟ০ă ມ܋੨ఇ๕ူLj߳EBDڦຕሞ၎ᆌڦጺ၍)Q2E \26;1^ईQ3E\26;1^*ฉথăJࢅRຕཞ้ٳڟLjժሞ EBUBDML႑ࡽڦฉืᄂႜ֑ᄣăUYFOBCMF႑ࡽՂ Ⴗྺߛ֍ీ๑ీ݀พୟ০ă! ຕᅜDATACLKྺ֖ ړຕᅜEBUBDML้֖ྺLjᇑBE:887B0! BE:889B0BE:88:Bڦথ੨ፌྺ०ڇăEBUBDMLྺ ᆩઠ٪ຕాڦև้ዓ࣐ڦ؋ӲԨDŽࡤగዖࠦۨჽ DžăᅺُLjසࡕࢇޙຕ၎ܔᇀEBUBDMLॺڦ૬ ࢅԍ้क़Lj৽ీኟඓ٪ຕă93ߴକᅜ EBUBDMLྺ้Ⴞ֖܋ڇڦ੨ఇ๕ࢅມ܋੨ఇ๕ၘဦ้ Ⴞă! ມ܋੨ఇ๕ူLjՂႷᅜຕ୲༵ࠃຕă܋ڇ੨ఇ ๕ူLjՂႷᅜ߳DACຕ୲ڦଇԠ༵ࠃຕăຕ ڦፌߛ୲ྺ300 MSPSLjᅺُሞ܋ڇ੨ఇ๕ူLj߲ DACڦຕ୲ፌߛٳ150 MHză ሞມ܋੨ࢅ܋ڇ੨ఇ๕ူLjᅜᆩᅃ߲ຕ้ዓ (DATACLK)႑ࡽፕྺ้ࠦۨक़एإLjᅜՍٗFPGAईഄ ຕᇸइڥຕăُ႑ࡽᅜຕ୲߾ፕă ܋ڇ੨ఇ๕! tSDATACLK ܋ڇ੨ఇ๕ူLjଇ߲DACڦຕሞ܋੨1ጺ၍(P1D [15:0])ฉথăIࢅQຕᄣԨٱLjժሞDATACLKڦฉ ืᄂႜ֑ᄣăᇑຕᅃڢLj࣏ՂႷሞTXENABLE(ᆅ গ39)ฉ༵ࠃᅃ߲ኡد႑ࡽLjᅜՍॽຕᆅڞ၎ᆌ ڦDACă ړTXENABLEྺ ߛ ้ Lj ܔᆌ ڦຕ ጴ ໃ I DACăړTXENABLEྺ้گLjܔᆌڦຕጴໃQ DACă ٱఇ๕ူຕጴথ੨้ڦႾස83๖ă tHDATACLK DATA 06452-308 DATACLK 82. ຕ܋੨้ႾLjຕᅜDATACLKྺ֖ 28၂๖କሞഗॲ߾ڦፕ࿒ాྷݔ܈ຕॺڦ૬ࢅԍ ้क़ᄲ൱Ljཞ้၂๖କፆشڔ੨(KOW)ăፆشڔ੨থ ੨ॺڦ૬ࢅԍ้क़ኮࢅLjྺକඓԍኟඓ֑ᄣLjኄ ᆶၳຕՂႷ၄ሞഗॲฉڦፌ้܌क़ă DATACLKೕ୲ยዃ DATACLK႑ ࡽ ٗ ా և DAC֑ ᄣ ้ ዓ DACCLKइ ڥă DATACLKڦೕ୲ൽਦᇀ߲ܠՊײยዃăᅃӯܸჾLj DATACLKڦೕ୲ڪᇀຕ୲ăDACCLKᇑDATACLK࠲ڦဣ๕සူǖ f DACCLK f DATACLK IF ZS SP u DATACLKDIV u u Q࿋(स٪ഗ0x02ڦ࿋0)੦ຕڦದܔຩႾăړQ ࿋ยྺఐණኵ0้LjໃDACڦI-QܔྺܔᆌᇀTXENABLEံڦߛࢫگଇ߲ຕጴăړQ࿋ยྺ1้Ljໃ DACڦI-QܔྺܔᆌᇀTXENABLEံߛࢫڦگଇ߲ ຕጴă൩ጀᅪLjஃӀቷࢆዖຩႾದܔLjܔᆌᇀTXENABLEߛڦຕۼԥᆅڞI DACLjܔᆌᇀTXENABLEگ ڦຕۼԥᆅڞQ DACă ഄዐLjՎଉIFĂZSĂSPࢅDATACLKDIVڦኵස27๖ă DATACLK P1D[15:0] P1D1 P1D2 P1D3 P1D4 P1D5 P1D6 P1D7 P1D8 TXENABLE I DAC[15:0] P1D1 P1D3 P1D5 Q DAC[15:0] P1D2 P1D4 P1D6 I DAC[15:0] P1D1 P1D3 P1D5 Q DAC[15:0] P1D0 P1D2 P1D4 Q FIRST = 1 83. ܋ڇ੨ఇ๕ຕጴথ੨้Ⴞ Rev. B | Page 46 of 56 06452-306 Q FIRST = 0 AD9776A/AD9778A/AD9779A DATACLKDIVৈᆖၚDATACLKೕ୲Ljܸփᆖၚຕ ֑ᄣ้ዓڦೕ୲ăྺ๑ຕ֑ᄣೕ୲fDATACLK๔ዕᇑ ྭຕ୲ԍᅃዂLjDATACLKDIVᆌยྺ00ă ZS 1(ଭኵག؊্ᆩ) 2(ଭኵག؊๑ీ) 0.5(܋ڇ੨๑ీ) 1(ስມ܋੨) 1Ă2ई4 SP DATACLKDIV tSREFCLK ں स٪ഗ 0x01 ࿋ [7:6] 0x01 [0] 0x02 [6] 0x03 [5:4] tHREFCLK ຕᅜREFCLKྺ֖ గၵဣཥዐLjᆩREFCLKԲᆩDATACLKፕྺຕ ้Ⴞ֖߸ݛՍăසࡕDACCLKڦೕ୲ڪᇀຕڦ ೕ୲)֭ኵ*Ljሶ၎ܔᇀREFCLK±28๖้Ⴞࡀ߭ڦຕ ᅜথ๑ᆩLjႴ߸ܠ୯ăසࡕDACCLKڦೕ୲ٷ ᇀຕڦೕ୲Ljሶᅜ૧ᆩݴೕഗׂิDATACLK )ᅜतాևຕ֑ᄣ้ዓ*ăُݴೕഗࣷሞREFCLKࢅDATACLKኮक़ሰׯ၎࿋ఇࢵLjڞዂ֑ᄣ้क़փඓۨăྺକඓ૬ ຕথ੨ॺڦۨࠦڦ૬ࢅԍ้क़LjՂႷၩأኄዖ၎࿋ఇ ࢵă 06452-309 ኵ ֭ኵဣຕ(1Ă2Ă4ई8) tH_SYNC tS_SYNC REFCLK 27. ٗDACCLKइڥDATACLKݴڦೕኵ Վଉ IF SYNC_I DATA 84. ຕ܋੨้ႾLjຕᅜREFCLKྺ֖LjfDACCLK = fREFCLK ൩ጀᅪLjSYNC_Iॺڦ૬ࢅԍ้क़၎ܔᇀREFCLK ܸჾLjڍSYNC_IᅜాևDACCLK୲ႜ֑ᄣăړ ֑ ᆩ PLL้ Lj SYNC_IՂ Ⴗ ዃ ࿋ ᅜ ፁ ၎ ܔᇀ REFCLK (tS_SYNC)ॺڦ૬้क़ᄲ൱LjڍփీሞాևSYNC_I֑ᄣ้ዓ ڦമᅃ߲ฉืᄂኮമዃ࿋ă࣑ჾኮLjSYNC_Iዃ࿋ᄂՂႷݣ ሞჄଇ߲ፆشڔ੨ኮक़Ljኄၵፆشڔ੨ᅜDACCLK ୲ዘްڦLjܸփREFCLK୲ăኍܔPLL༵ࠃڦDACCLK ೕ୲຺ྺڦԠREFCLKೕ୲ڦ൧Lj85ڦᅽᆖևݴ၂๖ କ SYNC_Iዃ ࿋ ڦᆶ ၳ ش੨ ă ᅺ ُ Lj ፌ ॺ ܌૬ ้ क़ ྺ tS_SYNCLjፌॺ૬้क़ྺtDACCLK − tH_SYNCă tDACCLK SYNC_I tH_SYNC tS_SYNC REFCLK DACCLK tSREFCLK tHREFCLK 06452-310 ྺକၩأ၎࿋ఇࢵLjՂႷ๑ᆩSYNC_Iᆅগ)ᆅগ13ࢅ 14* Lj ഽ ೨ ຕ ሞ ༬ ۨ REFCLKᄂ ႜ ֑ ᄣ ă REFCLKĂ SYNC_Iࢅຕኮक़࠲ڦဣස84ࢅ85๖ăᅺُLj ྺକ੍ॽںຕدഗॲLjSYNC_IࢅຕՂႷፁ 28้ڦႾᄲ൱ă DATA Figure 85. Input Data Port Timing, Data Referenced to REFCLK, fDACCLK = fREFCLK × 4 85. ຕ܋੨้ႾLjຕᅜREFCLKྺ֖LjfDACCLK = fREFCLK × 4 28. ຕ้Ⴞࡀ߭ᇑ࿒܈ ้Ⴞ֖ຕ ຕ၎ܔᇀREFCLK± ຕ၎ܔᇀDATACLK SYNC_I±REFCLK± ࿒܈ −40°C +25°C +85°C −40°C +85°C −40°C +25°C +85°C −40°C +85°C −40°C +25°C +85°C −40°C +85°C Min tS (ns) −0.80 −1.00 −1.10 −0.80 2.50 2.70 3.00 3.00 0.30 0.25 0.15 0.30 PLL্ᆩ Min tH (ns) 3.35 3.50 3.80 3.80 −0.05 −0.20 −0.40 −0.05 0.65 0.75 0.90 0.90 Rev. B | Page 47 of 56 Min KOW (ns) 2.55 2.50 2.70 3.00 2.45 2.50 2.60 2.95 0.95 1.00 1.05 1.20 Min tS (ns) −0.83 −1.06 −1.19 −0.83 2.50 2.70 3.00 3.00 0.27 0.19 0.06 0.27 PLL๑ీ Min tH (ns) 3.87 4.04 4.37 4.37 −0.05 −0.20 −0.40 −0.05 1.17 1.29 1.47 1.47 Min KOW (ns) 2.99 2.98 3.16 3.54 2.45 2.50 2.60 2.95 1.39 1.48 1.51 1.74 AD9776A/AD9778A/AD9779A ᆫࣅຕ้Ⴞ! AD9776A/AD9778A/AD9779AਏᆶೌాۉୟLjሎႹᆩࢽۙ ኝDATACLKᇑDCLK_SMP(֑ᄣຕాڦև้ዓ) ኮक़࠲ڦဣLjᅜᆫࣅຕ้Ⴞăኄዖᆫࣅཚࡗᅃဣ ଚෙ၍๕থ੨स٪ഗ܁ႀ֡ፕઠํ၄ă้Ⴞᆫࣅᅜሞᆩ ࢽڦჹ߭੦ኮူྜׯLjᄺᅜܔഗॲႜՊײLj๑ኮጲ ۯԍሞᅃ้ۨڦႾᇆଉ(้Ⴞᇆଉದዃ)ăࠀీৈሞ ຕᅜDATACLKీ֍้֖ྺ๑ᆩăࢫჄևݴ ॽၘဦຫዖ݆ݛă DATA TIMING ERROR = 0 TIMING MARGIN[3:0] D TIMING ERROR DETECTION CLK PD1[0] D ΔtM ΔtM ΔtM ΔtM TIMING ERROR = 1 DATA TIMING ERROR TYPE = 1 DATA ACTUAL SAMPLING INSTANT DELAYED CLOCK SAMPLING 06452-403 DELAYED DATA SAMPLING TIMING ERROR = 1 DATA TIMING ERROR TYPE = 0 87. ᇆଉ֪ຕ้ڦႾ ړጲ้ۯႾᆫࣅఇ๕๑ీ(स٪ഗ0x03ڦ࿋7=1)้Ljഗॲ Ⴤ॔ຕ้ႾٱဃIRQ࿋ࢅຕ้Ⴞٱဃૌ႙࿋ăॠ֪ ॺڟ૬ٱဃ้LjDATACLKჽ[3:0]ሺेǗॠ֪ڟԍٱ ဃ้LjDATACLKჽ[3:0]३ณăᆩࢽᅜ࣮ړ܁മ๑ᆩ ڦDATACLKჽ[3:0]ยዃኵă TIMING ERROR TYPE Q CLK DATACLK DELAY[3:0] ้ۯႾᆫࣅ! ΔtD DATACLK 06452-402 DCLK_SMP ΔtM ጲ้ۯႾᆫࣅ! TIMING ERROR IRQ Q ΔtM DATA 86၂๖ᆩઠॠ֪֑ᄣ้Ⴞٱဃժۙኝຕথ੨้Ⴞۉڦ ୟăDCLK_SMP႑ࡽᆩઠ٪ຕాڦև้ዓăፌ ዕLjُ႑ࡽڦฉืᄂႴᄲتᇀຕᆶၳ֑ᄣዜڦዐ ႐ăഄํ၄ݛ๕ۙኝ้क़ჽtDLjᅜ߀ՎDATACLK้ ႾLjܸٗ߀Վຕ၎ܔᇀDCLK_SMP้ٳڟڦक़ă ΔtM ΔtM 86. ้Ⴞٱဃॠ֪ࢅᆫࣅۉୟ أକഗॲຕୟ০ᆩํڦा֑ᄣຕྔLjٱဃॠ֪ۉୟ ׂ࣏ࣷิଇፇ֑ᄣຕ(ྺᇆଉ֪ຕ)ăᅃፇ֑ᄣຕ ሞํाຕ֑ᄣۅኮമ٪Ljଷᅃፇ֑ᄣຕሞํाຕ ֑ᄣۅኮࢫ٪ăසࡕᇆଉ֪ຕᇑํाຕದLj ሶණྺ֑ᄣᆶၳLjுᆶٱဃăසࡕํाຕᇑᇆଉ֪ຕ փದLjሶࣷำٱă ຕ้Ⴞᇆଉ[3:0]Վଉਦۨᇆଉ֪ຕሞํाຕ֑ᄣ ۅኮമࢅኮࢫܠ৳ႜ٪ăᅺُLjຕ้ႾᇆଉՎଉਦ ۨথ੨Ⴔᄲܠณॺ૬ࢅԍᇆଉLj֍ీ๑ຕ้Ⴞٱဃ IRQԍၳ(֡ፕဃ)ăᆯُኪLjኻᄲॺ૬ࢅԍ ᇆଉইڟຕ้Ⴞᇆଉ[3:0]ኵᅜူLj้ႾٱဃIRQ৽ࣷ ዃ1Ljڍժփᅃۨᅪ࿆ጣ٪ഗॲዐڦຕփኟඓă ้ۯႾᆫࣅఇ๕(स٪ഗ0x03ڦ࿋7 = 0)ူLjഗॲփࣷ߀ ՎᆩࢽՊײยዃڦDATACLKჽ[3:0]ኵăఐණ൧ူLj DATACLKჽ๑ీ࿋ၳăᄲ๑ᆩDATACLKჽ[3:0] ኵLj࿋ՂႷยྺߛăሞ0000011111ాྷݔยዃDATACLKჽ้Ljჽ(ਨ้ܔक़)ྷݔሀྺ700 ps6.5 nsă29 ଚକኝ߲࿒ాྷݔ܈օڿሺۆڦ႙ჽă 29. ኝ߲࿒ాྷݔ܈ຕჽ၍ۆڦ႙ჽ ჽ ଭஓჽ (๑ీჽ၍้ڦჽ) ೝڇ࿋ჽ −40°C 630 +25°C 700 +85°C 740 ڇ࿋ ps 175 190 210 ps ॽഗॲዃᇀۯఇ๕้Lj৽ࣷघऄֶٱၯᄓஇडăසࡕ IRQ๑ీLjሶॠ֪ॺڟ૬/ԍ؋ׂ้ࣷิዐăದዃ ᅃْഗॲLj৽ࣷኴႜᅃֶْٱၯᄓ֡ፕăܔຕ้Ⴞᇆଉ [3:0]ईDATACLKჽ[3:0]ኵፔڦඪࢆ߀ՎLj݀ةࣷۼႎ ٱֶڦၯᄓ֡ፕă ݀ิٱဃ้Ljأକยዃຕ้ႾٱဃIRQྔLj࣏ࣷยዃຕ ้Ⴞٱဃૌ႙࿋ăຕ้Ⴞٱဃૌ႙࿋ྺ้گLj๖ԍ ٱဃǗྺߛ้Lj๖ॺ૬ٱဃă87၂๖କຕথ੨ڦ ้Ⴞࢅຕ้Ⴞٱဃૌ႙࿋ڦጒༀă Rev. B | Page 48 of 56 AD9776A/AD9778A/AD9779A ഗॲཞօ! ဣཥႴ൱ీࣷܔཞօ༵ଇዖփཞᄲ൱ăగၵဣཥᄲ൱ ߲ܠDACԵُཞօăኧ݀พݴणईհຐႚ৽้ׯኄዖ ൧LjᅺྺႴᄲ๑ᆩߵܠཀ၍ઠ݀พ၎࠲႑ࡽăُ้Lj DACႴᄲԵُ၎࿋ܔጚLjڍీփᄲ൱DACᇑဣ ཥप้֖ዓܔጚăሞ֑ᆩ้ްݴᆩ݀พ૾ୟڦဣཥዐLj ᅃ߲ई߲ܠDACీႴᄲᇑဣཥप้֖ዓཞօăཞօஇ ड߁ຎևࢅݴഗॲᇑဣཥ้ዓཞօևॽݴຫኄଇዖཉॲ ူڦഗॲཞօၜă ཞօஇड߁ຎ! 88၂๖କೌాཞօஇडڦăཞօஇडڦएԨ֡ፕ ׂิྺ܈DACCLKዜ؛߲ڇڦ๔ࣅஞ؋Ljᅜॽ้ዓ݀ ิጒༀऐஇडยዃྺᅙኪጒༀă؛๔ࣅஞ؋ॽ้ዓጒༀ [4:0]ڦኵሜ้ዓ݀ิጒༀऐLjፕྺഄူᅃ߲ጒༀăසࡕ ཞօஇडኟඓׂิ؛๔ࣅஞ؋Ljሶॽሞ32߲DACCLK ዜዐڦᅃ߲DACCLKዜాᆶၳă้ዓ݀ิጒༀऐᆶ32 ߲ጒༀᅜDACCLK୲߾ፕLjᅺُሞڼᅃ߲ஞ؋ኮࢫথ ڦڟ߲؛๔ࣅஞ؋ेࣷۼሜጒༀऐణമሞڦጒༀLjٗ ܸ๑ഗॲᅜኟඓ้ڦዓ߾ፕă PLL BYPASS INTERNAL PLL BIT 0 (1× INTERPOLATION) BIT 1 (2×) BIT 2 (4×) BIT 3 (8×) BIT 4 (8× WITH ZERO STUFFING) MUX DELAY REGISTER (REG 0x0, BITS[7:4]) fSYNC_1 < fDATA/2^N ERROR DETECT CIRCUITRY ཞօஞ؋ႴڦSYNC_Iฉืᄂ 1DŽఐණDž 2 4 8 16 ၳยዃ ၳยዃ ၳยዃ ૩සLjසࡕ๑ᆩೕ୲ྺfDACCLK/4ڦSYNC_I႑ࡽLjሶܔ ᇀSYNC_IԲኵ[2:0]Lj011ࢅ100ྺᆶၳยዃă011ยዃڞ ዂ32߲DACCLKዜׂิᅃ߲؛๔ࣅஞ؋Lj100ยዃڞ ዂ64߲DACCLKዜׂิᅃ߲؛๔ࣅஞ؋ăଇዖ൧ ํ၄ኟඓڦഗॲཞօă ཞօ้Ⴞٱဃॠ֪! SYNC IRQ PULSE GENERATION LOGIC 06452-094 SYNC DELAY SYNC_I Բኵ[2:0] 000 001 010 011 100 101 110 111 ้ዓጒༀ[4:0]ኵ้ዓ݀ิጒༀऐሞ؛๔ࣅ้ްڦ࿋ጒ ༀăཚࡗ߀ՎُኵLjᅜۙኝాև้ዓ၎ܔᇀSYNC_I႑ࡽ ้ڦႾă้ዓጒༀ[4:0]ኵڿሺ1Ljాև้ዓ৽༵ࣷമᅃ߲ DACCLKዜă LOAD DACCLK OFFSET VALUE (REG 0x07, BITS[4:0]), ONE DACCLK CYCLE/INCREMENT SYNC_I 30. ኧ߳ዖSYNC_Iೕ୲Ⴔڦยዃ REFCLK DACCLK CLOCK GENERATION STATE MACHINE ڦԲኵႜᅞăኻᄲஞ؋ׂิۉୟᅜ32߲DACCLKዜ ڦԠ ຕ ׂ ิ ஞ ؋ Lj SYNC_Iೕ ୲ Ս ᅜ گᇀ DACCLK/32ăඪࢆ൧ူLjSYNC_Iڦፌٷೕ୲ՂႷگᇀ fDATACLKă 88. ཞօۉୟࠀీ ఁᅭฉLjྺକԍኟඓཞօLjSYNC_Iሞ32้߲ዓዜ )ई32้߲ዓዜڦԠຕ*ዐᆌᆶᅃ߲ฉืᄂăᅜܔஞ ؋ ׂ ิ இ ड ႜ Պ ײLj ๑ ኮ ሞ SYNC_Iೕ ୲ ߛ ᇀ DACCLK/32้ᅞஞ؋ăܠᇆஞ؋ᅜӀቷ30ଚ ཞօஇडਏᆶᇑຕ้Ⴞ၎ຼٱڦဃॠ֪ۉୟă SYNC_I้Ⴞᇆଉ[3:0]Վଉਦۨཞօথ੨Ⴔᄲܠณॺ૬ࢅԍ ᇆଉLj֍ీ๑ཞօ้ႾٱဃIRQ࿋ԍၳ)न֡ፕ ဃ*ăᅺُLjኻᄲॺ૬ࢅԍᇆଉইڟSYNC_I้Ⴞᇆଉ [3:0]ኵᅜူLjཞօٱဃIRQ࿋৽ࣷዃ1Ljڍኄժփᅃۨᅪ࿆ ጣSYNC_I٪փኟඓă ړཞօ้ႾٱဃIRQ࿋ዃ1้Ljᅜ֑ൽৰኟٯแᅜ࣬ް้ Ⴞᇆଉăᅃዖٯแሡ้३ณ้ႾᇆଉLjڟཞօ้Ⴞٱ ဃIRQൣ0ྺኹăࢫॽSYNC_Iჽሺेଇ߲ሺଉLjॠֱ ้Ⴞᇆଉሺे࣏३ณăසࡕ้ႾᇆଉሺेLjሶीჄڿ ሺSYNC_IჽڦኵLjڟᇆଉڟٳፌྺٷኹăڍLjසࡕ ڿሺSYNC_Iჽڞዂ้Ⴞᇆଉ३ณLjሶᆌ܌ჽLjڟ ้Ⴞᇆଉڟٳፌॅྺኹă Rev. B | Page 49 of 56 AD9776A/AD9778A/AD9779A ഗॲᇑဣཥ้ዓཞօ! AD9776A/AD9778A/AD9779A༵ࠃକஞ؋ఇ๕ཞօݛӄ(९ 89)Ljᅜॽᅃ߲ဣཥా߲ܠഗॲڦDACᇑཞᅃ DACCLKᄂ ཞ օ ă ా և ้ ዓ ཚ ࡗ ၠ SYNC_I (SYNC_I+ĂSYNC_I−)༵ࠃᅃ߲ᅃْႠஞ؋ईᅃ߲ዜ႑ ࡽܸํ၄ཞօăSYNC_I႑ࡽӀቷాևDACCLK֑ᄣ୲้ ዓႜ֑ᄣă 90၂๖କSYNC_I၎ܔᇀREFCLK้ڦႾă൩ጀ ᅪLj้Ⴞ၎ܔᇀREFCLK႑ࡽܸჾLjڍSYNC_I ᅜDACCLK୲ႜ֑ᄣăኄᅪ࿆ጣLjSYNC_I႑ࡽڦฉื ᄂՂႷ݀ิሞമᅃDACCLKฉืᄂڦԍ้क़ኮࢫLjܸփ ሞമᅃREFCLKฉืᄂتă SYNC_Iೕ୲ਏᆶᅜူ၌ǖ ړഗॲ݀ิ้Ⴞٱဃ้LjIRQᆅগ(ᆅগ71)ᆩፕԒয়Ljᆌړ ᇎᅜֱკDŽཚࡗ܁ൽस٪ഗ0x19Džᅜඓۨඓൎࠤڦቱཉ ॲăIRQᆅগਸ႙ۉگೝᆶၳăᆌሞഗॲྔևઙ ߛIRQᆅগăُᆅগᅜথڟഄഗॲڦਸIRQ ᆅগLjᅜ๑ኄၵᆅগႚׯ၍“ई”থă ዐ൩൱֡ፕ! fSYNC_I ≤ fDATA ాև้ዓཞօ้Ljᆶഗॲڦຕ֑ᄣ้ዓ၎࿋ܔጚă ຕ้Ⴞ࠲ဣᅜᆩREFCLKईDATACLKፕྺ֖ă ܔᇀኄዖཞօݛӄLjᆶഗॲྺٗഗॲLjဣཥ้ዓׂิ/ ݴದႊೌ؊ړዷഗॲă߳DACڦSYNC_I႑ࡽኮक़้ڦዓ ೋᅎՂႷگăཞᄣLj߳DACڦREFCLK႑ࡽኮक़้ڦዓ ೋᅎᄺՂႷگăDACኮक़ኄၵ႑ࡽڦඪࢆೋᅎۼՂႷሞ ้Ⴞᇨ໙ዐेᅜ୯ă89၂๖କ้ዓࢅཞօݛӄ๖ ૩ă ᆶଇ߲փཞٱڦဃՔኾᅜ݀ةዐ൩൱ǖຕ้Ⴞٱဃ Քኾࢅཞօ้ႾٱဃՔኾăఐණ൧ူLjኻᄲᆶᅃ߲ٱဃ Քኾዃ1LjIRQᆅগՍྺۉگೝᆶၳăᅜೡԸᆶٱဃՔ ኾईኻೡԸഄዐڦᅃ߲LjݞኹഄघऄIRQᆅগฉڦዐă ٱဃՔኾࣷԥ٪ժԍᆶၳLj܁ڟൽዐस٪ഗ0x19 ईኁٱဃՔኾ࿋ԥޮ߃ă MATCHED LENGTH TRACES REFCLK OUT SYNC_I SYSTEM CLOCK LOW SKEW CLOCK DRIVER REFCLK OUT SYNC_I LOW SKEW CLOCK DRIVER 06452-311 PULSE GENERATOR MATCHED LENGTH TRACES 89. ஞ؋ఇ๕ူܠڦഗॲཞօ SYNC_I tH_SYNC tS_SYNC 06452-312 REFCLK DACCLK 90. ܠഗॲԵُཞօ้LjSYNC_I၎ܔᇀREFCLK้ڦႾ Rev. B | Page 50 of 56 AD9776A/AD9778A/AD9779A ࠀࡼ! 9199၂๖ڇDACఇ๕ࢅມDACఇ๕ူ1.8 Vࢅ3.3 Vຕጴࢅ้ዓۉᇸࡼࠀڦăُྔLjڇDACఇ๕ူ3.3 Vఇెۉᇸ)ᇑఇ ๕ࢅ܈࠲*ࡼࠀڦ/ྺୁۉ102 mW/31 mALjມDACఇ๕ူྺ182 mW/55 mAăPLL๑ీ้Lj1.8 V้ዓۉᇸୁۉڦ/ࠀࡼሺ े50 mA/90 mWă 0.075 0.7 8× INTERPOLATION 0.6 4× INTERPOLATION 4× INTERPOLATION, ZERO STUFFING 8× INTERPOLATION, ZERO STUFFING 0.5 ALL INTERPOLATION MODES POWER (W) POWER (W) 0.050 2× INTERPOLATION, ZERO STUFFING 0.4 2× INTERPOLATION 0.3 1× INTERPOLATION, ZERO STUFFING 0.025 0.2 1× INTERPOLATION 0.1 0 25 50 75 100 125 150 175 200 225 250 fDATA (MSPS) 0 06452-076 0 25 50 75 100 150 175 200 225 250 94. ࠀࡼLjຕጴ3.3 VۉᇸLjৈIຕLjํຕఇ๕Lj Ԉઔۙఇ๕ࢅଭኵག؊ 91. ጺࠀࡼLjৈIຕLjํຕఇ๕ 0.4 1.0 4× INTERPOLATION 8× INTERPOLATION, ALL MODULATION MODES 8× INTERPOLATION, ZERO STUFFING 0.9 8× INTERPOLATION 125 fDATA (MSPS) 06452-080 0 4× INTERPOLATION, ALL MODULATION MODES 0.8 0.3 0.2 POWER (W) POWER (W) 0.7 2× INTERPOLATION 0.6 2× INTERPOLATION, ALL MODULATION MODES 0.5 0.4 0.3 0.1 0.2 2× INTERPOLATION, ZERO STUFFING 4× INTERPOLATION, ZERO STUFFING 1× INTERPOLATION 0.1 1× INTERPOLATION, ZERO STUFFING 1× INTERPOLATION 0 50 75 100 125 150 175 200 225 250 fDATA (MSPS) 0 06452-078 25 25 50 100 125 150 175 200 225 250 275 300 fDATA (MSPS) 95. ጺࠀࡼLjມDACఇ๕ 92. ࠀࡼLjຕጴ1.8 VۉᇸLjৈIຕLj ํຕఇ๕LjփԈઔଭኵག؊ 0.8 0.08 8× INTERPOLATION, fDAC /8, fDAC /4, fDAC /2, NO MODULATION 0.7 4× INTERPOLATION 0.6 0.06 8× INTERPOLATION POWER (W) 4× INTERPOLATION 0.04 2× INTERPOLATION 0.5 0.4 2× INTERPOLATION 0.3 0.2 0.02 1× INTERPOLATION 1× INTERPOLATION, NO MODULATION 0.1 0 25 50 75 100 125 150 175 200 225 fDATA (MSPS) 250 93. ࠀࡼLj้ዓ1.8 VۉᇸLjৈIຕLjํຕఇ๕Lj Ԉઔۙఇ๕LjփԈઔଭኵག؊ 0 25 50 75 100 125 150 175 200 225 250 fDATA (MSPS) 96. ࠀࡼLjຕጴ1.8 VۉᇸLjIࢅQຕLjມDACఇ๕Lj փԈઔଭኵག؊ Rev. B | Page 51 of 56 06452-081 0 0 06452-079 POWER (W) 75 06452-077 0 0 AD9776A/AD9778A/AD9779A 0.125 ۖࢅۉႩఇ๕! POWER (W) 8× INTERPOLATION, fDAC /8, fDAC /4, fDAC /2, NO MODULATION 0.100 4× INTERPOLATION 0.075 2× INTERPOLATION 0.050 0.025 0 25 50 75 100 125 150 175 200 225 250 fDATA (MSPS) 06452-082 1× INTERPOLATION, NO MODULATION 0 97. ࠀࡼLj้ዓ1.8 VۉᇸLjIࢅQຕLjມDACఇ๕Lj փԈઔଭኵག؊ AD9776A/AD9778A/AD9779Aਏᆶܠዖۖۉఇ๕Ljຕጴᆅ ĂዷTxDACࢅޤዺDACᅜݴ՚ईཞ้ۖۉăཚࡗෙ၍ ๕থ੨܋੨LjᅜॽዷTxDACዃᇀႩईۖۉఇ๕ăႩ ఇ๕ူLjTxDAC࠲ԿLjܸٗইࡼࠀگăփࡗLjएጚۉ უᇸධԍཚۉLjᅜՍీٗႩఇ๕࣬ްăۖۉఇ ๕࿋)स٪ഗ0x00ڦ࿋4*ዃ1้Ljᆶఇెࢅຕጴۉୟۖ ۉLjԈઔएጚۉუᇸăఇ๕ူLjෙ၍๕থ੨܋੨ධԍ ऄۯăఇ๕ԲႩఇ๕߸ูۉLjڍഔ้ۯक़ᄺ߸ă ޤዺDACᄺᅜཚࡗෙ၍๕থ੨܋੨ՊײႩఇ๕ă ጲۉۖۯ๑ీ࿋)स٪ഗ0x00ڦ࿋3*੦ഗॲຕጴևۖڦݴ ీࠀۉăጲీࠀۉۖۯᇑTXENABLEᆅগ)ᆅগ39*ᅃഐ݀ ࣩፕᆩLjၘ൧९31ă 31 TXENABLE (ᆅগ39) 0 0.075 POWER (W) 1 0.025 50 75 100 125 150 175 200 225 250 06452-083 25 1200 06452-084 0 0 fDATA (MSPS) 98. ࠀࡼLjຕጴ3.3 VۉᇸLjIࢅQຕLj ມDACఇ๕ 0.16 0.14 POWER (W) 0.12 0.10 0.08 0.06 0.04 0.02 0 0 200 400 සࡕጲۉۖۯ๑ీ࿋ = 0Ljሶᆩ0ൣຕୟ ০ă සࡕጲۉۖۯ๑ీ࿋ = 1Ljሶൣ߲ܠREFCLK ዜڦຕLjࢫॽຕጴᆅጲۯዃᇀۖۉጒ ༀăDACĂएጚۉუᇸࢅෙ၍๕থ੨܋੨փ ᆖၚă ALL INTERPOLATION MODES 0.050 ௮ຎ 600 800 1000 fDAC (MSPS) 99. ݒSinc୳հഗڦDVDD18ࠀࡼ Rev. B | Page 52 of 56 ኟ߾ፕ AD9776A/AD9778A/AD9779A ೠࠚӱ߁ຎ! ۆ႙ೠࠚยዃස100๖ăᅜᆩᅃ߲ኟ၀հईݛհ้ ዓፕྺDAC֑ᄣ้ዓᇸă้ዓڦೕࣷ܈كথᆖၚഗॲ Ⴀీăᄲ൱๑ᆩگሯำĂگ۶้ۯዓᇸă ೠࠚӱ֡ፕ! AD9776A/AD9778A/AD9779Aೠࠚӱኼሞӻዺᆩࢽຄ ဒഗॲ֡ڦፕLjժೠࠚഗॲڦႠీăᄲ๑ᆩೠࠚӱLjᆩࢽ ႴጚԢᅃPCĂ5 VۉᇸĂ้ዓᇸࢅຕጴຕᇸăᆩࢽ࣏ Ⴔᄲཚࡗೕݴဆᅏई๖հഗઠ࠵ִDACă ೠࠚӱڦᆶՂᄲথၘ९101ă CLOCK GENERATOR ADAPTER CABLES CLKIN SPI PORT SPECTRUM ANALYZER AD9776A/ AD9778A/ AD9779A DIGITAL PATTERN GENERATOR EVALUATION BOARD CLOCK IN 06452-097 1.8V POWER SUPPLY DATACLK OUT 3.3V POWER SUPPLY 100. ۆ႙֪ยዃ DVDD18 DVDD33 P4 DIGITAL INPUT CONNECTOR CVDD18 J1 CLOCK IN AD9779A JP4 JP15 JP8 JP14 JP3 JP16 JP2 JP17 S7 DCLKOUT J2 5V SUPPLY MODULATOR OUTPUT S5 OUTPUT 1 ADL537x +5V GND S6 OUTPUT 2 LOCAL OSC INPUT ANALOG DEVICES AD9776A/ AD9778A/ AD9779A 06452-095 SPI PORT AVDD33 101. ၂๖ᆶথڦAD9776A/AD9778A/AD9779Aೠࠚӱ Rev. B | Page 53 of 56 AD9776A/AD9778A/AD9779A ૧ᆩೠࠚӱໜॲڦLjᆩࢽᅜాೌܔದዃस٪ഗႜ Պײăཚࡗෙ၍๕থ੨܋੨Ljᅜॽഗॲยዃྺඪࢆᆩ ߾ڦፕఇ๕ă102၂๖କॲڦఐණش੨ă ೠࠚӱฉ࣏ᆶADL537xۙഗLjᅜՍܔRFጱဣཥႜೠ ࠚăೠࠚӱၘڦဦጨଙࢅෙ၍๕থ੨ॲᅜٗADIࠅິ ྪበူሜă 1. SET INTERPOLATION RATE 2. SET INTERPOLATION FILTER MODE 3. SET INPUT DATA FORMAT 06452-099 4. SET DATACLK POLARITY TO MATCH INPUT TIMING 102. ෙ၍๕থ੨܋੨ॲش੨ Rev. B | Page 54 of 56 AD9776A/AD9778A/AD9779A ྔႚ٫! 0.75 0.60 0.45 16.00 BSC SQ 1.20 MAX 14.00 BSC SQ 100 1 76 76 75 SEATING PLANE 100 1 75 PIN 1 BOTTOM VIEW (PINS UP) TOP VIEW (PINS DOWN) CONDUCTIVE HEAT SINK 51 50 25 50 1.05 1.00 0.95 7° 3.5° 0° 0.50 BSC 0.27 0.22 0.17 0.15 0.05 COPLANARITY 0.08 26 6.50 NOM FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MS-026-AED-HDT 072408-A 51 25 26 0.20 0.09 103. 100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ [TQFP_EP](SV-100-1) ٫(ڇ࿋ǖmm) ۩ࠔኸళ ႙ࡽ AD9776ABSVZ 1 AD9776ABSVZRL1 AD9778ABSVZ1 AD9778ABSVZRL1 AD9779ABSVZ1 AD9779ABSVZRL1 AD9776A-EBZ1 AD9778A-EBZ1 AD9779A-EBZ1 1 ࿒!ྷݔ܈ −40°C +85°C −40°C +85°C −40°C +85°C −40°C +85°C −40°C +85°C −40°C +85°C ހጎ௮ຎ! 100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP) 100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP) 100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP) 100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP) 100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP) 100ᆅগࡰಎĂגԋ຺ݛՌೝހጎ(TQFP_EP) ೠࠚӱ! ೠࠚӱ! ೠࠚӱ! Z = ࢇޙRoHSՔጚڦग़ඹഗॲă Rev. B | Page 55 of 56 ހጎၜ! SV-100-1 SV-100-1 SV-100-1 SV-100-1 SV-100-1 SV-100-1 AD9776A/AD9778A/AD9779A ጀ ©2007–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06452-0-9/08(B) Rev. B | Page 56 of 56