14࿋Ă2400 MSPS RF DACLj ਏԢ4ཚڢ႑ࡽتీ૰ AD9789 ༬Ⴀ ଳऄڦຕጴথ੨ᅜথ຺߲ٳܠཚްڦڢຕຕăQAMՊ DOCSIS 3.0Ⴀీǖ4߲QAMሜհ ஓഗኧڦ႓ፗྼຕྺ16Ă32Ă64Ă128ࢅ256LjSRRC୳հഗ ኝ߲ೕྷݔDŽ47 MHz1 GHzDžాڦACLRǖ ဣຕࢇᆶՔጚă −75 dBc (fOUT = 200 MHz) ೌా୲ገ࣑ഗཚࡗࠦۨDAC้ዓኧ߳ዖհ༬୲ăຕጴฉ −72 dBc)fOUT = 800 MHzLjሯำ* Վೕഗᅜሞ00.5 × fDACాྷݔยዃ႑ڢLjܸٗሞDCfDAC/2 −67 dBc)fOUT = 800 MHzLjၿհ* ڦాྷݔඪࢆ࿋ዃࢇ຺߲ׯ၎ତ႑ڢă ݥ࢚MER = 42 dB AD9789ాዃᅃ߲زႜྔยথ੨(SPI)Ljᆩᇀഗॲದዃࢅጒༀस ೌాतಖୟ༬Ⴀ ٪ഗ࣮܁ăଳऄڦຕጴথ੨ᅜದዃྺ4࿋Ă8࿋Ă16࿋ࢅ32 ాዃSRRC୳հഗڦ4߲QAMՊஓഗĂ16Ԡ512Ԡ֭ኵĂ ࿋ڦຕጺ၍܈Ljժᅜথํຕईްຕຕă ୲ገ࣑ഗࢅۙഗ ଳऄڦຕথ੨ǖ4࿋Ă8࿋Ă16࿋ई32࿋Ljਏᆶആ౾ၯᄓ AD9789֑ᆩ1.5 VĂ1.8 Vࢅ3.3 VۉᇸࠃۉLjጺࠀࡼྺ1.6 Wă ࠀీ ༵ࠃ164ᆅগႊೌप൰ቆንଚހጎLjඤፆੇࢅހጎसิၳᆌ ࠀࡼǖ1.6 W)IFS = 20 mALjfDAC = 2.4 GHzLjLVDSথ੨* گăுᆶ༬՚ڦฉ้ۉႾᄲ൱ă้ዓথഗ֑ᆩৢᅼฉ ኧথRFࢇׯLjժ༵ࠃfSंೕఇ๕ ۉLjᅜ௨ׂิഔۯሯำă ኧాዃጲ֪(BIST)ࠀీ ׂঋ থႠॠ֪ 1. ాևໜऐຕ݀ิഗ ߲ڇఇዐԈࡤߛ܈णڦׯದዃQAMᆙพഗĂ֭ኵഗ ࢅฉՎೕഗ,থࢇׯ14߲DOCSISईDVBग़ඹ႑ڢă 2. ᆌᆩ ૧ᆩگሯำࢅۙ฿ኈ(IMD)ႠీLjߛٳ1 GHz႑ࡽํ ၄ߛዊଉࢇׯă ټཚ႑ဣཥ 3. CMTS/DVB ଳऄڦຕথ੨ኧLVDSईCMOSຕLjമኁ߀ SFDRLjࢫኁሶᆩᇀᄲ൱ডڦᆌᆩă ނཚ႑एإยแ 4. ۅܔۅ၍ཚ႑ থ੨ሞ4࿋ӷጴব32࿋ጴాྷݔႜದዃLjժሞ ፌߛٳ150 MHz CMOSई150 MHz LVDSມԠຕ୲ ߁ຎ (DDR)ူሏႜă AD9789ᅃଳऄߛڦႠీĂ2400 MSPSĂ14࿋RFຕఇገ࣑ 5. ഗ(DAC)LjഄዐኝࢇକQAMՊஓഗĂ֭ኵഗࢅฉՎೕഗă AD9789֑ᆩCMOS߾ᅝሰLjժ૧ᆩጆᆶਸ࠲रຍઠሺ ഽۯༀႠీă ࠀీ DCO FS RETIMER DATA FORMATTER/ ASSEMBLER 150MHz LVDS/CMOS CMOS 16 TO 31 LVDS FALL DATA QAM/ FILTER/ NCO DATA QAM/ FILTER/ NCO DATA QAM/ FILTER/ NCO DATA QAM/ FILTER/ NCO 16× INTERPOLATOR AND BPF + SCALARS SPI IRQ 14-BIT 2.4GSPS DAC RS 07852-001 32 INPUT PINS AND 2 PARITY PINS CMOS 0 TO 15 LVDS RISE 1 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. 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ADIዐ࿔Ӳຕ֩ᆈ࿔Ӳຕ֩ڦᅳ࿔Lj൩ଌᅳዐీ٪ሞڦᇕჾፇኯईᅳٱဃLjADIփܔᅳዐ٪ሞֶڦᅴईᆯׂُิٱڦဃሴăසႴඓණඪࢆَᇕڦጚඓႠLj൩֖ADI༵ࠃ ڦፌႎᆈ࿔Ӳຕ֩ă AD9789 ణ! ༬Ⴀ 1 ᆌᆩ 1 ߾ፕᇱ 39 ߁ຎ 1 ! ຕୟ০႑ࡽت 39 ׂঋ SPIस٪ഗ௮ຎ 29 1 ! ຕጴఇฉՎೕഗ 43 ࠀీ 1 ! ຕጴথ੨ఇ๕ 45 Ⴊ۩૦๏ 2 ! ఇె߾ፕఇ๕ 54 ၘဦࠀీ 3 ! ఇె੦स٪ഗ 55 रຍࡀ߭ 4 ! एጚۉუᇸ 56 56 ! ୁࡀ߭ 4 DACप ! ຕጴࡀ߭ 5 AD9789้ዓ༵ࠃ 57 ! ୁࡀ߭ 6 Muჽ੦ഗ 58 ਨܔፌۨܮٷኵ ! 8 ! ዐ൩൱ 61 ඤፆ 8 ! ॺᅱഔ้ۯႾ 62 ESDয়ߢ 8 ۨBISTఇ๕ 63 9 ! 63 ᆅগದዃࢅࠀీ௮ຎ ۆ႙߾ፕ༬Ⴀ ຍᇕ ૧ᆩాևPRN݀ิഗ֪ QAMୁႠీ 12 22 ! ૧ᆩాዃጲ֪(BIST)ࠀీ زႜ੦܋੨ 23 ! ֪ຕጴຕথ ! زႜ੦܋੨ᆅগࠀీ௮ຎ 23 QAM႓ፗ 65 ! زႜ੦܋੨ཚᆩ֡ፕ 23 ᆩᇀCMOSࢅLVDSڦೕڢഗఇ๕ᆅগᆙพ 68 ! ኸସጴ)16࿋* 24 ྔႚ٫ 74 MSB/LSBᆫံد 24 ۩ࠔኸళ 74 SPIस٪ഗ 27 Ⴊ۩૦๏ 20094ሆ—Ⴊ۩Ӳ0ǖ؛๔Ӳ Rev. 0 | Page 2 of 76 63 AD9789 ၘဦࠀీ! 32 INPUT PINS 4 TO RETIMER 32 BITS LVDS/CMOS CMOS 16 TO 31 LVDS FALL DATA FORMATTER/ ASSEMBLER UP TO 32 BITS DATAPATH 0 UP TO 32 BITS DATAPATH 1 DATAPATH 2 UP TO 32 BITS P0 P1 FS DCO BPF fC = 0 TO fDAC/2 SUM SCALE BPF DATAPATH 3 UP TO 32 BITS CLK CTL 16× INTERPOLATOR fC 2. ຕጴ႑ࡽتࠀీ 24-BIT NCO 0 TO fDAC /16 QAM MAPPER SRRC 2N (N = 0 TO 5) INPUT SCALE BYPASS QAM BYPASS SRRC RATE CONVERTER P/Q 24-BIT (P/Q = 0.5 TO 1) CH GAIN 0× TO 2× 3. ཚڢ0ཚڢ3ຕୟ০ఇၘ൧(Iୟ০ᇑQୟ০ྜඇ၎ཞLjࠤৈ၂๖ᅃ߲) Rev. 0 | Page 3 of 76 07852-003 2 07852-002 CMOS 0 TO 15 LVDS RISE AD9789 रຍࡀ߭ ୁࡀ߭ ݥأଷᆶຫLjAVDD33 = DVDD33 = 3.3 VLjCVDD18 = DVDD18 = 1.8 VLjDVDD15 = 1.5 VLjfDAC = 2.4 GHzLjIFS = 20 mAă 1 ֖ຕ DACݴՐ୲ ఇె! ! ฿ۙဃֶ! ! ሺᅮဃֶ)๑ᆩాևएጚۉუᇸ*! ! ଉײ)ୁۉԍኤۙڇႠ*! ! ۉუ!ྷݔ ! ۉፆ! ! ۉඹ! ࿒܈ᅎ! ! ሺᅮ! ! एጚۉუ! एጚۉუ ! ాևएጚۉუ. ! ۉፆ1 ఇెۉᇸۉუ AVDD33 CVDD18 ຕጴۉᇸۉუ DVDD33 DVDD18 DVDD15 ۉᇸࡼࠀࢅୁۉ fDAC= 2.4 GSPSLjfOUT= 930 MHzLjIFS= 25 mALj຺߲ཚڢ๑ీ IAVDD33 IDVDD18 ICVDD18 IDVDD33 CMOSথ੨ LVDSথ੨ IDVDD15 fDAC= 2.0 GSPSLjfOUT= 70 MHzLjIFS= 20 mALjCMOSথ੨ IAVDD33 IDVDD18 ICVDD18 IDVDD33 IDVDD15DŽ຺߲ཚڢ๑ీLjᆶ႑ࡽت๑ీDž IDVDD15DŽᅃ߲ཚڢ๑ీLjৈ16Ԡ֭ኵDž ࠀࡼ fDAC= 2.4 GSPSLjfOUT= 930 MHzLjIFS= 25 mALj຺߲ཚڢ๑ీ CMOSথ੨ LVDSথ੨ ፌၭኵ! 8.66 −1.0 ۆ႙ኵ 14 6.5 3.5 20.2 ፌٷኵ ڇ࿋ ࿋ 70 1 % FSR % FSR mA V Ω pF 135 25 ppm/°C ppm/°C 1.2 5 V kΩ 31.66 +1.0 3.14 1.71 3.3 1.8 3.47 1.89 V V 3.14 1.71 1.43 3.3 1.8 1.5 3.47 1.89 1.58 V V V 45 72 180 mA mA mA 42 16 640 mA mA mA 37.4 67.3 155.4 40.3 517 365 1.7 1.63 1 !๑ᆩྔևٷݣഗൻྔۯևሜă Rev. 0 | Page 4 of 76 38.5 70.5 180 50.7 556 391 mA mA mA mA mA mA W W AD9789 ຕጴࡀ߭ ݥأଷᆶຫLjAVDD33 = DVDD33 = 3.3 VLjCVDD18 = DVDD18 = 1.8 VLjDVDD15 = 1.5 VLjfDAC = 2.4 GHzLjIFS = 20 mALjLVDSൻۯഗ ࢅথऐग़ඹIEEEՔጚ1596.3-1996ၭ૾ྷݔୟă 2 ֖ຕ CMOSຕ(D[31:0], P0, P1) ! ߛۉუVIH ! ۉگუVIL ! ߛୁۉIIN ! ୁۉگIIL ! ۉඹ CMOSຕCMOS_DCO1ॺڦ૬้क़ CMOSຕCMOS_DCO1ڦԍ้क़ CMOS(CMOS_FS, CMOS_DCO) ! ۉߛუVOH ! ۉگუVOL ! ୁۉߛIOH ! ୁۉگIOL ! ፌ้ٷዓ୲(CMOS_DCO) CMOS_DCOCMOS_FSჽ LVDSຕ(D[15:0]P, D[15:0]N, PARP, PARN) ! ۉუྷݔVIAईVIB ! ֶݴពኵVIDTH ! ֶݴውVIDTHHĂVIDTHL ! ֶݴፆੇRIN ! ፌٷLVDS୲ LVDSֶݴຕֶݴDCOx2ॺڦ૬้क़ LVDSֶݴຕֶݴDCOx2ڦԍ้क़ LVDS(DCOP, DCON, FSP, FSN) DCOPĂFSP = VOAǗDCONĂFSN = VOBǗ100 Ω܋থۉፆ ! ۉߛუVOAईVOB ! ۉگუVOAईVOB ! ۉݴֶუ|VOD| ! ฿ۙۉუVOS ! ፆੇDŽ܋ڇDžRO AᇑBक़RO฿ದΔRO 0ᇑ1क़|VOD|Վࣅ|ΔVOD| 0ᇑ1क़VOSՎࣅΔVOS ! ୁۉDŽൻۯഗ܌ںܔୟDžISAĂISB ! ୁۉDŽൻۯഗ܌ୟ၎DžISAB ! ۉ|ୁۉIXA|Ă|IXB| ! ፌ้ٷዓ୲(DCOP, DCON) DCOxFSxჽ DAC้ዓ(CLKPĂCLKN)3 ! ֶރݴኵۉუ ! ࠌఇۉუ ! ፌ้ٷዓ୲ زႜྔยথ੨ ! ፌ้ٷዓ୲(fSCLKĂ1/tSCLK) ! ፌၭஞ؋܈DŽߛۉೝDžtPWH ! ፌၭஞ؋܈DŽۉگೝDžtPWL SDIOࢅCSSCLKڦፌॺ܌૬้क़tDS ፌၭኵ! ۆ႙ኵ 2.0 3.3 0 −10 −10 ፌٷኵ 0.8 +10 +10 2 5.3 −1.4 2.4 0 3.3 0.4 12 12 150 0.28 0.85 825 −100 1575 +100 25 80 150 1.41 0.24 120 1375 1025 150 1150 40 200 150 0.12 1.4 250 1250 140 10 25 25 20 4 10 0.37 1.8 900 25 10 Rev. 0 | Page 5 of 76 V V μA μA pF ns ns V V mA mA MHz ns mV mV mV Ω MSPS ns ns mV mV mV mV Ω % mV mV mA mA mA MHz ns V mV MHz 2400 20 20 ڇ࿋ MHz ns ns ns $' ֖ຕ SCLKSDIOڦፌ܌ԍ้क़tDH SCLKᆶၳSDIOࢅSDOፌ้क़tDV SCLKၳSDIOࢅSDOፌ้܌क़tDNV (SDIOĂSCLKĂCS ) ! ߛۉუVIH ! ۉگუVIL ! ߛୁۉIIN ! ୁۉگIIL (SDOĂSDIO) ! ۉߛუVOH ! ۉگუVOL ! ୁۉߛIOH ! ୁۉگIOL 1 2 3 ፌၭኵ! ۆ႙ኵ 5 20 5 2.0 3.3 0 ፌٷኵ −10 −10 0.8 +10 +10 2.4 0 3.6 0.4 ڇ࿋ ns ns ns V V μA μA V V mA mA 4 4 ߸ܠ႑တ९CMOSথ੨้Ⴞևݴă ߸ܠ႑တ९LVDSথ੨้Ⴞևݴă ߸ܠ႑တ९้ዓ၎࿋ሯำܔୁႠీڦᆖၚևݴă ୁࡀ߭ ݥأଷᆶຫLjAVDD33 = DVDD33 = 3.3 VLjCVDD18 = DVDD18 = 1.8 VLjDVDD15 = 1.5 VLjfDAC = 2.4 GHzLjIFS = 20 mALjຕጴ ଉ = ײ0 dBFSă 3 ֖ຕ ۯༀႠీ ! ፌ߸ٷႎ୲ ! ॺ૬้क़(tST) ሗොۯༀ(ྷݔSFDR) fDAC= 2000 MSPS fOUT= 100 MHz fOUT= 316 MHz fOUT= 550 MHz fDAC= 2400 MSPS fOUT= 100 MHz fOUT= 316 MHz fOUT= 550 MHz fOUT= 850 MHz ֪ཉॲ0ጀ ມᅼۙ฿ኈ(IMD) fOUT2 = fOUT1 + 1.25 MHz fDAC = 2000 MSPS fOUT = 100 MHz fOUT = 316 MHz fOUT = 550 MHz fDAC = 2400 MSPS fOUT = 100 MHz fOUT = 316 MHz fOUT = 550 MHz fOUT = 850 MHz ሯำ(܈NSD) ڇཚڢQAM fOUT = 100 MHz fOUT = 316 MHz fOUT = 550 MHz fOUT = 850 MHz ፌၭኵ ۆ႙ኵ 2400 To 0.025% fDAC = 2400 MSPS POUT = −14.5 dBm POUT = −15.5 dBm POUT = −18 dBm POUT = −18.5 dBm Rev. 0 | Page 6 of 76 ፌٷኵ! ڇ࿋ 13 MSPS ns 70 63 58 dBc dBc dBc 70 70 60 60 dBc dBc dBc dBc 86 73 62 dBc dBc dBc 86 74 66 66 dBc dBc dBc dBc −167 −166.5 −166.5 −166.5 dBm/Hz dBm/Hz dBm/Hz dBm/Hz AD9789 ֖ຕ ତڢႅԲ(ACLR) ڇཚڢQAM fOUT = 200 MHz (Harmonics) fOUT = 200 MHz (Noise Floor) fOUT = 500 MHz (Harmonics) fOUT = 500 MHz (Noise Floor) fOUT = 800 MHz (Harmonics) fOUT = 800 MHz (Noise Floor) ມཚڢQAM fOUT = 200 MHz (Harmonics) fOUT = 200 MHz (Noise Floor) fOUT = 500 MHz (Harmonics) fOUT = 500 MHz (Noise Floor) fOUT = 800 MHz (Harmonics) fOUT = 800 MHz (Noise Floor) 4ཚڢQAM fOUT = 200 MHz (Harmonics) fOUT = 200 MHz (Noise Floor) fOUT = 500 MHz (Harmonics) fOUT = 500 MHz (Noise Floor) fOUT = 800 MHz (Harmonics) fOUT = 800 MHz (Noise Floor) WCDMA ACLR ڇሜհ! ! ڼᅃତ!ڢ ! ܾڼ၎क़႑!ڢ ! ڼෙ၎क़႑!ڢ ڇሜհ! ! ڼᅃତ!ڢ ! ܾڼ၎क़႑!ڢ ! ڼෙ၎क़႑!ڢ ຺ሜհ! ! ڼᅃତ!ڢ ! ܾڼ၎क़႑!ڢ ! ڼෙ၎क़႑!ڢ ፌၭኵ! ۆ႙ኵ ፌٷኵ ڇ࿋ fDAC= 2293.76 MSPSLjሞ6 MHz ႑ڢዐ֪ଉ −76 −82 −74.5 −78 −69 −78 dBc dBc dBc dBc dBc dBc −77.5 −81 −68 −76 −66 −76 dBc dBc dBc dBc dBc dBc −75 −76 −69 −72 −67 −72 dBc dBc dBc dBc dBc dBc −70 −72.5 −74 dBc dBc dBc −68 −70.4 −72.7 dBc dBc dBc −63.5 −65.1 −66.9 dBc dBc dBc fDAC = 2304 MSPS, ंೕఇ๕ܾڼ లઊຯ༬ೕ୲൶ fOUT = 1850 MHz fOUT = 2100 MHz fOUT = 2100 MHz Rev. 0 | Page 7 of 76 AD9789 ਨܔፌۨܮٷኵ ඤፆ 4 ֖ຕ AVDD33AVSS DVDD18DVSS DVDD33DVSS DVDD15DVSS CVDD18AVSS AVSSDVSS CLKPĂCLKNAVSS FSĂDCODVSS CMOSࢅLVDSຕDVSS ۨܮኵ −0.3 V +3.6 V −0.3 V +1.98 V −0.3 V +3.6 V −0.3 V +1.98 V −0.3 V +1.98 V −0.3 V +0.3 V −0.3 V CVDD18 + 0.3 V −0.3 V DVDD33 + 0.3 V −0.3 V DVDD33 + 0.3 V IOUTNĂIOUTPAVSS I120ĂVREFĂIPTATAVSS IRQĂCSĂSCLKĂSDOĂ SDIOĂRESETDVSS ࿒ ٪ئ࿒ྷݔ܈ −1.0 V AVDD33 + 0.3 V −0.3 V AVDD33 + 0.3 V −0.3 V DVDD33 + 0.3 V θJAኍܔፌֶཉॲLjनഗॲࡰথሞۉୟӱฉᅜํ၄ཌྷހጎă 5. ඤፆ ހጎૌ႙ 164ᆅগ CSP_BGA θJA 25.5 24.4 19.0 17.2 θJB 14.4 θJC 6.8 ڇ࿋! °C/W °C/W °C/W °C/W ጀ! 4֫ӱLjࡗ 4֫ӱLj4߲PCBࡗ 8֫ӱLj4߲PCBࡗ 8֫ӱLj16߲PCBࡗ ESDয়ߢ ESDDŽৢۉݣۉDž௺ߌഗॲă ۉټഗॲࢅۉୟӱీࣷሞுᆶִਥڦ൧ူۉݣă࠶Ԩ ׂਏᆶጆ૧ईጆᆶԍࢺۉୟLjڍሞᇜీߛڟଉESD้Ljഗ 150°C −65°C +150°C ॲీࣷ࣋ăᅺُLjᆌ֑ړൽڦړESDٯݔݞแLjᅜՆ ௨ഗॲႠీူইईࠀీෟ฿ă ጀᅪLjגฉຎਨܔፌۨܮٷኵీࣷڞዂഗॲᆦ৳Ⴀ ࣋ăኄኻۨܮᆌ૰ኵLjփภतഗॲሞኄၵईඪࢆഄཉॲ ူגԨरຍࡀ߭ኸՔీࠀڦႠ֡ፕăሞਨܔፌۨܮٷ ኵཉॲူ߾ፕࣷᆖၚഗॲڦ੍Ⴀă Rev. 0 | Page 8 of 76 AD9789 ᆅগದዃࢅࠀీ௮ຎ CVDD18 1 2 3 IOUTN 4 A + + B + IOUTP 7 8 69 – + AVDD33 10 5 11 12 13 14 1 2 3 4 7 8 69 + + + + + + X 10 5 11 12 13 14 A X X NC B + X X I120 C CLKN C N + + X X VREF D CLKP D P + + X X IPTAT E E F F G DVDD18 G + + + + X X X X H H J J K K CS L X X X SB NC NC L SCLK M CK NC NC M SDO N DO R NC NC N SDIO P IO I NC NC AVSS DVDD18 RESET 2 3 4 7 8 69 10 5 11 1 12 13 14 A A B B C C D D E E F F G G H H J PARP J K PARN K L P1 31 27 23 19 15 M P0 11 7 DVSS + DVDD15 X DVDD33 6. ຕጴۉᇸࢅSPIᆅগ)ۥ* 4. ้ዓࢅఇెᆅগ)ۥ* 1 IRQ NC NO CONNECT 07852-006 X AVDD33 2 3 4 7 8 69 10 5 11 12 13 14 FSP 3 BU CMOS_BUS L P+ P– 15 13 11 15 13 9 7 5 3 1 FS FSN 6 2 CT CMOS_CTRL M 11 9 7 5 3 1 FS DCOP 29 25 21 17 13 9 5 1 FS CMOS_FS N 14 12 10 8 6 4 2 0 DC DCON P 28 24 20 16 12 8 4 0 DC CMOS_DCO P 14 12 10 8 6 4 2 0 DC D[31:0] CMOS DATA INPUTS PARITY AND CONTROL INPUTS 07852-005 30 26 22 18 14 10 N 5. CMOSఇ๕ຕᆅগ(ۥ) Rev. 0 | Page 9 of 76 14 +LVDS 14 –LVDS 7. LVDSఇ๕ຕᆅগ)ۥ* 07852-007 + CVDD18 07852-004 P AD9789 6. ᆅগࠀీ௮ຎ ᆅগՊࡽ A1, A2, A3, A6, A9, A10, A11, B1, B2, B3, B6, B7, B8, B9, B10, B11, C2, C3, C6, C7, C8, C9, C10, C11, D2, D3, D6, D7, D8, D9, D10, D11, E1, E2, E3, E4, E13, E14, F1, F2, F3, F4, F11, F12, F13, F14 A4, A5, B4, B5, C4, C5, D4, D5 A7 A8 A12, A13, B12, B13, C12, C13, D12, D13 A14 B14 C1 C14 ᆅগఁ AVSS ௮ຎ ఇెۉᇸںă CVDD18 IOUTN IOUTP AVDD33 1.8 V้ዓۉᇸă DACୁۉă DACኟୁۉă 3.3 Vఇెۉᇸă NC I120 CLKN VREF D1 D14 CLKP IPTAT E11, E12 G1, G2, G3, G4, G7, G8, G11, G12, G13, G14 H1, H2, H3, H4, H7, H8, H11, H12, H13, H14, J1, J2, J3, J4, J11, J12, J13, J14 K1, K2, K3, K4, K11, K12, K13, K14 L1 L2, L3, M2, M3, N3, N4, P3, P4 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 DVDD18 DVDD15 փথăԍޝă ॽُᆅগཚࡗᅃ߲10 kΩۉፆথఇెںLjᅜׂิ120 μA֖ୁۉă DAC้ዓ(DACCLK)ă ټဤएጚۉუᇸI/Oăཚࡗᅃ߲1 nFۉඹඁ᳘ఇెںă ፆੇሀྺ5 kΩă ኟDAC้ዓ(DACCLK)ă ߾֪ᆅগăୁۉᇑਨܔ࿒ׯ܈Բ૩Lj 25°C้ሀྺ10 μALjၽ୲ሀྺ20 nA/°Că 1.8 Vຕጴۉᇸă 1.5 Vຕጴۉᇸă DVSS ຕጴۉᇸںă DVDD33 3.3 Vຕጴۉᇸă CS NC P1/PARP D31/D15P D27/D13P D23/D11P D19/D9P D15/D7P D11/D5P D7/D3P D3/D1P FSP CMOS_BUS M1 M4 M5 M6 M7 M8 M9 M10 M11 M12 M13 SCLK P0/PARN D30/D15N D26/D13N D22/D11N D18/D9N D14/D7N D10/D5N D6/D3N D2/D1N FSN SPIۉگڦೝᆶၳೌă ࿄๑ᆩăԍփথă CMOS/LVDSആ౾ၯᄓ࿋ă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă ຕጺ၍ڦኟLVDSኡཞօ(FSP)ă ߛۉೝᆶၳăದዃCMOSڦຕጺ၍ă ۉگೝॽຕጺ၍ದዃྺথLVDSă SPIڦ၌้ۨዓă CMOS/LVDSആ౾ၯᄓ࿋ă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă ຕጺ၍ڦLVDSኡཞօ(FSN)ă Rev. 0 | Page 10 of 76 AD9789 ᆅগՊࡽ M14 ᆅগఁ CMOS_CTRL ௮ຎ ߛۉೝᆶၳă๑ీCMOS_DCOࢅCMOS_FS႑ࡽLjժ্ᆩDCOP/DCONࢅFSP/FSN႑ ࡽăۉگೝ্ᆩCMOS_DCOࢅCMOS_FS႑ࡽLjժ๑ీDCOP/DCONࢅFSP/FSN႑ࡽă N1 N2 N5 N6 N7 N8 N9 N10 N11 N12 N13 N14 P1 P2 SDO RESET D29/D14P D25/D12P D21/D10P D17/D8P D13/D6P D9/D4P D5/D2P D1/D0P DCOP CMOS_FS SDIO IRQ P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 D28/D14N D24/D12N D20/D10N D16/D8N D12/D6N D8/D4N D4/D2N D0/D0N DCON CMOS_DCO SPIزႜຕă ߛۉೝᆶၳăް࿋AD9789ă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă ຕጺ၍ڦኟLVDSຕ้ዓ(DCOP)ă ຕጺ၍ڦCMOSኡཞօă SPIزႜຕ/ă ۉگೝᆶၳĂਸዐ൩൱ă ཚࡗᅃ߲10 kΩۉፆฉઙDVDD33ă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă CMOS/LVDSຕă ຕጺ၍ڦLVDSຕ้ዓ(DCON)ă ຕጺ၍ڦCMOSຕ้ዓă Rev. 0 | Page 11 of 76 AD9789 –40 –45 –45 –50 –50 –55 –55 –60 –60 SFDR (dBc) –40 –65 –70 –85 –90 0 200 400 600 fOUT (MHz) 800 1000 1200 –90 0 –45 –50 –50 HARMONIC LEVEL (dBc) –45 –55 –60 –65 –70 –75 0dBFS –3dBFS –6dBFS –12dBFS 400 600 fOUT (MHz) 800 1000 1200 –60 –65 –70 –75 0dBFS –3dBFS –6dBFS –12dBFS 0 200 400 600 800 1000 1200 fOUT (MHz) 12. փཞຕጴଉူײෙْၿհᇑfOUT ࠲ڦဣLjfDAC = 2.4 GHzLj ଉ = ୁۉײ20 mALj࿒ = ܈25°C –45 –55 –50 –60 –55 –65 –60 –70 SFDR (dBc) –50 –70 1200 –55 –40 –65 1000 –90 9. փཞຕጴଉْܾူײၿհᇑfOUT ࠲ڦဣLjfDAC = 2.4 GHzLj ଉ = ୁۉײ20 mALj࿒ = ܈25°C –75 –80 –85 32mA 20mA 8mA –80 –85 –95 –90 0 200 400 600 fOUT (MHz) 800 1000 +85°C +25°C –40°C –90 1200 10. փཞଉူୁۉײSFDRᇑfOUT ࠲ڦဣLjfDAC = 2.4 GHzLj ຕጴଉ = ײ0 dBFSLj࿒ = ܈25°C Rev. 0 | Page 12 of 76 –100 0 200 400 600 800 1000 1200 fOUT (MHz) 13. փཞ࿒ူ܈SFDRᇑfOUT ࠲ڦဣLjfDAC = 2.4 GHzLj ଉ = ୁۉײ20 mALjຕጴଉ = ײ0 dBFS 07852-008 –75 07852-011 SFDR (dBc) 800 –85 –90 200 600 –80 07852-009 HARMONIC LEVEL (dBc) –40 0 400 11. փཞຕጴଉူײSFDRᇑfOUT ࠲ڦဣLjfDAC = 2.4 GHzLj ଉ = ୁۉײ20 mALj࿒ = ܈25°C –40 –85 200 fOUT (MHz) 8. փཞfDAC ူSFDRᇑfOUT ࠲ڦဣLjଉ = ୁۉײ20 mALj ຕጴଉ = ײ0 dBFSLj࿒ = ܈25°C –80 0dBFS –3dBFS –6dBFS –12dBFS –80 07852-010 –85 –70 –75 2.4GHz 2.2GHz 2GHz 1.6GHz 1GHz –80 –65 07852-012 –75 07852-013 SFDR (dBc) ۆ႙߾ፕ༬Ⴀ AD9789 90 100 80 90 80 IMD (dBc) 60 70 60 50 50 2.4GHz 2.0GHz 1.6GHz 1.0GHz 100 200 300 400 500 600 700 fOUT (MHz) 800 900 1000 1100 30 0 300 400 500 600 700 800 900 1000 1100 17. փཞຕጴଉူײෙIMDᇑfOUT ࠲ڦဣLjfDAC = 2.4 GHzLj ଉ = ୁۉײ20 mALj࿒ = ܈25°C 100 90 90 80 80 70 IMD (dBc) 70 60 60 50 50 32mA 20mA 8mA 30 0 100 200 300 400 500 600 700 fOUT (MHz) 800 +85°C +25°C –40°C 40 900 1000 1100 30 07852-038 40 0 –157 –157 –159 –159 –161 –161 NSD (dBm/Hz) –155 –167 300 400 500 600 700 800 900 1000 1100 18. փཞ࿒ူ܈ෙIMDᇑfOUT ࠲ڦဣLjfDAC = 2.4 GHzLj ଉ = ୁۉײ20 mALjຕጴଉ = ײ0 dBFS –155 –165 200 fOUT (MHz) 15. փཞଉူୁۉײෙIMDᇑfOUT ࠲ڦဣLjfDAC = 2.4 GHzLj ຕጴଉ = ײ0 dBFSLj࿒ = ܈25°C –163 100 07852-041 IMD (dBc) 200 fOUT (MHz) 14. փཞfDAC ူෙIMDᇑfOUT ࠲ڦဣLjଉ = ୁۉײ20 mALj ຕጴଉ = ײ0 dBFSLj࿒ = ܈25°C –169 –163 –165 –167 –169 2.4GHz 2.0GHz 1.6GHz –171 –173 –173 –175 0 200 400 600 fOUT (MHz) 800 1000 +85°C +25°C –40°C –171 1200 07852-016 NSD (dBm/Hz) 100 07852-037 30 0 0dBFS –3dBFS –6dBFS –12dBFS 40 07852-034 40 16. փཞfDAC ူNSDᇑfOUT ࠲ڦဣLjڇཚڢQAMLj ଉ = ୁۉײ20 mA –175 0 200 400 600 800 1000 1200 fOUT (MHz) 19. փཞ࿒ူ܈NSDᇑfOUT ࠲ڦဣLjڇཚڢQAMLj fDAC = 2.4 GHzLjଉ = ୁۉײ20 mA Rev. 0 | Page 13 of 76 07852-019 IMD (dBc) 70 AD9789 –5 DOCSIS3 –40°C 0°C +25°C +85°C ACLR (dBc) –25 –35 –45 –45 –55 –65 –65 –75 –75 –85 50 250 450 650 FREQUENCY (MHz) 850 –85 50 20. փཞ࿒ڦူ܈ACLRႠీLjڇཚڢQAMLjfDAC = 2.3 GHzLj ଉ = ୁۉײ20 mALjfOUT = 200 MHzLjጺଉ = ײ48 )DOCSIS SPECྺ−73 dBcǗၿհᅴྺ−63 dBc* –60 –60 HARMONIC LEVEL (dBc) –55 –65 –70 –75 DOCSIS3 25°C 65°C 85°C –80 100 200 300 400 500 600 fOUT (MHz) 700 800 900 1000 21. փཞ࿒ْܾူ܈ၿհႠీᇑfOUT ࠲ڦဣLjڇཚڢQAMLj fDAC = 2.3 GHzLjଉ = ୁۉײ20 mALjጺଉ = ײ48 )DOCSIS SPECྺ−73 dBcǗၿհᅴྺ−63 dBc* 350 450 550 650 FREQUENCY (MHz) 750 850 950 –65 –70 –75 DOCSIS3 25°C 65°C 85°C –85 0 100 200 300 400 500 600 700 800 900 1000 fOUT (MHz) 24. փཞ࿒ူ܈ෙْၿհႠీᇑfOUT ࠲ڦဣLjڇཚڢQAMLj fDAC = 2.3 GHzLjଉ = ୁۉײ20 mALjጺଉ = ײ48 DŽDOCSIS SPECྺ−73 dBcǗၿհᅴྺ−63 dBcDž –55 –5 DOCSIS3 25°C 65°C 85°C –60 250 –80 –85 0 150 23. փཞ࿒ڦူ܈ACLRႠీLjڇཚڢQAMLjfDAC = 2.3 GHzLj ଉ = ୁۉײ20 mALjfOUT = 800 MHzLjጺଉ = ײ48 DŽDOCSIS SPECྺ−73 dBcDž –55 07852-014 HARMONIC LEVEL (dBc) –35 –55 07852-015 ACLR (dBc) –25 DOCSIS3 –40°C 0°C +25°C +85°C –15 07852-017 –15 07852-018 –5 –15 DOCSIS3 2.3GHz 2.2GHz 2.4GHz –25 ACLR (dBc) ACLR (dBc) –65 –70 –35 –45 –55 –75 –65 –80 0 100 200 300 400 500 600 fOUT (MHz) 700 800 900 1000 22. փཞ࿒ူ܈ሯڹᇑfOUT ࠲ڦဣDŽሞ30 MHzᅜฉೕ୲֪ଉACLRDžLj ڇཚڢQAMLjfDAC = 2.3 GHzLjଉ = ୁۉײ20 mALj ጺଉ = ײ48DŽDOCSIS SPECྺ−73 dBcDž Rev. 0 | Page 14 of 76 –85 50 250 450 650 FREQUENCY (MHz) 850 1050 25. փཞfDAC ူڦACLRႠీLjڇཚڢQAMLj fOUT = 850 MHzLjଉ = ୁۉײ20 mALj࿒ = ܈25°CLj ጺଉ = ײ48DŽDOCSIS SPECྺ−73 dBcDž 07852-039 –85 07852-031 –75 AD9789 0 –5 DOCSIS3 CMOS LVDS –10 –20 DOCSIS3 25°C 65°C 85°C –15 –25 ACLR (dBc) –40 –50 –65 –70 100 200 300 400 500 600 700 FREQUENCY (MHz) 800 900 1000 –85 50 07852-040 450 650 FREQUENCY (MHz) 850 1050 29. փཞ࿒ڦူ܈ACLRႠీLjມཚڢQAMLjfOUT = 200 MHzLj fDAC = 2.3 GHzLjଉ = ୁۉײ25 mALjጺଉ = ײ32 DŽDOCSIS SPECྺ−70 dBcǗၿհᅴྺ−63 dBcDž 26. CMOSࢅLVDSথ੨ڦACLRႠీLjڇཚڢQAMLj fOUT = 840 MHzLjfDAC = 2.4 GHzLjଉ = ୁۉײ20 mALj ጺଉ = ײ48(DOCSIS SPECྺ−73 dBc) –55 –5 DOCSIS3 25°C 65°C 85°C –60 HARMONIC LEVEL (dBc) –15 –25 ACLR (dBc) 250 –35 –45 –55 –65 –65 –70 –75 DOCSIS3 25°C 65°C 85°C –80 –85 50 250 450 650 FREQUENCY (MHz) 850 07852-042 –75 1050 –85 0 100 200 300 400 500 600 700 800 900 1000 fOUT (MHz) 27. փཞ࿒ڦူ܈ACLRႠీLjມཚڢQAMLj fOUT = 800 MHzLjfDAC = 2.3 GHzLjଉ = ୁۉײ25 mALj ጺଉ = ײ32DŽDOCSIS SPECྺ−70 dBcDž 07852-045 0 07852-044 –75 –80 30. փཞ࿒ْܾူ܈ၿհႠీᇑfOUT ࠲ڦဣLj ມཚڢQAMLjfDAC = 2.3 GHzLjଉ = ୁۉײ25 mALjጺଉ = ײ32 DŽDOCSIS SPECྺ−70 dBcǗၿհᅴྺ−63 dBcDž –55 –55 –60 –65 –65 ACLR (dBc) –60 –70 –75 DOCSIS3 25°C 65°C 85°C –70 –75 DOCSIS3 25°C 65°C 85°C –80 –85 0 100 200 300 400 500 600 fOUT (MHz) 700 800 900 1000 –80 –85 07852-043 HARMONIC LEVEL (dBc) –45 –55 –60 –90 –35 28. փཞ࿒ူ܈ෙْၿհႠీᇑfOUT ࠲ڦဣLj ມཚڢQAMLjfDAC = 2.3 GHzLjଉ = ୁۉײ25 mALjጺଉ = ײ32 (DOCSIS SPECྺ−70 dBcǗၿհᅴྺ−63 dBc) 0 100 200 300 400 500 600 fOUT (MHz) 700 800 900 1000 07852-046 ACLR (dBc) –30 31. փཞ࿒ူ܈ሯڹᇑfOUT ࠲ڦဣ(ሞ30 MHzᅜฉೕ୲֪ଉACLR)Lj ມཚڢQAMLjfDAC = 2.3 GHzLjଉ = ୁۉײ25 mALj ጺଉ = ײ32(DOCSIS SPECྺ−70 dBc) Rev. 0 | Page 15 of 76 AD9789 0 0 –10 ACLR (dBc) –30 –40 –50 –40 –50 –60 –70 –70 250 450 650 FREQUENCY (MHz) 850 1050 –80 50 32. փཞ࿒ڦူ܈ACLRႠీLj4ཚڢQAMLjfOUT = 200 MHzLj fDAC = 2.3 GHzLjଉ = ୁۉײ25 mALjጺଉ = ײ20 DŽDOCSIS SPECྺ−67 dBcǗၿհᅴྺ−63 dBcDž –60 –60 HARMONIC LEVEL (dBc) –55 –65 –70 –75 DOCSIS3 25°C 65°C 85°C –80 –85 0 100 200 300 400 500 600 fOUT (MHz) 700 800 900 1000 450 650 FREQUENCY (MHz) 850 1050 –65 –70 –75 DOCSIS3 25°C 65°C 85°C –80 33. փཞ࿒ْܾူ܈ၿհႠీᇑfOUT ࠲ڦဣLj4ཚڢQAMLj fDAC = 2.3 GHzLjଉ = ୁۉײ25 mALjጺଉ = ײ20 DŽDOCSIS SPECྺ−67 dBcǗၿհᅴྺ−63 dBcDž –85 0 100 200 300 400 500 600 700 800 900 1000 fOUT (MHz) 36. փཞ࿒ူ܈ෙْၿհႠీᇑfOUT ࠲ڦဣLj4ཚڢQAMLj fDAC = 2.3 GHzLjଉ = ୁۉײ25 mALjጺଉ = ײ20 )DOCSIS SPECྺ−67 dBcǗၿհᅴྺ−63 dBc* 0 –55 –10 –60 –20 ACLR (dBc) –65 –70 –75 0 100 200 300 400 500 600 fOUT (MHz) 700 800 900 1000 –40 –50 –70 07852-028 –85 –30 –60 DOCSIS3 25°C 65°C 85°C –80 DOCSIS3 2.3GHz 2.2GHz 2.4GHz 34. փཞ࿒ူ܈ሯڹᇑfOUT ࠲ڦဣ)ሞ30 MHzᅜฉೕ୲֪ଉACLR*Lj 4ཚڢQAMLjfDAC = 2.3 GHzLjଉ = ୁۉײ25 mALj ጺଉ = ײ20)DOCSIS SPECྺ−67 dBc* Rev. 0 | Page 16 of 76 –80 50 250 450 650 FREQUENCY (MHz) 850 1050 07852-047 ACLR (dBc) 250 35. փཞ࿒ڦူ܈ACLRႠీLj4ཚڢQAMLjfOUT = 800 MHzLj fDAC = 2.3 GHzLjଉ = ୁۉײ25 mALjጺଉ = ײ20 )DOCSIS SPECྺ−67 dBc* –55 07852-026 HARMONIC LEVEL (dBc) –30 –60 –80 50 DOCSIS3 –40°C 0°C +25°C +85°C –20 07852-027 ACLR (dBc) –20 07852-029 DOCSIS3 –40°C 0°C +25°C +85°C 07852-030 –10 37. փཞfDAC ူڦACLRႠీLj4ཚڢQAMLjfOUT = 850 MHzLj ଉ = ୁۉײ25 mALj࿒ = ܈25°CLjጺଉ = ײ20 )DOCSIS SPECྺ−67 dBc* AD9789 RMS RESULTS CARRIER POWER –18.10dBm/ 6.00000MHz VBW 560kHz FREQ. OFFSET 3.375MHz 6.375MHz 12.00MHz 18.00MHz REF BW 750.0kHz 5.250MHz 6.000MHz 6.000MHz SPAN 42MHz SWEEP 39.12ms (601 PTS) LOWER dBc dBm –65.57 –83.66 –75.01 –93.11 –76.83 –94.92 –77.17 –95.26 UPPER dBc dBm –68.98 –87.07 –74.62 –92.71 –76.46 –94.55 –76.56 –94.66 CENTER 840.00MHz RES BW 30kHz FREQ. OFFSET 3.375MHz 6.375MHz 12.00MHz 18.00MHz REF BW 750.0kHz 5.250MHz 6.000MHz 6.000MHz REF –35.91dBm SPAN 42MHz SWEEP 136.2ms (601 PTS) LOWER UPPER dBc dBm dBc dBm –71.64 –93.39 –72.50 –94.25 –73.71 –95.47 –66.72 –88.47 –73.58 –95.33 0.50 –21.10 –73.70 –95.45 –66.72 –88.48 START 831.00MHz RES BW 30kHz 07852-061 RMS RESULTS CARRIER POWER –21.75dBm/ 6.00000MHz VBW 300kHz SPAN 18MHz SWEEP 58.4ms (601 PTS) 40. ڇཚڢQAM ACLRLjfOUT = 840 MHzLj࿒ = ܈25°CLj ጺଉ = ײ48Ljଉ = ୁۉײ20 mALjक़ਐ = 18 MHz ATTEN 2dB CENTER 840.00MHz RES BW 30kHz VBW 300kHz FREQ. LOWER UPPER OFFSET REF BW dBc dBm dBc dBm RMS RESULTS CARRIER POWER 3.375MHz 750.0kHz –73.99 –91.97 –74.93 –92.91 6.375MHz 5.250MHz –74.94 –92.92 –75.35 –93.33 –17.98dBm/ 6.00000MHz 38. ڇཚڢQAM ACLRLjfOUT = 840 MHzLj࿒ = ܈25°CLj ጺଉ = ײ48Ljଉ = ୁۉײ20 mALjक़ਐ = 42 MHz REF –35.91dBm ATTEN 2dB RMS RESULTS CARRIER POWER –21.29dBm/ 6.00000MHz ATTEN 2dB VBW 300kHz FREQ. OFFSET 3.375MHz 6.375MHz 12.00MHz 18.00MHz STOP 873MHz SWEEP 136.2ms (601 PTS) LOWER REF BW dBc dBm 750.0kHz –70.07 –92.16 5.250MHz –69.05 –90.34 6.000MHz –0.49 –21.78 6.000MHz –66.61 –87.90 UPPER dBc dBm –73.20 –94.49 –73.87 –95.16 –73.29 –94.58 –73.98 –95.27 41. ມཚڢQAM ACLRLjfOUT = 840 MHzLjጺଉ = ײ32Lj ଉ = ୁۉײ25 mALjक़ਐ = 42 MHzLjཚڢ2 39. ມཚڢQAM ACLRLjfOUT = 840 MHzLjጺଉ = ײ32Lj ଉ = ୁۉײ25 mALjक़ਐ = 42 MHzLjཚڢ1 Rev. 0 | Page 17 of 76 07852-066 CENTER 840.00MHz RES BW 56kHz REF –32.76dBm 07852-023 ATTEN 2dB 07852-020 REF –32.76dBm AD9789 VBW 300kHz SPAN 18MHz SWEEP 58.4ms (601 PTS) FREQ. LOWER UPPER OFFSET REF BW dBc dBm dBc dBm RMS RESULTS CARRIER POWER 3.375MHz 750.0kHz –75.37 –96.93 –75.56 –97. 11 –21.56dBm/ 6.375MHz 5.250MHz –73.85 –95.41 –72.54 –94.10 6.00000MHz CENTER 852.00MHz RES BW 30kHz REF –35.96dBm FREQ. OFFSET 3.375MHz 6.375MHz 12.00MHz 18.00MHz REF BW 750.0kHz 5.250MHz 6.000MHz 6.000MHz SPAN 42MHz SWEEP 136.2ms (601 PTS) LOWER UPPER dBc dBm dBc dBm –70.33 –93.96 –11.07 –34.70 –69.04 –92.67 –0.49 –24.12 –70.38 –94.01 0.00 –23.63 –71.02 –94.65 0.43 –23.20 43. 4ཚڢQAM ACLRLjfOUT = 840 MHzLj࿒ = ܈25°CLj ጺଉ = ײ20Ljଉ = ୁۉײ25 mALjक़ਐ = 42 MHzLjཚڢ1 ATTEN 2dB CENTER 852.00MHz VBW 300kHz RES BW 30kHz 07852-021 RMS RESULTS CARRIER POWER –23.63dBm/ 6.00000MHz SPAN 18MHz SWEEP 58.4ms (601 PTS) 44. ມཚڢQAM ACLRLjfOUT = 840 MHzLjጺଉ = ײ32Lj ଉ = ୁۉײ25 mALjक़ਐ = 18 MHzLjཚڢ2 ATTEN 2dB CENTER 834.00MHz RES BW 30kHz VBW 300kHz VBW 300kHz FREQ. LOWER UPPER OFFSET REF BW dBc dBm dBc dBm RMS RESULTS CARRIER POWER 3.375MHz 750.0kHz –75.51 –96.54 –75.17 –96.20 –21.03dBm/ 6.375MHz 5.250MHz –72.55 –93.58 –73.90 –94.93 6.00000MHz 42. ມཚڢQAM ACLRLjfOUT = 840 MHzLjጺଉ = ײ32Lj ଉ = ୁۉײ25 mALjक़ਐ = 18 MHzLjཚڢ1 REF –35.96dBm ATTEN 2dB RMS RESULTS CARRIER POWER –23.23dBm/ 6.00000MHz FREQ. OFFSET 3.375MHz 6.375MHz 12.00MHz 18.00MHz REF BW 750.0kHz 5.250MHz 6.000MHz 6.000MHz SPAN 42MHz SWEEP 136.2ms (601 PTS) LOWER dBc dBm –11.10 –34.32 –0.75 –23.98 –0.59 –23.81 –0.35 –23.58 UPPER dBc dBm –72.19 –95.42 –68.97 –92.20 –70.32 –93.55 –70.70 –93.93 07852-022 CENTER 840.00MHz RES BW 30kHz REF –35.91dBm 07852-067 ATTEN 2dB 07852-065 REF –35.91dBm 45. 4ཚڢQAM ACLRLjfOUT = 840 MHzLj࿒ = ܈25°CLjጺଉ = ײ20Lj ଉ = ୁۉײ25 mALjक़ਐ = 42 MHzLjཚڢ4 Rev. 0 | Page 18 of 76 AD9789 CENTER 834.00MHz RES BW 30kHz VBW 300kHz REF –35.96dBm SPAN 18MHz SWEEP 58.4ms (601 PTS) CENTER 852.00MHz RES BW 30kHz FREQ. LOWER UPPER OFFSET REF BW dBc dBm dBc dBm RMS RESULTS CARRIER POWER 3.375MHz 750.0kHz –72.95 –96.56 –10.86 –34.48 6.375MHz 5.250MHz –69.38 –92.99 –0.51 –24.13 –23.62dBm/ 6.00000MHz 49. 4ཚڢQAM ACLRLjfOUT = 840 MHzLj࿒ = ܈25°CLjጺଉ = ײ20Lj ଉ = ୁۉײ25 mALjक़ਐ = 18 MHzLjཚڢ4 50 50 48 48 46 46 44 44 42 42 40 38 38 36 +25°C +85°C –40°C 32 150 250 350 450 550 650 fOUT (MHz) 750 850 950 +25°C +85°C –40°C 34 32 30 50 07852-032 34 150 250 350 450 550 650 750 850 950 fOUT (MHz) 47. ۙဃֶԲLj࢚Ljڇཚڢ256-QAMLjfDAC = 2.29376 GHzLj ଉ = ୁۉײ20 mALjጺଉ = ײ48 DŽ๑ᆩೕݴဆᅏฉۙ߾ਏၒዐڦ࢚୳հഗDž 50. ۙဃֶԲLj࢚Lj4ཚڢ256-QAMLjfDAC = 2.29376 GHzLj ଉ = ୁۉײ25 mALjጺଉ = ײ20 DŽ๑ᆩೕݴဆᅏฉۙ߾ਏၒዐڦ࢚୳հഗDž 50 50 48 48 46 46 44 44 42 42 MER (dB) 40 38 36 40 38 36 +25°C +85°C –40°C 32 150 250 350 450 550 650 fOUT (MHz) 750 850 950 +25°C +85°C –40°C 34 32 30 50 07852-033 34 150 250 350 450 550 fOUT (MHz) 48. ۙဃֶԲLjݥ࢚Ljڇཚڢ256-QAMLjfDAC = 2.29376 GHzLj ଉ = ୁۉײ20 mALjጺଉ = ײ48 650 750 850 950 07852-036 MER (dB) 40 07852-035 36 30 50 SPAN 18MHz SWEEP 58.4ms (601 PTS) VBW 300kHz FREQ. LOWER UPPER OFFSET REF BW dBc dBm dBc dBm RMS RESULTS CARRIER POWER 3.375MHz 750.0kHz –11.20 –34.40 –74.44 –97.64 6.375MHz 5.250MHz –0.77 –23.96 –69.07 –92.26 –23.20dBm/ 6.00000MHz MER (dB) MER (dB) 46. 4ཚڢQAM ACLRLjfOUT = 840 MHzLj࿒ = ܈25°CLjጺଉ = ײ20Lj ଉ = ୁۉײ25 mALjक़ਐ = 18 MHzLjཚڢ1 30 50 ATTEN 2dB 07852-025 ATTEN 2dB 07852-024 REF –35.96dBm 51. ۙဃֶԲLjݥ࢚Lj4ཚڢ256-QAMLjfDAC = 2.29376 GHzLj ଉ = ୁۉײ25 mALjጺଉ = ײ20 Rev. 0 | Page 19 of 76 AD9789 REF –32.62dBm 80 ATTEN 0dB 75 70 65 60 SFDR (dBc) 55 50 45 40 35 30 25 20 52. ंೕఇ๕ူSFDRᇑfOUT ࠲ڦဣLjfDAC = 2.4 GHzLj ଉ = ୁۉײ20 mA)ܾڼలઊຯ༬ೕ୲൶ᇘႠీ* CENTER 2.100GHz RES BW 30kHz RMS RESULTS CARRIER POWER –19.95dBm/ 3.84000MHz 90 85 80 VBW 300kHz FREQ. OFFSET 5.000MHz 10.00MHz 15.00MHz 20.00MHz 25.00MHz REF BW 3.840MHz 3.840MHz 3.840MHz 3.840MHz 3.840MHz SPAN 53.84MHz SWEEP 174.6ms (601 PTS) LOWER dBc dBm –68.93 –88.88 –71.31 –91.26 –73.43 –93.37 –75.12 –95.07 –75.60 –95.55 UPPER dBc dBm –67.99 –87.94 –70.42 –90.37 –72.68 –92.63 –74.89 –94.84 –76.51 –96.46 07852-092 10 1200 1300 1400 1500 1600 1700 1800 1900 2000 2100 2200 2300 2400 fOUT (MHz) 07852-068 15 55. ंೕఇ๕ူڇڦሜհWCDMA ACLRLjfOUT = 2.1 GHzLj fDAC = 2304 MHzLjଉ = ୁۉײ20 mA 75 IMD (dBc) 70 REF –38.62dBm 65 ATTEN 2dB 60 55 50 45 40 30 1200 1300 1400 1500 1600 1700 1800 1900 2000 2100 2200 2300 2400 fOUT (MHz) 07852-076 35 53. ंೕఇ๕ူIMDᇑfOUT ࠲ڦဣLjfDAC = 2.4 GHzLj ଉ = ୁۉײ20 mADŽܾڼలઊຯ༬ೕ୲൶ᇘႠీDž –40 –50 CENTER 2.102 50GHz RES BW 30kHz VBW 300kHz FIRST ADJACENT CHANNE L SECOND ADJACENT CHANNE L THIRD ADJACENT CHANNE L FIFTH ADJACENT CHANNE L RMS RESULTS CARRIER POWER –26.06dBm/ 3.84000MHz –60 –65 –75 –80 –85 1150 1250 1350 1450 1550 1650 1750 1850 1950 2050 2150 2250 fOUT (MHz) REF BW 3.840MHz 3.840MHz 3.840MHz 3.840MHz 3.840MHz 3.840MHz LOWER dBc dBm –0.25 –26.31 –0.42 –26.48 –64.07 –90.13 –65.36 –91.42 –66.86 –92.92 –67.83 –93.89 UPPER dBc dBm –0.42 –26.47 –63.50 –89.56 –65.13 –91.18 –66.97 –93.03 –68.70 –94.76 –68.64 –94.70 56. ंೕఇ๕ူ຺ڦሜհWCDMA ACLRLjfOUT = 2.1 GHzLj fDAC = 2304 MHzLjଉ = ୁۉײ20 mA –70 07852-075 ACLR (dBc) –55 FREQ. OFFSET 5.000MHz 10.00MHz 15.00MHz 20.00MHz 25.00MHz 30.00MHz SPAN 63.84MHz SWEEP 207ms (601 PTS) 54. ंೕఇ๕ူACLRᇑfOUT ࠲ڦဣLjڇሜհWCDMALj fDAC = 2304 MHzLjଉ = ୁۉײ20 mA DŽܾڼలઊຯ༬ೕ୲൶ᇘႠీDž Rev. 0 | Page 20 of 76 07852-093 –45 AD9789 2000 AVDD33 DVDD33 (LVDS) DVDD33 (CMOS) DVDD18 DVDD15 CVDD18 800 700 600 500 400 300 1000 800 600 200 1.2 1.4 1.6 1.8 fDAC (GHz) 2.0 2.2 2.4 0 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 fDAC (GHz) 60. ጺࠀࡼᇑfDAC ࠲ڦဣLj4ཚڢDOCSISLjfOUT = 915 MHzLj ଉ = ୁۉײ25 mADŽຕୟ০ದዃǖQAMՊஓഗഔᆩLj SRRC୳հഗഔᆩLj຺߲2Ԡ֭ኵ୳հഗഔᆩDž 700 1400 AVDD33 DVDD33 (LVDS) DVDD33 (CMOS) DVDD18 DVDD15 CVDD18 500 1200 POWER DISSIPATION (mW) 600 400 300 200 100 TOTAL (CMOS) TOTAL (LVDS) 1000 800 600 400 200 1.2 1.4 1.6 1.8 2.0 2.2 2.4 fDAC (GHz) 0 1.0 07852-095 0 1.0 200 180 160 140 AVDD33 120 100 80 60 40 10 12 14 16 18 20 22 24 26 FULL-SCALE CURRENT (mA) 28 30 32 07852-098 20 8 1.4 1.6 1.8 2.0 2.2 2.4 fDAC (GHz) 58. փཞۉᇸࡼࠀڦᇑfDAC ࠲ڦဣLj16Ԡ֭ኵLjڇཚڢ๑ీLj fOUT = 70 MHzLjଉ = ୁۉײ20 mA 0 1.2 59. AVDD33ࠀࡼᇑଉ࠲ڦୁۉײဣ Rev. 0 | Page 21 of 76 61. ጺࠀࡼᇑfDAC ࠲ڦဣLj16Ԡ֭ኵLjڇཚڢ๑ీLj fOUT = 70 MHzLjଉ = ୁۉײ20 mA 07852-097 POWER DISSIPATION (mW) 1200 100 57. փཞۉᇸࡼࠀڦᇑfDAC ࠲ڦဣLj4ཚڢDOCSISLjfOUT = 915 MHzLj ଉ = ୁۉײ25 mA(ຕୟ০ದዃǖQAMՊஓഗഔᆩLj SRRC୳հഗഔᆩLj຺߲2Ԡ֭ኵ୳հഗഔᆩ) POWER DISSIPATION (mW) 1400 400 0 1.0 TOTAL (CMOS) TOTAL (LVDS) 1600 200 07852-094 POWER DISSIPATION (mW) 900 1800 POWER DISSIPATION (mW) 1000 07852-096 1100 AD9789 ຍᇕ! ۙڇႠ ሗොۯༀ(ྷݔSFDR) සࡕᅃ߲DACڦఇెໜጣຕጴڦሺेܸሺेLjईኁ SFDRኸాྷݔټۨܮ႑ࡽᇑሗො႑ࡽރڦኵናޗኮ ԍփՎLjሶDACڦۙڇă ֶLjᆩdB๖ă ฿ۙဃֶ! ሯำ(܈NSD) ฿ۙဃֶኸୁۉᇑၙ0ኵڦೋֶăܔᇀIOUTPLjړᆶ NSDኸገ࣑ഗڇ࿋ڦټሯำࠀ୲ăNSDཚᆩdBm/Hz ยྺ0้Ljᇨྺ0 mAăܔᇀIOUTNLjړᆶ ๖Ljଉײ႑ࡽࡀۨྺ0 dBmă ยྺ1้Ljᇨྺ0 mAă ତڢႅԲ(ACLR) ሺᅮဃֶ! ତڢႅDŽࠀ୲DžԲኸᅃ߲ཚڢ၎ܔᇀഄ၎ତཚ֪ڦڢଉࠀ ሺᅮဃֶኸํाྷݔᇑၙֶڦྷݔᅴLjᆶ ୲ኮԲLjᆩdBc๖ă ยྺ1้ڦ३ඁᆶยྺ0้ڦՍํڟڥा ۙဃֶԲ(MER) ྷݔă ۙ႑ࡽׂࣷิොڦኵणLjྺ႓ፗă߲ิׂࡽޙ ࿒܈ᅎ! ᅃ߲ᇑ႓ፗዐڦᅃۅ၎ܔᆌڦ႑ࡽăMER࢚ଉࡽޙ ࿒܈ᅎ࢚ଉ࣍ৣ࿒(܈25°C)ኵᇑTMINईTMAXኵኮक़ڦፌٷՎ ೝ܈ޗᇑ߲՚ڦࡽޙߵݛဃֶ܈ޗኮक़ֶڦᅴă ࣅྷݔă฿ۙĂሺᅮࢅएጚۉუᅎᆩฝ܈ppm๖ ۙ฿ኈ(IMD) (ppm/°C)ă IMDೕ୲փཞڦଇ߲ई߸ܠ႑ࡽೕ୲ंࢇڦࡕăंೕࣷ ۉᇸᅞ(PSR)! ׂิႹׂܠLjᆩࠅ๕af1 ± bf2๖Ljഄዐaࢅbྺኝຕኵă PSR࢚ଉۉᇸٗፌၭۉۨܮუՎྺፌۉۨܮٷუ้Ljଉײ ڦፌٷՎࣅă ຩٗྷݔ ۉუྷݔኸୁۉDACڦ܋ඹႹۉუྷݔăג ፌٷຩٗ၌ኵ߾ፕీࣷᆅഐपԏࢅईऍحLjڞዂݥ၍ ႠႠీă Rev. 0 | Page 22 of 76 AD9789 زႜ੦܋੨! AD9789زႜ੦܋੨ᅃዖଳऄڦཞօزႜཚ႑܋੨Ljᅜ ሞୁఇ๕ዐ)९7*LjᅜჄୁႚ๕دඪᅪຕଉڦຕጴ ݛՍںᇑܠዖ߾ᄽՔጚྲ੦ഗࢅྲتഗথ੨ă܋੨ ব Lj स ٪ ഗ ں ጲ ڿ ۯሺ ई ڿ३ ) ९ MSB/LSBᆫ ံ د և ग़ඹܠٷຕཞօد߭๕LjԈઔMotorola SPI®ࢅIntel® SSRၹ ݴDžăሞدፌࢫᅃ߲ጴবຐ้LjՂႷઙߛCSLjܸٗຐ ᅱăᅜཚࡗُزႜ੦܋੨LjᅜܔᆶದዃAD9789ڦस ୁఇ๕ă ٪ഗႜ܁/ႀ֡ፕăኧڇጴবࢅܠጴবدLjᅜतMSB ཚ႑ዜĊኸସेຕ! ᆫံࢅLSBᆫံد߭๕ăAD9789زႜ੦܋੨ᅜኍܔᅃ AD9789ڦཚ႑ዜྺݴଇ߲ևݴăሞڼᅃևݴዐLjᅃ߲16 ߲ມၠI/Oᆅগ(ৈSDIO)ईଇ߲ڇၠI/Oᆅগ(SDIO/SDO)ದ ࿋ኸସጴሞമ16߲SCLKฉืᄂႀAD9789ăኸସጴၠ ዃăఐණ൧ူLjAD9789تᇀڇၠኸସఇ๕(ኸସఇ๕ AD9789زႜ੦܋੨༵ࠃᆶ࠲ຕد)नཚ႑ዜܾڼڦև ྸᅃኧڦኸସఇ๕)ă ڦ*ݴ႑တLjඓनॽ݀ิڦຕد֡܁ፕ࣏ႀ֡ፕLj زႜ੦܋੨ᆅগࠀీ௮ຎ! ຕدڦጴবຕLjᅜतຕدዐڼᅃ߲ጴবڦഐ๔स٪ SCLK(زႜ้ዓ)ᆅগྺزႜᅎ࿋้ዓᆅগăSCLKᆩઠ๑ ഗںă زႜ੦܋੨܁ڦႀ֡ፕཞօăႀຕ࿋ऻሞ้ዓڦ ႀ ฉืᄂLj܁ຕ࿋ऻሞူইᄂăُᆅগᆯᅃ߲30 kΩۉፆ සࡕኸସጴۨᅭକᅃ߲ႀ֡ፕLjሶཚ႑ዜܾڼڦևݴՍ ాևူઙںă ॽຕدAD9789زڦႜ੦܋੨࣐؋ഗăຕ࿋ऻሞ SDIO(زႜຕ/)ᅃ߲ଇᆩᆅগLj़ᅜৈᆩፕ SCLKڦฉืᄂă ( ڇၠ ఇ ๕ )Lj ᄺ ᅜ ཞ ้ ᆩ ፕ ࢅ ( ມ ၠ ఇ๕ )ă د)܈1/2/3ጴবईୁఇ๕*ᆯኸସጴবዐڦଇ࿋)N1ࢅN0* AD9789ఐණ֑ᆩڇၠI/Oఇ๕(स٪ഗ0x00[7] = 0)ă ๖ăሞد1Ă2ई3ጴব)ڍփୁఇ๕*้Ljሞ߲8࿋Ⴞଚ SDO(زႜຕ)ᆅগৈᆩᇀڇၠI/Oఇ๕Ljፕྺ࣮܁ຕ ኮࢫᅜઙߛCSLj๑ጺ၍ှLjڍፌࢫᅃ߲ጴবኮࢫྔأLj ܀ڦ૬ᆅগă ُ้ࣷຐཚ႑ዜăړጺ၍ှ้LjසࡕCSՎྺۉگೝLj CS(ೌᆅগ႑ࡽ)ۉگೝᆶၳ੦Ljᆩઠཚ܁ႀዜă ړCSྺߛۉೝ้LjSDOࢅSDIOتᇀߛፆༀăُᆅগᆯᅃ߲30 kΩۉፆాևฉઙDVDD33ă M1 CS L1 SDO N1 SDIO ᅺُLjᆩࢽՂႷኪڢၠԍାस٪ഗႀࢆዖ࿋ఇ๕Ljᅜඓԍ ഗॲኟ߾ፕăܔᇀӣस٪ഗLjஃႀࢆዖຕۼ࠲ ᄲă AD9789 SERIAL CONTROL PORT P1 ܔ੦स٪ഗٷڦևݴႀ֡ፕࣷۼ૬नํ၄ዘႎದዃăڍ Ljस٪ഗ0x16स٪ഗ0x1Dժփথ੦ഗॲ߾ፕăܸ 07852-048 SCLK ৽ࣷ࣬ްزႜدăሞݥጴবՉহฉઙߛCSॽް࿋زႜ੦ ܋੨ăሞႀ֡ፕक़Ljୁఇ๕փࣷཌࡗԍାईӣस٪ഗǗ ၠాևஇड༵ࠃຕLjՂႷܔኄၵຕኴႜ֡ྔܮፕ֍ీ ႜူሜLjժ߀Վഗॲದዃăྺ๑स٪ഗ0x16स٪ഗ0x1Dڦ 62. زႜ੦܋੨ ߸ႎิၳLjFREQNEW࿋)स٪ഗ0x1E[7]*ՂႷยྺ1)ُ࿋ྺጲ زႜ੦܋੨ཚᆩ֡ፕ! ൣଭ࿋*ă߸ႎस٪ഗኮമLjᅜ߀Վඪᅪጴবڦຕă ᄲഔܔۯAD9789ڦႀई֡܁ፕLjႷॽCSઙگăሞدෙ߲ई FREQNEW࿋ยྺ1ॽཞ้߸ႎस٪ഗ0x16स٪ഗ0x1Dă ߸ณጴবڦຕ)ेฉኸସຕ*ڦఇ๕ዐ)९7*LjኧCS ཞᄣLjPARMNEW)स٪ഗ0x24[7]*ՂႷٗۉگೝጒༀՎྺߛ ှྺߛăሞኄၵఇ๕ዐLjCSᅜሞඪࢆጴবՉহฉሡ้࣮ݓ ۉೝጒༀLjܔस٪ഗ0x22ࢅ0x23߸߀ڦႎኵ֍ీิၳăᇑ ߛۉೝLj๑ဣཥ੦ഗᆶ้क़تူᅃ߲ጴবăCSᅜৈሞ FREQNEW࿋փཞLjPARMNEWփጲൣଭ࿋ă ጴবՉহฉߛۉೝLjժᅜሞඪᅃև)ݴኸସईຕ*ڦ دࡗײዐߛۉೝă ሞCSှྺߛڦఇ๕ዐLjزႜ੦܋੨ጒༀऐځڪጒ ༀLjڟᆶຕ݀ໃྜԹăසࡕຕช࿄݀ໃྜԹLjܸဣ ཥ੦ഗਦۨዐኹدLjՂႷྜׯᇆدLjईኁ๑CS࣮ݓ ۉگೝժณԍᅃ߲ྜኝڦSCLKዜ)ڍณᇀ8߲SCLKዜ *Lj๑ጒༀऐް࿋ăሞݥጴবՉহฉઙߛCSॽዕኹزႜد ժຘႎ࣐؋ഗă Rev. 0 | Page 23 of 76 AD9789 ܁ൽ! ࿋[A12:A0]ስཚ႑ዜຕدႀई܁ൽڦस٪ഗں සࡕኸସጴۨᅭକᅃ߲֡܁ፕLjሞথူઠڦN × 8߲SCLKዜ )स٪ഗ*ాྷݔăኻႴ๑ᆩ࿋[A6:A0]৽ీࡥ߃AD9789 LjຕٗኸସጴࡀۨںڦLjഄዐNྺ13Ljᆯ࿋ ᆩڦඇև0x55स٪ഗă࿋[A12:A7]ՂႷ๔ዕྺ0ăܔᇀܠጴব [N1:N0]ඓۨăසࡕN = 4Lj֡܁ፕॽྺୁఇ๕LjჄCSՎྺ دLjُںഐ๔ጴবںăሞMSBᆫံఇ๕ዐLjࢫჄጴ ߛۉೝăୁఇ๕փࣷཌࡗԍାईӣस٪ഗă࣮܁ຕሞ বࣷڿሺںă SCLKူڦইᄂᆶၳă MSB/LSBᆫံد AD9789زႜ੦܋੨ڦఐණఇ๕ڇၠఇ๕ăሞڇၠఇ๕ AD9789ኸସጴࢅጴবຕᅜMSBᆫံईLSBᆫံăႀ ዐLj࣮܁ຕ၄ሞSDOᆅগฉăᄺᅜཚࡗSDIO_DIR࿋ स٪ഗ0x00ڦඪࢆຕۼՂႷႜၟLjߛ຺࿋)࿋[7:4]*ᇑگ )स٪ഗ0x00[7]*LjॽAD9789ยྺມၠఇ๕ăሞມၠఇ๕ዐLj ຺࿋)࿋[3:0]*ࠓׯၟ࠲ဣăኄ๑ڥLSBᆫံईMSBᆫံ๚ํ ݀ໃຕࢅ࣮܁ຕ၄ሞSDIOᆅগฉă ฉᅃᄣڦăኄዖၟڦᅃ߲૩ጱस٪ഗ0x00[7:0]ڦఐණ ࣮܁൩൱܁ൽزႜ੦܋੨࣐؋൶ईᆶၳस٪ഗዐڦຕ)९ 63*ă AD9789ৈኧኸସఇ๕Ljᅺُस٪ഗ0x00[4:3]ኵྺ11)ُस ٪ഗ๑ᆩၟ࿋*ăኸସఇ๕ฉۉईް࿋้ڦఐණጒༀLj ႀኄၵ࿋փഐፕᆩă ยዃ0x18Ljၟڼ4࿋ࢅڼ3࿋ăኄၵ࿋ยዃኸସఇ๕)ఐ ණྸᅃኧڦఇ๕*ăAD9789ڦఐණยዃྺMSBᆫံă ړस٪ഗ0x00[1]ࢅ0x00[6]ยዃLSBᆫံ้Ljࣷ૬नิၳăሞ ܠጴবدዐLjࢫჄጴবࣷݒᆙزܔႜ܋੨ದዃፔڦඪࢆ ߸߀ă ړMSBᆫံఇ๕ᆶၳ้LjኸସࢅຕጴবՂႷӀቷٗMSBڟ AD9789๑ᆩस٪ഗں0x000x55ă LSBڦຩႾႀă֑ᆩMSBᆫံ߭๕ܠڦጴবຕدᆯᅃ߲ CS SERIAL CONTROL PORT FREQNEW WRITE REGISTER 0x1E = 0x10 TO UPDATE REGISTERS ՂႷӀቷٗߛںںگڟڦຩႾدăሞMSBᆫံఇ๕ ူLjܠጴবدዜدᅃ߲ຕጴবLjزႜ੦܋੨ڦ ాևںׂิഗՍڿ३1ă ړLSBᆫံఇ๕ᆶၳ้LjኸସࢅຕጴবՂႷӀቷٗLSBڟ MSBڦຩႾႀă֑ᆩLSBᆫံ߭๕ܠڦጴবຕدᆯᅃ߲ 07852-049 SDO ACTIVE REGISTERS SDIO BUFFER REGISTERS Ԉઔߛຕጴবस٪ഗںڦኸସጴবਸ๔ăࢫჄຕጴব SCLK Ԉઔگຕጴবस٪ഗںڦኸସጴবਸ๔Ljഄࢫ߲ܠຕ 63. AD9789زႜ੦܋੨࣐؋स٪ഗᇑᆶၳस٪ഗኮक़࠲ڦဣ ጴবăܠጴবدዜدᅃ߲ጴবLjزႜ੦܋੨ڦ ాևጴবںׂิഗՍڿሺ1ă ኸସጴDŽ16࿋Dž ኸସጴڦMSBྺR/WLj๖ኸସ֡܁ፕ࣏ႀ֡ፕăথ ူઠڦଇ࿋N1ࢅN0๖د܈Ljڇ࿋ྺጴবăፌࢫ13࿋)࿋ [A12:A0]*܁ईႀ֡ፕڦഐ๔ںă ٪ഗںਸ๔ڿሺă ሞୁఇ๕ዐLjኻᄲںڟٳ0x2FLjد৽ࣷዕኹă൩ጀᅪLj ሞܠጴবI/O֡ፕक़Ljփࣷཌࡗփᆩںڦă 7. ጴবدऺຕ N1 0 0 1 1 ഗںॽٗߑ֍ၠ੦स٪ഗ0x00ႀܠጴবI/O֡ፕڦस٪ ഗںਸ๔ڿ३ăසࡕLSBᆫံఇ๕ᆶၳLjزႜ੦܋੨ڦस ٪ഗںॽٗߑ֍ၠ੦स٪ഗ0x55ႀܠጴবI/O֡ፕڦस ܔᇀႀ֡ፕLjኸସጴኮࢫ࿋[N1:N0]پڦຕጴবຕ)९ 7*ă සࡕMSBᆫံఇ๕ᆶၳ)ఐණ*LjAD9789زႜ੦܋੨ڦस٪ N0 0 1 0 1 دጴবຕ 1 2 3 ୁఇ๕! 8. ୁఇ๕)փཌࡗඪࢆں* ႀఇ๕ LSBᆫံ MSBᆫံ Rev. 0 | Page 24 of 76 ںݛၠ ڿሺ! ڿ३ ཕኹႾଚ 0x02D, 0x02E, 0x02F, ཕኹ 0x001, 0x000, 0x02F, ཕኹ AD9789 9. زႜ੦܋੨Lj16࿋ኸସጴLjMSBᆫံ MSB I15 I14 I13 I12 I11 I10 I9 I8 I7 I6 I5 I4 I3 I2 I1 LSB I0 R/W N1 N0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CS SCLK DON'T CARE SDIO DON'T CARE R/W N1 N0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 16-BIT INSTRUCTION HEADER REGISTER (N) DATA DON'T CARE REGISTER (N – 1) DATA 07852-050 DON'T CARE 64. زႜ੦܋੨ႀǖMSBᆫံLj16࿋ኸସLjມጴবຕ CS SCLK DON'T CARE SDIO DON'T CARE D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 16-BIT INSTRUCTION HEADER REGISTER (N) DATA REGISTER (N – 1) DATA REGISTER (N – 2) DATA REGISTER (N – 3) DATA DON'T CARE 07852-051 SDO DON'T CARE R/W N1 N0 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 65. زႜ੦܋੨܁ൽǖMSBᆫံLj16࿋ኸସLj4ጴবຕ tDS tS CS DON'T CARE SDIO DON'T CARE tC tCLK tLO DON'T CARE N1 R/W N0 A12 A11 A10 A9 A8 A7 A6 A5 D4 D3 D2 D1 D0 DON'T CARE 07852-052 SCLK tHI tDH 66. زႜ੦܋੨ႀǖMSBᆫံLj16࿋ኸସLj้Ⴞ֪ଉ CS tDV SDIO SDO DATA BIT N DATA BIT N – 1 07852-053 SCLK 67. زႜ੦܋੨स٪ഗ܁ൽ้Ⴞ CS SCLK DON'T CARE A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 N0 N1 R/W D0 D1 D2 D3 D4 D5 D6 D7 D0 16-BIT INSTRUCTION HEADER REGISTER (N) DATA D1 D2 D3 D4 D5 D6 D7 REGISTER (N + 1) DATA 68. زႜ੦܋੨ႀǖLSBᆫံLj16࿋ኸସLjມጴবຕ Rev. 0 | Page 25 of 76 DON'T CARE 07852-054 SDIO DON'T CARE DON'T CARE AD9789 tS tC CS tCLK tHI SCLK tLO tDS SDIO BIT N BIT N + 1 69. زႜ੦܋੨ႀ֡ፕ้Ⴞ 10. زႜ੦܋੨้Ⴞ ֖ຕ! tDS tDH tCLK tS tC tHI tLO tDV ௮ຎ ຕᇑSCLKฉืᄂኮक़ڦยዃ้क़ ຕᇑSCLKฉืᄂኮक़ڦԍ้क़ ้ዓዜ CSူইᄂᇑSCLKฉืᄂኮक़ڦยዃ้क़DŽཚ႑ዜਸ๔Dž SCLKฉืᄂᇑCSฉืᄂᇑኮक़ڦยዃ้क़DŽཚ႑ዜຐDž SCLKᆌتᇀஇडߛጒༀڦፌ้܌क़ SCLKᆌتᇀஇडگጒༀڦፌ้܌क़ SCLKᆶၳSDIOࢅSDODŽ९67Dž Rev. 0 | Page 26 of 76 07852-055 tDH AD9789 SPIस٪ഗ ݥأଷᆶຫLjޏሶ൩ကႀᅜူस٪ഗǖस٪ഗ1y45Ăस٪ഗ1y46Ăस٪ഗ1y48Ăस٪ഗ1y4CĂस٪ഗ1y4GĂस٪ഗ 1y51स٪ഗ1y66ă 11. स٪ഗ ں 0x00 0x01 स٪ഗఁ SPI੦ ԏࢅऺຕഗ 0x02 0x03 ആ౾ၯᄓऺຕഗ ዐ๑ీ ዐጒༀ/ൣأ 0x05 0x06 0x07 ཚڢ๑ీ ಖୟ QAM/SRRCದዃ 0x08 ൱ࢅবۅՔଉ!! 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1A 0x1B 0x1C 0x1D 0x1E 0x1F 0x20 Քଉ NCO 0ೕ୲ ۙၿጴ 0x21 0x22 0x23 ຕ੦ DCOೕ୲ ాև้ዓ၎࿋ ۙኝ! ֖ຕ߸ႎ ཚڢ0ሺᅮ ཚڢ1ሺᅮ ཚڢ2ሺᅮ ཚڢ3ሺᅮ ೕኝႚ 0x24 0x25 0x26 0x27 0x28 0x29 ࿋7 SDIO_DIR ࿋6 LSBFIRST ࿋5 RESET ࿋4 ࿋3 LNG_INST SATCNT[7:0] PARERR PARERR BISTDONE BISTDONE PARMSET PARMSET ԍା QAM ԍା SRRC ԍା ALPHA[1:0] ԍା ࿋1 ࿋0 LOCKLOST LOCKLOST SATERR SATERR ԍା ԍା CHANEN[3:0] INT[4:0] MAPPING[2:0] NCO 3ೕ୲ ۙၿጴ ୲ገ࣑ഗ ݴజ(Q) ୲ገ࣑ഗ ݴጱ(P) ֭ኵBPF ዐ႐ೕ୲ FREQNEW CMOS_BUS BIN ԍା PARMNEW ԍା CMOS_CTRL ԍା BUSWDTH[1:0] DCODIV[2:0] DSCPHZ[3:0] DCO_INV IF_MODE DATWDTH CMPLX ԍା CHAN0GAIN[7:0] CHAN1GAIN[7:0] CHAN2GAIN[7:0] CHAN3GAIN[7:0] ԍା Rev. 0 | Page 27 of 76 0x00 0x00 0x00 0x0D INSCALE[7:0] FTW0[7:0] FTW0[15:8] FTW0[23:16] FTW1[7:0] FTW1[15:8] FTW1[23:16] FTW2[7:0] FTW2[15:8] FTW2[23:16] FTW3[7:0] FTW3[15:8] FTW3[23:16] Q[7:0] Q[15:8] Q[23:16] P[7:0] P[15:8] P[23:16] FC[7:0] FC[15:8] ԍା NCO 2ೕ୲ ۙၿጴ ఐණኵ 0x18 0x00 0x00 0x00 0x01 SUMSCALE[7:0] NCO 1ೕ୲ ۙၿጴ ೕ୲߸ႎ ᆘॲӲԨ থ੨ದዃ PARCNT[7:0] PARMCLR LOCKACQ PARMCLR LOCKACQ ࿋2 VER[3:0] CHANPRI PAR[1:0] LTNCY[2:0] ONES[3:0] SNCPHZ[3:0] 0x20 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x00 0x80 0x00 0x00 0x00 0x03 0xC8 0x61 0x1F 0x85 SPEC_INV 0x00 0x80 0x80 0x80 0x80 0x00 AD9789 ں स٪ഗఁ ࿋7 ࿋6 ࿋5 0x2F Muჽ੦1 SEARCH_ TOL SEARCH_ERR TRACK_ ERR 0x30 Mu੦Բ! Բ ၯኟ๑ీ!! 0x31 0x32 0x33 ้ዓথഗ1 ้ዓথഗ2 Muჽ੦2 0x34 0x35 0x36 0x37 0x38 0x39 ԍା! ԍା! DACೋዃ ԍା! DACஓഗ Muჽ੦3 0x3A Muჽ੦4 0x3B 0x3C ԍା! 0x3D ଉୁۉײ2 0x3E ६၎ഗ੦ PHZ_PD Reserved CMP_BST AUTO_CAL 0x3F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 ԍା BIST੦ BISTጒༀ CLKSHDN BDONE INPUTSEL Reserved ԍା! BENABLE 0x4A 0x4B ࡽޙ1੦ ࡽޙ1้ዓۙኝ 0x4C 0x4D 0x50 0x51 0x52 0x53 0x54 0x55 RegFnl0Freq CLK_DIS MU_CLKDIS ࿋4 INC_DEC !)߾* BISTധఁ1 0x40 NSIGN MU_EN MSEL[1:0] ԍା! DACஓഗఇ๕ SEARCH_DIR[1:0] MUPHZ[4:0] S1ENABL ԍା! 0x00 0x00 FSC[9:8] PHZ_DET_BIAS[3:0] S0ZERO S0NEG S1ZERO S1NEG ፌዕ୲/ೋᅎ੦0 [7:0] ፌዕ୲/ೋᅎ੦1 [7:0] SGN0[7:0] SGN0[15:8] SGN0[23:16] SGN1[7:0] SGN1[15:8] SGN1[23:16] Rev. 0 | Page 28 of 76 0x02 0x18 BCLKPHZ[3:0] S0FNLCH S0SEL[1:0] S0CLKPHZ[3:0] 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 S1FNLCH S1SEL[1:0] S1CLKPHZ[3:0] 0x00 0x00 BMODE[3:0] BSTATUS[6:0] PADLEN[7:0] PADLEN[15:8] VECTLEN[7:0] VECTLEN[15:8] VECTLEN[23:16] S1RDEN S1PRNG S1CLKDIV[3:0] 0x00 0xCA 0x03 0x00 0x00 0x40 0x00 ԍା! BCLKDIV[3:0] S0RDEN S0PRNG S0CLKDIV[3:0] 0xF0 0x3F 0x42 MUDLY[8:1] FSC[7:0] S0ENABL ఐණኵ 0x0B ԍା! ԍା! ԍା! ԍା! PDBIAS MUDLY[0] ࿋0 ԍା! CLKP_CML[3:0] MUSAMP GAIN[1:0] CLKN_CML[3:0] ԍା! PSIGN SLOPE MODE[1:0] BIST๐ଉ!܈ BISTധఁ0 ࿋1 MANUAL_ADJ[5:0] )ৈᆩᇀ߾֪* BISTଭག؊!܈ RegFnl1Freq ࿋2 GUARDBAND[4:0] ଉୁۉײ1 BIST้ዓۙኝ!! ࡽޙ0੦ ࡽޙ0้ዓۙኝ ࿋3 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 AD9789 SPIस٪ഗ௮ຎ 12. SPI੦स٪ഗ)ں0x00* ࿋ 7 ࿋ఁ SDIO_DIR 6 LSBFIRST 5 RESET 4 [3:0] LNG_INST ௮ຎ ُ࿋ॽSDIOᆅগದዃྺৈᆅগई/ມၠᆅগăଇዖስࢇޙSPIՔጚă 0 = ৈă 1 = ມၠ)/*ă ُ࿋ॽSPIথ੨ದዃྺMSBᆫံईLSBᆫံఇ๕ăଇዖስࢇޙSPIՔጚă 0 = MSBᆫံă 1 = LSBᆫံă ยྺ1Ljُ࿋ॽ๑ഗॲް࿋ăഗॲް࿋ࢫLjሞူᅃ߲ዜॽ0ႀُ࿋ă 0 = փް࿋ă 1 = ॲް࿋ă ُ࿋ॽSPIยྺኸସఇ๕Ǘ1ྸᅃᆶၳڦኵă ኄၵ࿋ᆌړ࿋[7:4]ڦၟă࿋3ၟ࿋4Lj࿋2ၟ࿋5Lj࿋1ၟ࿋6Lj࿋0ၟ࿋7ă 13. ԏࢅऺຕഗस٪ഗ)ں0x01* ࿋ [7:0] ࿋ఁ SATCNT[7:0] ௮ຎ ُኻ܁स٪ഗࡤᆶԏࢅऺຕഗăُस٪ഗݒᆙSUMSCALEሺᅮఇג܋ຕୟ০ଉײ ܸԥຕጴၥհڦᄣԨຕăॽ1ႀस٪ഗ0x04ڦ࿋1Ljऺຕഗൣ0ă 14. ആ౾ၯᄓऺຕഗस٪ഗ(ں0x02) ࿋ [7:0] ࿋ఁ PARCNT[7:0] ௮ຎ ُኻ܁स٪ഗࡤᆶຕആ౾ၯᄓٱဃऺຕഗăॽ1ႀस٪ഗ0x04ڦ࿋7Ljऺຕഗൣ0ă 15. ዐ๑ీस٪ഗ(ں0x03) ࿋ 7 ࿋ఁ PARERR 6 BISTDONE 5 PARMSET 4 PARMCLR 3 LOCKACQ 2 LOCKLOST 1 SATERR 0 ԍା ௮ຎ ُ࿋ยྺ1ॽ๑ీPARERRՔኾLjׂิᅃ߲ዐ൩൱Ljڞዂस٪ഗ0x04ዐڦዐ࿋7ยྺ1Lj ժIRQᆅগՎྺۉگೝă ُ࿋ยྺ1ॽ๑ీBISTDONEՔኾLjׂิᅃ߲ዐ൩൱Ljڞዂस٪ഗ0x04ዐڦዐ࿋6ยྺ1Lj ժIRQᆅগՎྺۉگೝă ُ࿋ยྺ1ॽ๑ీPARMS_SETՔኾLjׂิᅃ߲ዐ൩൱Ljڞዂस٪ഗ0x04ዐڦዐ࿋5ยྺ1Lj ժIRQᆅগՎྺۉگೝă ُ࿋ยྺ1ॽ๑ీPARMS_CLRՔኾLjׂิᅃ߲ዐ൩൱Ljڞዂस٪ഗ0x04ዐڦዐ࿋4ยྺ1Lj ժIRQᆅগՎྺۉگೝă ُ࿋ยྺ1ॽ๑ీLOCKACQՔኾLjׂิᅃ߲ዐ൩൱Ljڞዂस٪ഗ0x04ዐڦዐ࿋3ยྺ1Lj ժIRQᆅগՎྺۉگೝă ُ࿋ยྺ1ॽ๑ీLOCKLOSTՔኾLjׂิᅃ߲ዐ൩൱Ljڞዂस٪ഗ0x04ዐڦዐ࿋2ยྺ1Lj ժIRQᆅগՎྺۉگೝă ُ࿋ยྺ1ॽ๑ీSATERRDŽᅯڟ16Ԡ֭ኵഗDžՔኾLjׂิᅃ߲ዐ൩൱Ljڞዂस٪ഗ0x04ዐ ڦዐ࿋1ยྺ1LjժIRQᆅগՎྺۉگೝă ԍାă Rev. 0 | Page 29 of 76 AD9789 16. ዐጒༀ/ൣأस٪ഗ(ں0x04) ࿋ ࿋ఁ ௮ຎ 7 PARERR සࡕُ࿋ยྺ1Ljຫᅙ݀ิᅃ߲ई߲ܠആ౾ၯᄓٱဃăႀ1Ljൣأዐă 6 BISTDONE සࡕُ࿋ยྺ1LjຫBISTᅙڟٳዕۅጒༀăႀ1Ljൣأዐă 5 PARMSET සࡕُ࿋ยྺ1Ljຫ֖ຕ߸ႎस٪ഗ(ں0x24)ᅙঢ়߸ႎăႀ1Ljൣأዐă 4 PARMCLR සࡕُ࿋ยྺ1Ljຫ֖ຕ߸ႎस٪ഗDŽں0x24Džᅙൣ0ăႀ1Ljൣأዐă 3 LOCKACQ සࡕُ࿋ยྺ1LjຫຕጴᆅᇑDACాࢃኮक़ኟሞႜኟڦຕൎ࣑ă 2 LOCKLOST සࡕُ࿋ยྺ1LjຫຕጴᆅᇑDACాࢃኮक़ᅙෟ฿ኟڦຕൎ࣑ăႀ1Ljൣأዐă 1 SATERR සࡕُ࿋ยྺ1Ljຫᅙ݀ิᅃ߲ई߲ܠԏࢅٱဃ(ᅯڟ16Ԡ֭ኵഗ)ăႀ1Ljൣأዐă 0 ԍା ԍାă 17. ཚڢ๑ీस٪ഗ(ں0x05) ࿋ ࿋ఁ ௮ຎ [7:4] [3:0] ԍା ԍାă CHANEN[3:0] ඪࢆ࿋ྺஇड1ࣷۼ๑ీ၎ᆌڦཚڢǗ0000๖ᆶཚ্ۼڢᆩă ยዃ 0000 0001 0010 0011 … 1110 1111 ཚڢ ᆶཚ্ڢᆩă ཚڢ0๑ీă ཚڢ1๑ీă ཚڢ0ࢅཚڢ1๑ీă … ཚڢ1Ăཚڢ2ࢅཚڢ3๑ీă ᆶཚڢ๑ీă 18. ಖୟस٪ഗ(ں0x06) ࿋ 7 6 5 [4:0] ࿋ఁ QAM SRRC ௮ຎ ԍା ԍାă ඪࢆ࿋ྺஇड1ࣷۼಖୟ၎ᆌ֭ڦኵ୳հഗăಖୟ֭ኵ୳հഗڦডॅຩႾံಖୟ୳հഗ0Lj ምಖୟ୳հഗ1Ljᅈُૌླྀă INT[4:0] ُ࿋ยྺ2LjಖୟRBNᆙพഗă ُ࿋ยྺ2Ljಖୟೝืߵݛᇆ၀)TSSD*୳հഗă ยዃ 00000 00001 00010 00011 … 01111 … 11111 ಖୟ֭ኵ୳հഗ ᆶ֭ኵ୳հഗ๑ీă ಖୟ֭ኵ୳հഗ1ă ಖୟ֭ኵ୳հഗ2ă ಖୟ֭ኵ୳հഗ1ࢅ֭ኵ୳հഗ2ă č ಖୟ֭ኵ୳հഗ1Ă֭ኵ୳հഗ2Ă ֭ኵ୳հഗ3ࢅ֭ኵ୳հഗ4ă č ಖୟᆶ֭ኵ୳հഗă Rev. 0 | Page 30 of 76 AD9789 19. QAM/SRRCದዃस٪ഗ(ں0x07) ࿋ [7:6] [5:4] ࿋ఁ ௮ຎ ԍା ԍାă ኄၵ࿋ยዃSRRC୳հഗαኵă ALPHA[1:0] ยዃ 00 01 10 11 3 [2:0] ԍା ԍାă MAPPING[2:0] ኄၵ࿋ยዃQAMՊஓă ยዃ 000 001 010 011 100 101 110 111 α୳հഗ 0.12 0.18 0.15 0.13 QAMՊஓ DOCSIS 64-QAM DOCSIS 256-QAM DVB 16-QAM DVB 32-QAM DVB 64-QAM DVB 128-QAM DVB 256-QAM փᆩ 20. ൱ࢅবۅՔଉस٪ഗ(ں0x08) ࿋ [7:0] ࿋ఁ SUMSCALE[7:0] ௮ຎ ُस٪ഗยዃᆌᆩᇀཚڢ൱ࢅবۅڦ2.6݆ױഗኵă ยዃ 00000000 00000001 00000010 … 00001101 … 11111110 11111111 2.6݆ױഗ 0 0.015625 0.03125 … 0.203125)ఐණ* … 3.96875 3.984375 21. Քଉस٪ഗ(ں0x09) ࿋ [7:0] ࿋ఁ INSCALE[7:0] ௮ຎ ُस٪ഗยዃᆌᆩᇀຕڦ3.5݆ױഗኵăُۨՔഗఇᇑQAMՊஓഗఇժLj ሞQAMՊஓഗఇԥಖୟ้๑ᆩă ยዃ 00000000 00000001 00000010 … 00100000 … 11111110 11111111 3.5݆ױഗ 0 0.03125 0.0625 … 1)ఐණ* … 7.9375 7.96875 Rev. 0 | Page 31 of 76 AD9789 ෙ߲NCO 0ೕ୲ۙၿጴस٪ഗᅃഐࠓׯNCO 0ڦ24࿋ೕ୲ۙၿጴăᆶ࠲ኄၵस٪ഗՊܠ߸ڦײ႑တLj൩֖ለएټຕጴฉՎೕഗևݴă 22. NCO 0ೕ୲ۙၿጴस٪ഗ)ں0x0Aں0x0C* ں 0x0A 0x0B 0x0C ࿋ఁ FTW0[7:0] FTW0[15:8] FTW0[23:16] ௮ຎ NCO 0ڦೕ୲ۙၿጴLj࿋[7:0] NCO 0ڦೕ୲ۙၿጴLj࿋[15:8] NCO 0ڦೕ୲ۙၿጴLj࿋[23:16] ෙ߲NCO 1ೕ୲ۙၿጴस٪ഗᅃഐࠓׯNCO 1ڦ24࿋ೕ୲ۙၿጴăᆶ࠲ኄၵस٪ഗՊܠ߸ڦײ႑တLj൩֖ለएټຕጴฉՎೕഗևݴă 23. NCO 1ೕ୲ۙၿጴस٪ഗDŽں0x0Dں0x0FDž ں 0x0D 0x0E 0x0F ࿋ఁ FTW1[7:0] FTW1[15:8] FTW1[23:16] ௮ຎ NCO 1ڦೕ୲ۙၿጴLj࿋[7:0] NCO 1ڦೕ୲ۙၿጴLj࿋[15:8] NCO 1ڦೕ୲ۙၿጴLj࿋[23:16] ෙ߲NCO 2ೕ୲ۙၿጴस٪ഗᅃഐࠓׯNCO 2ڦ24࿋ೕ୲ۙၿጴăᆶ࠲ኄၵस٪ഗՊܠ߸ڦײ႑တLj൩֖ለएټຕጴฉՎೕഗևݴă 24. NCO 2ೕ୲ۙၿጴस٪ഗ(ں0x10ں0x12) ں 0x10 0x11 0x12 ࿋ఁ FTW2[7:0] FTW2[15:8] FTW2[23:16] ௮ຎ NCO 2ڦೕ୲ۙၿጴLj࿋[7:0] NCO 2ڦೕ୲ۙၿጴLj࿋[15:8] NCO 2ڦೕ୲ۙၿጴLj࿋[23:16] ෙ߲NCO 3ೕ୲ۙၿጴस٪ഗᅃഐࠓׯNCO 3ڦ24࿋ೕ୲ۙၿጴăᆶ࠲ኄၵस٪ഗՊܠ߸ڦײ႑တLj൩֖ለएټຕጴฉՎೕഗևݴă 25. NCO 3ೕ୲ۙၿጴस٪ഗ(ں0x13ں0x15) ں 0x13 0x14 0x15 ࿋ఁ FTW3[7:0] FTW3[15:8] FTW3[23:16] ௮ຎ NCO 3ڦೕ୲ۙၿጴLj࿋[7:0] NCO 3ڦೕ୲ۙၿጴLj࿋[15:8] NCO 3ڦೕ୲ۙၿጴLj࿋[23:16] ෙ߲୲ገ࣑ഗݴజ(Q)स٪ഗᅃഐࠓׯ୲ገ࣑ഗ؏ൽԲڦ24࿋ݴజăᆶ࠲ኄၵस٪ഗՊܠ߸ڦײ႑တLj൩֖ለ֑ᄣ୲ገ࣑ഗևݴă 26. ୲ገ࣑ഗݴజ(Q)स٪ഗ)ں0x16ں0x18* ں 0x16 0x17 0x18 ࿋ఁ Q[7:0] Q[15:8] Q[23:16] ௮ຎ ୲ገ࣑ഗݴజLj࿋[7:0] ୲ገ࣑ഗݴజLj࿋[15:8] ୲ገ࣑ഗݴజLj࿋[23:16] ෙ߲୲ገ࣑ഗݴጱ(P)स٪ഗᅃഐࠓׯ୲ገ࣑ഗ؏ൽԲڦ24࿋ݴጱăᆶ࠲ኄၵस٪ഗՊܠ߸ڦײ႑တLj൩֖ለ֑ᄣ୲ገ࣑ഗևݴă 27. ୲ገ࣑ഗݴጱ(P)स٪ഗ)ں0x19ں0x1B* ں 0x19 0x1A 0x1B ࿋ఁ P[7:0] P[15:8] P[23:16] ௮ຎ ୲ገ࣑ഗݴጱLj࿋[7:0] ୲ገ࣑ഗݴጱLj࿋[15:8] ୲ገ࣑ഗݴጱLj࿋[23:16] Rev. 0 | Page 32 of 76 AD9789 ଇ߲֭ኵBPFዐ႐ೕ୲स٪ഗᅃഐࠓׯ16Ԡټཚ֭ኵ୳հഗڦ16࿋ዐ႐ೕ୲ăᆶ࠲ኄၵस٪ഗՊܠ߸ڦײ႑တLj൩֖ለ16Ԡຕጴۙ ټཚ୳հഗևݴă 28. ֭ኵBPFዐ႐ೕ୲स٪ഗ)ں0x1Cࢅں0x1D* ں 0x1C 0x1D ࿋ఁ FC[7:0] FC[15:8] ௮ຎ ዐ႐ೕ୲Lj࿋[7:0] ዐ႐ೕ୲Lj࿋[15:8] 29. ೕ୲߸ႎस٪ഗ(ں0x1E) ࿋ 7 ఁ FREQNEW [6:0] ԍା ௮ຎ ُ࿋ยྺ1ॽ߸ႎAD9789ዐڦᄆิस٪ഗăՂႷยዃُ࿋Ljܔस٪ഗ0x16स٪ഗ0x1Dፔิీ֍߀߸ڦၳă ᄆิस٪ഗ߸ႎࢫLjُጲൣଭ࿋ް࿋0ă ԍାă 30. ᆘॲӲԨस٪ഗ(ں0x1F) ࿋ [7:4] [3:0] ఁ ௮ຎ ԍା ԍାă ُኻ܁स٪ഗኸ๖ႊೌڦӲԨ(0011)ă VER[3:0] 31. থ੨ದዃस٪ഗ)ں0x20* ࿋ 7 6 5 4 3 ఁ CMOS_BUS CMOS_CTRL 2 CHANPRI [1:0] PAR[1:0] ԍା DCO_INV IF_MODE ௮ຎ ُ࿋ݒᆙCMOS_BUSᆅগ(L14)ڦጒༀă ُ࿋ݒᆙCMOS_CTRLᆅগ(M14)ڦጒༀă ԍାă ยྺ1้LjDCOᆅগݒ၎ă ُ࿋ยዃຕথ੨ఇ๕ă 0 = ཚڢስഗఇ๕ăኧᆶᆩথ੨܈त8࿋ࢅ16࿋ጴăኧڦፌٷfBAUDྺfDAC/48ă 1 = ኟຕጴฉՎೕഗ(QDUC)ఇ๕ăৈኧ32࿋থ੨Ă16࿋ጴఇ๕ăኧڦፌٷfBAUDྺfDAC/16ă ُ࿋ስཚڢᆫံपኵ)ৈᆩᇀཚڢስഗఇ๕*ă 0 = ഗॲྭৈྺ๑ీڦཚࠃ༵ڢᄣԨă 1 = ഗॲྭྺᆶ຺߲ཚࠃ༵ڢຕăഗॲྭ༵ࠃ্ᆩཚڦڢຕLjժՂႷ݀ໃຕLj ڍAD9789ࣷചኮփᆩă ኄၵ࿋ยዃആ౾ၯᄓă߸ܠ႑တ९ആ౾ၯᄓևݴă ยዃ 00 01 10 11 ആ౾ၯᄓ ആ౾ၯᄓၳ IQആ౾Ⴀ (Iཚڢྭኵ0LjQཚڢྭኵ1) ౾ၯᄓ ആၯᄓ Rev. 0 | Page 33 of 76 AD9789 32. ຕ੦स٪ഗDŽں0x21Dž ࿋ 7 ఁ BIN [6:5] BUSWDTH[1:0] ௮ຎ ُ࿋ስഗॲڦՊஓ߭๕ă 0 = ܾցஓՊஓă 1 = ՔጚܾՊஓă ኄၵ࿋ยዃഗॲڦຕጺ၍܈ă ยዃ! 00 01 10 11 4 DATWDTH 3 CMPLX [2:0] LTNCY[2:0] ጺ၍܈ 4࿋ 8࿋ 16࿋ 32࿋ ُ࿋ยዃ݀ໃຕୟ০ڦຕጴ܈ă 0 = 8࿋ຕጴă 1 = 16࿋ຕጴă ُ࿋ದዃํຕईްຕຕڦຕୟ০ă 0 = ํຕຕă 1 = ްຕຕă ኄၵ࿋ยዃٗGTஞ؋ాڟևຕ֑ᄣ้क़ڦዜገჽă߸ܠ႑တ९ჽस٪ഗևݴă ยዃ! 000 FSՎྺۉگೝࢫLjٷሀሞDCOڼڦᅃ߲ฉืᄂਸ๔ܔຕႜ֑ᄣă ჽ 001 FSՎྺۉگೝࢫLjٷሀሞDCO߲ܾڼڦฉืᄂਸ๔ܔຕႜ֑ᄣă … 111 … FSՎྺۉگೝࢫLjٷሀሞDCOڼڦӗ߲ฉืᄂਸ๔ܔຕႜ֑ᄣă 33. DCOೕ୲स٪ഗDŽں0x22Dž ࿋ 7 [6:4] ఁ ௮ຎ ԍା ԍାă ኄၵ࿋ยዃٗGTஞ؋ాڟևຕ֑ᄣ้क़ڦዜገჽă߸ܠ႑တ९ჽस٪ഗևݴă DCODIV[2:0] ยዃ! 000 001 010 011 100 101 11x [3:0] ONES[3:0] DCO้ዓೕ୲ DCO้ዓ্ᆩ fDACCLK/16 fDACCLK/32 ၳ fDACCLK/64 ၳ ၳ ኄၵ࿋๔ዕ࣮ྺ܁1111ă Rev. 0 | Page 34 of 76 AD9789 34. ాև้ዓ၎࿋ۙኝस٪ഗDŽں0x23Dž ࿋ ఁ ௮ຎ [7:4] DSCPHZ[3:0] ຕ֑ᄣ้ዓ(DSC)ᆩᇀ֑ᄣຕాڦև้ዓăُ้ዓ݀ิሞ16߲၎࿋ዐڦᅃ߲၎࿋Ljᅜۙኝᆫࣅຕ থ੨ڦยዃࢅԍ้Ⴞă ยዃ 0000 0001 … 1111 [3:0] SNCPHZ[3:0] ၎࿋ ፌራ้ዓ၎࿋ ْራ้ዓ၎࿋Lj݀ิሞ1/16 DSCዜኮࢫ … ፌࢫᆩ้ڦዓ၎࿋ ཞօ้ዓ(SNC)ᆩઠཞօຕጴຕୟ০้ዓᇑDAC้ዓాڦև้ዓăُ้ዓ݀ิሞ16߲၎࿋ዐڦᅃ߲၎࿋Lj ᅜۙኝᆫࣅDACຕୟ০้Ⴞă ยዃ 0000 0001 … 1111 ၎࿋ ፌራ้ዓ၎࿋ ْራ้ዓ၎࿋Lj݀ิሞ1/16 DSCዜኮࢫ … ፌࢫᆩ้ڦዓ၎࿋ 35. ֖ຕ߸ႎस٪ഗ)ں0x24* ࿋ 7 ఁ PARMNEW [6:0] ԍା ௮ຎ ُ࿋ՂႷٗ0Վྺ1Ljܔस٪ഗ0x22ࢅस٪ഗ0x23ፔิీ֍߀߸ڦၳă्ยُ࿋ኮമยྺ0Ljႀ1้Ljُ࿋ڦ ࣮܁ኵॽݒᆙႊೌጒༀă (ႊೌጒༀ߸ႎݥǗᅺُLjᆩࢽසࡕ֑ᆩডڦSPIݛӄLjీᆦᇺփࣷሞ߸ႎኮࢫ࣮ڟ܁0ኵă) 0 = ኵ࿄߸ႎă 1 = ኵᅙ߸ႎă ԍାă 36. ཚڢሺᅮस٪ഗ)ں0x25ں0x28* ں 0x25 0x26 0x27 0x28 स٪ഗఁ ࿋ఁ CHAN0GAIN[7:0] CHAN1GAIN[7:0] CHAN2GAIN[7:0] CHAN3GAIN[7:0] ཚڢ0ሺᅮ ཚڢ1ሺᅮ ཚڢ2ሺᅮ ཚڢ3ሺᅮ ௮ຎ ኄၵस٪ഗದዃᆌᆩᇀSUMSCALEఇኮമ߳ཚڦڢ1.7݆ױഗኵăཚڢሺᅮྷݔ ྺ01.9921875Ljօٷၭྺ0.0078125ăᄲཕᆩ߲ڇཚڢLjԲ૩ဣຕႷยྺ0ă ยዃ 00000000 00000001 … 11111111 37. ೕኝႚस٪ഗ(ں0x29) ࿋ [7:1] 0 ఁ ௮ຎ ԍା ԍାă ُ࿋ยྺ1้Lj႑ࡽೕݒ၎LjQຕํाฉױᅜ-1ă SPEC_INV Rev. 0 | Page 35 of 76 ཚڢሺᅮ 0 0.0078125 … 1.9921875 AD9789 38. Muჽ੦1स٪ഗ(ں0x2F) ࿋ ఁ ௮ຎ ُ࿋ኸۨ၎࿋ڦඓႠăፌॅኵྺ1ă 7 SEARCH_TOL 6 SEARCH_ERR 5 TRACK_ERR [4:0] GUARDBAND[4:0] 0 = փඓǖᅜቴڟႴ၎࿋ڦଇ߲ኵాڦᅃ߲၎࿋ă 1 = ඓǖቴڟኸۨڦඓ၎࿋ă ُ࿋ದዃᇜٱڟဃ้ڦႜྺă 0 = ้ٱཕኹă 1 = ้ٱዘă ُ࿋ದዃ੦ഗ࿄ቴڟႴ၎࿋้߶ڦጷႜྺăፌॅኵྺ0ă 0 = ้ٱीჄă 1 = ް้ٱ࿋ă ኄၵ࿋ยዃࢺݞೕټኵăࢺݞೕۨټᅭසူǖ GUARDBAND[4:0] x 8 = ٗዕۅਸ๔ࢺݞڦೕټmuჽஓຕ සࡕఇ๕ྺ༺๕Ljॽሞଇ߲ݛၠႜLjڟሞᅃ߲ݛၠࢺݞٳڟೕټăࢺݞٳڟೕࢫټLjৈ ሞ၎ݛݒၠीჄႜăሞݛ߲ܾڼၠࢺݞٳڟೕټኮമLjසࡕுᆶቴڟႴ၎࿋LjॽՎ࣮༺ఇ๕Ljी ჄሞࢺݞೕాټლቴăසࡕmuჽٳڟዕۅLj฿Өă ߸ܠ႑တ९Muჽ੦ഗևݴă Setting 00000 … 01011 … 11111 Guard Band 0 … 11 (默认) … 31 39. Mu੦Բस٪ഗ(ں0x30) ࿋ ఁ ௮ຎ 7 Բၯኟ๑ీ ُ࿋ยྺ1้Ljॽਸഔmu੦ԲၯኟۉୟăُࠀీႷሞ๑ీmu੦ഗኮമਸഔăُࠀీᇑ၎࿋Բড ഗืუ)ཚࡗस٪ഗ0x3E[5]๑ీ*ᅃഐLj๑mu੦ഗሞഗॲኝ߲߾ፕ߾ాྷݔ܈ፕ߸࿘ۨă 6 [5:0] INC_DEC MANUAL_ADJ[5:0] ԍା)ৈሞ߾๑ᆩ*ă ԍା)ৈሞ߾๑ᆩ*ă 40. ้ዓথഗ1स٪ഗ(ں0x31) ࿋ ఁ ௮ຎ [7:4] CLKN_CML[3:0] [3:0] ԍା ኄၵ࿋ۙኝDMLOᆅগࠌڦఇۉೝăኄၵ࿋तDMLQ`DNM\4;1^࿋ॺڦᅱኵྺ1yGă߸ܠ႑တ९ᆫࣅ้ዓࠌ ఇۉუևݴă ԍାă 41. ้ዓথഗ2स٪ഗ(ں0x32) ࿋ ఁ ௮ຎ 7 CLK_DIS ُ࿋্ᆩई๑ీ้ዓথഗăAD9789ฉ้ۉLjُ࿋ยྺ0Ljݞኹ้ዓฉ้ۉ၄ߛሯำă ځDAC้ዓ࿘ۨኮࢫLjॽُ࿋ยྺ1ă 0 = ্ᆩă 1 = ๑ీă 6 5 ԍା ԍା)ৈሞ߾๑ᆩǗ൩ԍାఐණኵ*ă ُ࿋ኸۨCLKP_CML࿋ࡽޙڦă 0 = DŽླྀ४Džă 1 = ኟă [4:1] CLKP_CML[3:0] ኄၵ࿋ۙኝCLKPᆅগࠌڦఇۉೝăኄၵ࿋तCLKN_CML[3:0]࿋ॺڦᅱኵྺ0xFă߸ܠ႑တ९ᆫࣅ้ዓࠌఇ ۉუևݴă 0 NSIGN ُ࿋ኸۨCLKN_CML࿋ࡽޙڦă 0 = DŽླྀ४Džă 1 = ኟă PSIGN Rev. 0 | Page 36 of 76 AD9789 42. Muჽ੦2स٪ഗ)ں0x33* ࿋ ఁ ௮ຎ 7 MU_CLKDIS 6 SLOPE [5:4] MODE[1:0] 3 MUSAMP [2:1] GAIN[1:0] 0 MU_EN ُ࿋্ᆩई๑ీmuჽ੦ഗ้ڦዓă 0 = ๑ీă 1 = ্ᆩă ُ࿋ದዃmuჽ၎࿋֪ଉڦႴၽ୲ă֪Ⴔ၎࿋ࢫLjऺ໙၎࿋֪ଉڦၽ୲ժॽഄᇑُ࿋ڦኵ၎Բডă ྺํ၄ፌॅୁႠీLjڦፌॅยዃၽ୲ྺኟLjժ၎࿋ኵྺ14ă 0 = ă 1 = ኟă ኄၵ࿋ದዃmu੦ഗ߾ڦፕఇ๕ă 00 = ժ߶ጷDŽླྀ४Džă 01 = ৈ߶ጷă 10 = ৈă 11 = ၳă ُ࿋ٗ0Վྺ1้Ljᆩࢽᅜ࣮܁੦ഗۨڦmuჽኵ)स٪ഗ0x39ࢅस٪ഗ0x3AዐڦMUDLY࿋*Lj ᅜतۨڦ၎࿋)स٪ഗ0x39ዐڦMUPHZ࿋*ă 0 = ۯፕă 1 = ٗ0Վྺ1้Ljվጛmu੦ഗ၎࿋ࢅჽ܁࣮ڦኵă ኄၵ࿋ยዃmu੦ഗ߶ڦጷ୲ă 00 = ፌ߶ጷă 01 = Ք߶ጷ)ླྀ४*ă 10 = ፌ߶ጷă 11 = ၳ)փᄲ๑ᆩ*ă ُ࿋๑ీई্ᆩmu੦ഗă๑ీmu੦ഗኮമLjႷံਸഔ၎࿋Բডഗืუ)स٪ഗ0x3E[5]*ࢅmu੦Բ ၯኟۉୟ)स٪ഗ0x30[7]*ăኄଇ߲ࠀీ๑mu੦ഗሞഗॲڦኝ߲߾ፕ߾ాྷݔ܈ፕ߸࿘ۨă 0 = mu੦ഗ࠲ԿDŽۯఇ๕Džă 1 = mu੦ഗਸഔDŽጲۯఇ๕Džă 43. DACೋዃस٪ഗ(ں0x36) ࿋ ఁ ௮ຎ 7 [6:2] [1:0] PDBIAS ُ࿋ยྺ1้Lj࠲DACۉୟă ԍା ԍାă ኄၵ࿋ยዃୁۉࡐইೕ୲੦Ljᆩઠۙኝాևୁۉڦሯำࠋ၅Ljᅜᆫࣅ1/fሯำă 00 = ಖୟୁۉࡐইೕ୲੦ă 01 = ፌټă 10 = ዐټڪă 11 = ፌټă MSEL[1:0] 44. DACஓഗस٪ഗ(ں0x38) ࿋ ఁ ௮ຎ [7:2] [1:0] ԍା DACஓഗఇ๕ ԍାă ኄၵ࿋ยዃDACڦஓഗఇ๕ăॺᅱ๑ᆩཚఇ๕)ఐණ*ă 00 = ཚఇ๕ă 01 = ࡃଭఇ๕ă 10 = ंࢇఇ๕ă 11 = ၳă Rev. 0 | Page 37 of 76 AD9789 45. Muჽ੦3स٪ഗ(ں0x39) ࿋ 7 ఁ MUDLY[0] ௮ຎ [6:5] SEARCH_DIR[1:0] ኄၵ࿋ದዃݛၠLjٗۨڦmuჽኵਸ๔ă 00 = ၠူă 01 = ၠฉă 10 = ฉူDŽፌॅDžă 11 = ၳă [4:0] MUPHZ[4:0] ኄၵ࿋ኸۨႴ֪ଉڦ၎࿋LjፌٷඹႹ၎࿋ྺ16 (10000)ăසࡕሜٷᇀ16ڦኵLj੦ഗփࣷۨă֪Ⴔ ၎࿋ࢫLjऺ໙၎࿋֪ଉڦၽ୲ժॽഄᇑದዃڦၽ୲DŽᆯस٪ഗ0x33[6]ዐڦSLOPE࿋ኸۨDž၎Բডăྺํ၄ ፌॅୁႠీLjڦፌॅยዃၽ୲ྺኟLjժ၎࿋ኵྺ14 (01110)ă ُ࿋muჽኵڦLSBăُ࿋ᇑस٪ഗ0x3Aዐڦ࿋[7:0]ᅃཞದዃՊײmuჽǗ໙݆ٗ༬ۨmuჽ ኵਸ๔ăۯఇ๕ူLjᅜႀMUDLY࿋ă߶ጷఇ๕ူLjᅜ࣮֑܁ᄣMUDLYኵăُჽ၍ኵᆶ9࿋ڦ ݴՐ୲LjڍፌٷඹႹmuჽྺ431 (0x1AF)ăਸ๔ڦፌॅۅሞჽ၍ڦዐक़Ljሀྺ216 (0xD8)ă 46. Muჽ੦4स٪ഗ(ں0x3A) ࿋ [7:0] ఁ MUDLY[8:1] ௮ຎ ኄၵ࿋ᇑस٪ഗ0x39ዐڦ࿋7ᅃཞದዃՊײmuჽǗ໙݆ٗ༬ۨmuჽኵਸ๔ăۯఇ๕ူLj ᅜႀMUDLY࿋ă߶ጷఇ๕ူLjᅜ࣮֑܁ᄣMUDLYኵăُჽ၍ኵᆶ9࿋ݴڦՐ୲LjڍፌٷඹႹmu ჽྺ431 (0x1AF)ăਸ๔ڦፌॅۅሞჽ၍ڦዐक़Ljሀྺ216 (0xD8)ă 47. ଉୁۉײ1स٪ഗ(ں0x3C) ࿋ [7:0] ఁ FSC[7:0] ௮ຎ ُस٪ഗᇑस٪ഗ0x3Dዐڦ࿋[1:0]ᅃཞยዃDACڦଉୁۉײă߸ܠ႑တ९एጚۉუᇸևݴă ยዃDŽԈઔस٪ഗ0x3D[1:0]Dž 0000000000 … 1000000000 … 1011010000 … 1111111111 ଉ(ୁۉײmA) 8.6 … 20 (ఐණ) … 25 … 32.1 48. ଉୁۉײ2स٪ഗ(ں0x3D) ࿋ ఁ ௮ຎ [7:2] [1:0] ԍା FSC[9:8] ԍାă ኄၵ࿋ᇑस٪ഗ0x3CዐڦFSC[7:0]࿋ᅃཞยዃDACڦଉୁۉײă߸ܠ႑တ९47ࢅएጚۉუᇸևݴă 49. ६၎ഗ੦स٪ഗ(ں0x3E) ࿋ ఁ ௮ຎ 7 6 5 4 [3:0] PHZ_PD ԍା CMP_BST AUTO_CAL PHZ_DET_BIAS[3:0] ࠲६၎ഗăُ࿋ৈሞ߾๑ᆩLjᆌยྺ0ă ԍାă Բডഗืუăُ࿋ৈሞ߾๑ᆩLjᆌ๔ዕยྺ1ă ُ࿋ৈሞ߾๑ᆩLjᆌ๔ዕยྺ1ă ኄၵ࿋၂๖ܾዘୁۉă൩ကႀኄၵ࿋DŽৈሞ߾๑ᆩDžă Rev. 0 | Page 38 of 76 AD9789 ߾ፕᇱ! QAMՊஓഗ MSPSĂ14࿋DACڦଳऄ QAMՊஓഗኧ7ዖփཞڦՔጚग़ඹ႙ᆙพă)࠲ᇀኧᆙ ຕጴ႑ࡽت(DSP)ᆅ)70*ăDSPఇԈઔᅃ߲QAMՊஓ พڦຫLj൩֖ለQAM႓ፗևݴă*QAMՊஓഗথ8࿋ ഗĂᅃ߲2Ԡื֑ᄣೝืߵݛᇆ၀(SRRC)୳հഗĂ16Ԡ512 ڦຕጴLjժॽഄᆙพڟ16Ă32Ă64Ă128ई256ۅ႓ፗ Ԡ֭ኵ୳հഗĂᅃ߲୲ገ࣑ഗࢅᅃ߲ްຕۙഗăຕ ዐă5࿋ްຕQAMۙᄣԨăQAMՊஓഗ߾ڦፕఇ๕ ጴথ੨ᅜথ຺߲ٳܠཚްڦڢຕຕăQAMՊஓഗኧ ཚࡗQAM/SRRCದዃस٪ഗ)स٪ഗ0x07[2:0]*ႜስă ڦ႓ፗྼຕྺ16Ă32Ă64Ă128ࢅ256ăೌా୲ገ࣑ഗཚࡗࠦ 5 ۨDAC֑ᄣ้ዓኧݴߛՐ୲ڦհ༬୲ăຕጴฉՎೕഗᅜ FROM INPUT INTERFACE ሞDC0.5 × fDACాྷݔยዃ႑ࡽăఇెंೕఇ๕ॽ ೕકቛڼࢅܾڼڟෙDACలઊຯ༬ೕ୲൶ᇘă FS 5 I Q 50ଚକᆩڦQAMᆙพഗఇ๕ᅜत၎ᆌڦ࿋ࢅ ྷݔăԨևॽݴຫQAMՊஓഗሞDOCSIS 64-QAMఇ๕ူڦ QAM/ DATA FILTER/ NCO ߾ፕݛ๕ăሞഄఇ๕ူ߾ڦፕᇱ၎ཞLjኻփࡗຕ ࿋ՊஓࢅԲ૩ဣຕᆶփཞă QAM/ DATA FILTER/ NCO 16× INTERPOLATOR AND BPF + SCALARS QAM/ DATA FILTER/ NCO 73๖ྺDOCSIS 64-QAM႓ፗăዐ၂๖QAMՊஓഗ 14-BIT 2.4GSPS DAC සࢆᆙพڟQAM႓ፗă૩සLjຕጴ111111ᆙพڟ 64-QAM႓ፗᆸฉঙڦ႓ፗۅă QAM/ DATA FILTER/ NCO SPI IRQ RS 07852-099 CMOS 16 TO 31 LVDS FALL RETIMER DATA FORMATTER/ASSEMBLER DCO 150MHz LVDS/CMOS 32 INPUT PINS AND 2 PARITY PINS QAM ENCODER 72. QAMՊஓഗ/ AD9789ీࠀڦཚࡗᅃ߲زႜྔยথ੨(SPI)ႜ੦ă CMOS 0 TO 15 LVDS RISE 8 07852-056 AD9789ᅃኝࢇକߛႠీĂ2400 70. ీࠀ֫ۥ C5 C4 C3, C2 C1 C0 Q 110,111 111,011 010,111 011,011 100,101 101,111 110,101 111,111 ຕୟ০႑ࡽت! AD9789ԈࡤڦDSPఇᅜྺݴଇևݴăڼᅃևݴຕ 110,100 111,000 010,100 011,000 100,000 101,010 110,000 111,010 ୟ০႑ࡽتLjᅜ๑ᆩ຺߲ྜඇ၎ཞڦຕୟ০ईཚڢă 71๖ྺᅃ߲ڇཚڢă๑ీई্ᆩຕୟ০ా߳ڦDSP ఇܔᆶཚڦڢᆖၚă߳ཚڢᆶ܀૬ڦࢅݣೕ୲ยዃ੦ ă 100,100 101,000 000,100 001,000 000,000 001,010 010,000 011,010 I 010,011 011,001 000,011 001,001 000,001 001,101 100,001 101,101 24-BIT NCO 0 TO fDAC /16 SRRC 2N (N = 0 TO 5) RATE CONVERTER P/Q 24-BIT 010,110 011,100 000,110 001,100 000,010 001,110 100,010 101,110 (P/Q = 0.5 TO 1) 110,011 111,001 100,011 101,001 010,001 011,101 110,001 111,101 BYPASS QAM BYPASS SRRC CH GAIN 0× TO 2× 110,110 111,100 100,110 101,100 010,010 011,110 110,010 111,110 07852-057 2 07852-129 QAM MAPPER INSCALE 100,111 101,011 000,111 001,011 000,101 001,111 010,101 011,111 71. ຕୟ০ ူ௬ຫຕୟ০ዐԈઔ߳ڦDSPఇă 73. DOCSIS 64-QAM႓ፗ Rev. 0 | Page 39 of 76 AD9789 50. փཞఇ๕ዐQAMᆙพഗڦࢅྷݔ ITU-T J.83 B B A A AࢅC AࢅC AࢅC 1 ௮ຎ SPIस٪ഗ 0x07 MAPPING[2:0]࿋ DOCSIS 64-QAM DOCSIS 256-QAM DVB 16-QAM DVB 32-QAM DVB 64-QAM DVB 128-QAM DVB 256-QAM փᆩ 000 001 010 011 100 101 110 111 ࿋ྷݔ ࿋ B7 B6 B5 B4 B3 B2 B1 B01 −14 +14 −15 +15 −15 +15 −15 +15 −14 +14 −11 +11 −15 +15 X X C5 C4 C3 C2 C1 C0 C7 C6 C5 C4 C3 C2 C1 C0 X X X X C3 C2 C1 C0 X X X C4 C3 C2 C1 C0 X X C5 C4 C3 C2 C1 C0 X C6 C5 C4 C3 C2 C1 C0 C7 C6 C5 C4 C3 C2 C1 C0 X = ࠲ ߲႓ፗܔۅᆌᅃ߲I/QፖՔܔLjස74๖ăዐ၂๖ Քଉ କ64-QAM႓ፗዐڦଇ߲ࡽޙǖI = 14ĂQ = 14)ڼ1ࢅ*ܔI = 6Ă ՔଉఇৈሞಖୟQAMᆙพഗ้ᆶၳăINSCALE[7:0]ڦ Q = −10)ڼ2*ܔă ኵሞस٪ഗ0x09[7:0]ዐႜยዃăຕᆩڦԲ૩ဣຕ ྺକ๖I/QፖՔۅLj๑ᆩ5࿋ܾցஓຕă૩සLjQAMՊ ཚࡗူ๕ऺ໙ǖ ஓഗڦ011101ᆙพڟQAM-64႓ፗڦI = 6ĂQ = −10࿋ዃLj ScaleFactor ᅺܸᄣԨྺI = 00110ĂQ = 10110ă 32 ُဣຕ༵ࠃ07.96875ڦຕྷݔݣLjօྺ0.03125ă SYMBOL I = 14, Q = 14 I = 01110, Q = 01110 Q INSCALE[7:0] ఐණኵ0x20ܔᆌڦԲ૩ဣຕྺ1ăස76๖LjՔଉఇ ڦ຺ปྺፌথৎڦ16࿋ኵăසࡕגፌٷኵई 14 ፌၭኵLjॽԥၥհྺኟईଉײኵ(0x7FFFई0x8000)ă 10 6 –14 –10 –6 –2 2 8 2 6 10 INSCALE 14 07852-100 ROUND SATURATE 76. Քଉ I –2 SRRC୳հഗ ೝืߵݛᇆ၀(SRRC)୳հഗܔຕኴႜ2Ԡ֭ኵࢅ୳հ֡ –6 ፕăߵDOCSISĂEuro-DOCSISࢅDVBՔጚLjSRRC୳հഗਏ ᆶཚټĂࡗࢅټ܉ፆټᄲ൱ă –10 ྺକڟٳᆶՔጚڦᄲ൱Ljαኵᅜยዃྺ0.12Ă0.13Ă0.15ई 07852-058 –14 SYMBOL I = 6, Q = –10 I = 00110, Q = 10110 74. IࢅQࡽޙᆙพ 0.18ăኵሞस٪ഗ0x07[5:4]ዐႜยዃăೕ୲fNᆯຕ հ༬୲ਦۨă77၂๖କSRRC୳հഗڦၚᆌ༬Ⴀă SRRC୳հഗৈথ5࿋Ljᅜॽഄಖୟ(स٪ഗ0x06[6])ă සࡕSRRC୳հഗຕୟ০ዐڼᅃ߲๑ీڦఇLjሶ5࿋ 8 16 QAM MAPPER X 5 ॽ8࿋ຕጴڦ5߲MSBă SRRC 5 16 16 16 2 INSCALE BYPASS QAM BYPASS SRRC 07852-059 16 75. QAMᆙพഗࢅSRRC୳հഗၘ )Iୟ০ᇑQୟ০ྜඇ၎ཞLjࠤৈ၂๖ᅃ߲* Rev. 0 | Page 40 of 76 AD9789 10 0 –10 <0.4dB FREQUENCY –20 MAGNITUDE (dB) <0.4dB –3.01dB <–43dB –40 –50 –60 –70 fN 07852-060 (1 –α) fN –30 (1 +α) fN –80 –90 77. SRRC୳հഗ༬Ⴀ –100 –2.0 සࡕ๑ᆩSRRC୳հഗLjሶณՂႷ๑ీ4߲2Ԡ֭ኵ୳հഗă –1.5 –1.0 –0.5 0 0.5 1.0 FREQUENCY × fINPUT (Hz) 1.5 2.0 1.5 2.0 07852-103 0dB 80. 2Ԡӷ֭ټኵ୳հഗ1ڦၚᆌ༬Ⴀ ഄᇱᅺLjሞ߲֑ᄣfDAC/16୲้LjSRRC୳հഗณႴᄲ 12้߲ዓዜ֍ీኟ߾ፕă ӷ֭ټኵ୳հഗ! 10 0 AD9789ᅜ૧ᆩ5߲ಖୟӷ֭ټኵ୳հഗLjሞຕୟ০ዐ –10 ༵ࠃ1Ԡ32Ԡ֭ኵăӷ֭ټኵ୳հഗཚࡗस٪ഗ0x06[4:0] հഗ0Ljምಖୟ୳հഗ1Ljᅈُૌླྀăگཚ୳հഗڦೕ୲ၚᆌ ස7982๖ăᆶ୳հഗۼਏᆶ0.8 × fINPUTڦཚټLjഄ ዐfINPUTྺ߳୳հഗڦ܋ຕ୲ăᆶ୳հഗڦཚټೝ །܈ሞ0.01 dBాྷݔă୳հഗ0Ă୳հഗ1ࢅ୳հഗ2ڦፆټ –20 MAGNITUDE (dB) ႜ੦ăྺକูۉLjಖୟኄၵ୳հഗڦডॅຩႾံಖୟ୳ –30 –40 –50 –60 –70 ປ३ࡗג85 dBLj୳հഗ3ࢅ୳հഗ4ࡗג75 dBă –80 2 0 –1.5 07852-101 BYPASS REGISTER 0x06[4:0] 10 0 78. 2Ԡӷ֭ټኵ୳հഗڦᇱ –10 –20 MAGNITUDE (dB) 10 0 –10 –20 –30 –30 –40 –50 –60 –70 –40 –80 –50 –100 –1.875 –70 –80 –1.250 –0.625 0 0.625 FREQUENCY × fINPUT (Hz) 1.250 82. 2Ԡӷ֭ټኵ୳հഗ3和４ڦၚᆌ༬Ⴀ –90 –1.5 –1.0 –0.5 0 0.5 1.0 FREQUENCY × fINPUT (Hz) 1.5 2.0 79. 2Ԡӷ֭ټኵ୳հഗ0ڦၚᆌ༬Ⴀ Rev. 0 | Page 41 of 76 1.875 07852-105 –90 –60 07852-102 MAGNITUDE (dB) –0.5 0 0.5 1.0 FREQUENCY × fINPUT (Hz) 81. 2Ԡӷ֭ټኵ୳հഗ2ڦၚᆌ༬Ⴀ 1 –100 –2.0 –1.0 07852-104 –90 –100 –2.0 AD9789 ֑ᄣ୲ገ࣑ഗ! ๖૩! ֑ᄣ୲ገ࣑ഗ(SRC)ڦፕᆩ๑հ༬୲ᇑDAC߸ႎ୲ DOCSISᆌᆩᆶᅃ߲ዷဣཥ้ዓLjഄ߾ፕೕ୲ྺfMASTERăኧ ڦԲኵ߸ਏଳऄႠă຺߲ཚࣅڢຕୟ০߳ࡤᅃ߲֑ᄣ୲ ܠዖཚڢհ༬୲Ljᆶኄၵհ༬୲ۼዷ้ዓݴڦೕLj ገ࣑ഗ(SRC)Lj༵ࠃ0.51.0ڦాྷݔຕ୲ገ࣑ă୲ ᅜᆩူ๕๖ǖ ገ࣑ဣຕᆯଇ߲24࿋ኵ)PࢅQ*ڦԲኵႜยዃă83ྺSRCڦ ᇱLjᅜੂፕᅃ߲֭ኵఇLjࢫথ୳հࢅ؏ൽఇ ă ྺྜඇԍfBAUDփՎLjՂႷፁײݛ๕1ăྺُLjॽDAC֑ᄣ ೕ୲ስྺీፁ႑ࡽࢅټೕ୲ᄲ൱ڦfMASTERԠೕă् Q 24 P ยfMASTER = 10.24 MHzLj႑ࡽټᄲ൱ྺ32 MHzई߸ߛLjኧ 07852-106 P 24 Q ڦೕټፌߛٳ1 GHzLjሶስᅜူDAC֑ᄣೕ୲ǖ 83. ֑ᄣ୲ገ࣑ഗڦᇱ PࢅQڦኵᆯ࿋ᇀں0x16ں0x1BڦP[23:0]ࢅQ[23:0]स٪ ഗՊײยዃă ॽײݛ๕4ࢅײݛ๕5ײݛپ๕1Ljײݛڟڥ๕6ă 51. ֑ᄣ୲ገ࣑ഗڦस٪ഗ࿋ዃ ࿋ [23:16])ጴব2* [15:8])ጴব1* [7:0])ጴব0* ݴጱ(P) स٪ഗ0x1B स٪ഗ0x1A स٪ഗ0x19 ݴజ(Q) स٪ഗ0x18 स٪ഗ0x17 स٪ഗ0x16 ๑ీSRRC୳հഗࢅ4߲ӷ֭ټኵ୳հഗॽڞዂጺ֭ኵᅺጱIڪ ኍܔႴڦհ༬୲(fBAUD)ࢅDAC้ዓೕ୲(fDAC)LjڦPࢅQ ᇀ32ăᆩ32༺پIժࣅ०ײݛ๕6Ljײݛڟڥ๕7ă ኵᆌ๑ူ๕ׯ૬ă සമຎLjNࢅMᆯႴڦհ༬୲ߴă૩සLj्ยհ༬୲ྺ ഄዐIྺSRRC୳հഗࢅ5߲ӷ֭ټኵ୳հഗڦጺ֭ኵԲă සࡕײݛ๕1ׯ૬Ljհ༬୲fBAUDॽྜඇԍփՎă୲ገ 5.0569 MHzLjሶڥM = 401N = 812ă ࣑ࡗײփࣷᆅ֘ᇆೕ୲ೋᅎဃֶă PࢅQኵڦስՂႷࢇޙᅜူଇ߲ሀຐཉॲǖ ኄᄣՍీٗײݛ๕9ݴڦጱࢅݴజڥPࢅQڦኵă ᆯᇀQڦኵՂႷྺMSBܔഋLjᅺُଇ߲ຕᅜᅎۯ11࿋Ljڞ ײݛ๕3๖QڦኵՂႷႜᅎ࿋Lj๑ഄMSBዃ1ă ሞܠຕဣཥዐLjհ༬୲ྺߴۨኵLjDAC֑ᄣ୲ՂႷፁࠕ ዂፌዕڦPࢅQኵݴ՚ྺ0xB1A000ࢅ0xC80000ă ߛLjᅜኧ႑ࡽࢅټೕ୲ᄲ൱ăႹܠ൧ူLjႴᄲॽ एټຕጴฉՎೕഗ! DAC้ዓ୲ยዃྺဣཥ้ዓ୲ڦԠຕăူ૩ຫසࢆሞ ૧ᆩຕጴฉՎೕഗLj߳एټཚڢᅜሞDCfDAC/16ڦాྷݔ ኄዖဣཥዐስPࢅQڦኵă ඪࢆ࿋ዃă຺߲ཚ߳ڢጲڦዐ႐ೕ୲ᅜཚࡗस٪ഗՊײLj ᆯ24࿋ೕ୲ۙၿጴ)FTW 0FTW 3*ႜยዃăኍ߳ܔཚڦڢ ၙዐ႐ೕ୲Ljᅜཚࡗူ๕ऺ໙FTWǖ Rev. 0 | Page 42 of 76 AD9789 ऺ໙߳ڦڥཚڢFTWᆌ52ଚڦस٪ഗ࿋ዃă ຕጴఇฉՎೕഗ! 52. ߳ཚڢFTWڦस٪ഗ࿋ዃ AD9789 DSPᆅܾڼڦևࠃ༵ݴසူࠀీǖॽ຺߲ຕୟ০ Channel 1 Reg. 0x0F Reg. 0x0E Reg 0x0D Channel 2 Reg. 0x12 Reg. 0x11 Reg 0x10 Channel 3 Reg. 0x15 Reg. 0x14 Reg 0x13 ڦࢇժڟᅃ߲ఇዐLjۙኝཚڢఇLjܔDACඇ୲ ႜ16Ԡ֭ኵLjᅜतኴႜټཚ୳հ֡ፕLj๑ཚڢఇీࠕݣሞ DACలઊຯ༬ټዐڦඪࢆ࿋ዃă DATAPATH 0 FTWยዃຕጴ੦ናږഗ(NCO)ׂิڦኟ၀ࢅᇆ၀႑ࡽڦ ೕ୲ăNCOްڦຕױᅜຕୟ০႑ࡽLjॽ႑ࡽۙ DATAPATH 1 ڟႴڦೕ୲ă84๖ྺएټຕጴฉՎೕഗڦᇱ ă DATAPATH 2 DATAPATH 3 FTW NCO FREQUENCY TUNING WORD 07852-107 SIN COS 24 DIGITAL BLOCK UPCONVERTER SUM SCALE BPF fC = 0 TO fDAC/2 BPF fC 07852-109 Channel 0 Reg. 0x0C Reg. 0x0B Reg 0x0A 16× INTERPOLATOR FTW [23:16] [15:8] [7:0] 86. ຕጴఇฉՎೕഗీࠀڦ ူ௬ॽၘဦຫຕጴఇฉՎೕഗ߲߳ڦఇă 84. एټຕጴฉՎೕഗڦᇱ ൱ࢅۅՔଉ! ߲ڇཚڢՔଉ ൱ࢅۅՔଉఇ຺߲ܔཚڢ൱ࢅăSUMSCALE[7:0]ڦኵሞस ຕୟ০ዐڦፌࢫᅃ߲ఇ8࿋Քଉ(स٪ഗ0x25स٪ഗ ٪ഗ0x08ዐႜยዃăຕᆩڦԲ૩ဣຕཚࡗူ๕ऺ໙ǖ 0x28)Ljᆩᇀցీᇜ֑ڦڟᄣࢅᆘॲࡐইă߳ཚڢᆩڦ ScaleFactor Բ૩ဣຕཚࡗူ๕ऺ໙ǖ ScaleFactor SUMSCALE[7 :0] 64 CHANxGAIN[7 :0] ُဣຕ༵ࠃ03.984375ڦຕྷݔݣLjօٷၭྺ 128 0.015625ăఐණኵ0x0DܔᆌڦԲ૩ဣຕྺ0.203125ă൩ጀᅪLj ཚڢሺᅮྺྷݔ01.9921875Ljօٷၭྺ0.0078125ăසࡕႴ ܔཚڢ൱ࢅ้LjසࡕࢅኵגፌٷईፌၭଉײኵDŽ0x7FFF ᄲLjॽԲ૩ဣຕยྺ0Ljܸٗൟযںཕᆩ߲ڇཚڢă ई0x8000DžLjॽሞ൱ࢅۅՔଉఇڦܔ܋ഄႜၥհت ăසࡕ๑ᆩ߳ཚڦڢ16࿋ྜኝྷݔLjሶᆌॽࢅՔଉยྺ 53. ཚڢሺᅮՔଉڦस٪ഗ࿋ዃ CHANxGAIN ཚڢ0 ཚڢ1 ཚڢ2 ཚڢ3 [7:0] स٪ഗ0x25 स٪ഗ0x26 स٪ഗ0x27 स٪ഗ0x28 0x10 (0.25)Ljᅜ௨݀ิၥհă TO SATURATION COUNTER SATERR REGISTER 0x03[1] ROUND SATURATE 8 SUMSCALE REGISTER 0x08 85. ߲ڇཚڢሺᅮ੦ 07852-110 CHANxGAIN[7:0] 07852-108 8 ROUND SATURATE 87. ൱ࢅۅՔଉ ํा֡ፕዐLjཚࡗ༵ߛࢅԲ૩ဣຕժሎႹณଉڦၥհLjᅜ ߀ཚڦڢ႑ሯԲ(SNR)ăසࡕၥհ้क़܌ณ݀ิLjሶ ডڦٷ႑ࡽ܈ޗᅜ߀႑ሯԲă Rev. 0 | Page 43 of 76 AD9789 54ଚକ߳QAMᆙพഗఇ๕ॺڦᅱࢅԲ૩ኵăඓۨॺᅱࢅ 0 Բ૩ኵڦཉॲMER/EVM֪ଉࡕࢅೕ܈كăၥհࣷڞዂ ஞ؋ሯำLj၄ྺሯڹຨक़ሺेLjኄᅜٗೕዐ –20 ፌၭăኄၵ֪ኍܔ1ୟĂ2ୟĂ3ୟࢅ4ୟሜհሞሀ850 MHz้ྜׯăᆯᇀၥհీ݀ิሞDACኮࢫڦRF૾ዐLjᅺُ ᆌሞࢅԲ૩ስཉॲዐሺेBER֪Ljᅃօሞဣཥْ֫ᄓኤ ኄၵኵă MAGNITUDE (dB) ࠵ִڟăስኄၵࢅԲ૩ኵڦణڦ๑ሯڦڹຨक़ሺेই ࢅԲ૩ኵDŽๆDž ມཚڢ 3ཚڢ 28 22 4ཚڢ 16 54 34 26 20 54 34 26 20 80 50 38 30 54 34 26 20 54 34 26 20 54 34 26 20 0 0.5 1.0 1.5 FREQUENCY (GHz) 07852-062 –100 2.0 89. ټཚ୳հഗၚᆌDŽ200MHzLjfADC = 2.4 GHzDž 0 –20 MAGNITUDE (dB) –40 –60 –80 16Ԡຕጴۙټཚ୳հഗ ຕጴټཚ୳հഗᇑᅃ߲ࠦۨ16Ԡ֭ኵഗ)९88*ದࢇ๑ᆩă16 –100 Ԡ֭ኵ୳հഗሞDACڦలઊຯ༬ೕิׂټएټ႑ࡽڦ16߲ 0 ၟăࢫՂႷۙၿຕጴټཚ୳հഗLjᅜՍᅞ15߲ᆩ 0.5 1.0 1.5 FREQUENCY (GHz) 07852-063 DVB 16-QAM DVB 32-QAM DVB 64-QAM DVB 128-QAM DVB 256-QAM DOCSIS 64-QAM DOCSIS 256-QAM 1ཚڢ 48 –60 –80 54. ᆶQAMᆙพഗఇ๕ࢅཚڢຕॺڦᅱࢅԲ૩ኵ QAMఇ๕ –40 2.0 90. ټཚ୳հഗၚᆌDŽ1 GHzLjfADC = 2.4 GHzDž ၟăټཚ୳հഗڦዐ႐ೕ୲ᅜยዃሞDCfDAC/2ڦాྷݔඪ ࢆ࿋ዃăټཚ୳հഗዐ႐ೕ୲ۙڦၿጴᅜཚࡗူ๕ऺ໙ǖ 0 ᆯُۙڟڥၿጴྺᅃ߲16࿋ኵLjഄዐߛጴবႀस٪ഗ0x1D [7:0]Ljگጴবႀस٪ഗ0x1C[7:0]ă MAGNITUDE (dB) –2 –4 –6 –10 0 88. 16Ԡۙټཚ୳հഗڦᇱ ୳հഗፆۨࠦټڦټሞሀfDAC/64LjᅺُᆶၳྺټfDAC/64ă ٗ8991ᅜླྀ֪Lj฿ۙీڞዂ၄ၟLjܔణՔ႑ ࡽுᆶᆖၚईᆖၚၭă Rev. 0 | Page 44 of 76 20 40 FREQUENCY (MHz) 60 91. ټཚ୳հഗཚၘټ൧(fADC = 2.4 GHz) 80 07852-064 –8 AD9789 fDAC 16 TO 1024 ຕୟ০ዐڦඪࢆ႑ࡽتఇۼᅜ๑ᆩăཚڢስഗఇ ๕ኧڦፌٷհ༬୲ྺfDAC/48ă P0 P1 CMOS 16 TO 31 LVDS FALL FS DCO ሞQDUCఇ๕ዐ)स٪ഗ0x20[3] = 1*Ljথ੨ࠦۨሞ32࿋ጺ၍ ܈Ljኻీথ1߲ཚްڦڢຕຕăᆩڦ႑ࡽت݆ݛ֭ ኵ)16Ԡ512Ԡ*Ă୲ገ࣑)0.51.0*ࢅްຕۙăQDUCఇ CLK CTL DATAUP TO 32 BITS PATH 2 fDAC fDAC DATAUP TO 32 BITS PATH 1 16 32 UP TO DATA32 BITS PATH 3 SUM SCALE BPF fC = 0 TO fDAC/2 BPF fC 92. ཚڢስഗఇ๕ 55. ཚڢስഗఇ๕ኧڦথ੨ದዃ ๕ኧڦፌٷհ༬୲ྺfDAC/16ă ڼᅃ߲๑ీڦ ఇ ጺ၍܈स٪ ഗ0x21[6:5] ຕ܈स ٪ഗ0x21[4] ຕ߭๕स ٪ഗ0x21[3] ሞཚڢስഗࢅQDUCଇዖఇ๕ူLjຕጺ၍ᅜཚ QAMՊஓഗ 32࿋ 16࿋ 8࿋ 4࿋ 32࿋ 16࿋ 8࿋ 4࿋ 32࿋ 16࿋ 8࿋ 8࿋ 8࿋ 8࿋ 8࿋ 8࿋ 8࿋ 8࿋ 8࿋ 16࿋ 16࿋ 16࿋ ํຕ ํຕ ํຕ ํຕ ްຕ ްຕ ްຕ ްຕ ްຕ ްຕ ްຕ ࡗCMOS_BUSᆅগ(L14)ದዃྺথLVDSईCMOSຕăසࡕ CMOS_BUSઙ3.3 VLjሶຕጺ၍ᅜದዃྺথCMOS )D[31:0]ĂP0ࢅP1*ăසࡕCMOS_BUSઙ0 VLjሶຕጺ၍ ᅜ ದ ዃ ྺ থ LVDS ) D[15:0]PĂ D[15:0]NĂ PARPࢅ SRRC୳հഗ PARN*ă AD9789ዐڦຕཚࡗଇ߲႑ࡽ༵ࠃăڼᅃ߲ຕ้ዓ ႑ࡽ(DCO)Ljᆩᇀٗຕጴຕᇸ้ዓຕăDCO ֭ኵ୳հഗ DACCLKݴڦೕă߲ܾڼኡཞօ႑ࡽ(FS)Ljᆩᇀ൩൱ᅃ߲ႎ ຕጴăFS႑ࡽڦೝೕ୲ڪᇀຕࡽޙڦ୲ईհ༬୲ă ཞ ຕ ጺ ၍ ᅃ ᄣ Lj DCOࢅ FS႑ ࡽ ᄺ ᅜ ཚ ࡗ සࡕQAMՊஓഗຕୟ০ዐڼᅃ߲๑ీڦఇLjሶຕ ܈ᆌยྺ8࿋ጴࢅํຕຕ߭๕ăසࡕSRRC୳հഗຕୟ CMOS_CTRLᆅ গ (M14)ದ ዃ ྺ LVDSई CMOS ă ස ࡕ ০ዐڼᅃ߲๑ీڦఇLjሶຕ܈ᆌยྺ8࿋ጴࢅްຕຕ CMOS_CTRLઙ3.3 VLjDCOࢅFSॽፕྺCMOS႑ࡽݴ՚ሞ ߭๕ăසࡕQAMՊஓഗࢅSRRC୳հഗԥಖୟLjሶຕ܈ P14ࢅ N14ᆅ গ ) CMOS_DCOࢅ CMOS_FS* ă ස ࡕ ᆌยྺ16࿋ጴࢅްຕຕ߭๕ă CMOS_CTRLઙ0 VLjDCOࢅFSॽፕྺLVDS႑ࡽݴ՚ሞN13Ă! P13ĂL13ࢅM13ᆅগDŽDCOPĂDCONĂFSPࢅFSN*ă ཚڢስഗఇ๕ዐڦᆅগᆙพ! ሞCMOSఇ๕ዐ)CMOS_BUSࢅCMOS_CTRLᆅগྺ3.3 V*Lj߳ ཚڢስഗఇ๕ ዖথ੨܈ၜᇑAD9789ᆅগڦᆙพ࠲ဣස56๖ă ሞཚڢስഗఇ๕ዐLjຕጴথ੨ਏᆶՊײጺ၍܈Ăຕ ࢅ܈ຕ߭๕ăጺ၍܈ኸAD9789܋ຕጴຕጺ၍ڦ 56. ߳ዖথ੨ڦ܈CMOSᆅগݴದ ܈Ljᅜยዃڟ4Ă8Ă16ई32࿋থ੨ăຕ܈ኸ থ੨܈ 4࿋ 8࿋ 16࿋ 32࿋ ຕጴຕୟ০܋ຕాڦև܈Ljᅜยዃྺ8࿋ई16࿋ ăຕ߭๕ᅜยዃྺํຕຕईްຕຕăኧڦথ੨ ఇ๕ଚ९55ă Rev. 0 | Page 45 of 76 ᆅগݴದ D[3:0] D[7:0] D[15:0] D[31:0] BUSWDTH[1:0] 00 01 10 11 07852-112 32࿋ጺ၍܈Ljժᅜথፌܠ4߲ཚްڦڢຕຕăຕጴ DATAUP TO PATH 32 BITS 0 16× INTERPOLATOR ሞཚڢስഗఇ๕ዐ)स٪ഗ0x20[3] = 0*Ljথ੨ᅜದዃྺ4 PROGRAMMABLE DATA FORMATTER/ASSEMBLER ኟຕጴฉՎೕഗ(QDUC)ఇ๕ RETIMER t ཚڢስഗఇ๕ CMOS 0 TO 15 LVDS RISE LVDS/CMOS t 32 INPUT PINS AD9789ದዃྺଇዖዷᄲຕጴথ੨߾ፕఇ๕ǖ 4 TO 32 BITS ຕጴথ੨ఇ๕! AD9789 ሞLVDSఇ๕ዐLj߳ዖথ੨܈ၜᇑAD9789ᆅগڦ ๖૩3 ᆙพ࠲ဣස57๖ăසࡕথ੨܈ยྺ32࿋Ljথ੨ॽՎ ኍ֑ܔᆩ16࿋ጺ၍܈Ă8࿋ຕ܈Ăްຕຕ߭๕ժ ׯມԠຕ୲(DDR)ăሞDDRఇ๕ူLjമ16࿋ሞຕ֑ ๑ీ຺߲ཚڦڢLVDSথ੨Lj൩൱ຕࢫLjᇨ܋੨ ᄣ้ዓ(DSCLjᇑDCOཞօ)ڦฉืᄂ֑ᄣLjࢫ16࿋ሞ ڦຕස60๖ă DSCူڦইᄂ֑ᄣăᆶഄথ੨܈ྺڇԠຕ୲ 60. LVDSᆅগᆙพǖጺ၍ = ܈16࿋Ljຕ = ܈8࿋Lj ຕ߭๕ = ްຕLj຺߲ཚڢ1 (SDR)LjຕሞDSCူڦইᄂ֑ᄣă 57. ߳ዖথ੨ڦ܈LVDSᆅগݴದ থ੨܈ 4࿋ 8࿋ 16࿋ 32࿋ ᆅগݴದ D[3:0]P, D[3:0]N D[7:0]P, D[7:0]N D[15:0]P, D[15:0]N D[15:0]P、D[15:0]N ฉืᄂࢅူইᄂ BUSWDTH[1:0] 00 01 10 11 ᅜӷጴবईጴবݛ๕ेሜ้Ljံᆌेሜߛӷጴবईጴ বLjनံेሜཚڢ1ڦຕLjࢫᅈْेሜཚڢ2Ăཚڢ3 ࢅཚڢ4ڦຕăසࡕްຕຕ߭๕Ljሶᆌံेሜຕ ጴڦཞ၎ևݴLjምेሜኟևݴăړ߲ཚڦڢຕሞా ևႜፇࢇ้Ljຕጺ၍ྺMTCܔഋăူ௬ब߲๖૩ຫ ኍܔփཞڦದዃথ੨සࢆᆙพăᆶ࠲༬ۨದዃසࢆᆙพڦ ߸ܠ႑တLj֖९ཚڢስഗఇ๕ڦDNPTࢅMWETᆅগᆙ พևݴă! ๖૩1! ኍ֑ܔᆩ43࿋ጺ၍܈Ă9࿋ຕ܈Ăํຕຕ߭๕ժ ๑ీ຺߲ཚڦڢDNPTথ੨Lj൩൱ຕࢫLjᇨ܋੨ ڦຕස69๖ă 58. CMOSᆅগᆙพǖጺ၍ = ܈32࿋Ljຕ = ܈8࿋Lj ຕ߭๕ = ํຕLj຺߲ཚڢ1 DCO 1 1 D[31:24] R3 D[23:16] R2 D[15:8] R1 DCO 1 2 3 4 1 D[15:8]P, D[15:8]N Q0 Q1 Q2 Q3 D[7:0]P, D[7:0]N I0 I1 I2 I3 I๖ሜߴۨཚްڦڢຕຕཞ၎ၜLjQ๖ഄኟၜǗ IईQኮࢫڦຕጴྺཚࡽڢă ๖૩4 ኍ֑ܔᆩ32࿋ጺ၍܈Ă8࿋ຕ܈Ăްຕຕ߭๕ժ ๑ీ຺߲ཚڦڢLVDSথ੨Lj൩൱ຕࢫLjᇨ܋੨ ڦຕස61๖ă 61. LVDSᆅগᆙพǖጺ၍ = ܈32࿋Ljຕ = ܈8࿋Lj ຕ߭๕ = ްຕLj຺߲ཚڢ1 DCO2 1ฉื 1ူই 2ฉื 2ူই D[15:8]P, D[15:8]N Q0 Q1 Q2 Q3 D[7:0]P, D[7:0]N I0 I1 I2 I3 1 I๖ሜߴۨཚްڦڢຕຕཞ၎ၜLjQ๖ഄኟၜǗ IईQኮࢫڦຕጴྺཚࡽڢă 2 “ฉื”๖ሞDCOxڦฉืᄂइڥຕǗ “ူই”๖ሞDCOxူڦইᄂइڥຕă ཚڢስഗఇ๕ዐڦDCOࢅFS୲ DCO႑ࡽᅃ߲ຕ้ዓLjᆩᇀٗຕጴຕᇸຕ ăDCODAC้ዓݴڦೕăFS႑ࡽᆩᇀ൩൱ႎຕ D[7:0] R0 ጴăFS႑ࡽ(fFS)ڦೝೕ୲ڪᇀຕࡽޙڦ୲ईհ༬୲ (fBAUD)ăFSᆩፕ൩൱၍ୟLj้ႾᆌٗDCOइڥăDCO႑ࡽ R๖ሜߴۨཚํڦڢຕຕǗRኮࢫڦຕጴྺཚࡽڢă ๖૩2 ڦೕ୲(fDCO)Ăհ༬୲(fBAUD)ࢅDAC้ዓೕ୲(fDAC)࠲ڦဣස ኍ֑ܔᆩ32࿋ጺ၍܈Ă8࿋ຕ܈Ăްຕຕ߭๕ժ ူǖ ๑ీ຺߲ཚڦڢCMOSথ੨Lj൩൱ຕࢫLjᇨ܋੨ f DAC = I × ڦຕස59๖ă 59. CMOSᆅগᆙพǖጺ၍ = ܈32࿋Ljຕ = ܈8࿋Lj ຕ߭๕ = ްຕLj຺߲ཚڢ1 DCO 1 2 1 D[31:24] Q1 Q3 D[23:16] I1 I3 D[15:8] Q0 Q2 I๖ሜߴۨཚްڦڢຕຕཞ၎ၜLjQ๖ഄኟၜǗ IईQኮࢫڦຕጴྺཚࡽڢă D[7:0] I0 I2 P × 16 × f BAUD Q f DCO = f DAC / (16 × N ) (1) (2) ഄዐǖ Iྺ֭ኵᅺጱLjഄྺྷݔ164ă P/Qྺ୲ገ࣑ဣຕ(0.51.0)ă NྺՊײDCOݴೕဣຕLjཚࡗस٪ഗ0x22[6:4]ዐڦ DCODIV[2:0]࿋ยዃă DCODIV[2:0]ยྺ1Ă2ई4Ǘยྺ0้LjDCO্ᆩǗยྺ3 ้ၳăDSC႑ࡽڦೕ୲๔ዕڪᇀDCOă Rev. 0 | Page 46 of 76 AD9789 ስথ੨ದዃമLjॽDCOೕ୲أᅜဣཥॽ๑ᆩڦፌߛೕ୲ සࡕ๑ీڦཚڢຕጺၭᇀ4Ljܸᆩࢽփٶ໙ۯༀ๑ీ հ༬୲LjժॽڥኵൽኝăࡕनྺFSஞ؋ኮक़ᆩڦ ࢅ্ᆩཚڢLjሶॽཚڢᆫံपยྺ0ፌॅስLjኄᄣد DCOዜຕ(cyclesAVAIL)ă ຕႴ้ڦዓຕࢅ/ईᆅগຕ߸ณă ⎛ f DCO ⎞ ⎟⎟ cyclesAVAIL = floor ⎜⎜ ⎝ max f BAUD ⎠ ྺକॽຕࠀׯሜᆶཚڢLjዖথ੨ದዃۼᄲ൱FSஞ ؋ኮक़٪ሞ༬ۨຕଉڦDCOዜăዜຕཚࡗူ๕ऺ ໙ǖ cyclesINTERFACE = N × F × DW BW ഄዐǖ Nྺ๑ీڦཚڢຕ(14)ăසࡕཚڢᆫံपยྺ1LjሶN๔ 62၂๖କཚڢᆫံपยྺ0ڦᅃ߲૩ጱăԨ૩ዐLjຕ থ੨ದዃྺCMOSĂ32࿋ጺ၍܈Ă8࿋ຕํࢅ܈ຕຕ ߭๕ă 62. ᆙพᇑ๑ీཚ࠲ڦڢဣLj ཚڢᆫံप = 0 ཚڢ 4߲ཚڢ ๑ీ ཚڢ0্ᆩ [D31:D24] ཚڢ3 CMOS࿋ᆙพ [D23:D16] [D15:D8] ཚڢ2 ཚڢ1 [D7:D0] ཚڢ0 ཚڢ3 ཚڢ2 ཚڢ1 ཚڢ3 ཚڢ1 ዕڪᇀ4(९ཚڢᆫံपև)ݴă ߭๕ྺްຕLjሶF = 2ă ཚڢ0 ࢅཚڢ2 ্ᆩ DWྺຕ(܈8࿋ई16࿋)ă ړཚڢᆫံपยྺ1้Ljཞᄣڦ૩ጱॽ၄փཞڦᆙพ BWྺጺ၍(܈4Ă8Ă16ई32࿋)ă ࠲ဣLjස63๖ă ྺํ၄ڦࠀׯথ੨ยऺLjFSஞ؋ኮक़ڦDCOዜຕՂႷٷ 63. ᆙพᇑ๑ీཚ࠲ڦڢဣLj ཚڢᆫံप = 1 Fپຕ߭๕ăසࡕຕ߭๕ྺํຕLjሶF = 1Ǘසࡕຕ ᇀথ੨ႴڦDCOዜຕă ยऺ๖૩ Ԩ૩ዐLjဣཥڦհ༬୲fFS = 6.4 MHzăኍ຺߲ܔཚڢĂํຕ ຕ߭๕ࢅ8࿋ຕ܈Ljසࡕထྭํ၄4࿋থ੨Ljሶ fDCOณᆌྺ8 × fFSăံ૧ᆩײݛ๕1ࢅײݛ๕2൱থ ੨܈LjഄዐN = 1ĂP/Q = 0.7ĂI = 32ă fDAC = 32 × 0.7 × 16 × 6.4 MHz = 2293.76 MHz ཚڢ 4߲ཚڢ ๑ీ ཚڢ0্ᆩ ཚڢ0 ࢅཚڢ2 ্ᆩ [D31:D24] ཚڢ3 CMOS࿋ᆙพ [D23:D16] [D15:D8] ཚڢ2 ཚڢ1 ཚڢ3 ཚڢ2 [D7:D0] ཚڢ0 ཚڢ1 ཚڢ3 ཚڢ1 ኟຕጴฉՎೕഗ(QDUC)ఇ๕ fDCO = 2293.76 MHz/(16 × 1) = 143.36 MHz fDCO/fBAUD = 22.4ăසࡕስN = 2LjሶᆩDCOዜຕ३ྺ 11Ǘ୯ڟჽኵLjُၜీփႜăᆶ࠲ჽܠ߸ڦ ႑တLj֖९ཚڢስഗఇ๕ڦჽၳᆌևݴă ሞQDUCఇ๕ዐ(स٪ഗ0x20[3] = 1)Ljຕথ੨ࠦۨሞ32࿋ ጺ၍܈Ă16࿋ຕްࢅ܈ຕຕ߭๕ăQDUCఇ๕ ူLjኻᆌ๑ీᅃ߲ཚڢăසࡕ๑ీ߲ܠཚڢLj݀ໃ߳๑ ీཚڦڢIࢅQຕॽྜඇ၎ཞăሞຕୟ০ాLjՂႷಖୟ ཚڢᆫံप QAMᆙพഗࢅSRRC୳հഗ(स٪ഗ0x06[7:6] = 11)ă CMOS 0 TO 15 LVDS RISE ᆙพᅜߵ๑ీڦཚڢຕᅎۯLjཚڢ0ਏᆶፌߛᆫံप (๑ీࢫLjਨփࣷᅎۯ࿋ዃ)ăසࡕཚڢᆫံपยྺ1Ljሶ 32 INPUT PINS ᆶ຺߲ཚۼڢྭइڥຕLj্ڍᆩཚڦڢຕॽԥࢮ ăॺᅱ֑ᆩኄዖ݆ݛLjᅺྺُ้๑ీࢅ্ᆩཚڢփࣷ๑ ຕጺ၍݀ิᅎ࿋ă P0 P1 FS DCO LVDS/CMOS ڦཚࠃ༵ڢᄣԨăኄዖದዃዐLjDUTڦཚڢ I CMOS 16 TO 31 Q LVDS FALL I AND Q 16 BITS ON I AND Q 16 BITS OFF I AND Q 16 BITS OFF I AND Q 16 BITS OFF BPF 93. QDUCఇ๕ Rev. 0 | Page 47 of 76 BPF fC = 0 TO fDAC /2 fC 07852-069 ࡕཚڢᆫံप(स٪ഗ0x20[2])ยྺ0LjഗॲኻႴྺᅙ๑ీ 16× INTERPOLATOR ๑ీࢅ্ᆩཚ้ڢLjీࣷᆖၚথ੨ڦᆙพ࠲ဣăස AD9789 QDUCఇ๕ዐڦᆅগᆙพ 1 ሞCMOSఇ๕ዐLjAD9789ᆅগڦᆙพ࠲ဣස64 A ๖ă B 3 4 7 8 69 10 5 11 7 8 69 ᆅগՊࡽ L5 P8 L9 P12 L4 M4 12 13 14 E F G H PARP J PARN K 12 13 14 A FSP L P+ 15 13 11 9 7 5 3 1 FS FSN M P– 15 13 11 9 7 5 3 1 FS DCOP N 14 12 10 8 6 4 2 0 DC DCON P 14 12 10 8 6 4 2 0 DC B 14 +LVDS C 14 –LVDS 95. LVDSຕᆅগᆙพ D QDUCఇ๕ዐڦDCOࢅFS୲ E F ሞQDUCఇ๕ዐLjDCODIVᆌ๔ዕยྺ1(स٪ഗ0x22[6:4] = G 001)ăDCO้ڦዓዜڪᇀ16߲DAC้ዓዜăኻႴᄲ16 H Ԡ֭ኵփ๑ᆩ୲ገ࣑ഗ้Ljথ੨ڦຕ୲ڪᇀ J fDCOă K L P1 31 27 23 19 15 11 7 3 BU CMOS_BUS සࡕຕୟ০ዐ๑ీᅃօ֭ኵई୲ገ࣑Ljሶথ੨ڦຕ M P0 30 26 22 18 14 10 6 2 CT CMOS_CTRL N 29 25 21 17 13 9 5 1 ୲ڪᇀfBAUDăFSڦೝ୲fFSڪᇀհ༬୲fBAUDăհ༬ FS CMOS_FS 28 24 20 16 12 8 4 0 ୲ཚࡗူ๕ऺ໙ǖ P DC CMOS_DCO f BAUD = 07852-113 D[31:0] CMOS DATA INPUTS PARITY AND CONTROL INPUTS 94. CMOSຕᆅগᆙพ f DCO P 2N × Q ഄዐǖ ሞLVDSఇ๕ዐLjAD9789ᆅগڦᆙพ࠲ဣස65 Nྺ๑ీڦ2Ԡ֭ኵ୳հഗຕă ๖ă P/Qྺ୲ገ࣑Բă 65. QDUCఇ๕ዐLVDSথ੨ڦᆅগᆙพ1 ຕ࿋ D15P, D15Nฉื D0P, D0Nฉื D15P, D15Nူই D0P, D0Nူই PARP, PARNฉื PARP, PARNူই 1 10 5 11 D ௮ຎ IຕڦMSB IຕڦLSB QຕڦMSB QຕڦLSB D[31:16]ڦആ౾ၯᄓ࿋ D[15:0]ڦആ౾ၯᄓ࿋ 2 4 07852-114 1 3 C 64. QDUCఇ๕ዐCMOSথ੨ڦᆅগᆙพ ຕ࿋ D31 D16 D15 D0 P1 P0 2 ௮ຎ IຕڦMSB IຕڦLSB QຕڦMSB QຕڦLSB D[15:0]P、D[15:0]Nฉืڦ ആ౾ၯᄓ࿋ D[15:0]P、D[15:0]Nူইڦ ആ౾ၯᄓ࿋ ᆅগՊࡽ L5, M5 N12, P12 L5, M5 N12, P12 L4, M4 FS႑ࡽ൩൱ຕLjᆶၳཚDCO้ዓLjժඓԍຕᅜኟඓ ڦհ༬୲݀ໃăසࡕP/Q = 1N = 0LjሶDCOᅜհ༬୲ ၄LjփႴᄲFSăኄዖ൧ူLjFSၳ(ԍۉߛೝ)ăDCO ႑ࡽᅜᆩፕ࢛ۨ୲้ዓLjᅜ൩൱ຕᇸ༵ࠃᄣԨă L4, M4 “ฉื”๖ሞDCOxڦฉืᄂइڥຕǗ “ူই”๖ሞDCOxူڦইᄂइڥຕă Rev. 0 | Page 48 of 76 AD9789 DCO 7 DCO CYCLES 6 DCO CYCLES 7 DCO CYCLES FS tPD tPD tPD SAMPLE 0 SAMPLE 1 SAMPLE 2 07852-115 D[31:0] DSC 96. FSᆶၳ้Ljยऺ๖૩ڦQDUCఇ๕থ੨้Ⴞ ยऺ๖૩ LVDS DATA Ԩ૩ዐLjဣཥڦDAC୲ྺ1600 MHzLjհ༬୲ྺ15 MHză 16 16 Q D CLK f DCO = f DAC/16 = 100 MHzLjᅺُf DCO/f FS = 6.667ăྺକፁ 16 Q P/Qሞ0.51.0ڦాྷݔᄲ൱LjՂႷም༵ࠃᅃ߲ڦྔܮ8Ԡ ᅺُLj20߲DCO้ዓᄂዐLjᆌᆶ3߲ڞዂຕᄣԨሜ ഗॲዐ(fFS/fDCO = 3/20)ă96၂๖Ԩ૩ዐথ੨߾ڦፕ้Ⴞă ీٷᇀ1߲DCOዜă D CLK BITS 0 TO 15 Q D CLK BITS 16 TO 31 16 Q D CLK DSC Φ 0 TO 15 SNC Φ 0 TO 13 PHZ Φ 15 ዐLjtPDܔᆌᇑሞFSฉืᄂᇑߴۨدዐڼڦᅃ߲ᄣԨ AD9789้ኮक़دڦխჽă൩ጀᅪLjtPDڦՎࣅ܈ޗ 16 Q Q D CLK 07852-071 ֭ኵᅺጱLjᅺُN = 3ă൱P/Qڥ5/6ă D CLK 16 Q D CLK 98. LVDSዘႎҾಇDSCस٪ഗ स٪ഗ0x23ࢅस٪ഗ0x21[2:0]ᅜ༵ࠃ้ႾۙኝLjٷٷই گ۶ۯǗଷᅃݛ௬LjᄺᅜॽഄยዃྺᅜူॺᅱҾඇኵǖ ዘ้ۨ֡ፕ AD9789๑ᆩᅃ߲ෙस٪ഗዘ้ۨഗăമଇ߲स٪ഗ้ڦዓ ᅜ֑ᆩٗDAC้ዓइڦڥ16߲၎࿋ዐڦඪᅃ၎࿋ăፌࢫ ᅃ߲स٪ഗ้ڦዓࠦۨᇀ၎࿋15ăՊײस٪ഗ้ዓྺຕ t -7%4ఇ๕ူLjDSCPHZ = 0LjSNCPHZ = 3LjLTNCY = 0(९ჽस٪ഗև)ݴ t $.04ఇ๕ူLjDSCPHZ = 0LjSNCPHZ = 7LjLTNCY = 0(९ჽस٪ഗև)ݴ ጴ֑ᄣ้ዓ(DSC)ࢅཞօ้ዓ(SNC)ăཚࡗስփཞڦ၎ ࿋Ljᅜ֑ۙᄣ้क़Ljܸٗۙኝຕᇸڦჽăस٪ഗ ࢫᅜሞFPGAईഄຕᇸዐႜ้Ⴞۙኝă 0x23[7:4]ยዃDSC၎࿋(DSCPHZ)Ljस٪ഗ0x23[3:0]ยዃ ൩ጀᅪLjSNCPHZስ၎࿋14ई15ࣷڞዂ้Ⴞ؋ăሞ SNC၎࿋(SNCPHZ)LjణՔኵᅜ16߲၎࿋ዐڦඪᅃ߲ă CMOSఇ ๕ ዐ Lj ॽ DSCPHZย ዃ ྺ ࢫ ᅃ օ ई ย ዃ ྺ ຕ૾ዐፌࢫᅃ߲स٪ഗ้ڦዓ๔ዕ֑ᆩ၎࿋15ă SNCPHZLjᄺࣷڞዂ้Ⴞ؋ă ആ౾ၯᄓऺຕഗᅜӻዺඓۨຕᆶၳش੨ڦՉᄂă ჽस٪ഗ CMOSఇ๕ᇑLVDSఇ๕߾ڦፕݛ๕ྺ၎ຼLjස97ࢅ ჽस٪ഗᆯस٪ഗ0x21[2:0]ႜ੦Ljᆩሞෙस٪ഗዘ 98๖ă ้ۨഗኮࢫLjᅜ๑ຕჽፌܠ7߲DCO้ዓዜLjჽ CMOS DATA 32 32 Q D CLK օྺ1߲DCO้ዓዜă࠲॰ڦዘ้ۨ֡ፕᅙሞമ௬ 32 Q D CLK Q D CLK BITS 0 TO 31 ෙ߲स٪ഗዐྜׯLjᅺُन๑ჽኵփኟඓLjᄺփࣷڞዂ ้Ⴞ؋ăჽኵਦۨనᅃ߲ຕᄣԨدዐڼڦᅃ߲ DSC Φ 0 TO 15 ᄣԨLjժॽᄣԨୟᆯ၎ᆌڦཚڢăٗFSՎྺߛۉೝڟ 07852-070 SNC Φ 0 TO 13 PHZ Φ 15 97. CMOSዘ้ۨस٪ഗ ڼᅃ߲ຕᄣԨٗዘ้ۨഗዐᆅഐݓྫڦჽᄺࣷᆶ ᆖၚăසࡕഗॲዐยዃڦჽኵփኟඓLjຕᄣԨॽ ݆ኟඓፇࢇă Rev. 0 | Page 49 of 76 AD9789 0123 4 56 7 8 16 24 32 40 48 56 64 72 SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE DCO FS LVDS DDR SAMPLE SAMPLE LVDS SDR SAMPLE SAMPLE SAMPLE SAMPLE SAMPLE CMOS SAMPLE SAMPLE SAMPLE SAMPLE 07852-116 SAMPLE 99. ჽ = 0้֑ڦᄣۅ ዘ้ۨഗࢅჽֱቴ ܔᇀLVDS DDRLj ํा֡ፕዐLjዘ้ۨഗࢅჽ֖ຕᅜ०ࣅྺᅃቧঢ়ࡗᄓ DelayOPTIMAL = ኤĂԍኤᆶၳڦ߭Lj༵ࠃٗ0ڟ100ᅜฉDAC้ዓዜݔ ྷాڦፌॅ֑ᄣۅჽă99ߴକჽ = 0้LVDS DDRĂ ܔᇀLVDS SDRLj LVDS SDRࢅCMOSথ੨ఇ๕֑ڦᄣۅă99ዐDCO႑ࡽኮ DelayOPTIMAL = ฉڦຕጴਗ਼ܔ܈ᆌᇀ66ࢅ67ዐDAC้ዓዜڦჽ ኵă DelayMEASURED + 1.6ns + 16 t DCO / 16 DelayMEASURED + 1.6ns +8 t DCO / 16 ܔᇀCMOSLj ᆌړ୯ᆅগڦჽăُჽዐLjჽྺ800 psLj ჽྺ800 psLjጺऺ1.6 nsăኄᅪ࿆ጣLjܔᇀ2.4 GHz DAC้ ዓLjDCOᇑຕᆶၳش੨ዐ႐ኮक़ڦኈኟ0ჽิ݀ሞ 66ዐڦჽยዃ4Ǘܔᇀ1.2 GHz DAC้ዓLjኈኟ0ჽิ݀ ሞჽยዃ2ă DelayOPTIMAL = Delay MEASURED + 1.6ns +8 t DCO / 16 ྺइڥፌٷᆶၳ֑ᄣش੨LjႷߵຕॺ૬ࢅԍ้ क़ۙኝ֑ᄣۅăසࡕॺ૬ࢅԍ้क़࠲ᇀDCOՉᄂܔ Ljሶሞຕش੨ڦዐ႐ስ֑ᄣ้ۅLjํ၄ፌٷᆶၳ ֑ᄣش੨ăᆶ࠲ຕॺ૬ࢅԍ้क़ܠ߸ڦ႑တLj֖ ᄲ๑ᆩ66ࢅ67LjႷᆩ༑ཀྵ༑֪AD9789ڦFSĂDCOࢅ ९CMOSথ੨้ႾևݴईLVDSথ੨้Ⴞևݴă ຕ႑ࡽăሞ๖հഗฉ࠵ִኄၵ႑ࡽڦཞ้Lj֪ଉሞ FSฉืᄂᇑڼᅃ߲ຕᄣԨਸ๔ኮक़ڦჽLjࢫሞኵ ฉሺेᆅগჽ1.6 nsăॽُጺჽࡃᅃࣅྺᅃ߲DAC้ዓ ዜăኍ߳ܔዖথ੨ఇ๕Ljߵُ֪ଉኵᅜቴᆩDAC ้ዓዜຕ๖ڦፌॅ֑ᄣۅLjܔᆌᇀ66ࢅ67ዐڦ 66ई67ዐፌॅ֑ᄣڦۅLATĂSNCࢅDSCኵLjݴ՚ᆌ ႀस٪ഗ0x21[2:0]ዐڦLTNCY[2:0]࿋Ăस٪ഗ0x23[3:0] ዐڦSNCPHZ[3:0]࿋ࢅस٪ഗ0x23[7:4]ዐڦDSCPHZ[3:0] ࿋ă ჽຕă Rev. 0 | Page 50 of 76 AD9789 66. ᆶჽኵॺڦᅱዘ้ۨഗยዃ (LVDSఇ๕) ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC 0 0 7 8 8 1 3 0 16 1 7 8 24 2 3 0 32 2 7 8 40 3 3 0 48 3 7 8 56 4 3 0 64 4 7 8 72 5 3 0 80 5 7 8 88 6 3 0 1 0 8 9 9 1 4 1 17 1 8 9 25 2 4 1 33 2 8 9 41 3 4 1 49 3 8 9 57 4 4 1 65 4 8 9 73 5 4 1 81 5 8 9 89 6 4 1 2 0 9 10 10 1 4 2 18 1 9 10 26 2 4 2 34 2 9 10 42 3 4 2 50 3 9 10 58 4 4 2 66 4 9 10 74 5 4 2 82 5 9 10 90 6 4 2 3 0 9 11 11 1 5 3 19 1 9 11 27 2 5 3 35 2 9 11 43 3 5 3 51 3 9 11 59 4 5 3 67 4 9 11 75 5 5 3 83 5 9 11 91 6 5 3 4 0 10 12 12 1 5 4 20 1 10 12 28 2 5 4 36 2 10 12 44 3 5 4 52 3 10 12 60 4 5 4 68 4 10 12 76 5 5 4 84 5 10 12 92 6 5 4 5 0 10 13 13 1 6 5 21 1 10 13 29 2 6 5 37 2 10 13 45 3 6 5 53 3 10 13 61 4 6 5 69 4 10 13 77 5 6 5 85 5 10 13 93 6 6 5 6 1 2 14 14 1 6 6 22 2 2 14 30 2 6 6 38 3 2 14 46 3 6 6 54 4 2 14 62 4 6 6 70 5 2 14 78 5 6 6 86 6 2 14 94 6 6 6 7 1 3 15 15 1 7 7 23 2 3 15 31 2 7 7 39 3 3 15 47 3 7 7 55 4 3 15 63 4 7 7 71 5 3 15 79 5 7 7 87 6 3 15 95 6 7 7 ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC 96 6 7 8 104 7 3 0 112 7 7 8 97 6 8 9 105 7 4 1 113 7 8 9 98 6 9 10 106 7 4 2 114 7 9 10 99 6 9 11 107 7 5 3 115 7 9 11 100 6 10 12 108 7 5 4 116 7 10 12 101 6 10 13 109 7 6 5 117 7 10 13 102 7 2 14 110 7 6 6 X X X X 103 7 3 15 111 7 7 7 X X X X 5 0 2 5 13 1 6 13 21 1 2 5 29 2 6 13 37 2 2 5 45 3 6 13 53 3 2 5 61 4 6 13 69 4 2 5 6 1 2 6 14 1 6 14 22 2 2 6 30 2 6 14 38 3 2 6 46 3 6 14 54 4 2 6 62 4 6 14 70 5 2 6 7 1 3 7 15 1 7 15 23 2 3 7 31 2 7 15 39 3 3 7 47 3 7 15 55 4 3 7 63 4 7 15 71 5 3 7 67. ᆶჽኵॺڦᅱዘ้ۨഗยዃ (CMOSఇ๕) ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC Rev. 0 | Page 51 of 76 0 0 7 0 8 1 3 8 16 1 7 0 24 2 3 8 32 2 7 0 40 3 3 8 48 3 7 0 56 4 3 8 64 4 7 0 1 0 8 1 9 1 4 9 17 1 8 1 25 2 4 9 33 2 8 1 41 3 4 9 49 3 8 1 57 4 4 9 65 4 8 1 2 0 8 2 10 1 4 10 18 1 8 2 26 2 4 10 34 2 8 2 42 3 4 10 50 3 8 2 58 4 4 10 66 4 8 2 3 0 9 3 11 1 5 11 19 1 9 3 27 2 5 11 35 2 9 3 43 3 5 11 51 3 9 3 59 4 5 11 67 4 9 3 4 0 9 4 12 1 5 12 20 1 9 4 28 2 5 12 36 2 9 4 44 3 5 12 52 3 9 4 60 4 5 12 68 4 9 4 AD9789 72 5 3 8 80 5 7 0 88 6 3 8 96 6 7 0 104 7 3 8 112 7 7 0 73 5 4 9 81 5 8 1 89 6 4 9 97 6 8 1 105 7 4 9 113 7 8 1 74 5 4 10 82 5 8 2 90 6 4 10 98 6 8 2 106 7 4 10 114 7 8 2 75 5 5 11 83 5 9 3 91 6 5 11 99 6 9 3 107 7 5 11 115 7 9 3 76 5 5 12 84 5 9 4 92 6 5 12 100 6 9 4 108 7 5 12 116 7 9 4 77 5 6 13 85 5 2 5 93 6 6 13 101 6 2 5 109 7 6 13 117 7 2 5 78 5 6 14 86 6 2 6 94 6 6 14 102 7 2 6 110 7 6 14 X X X X 79 5 7 15 87 6 3 7 95 6 7 15 103 7 3 7 111 7 7 15 X X X X ჽܔཚڢስഗఇ๕ڦᆖၚ ܔᇀDSCۨߴڦ၎࿋Ljຕ้ڦႾᅜDCOྺ֖ăړ DCO_INV = 0(स٪ഗ0x20[4])ĂDSCPHZ = 0(स٪ഗ0x23 [7:4])ĂDCODIV = 1(स٪ഗ0x22[6:4])้Ljփཞ࿒ူ܈CMOS ຕ้Ⴞස68๖ă68࣏၂๖କຕᆶၳش੨ (DVW)Ljথ੨ॺڦ૬ࢅԍ้क़ኮࢅăDVWྺକ ඓԍኟඓ֑ᄣLjᆶၳຕՂႷװ၄ߴഗॲڦፌ้܌क़ă 68. ၎ܔᇀDCOڦCMOSຕ้Ⴞ ࿒܈ −40°C +25°C +85°C −40°C+85°C tSፌၭኵ(ns) 4.9 5.1 5.3 5.3 tHፌၭኵ(ns) −1.4 −1.6 −1.7 −1.4 DVWፌၭኵ(ns) 3.5 3.5 3.6 3.9 සࡕDSCPHZٷᇀ0Ljሶॺ૬ࢅԍ้क़ӀtDCO/16ڦሺଉೋ ᅎLjഄዐtDCOྺຕ้ዓዜă tS = 5.3 ns − ((tDCO/16) × DSCPHZ) tH = 0.24 ns + ((tDCO/16) × DSCPHZ) DCO tS tH INPUT DATA 07852-117 ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC ჽ LAT SNC DSC DSC ሞཚڢስഗఇ๕ዐስথ੨ದዃ้LjFSஞ؋ኮक़ڦDCO 100. CMOS้Ⴞ ዜຕ(cycles AVAIL)ՂႷٷᇀথ੨ದዃႴڦDCOዜຕ ሞᅃၵথ੨ఇ๕ዐLjႴᄲኪٗڢDCOฉืᄂڟFSฉืᄂڦ (cyclesINTERFACE)ăჽࣷᆩFSኮक़ڦᅃၵᆩDCOዜă ჽă69ྺփཞ࿒ُူ܈ჽࣹڦጺă ڞዂᆩDCOዜ३ณڦᇱᅺᆶଇݛ௬ǖᅃٗAD9789 ڦFSڟAD9789܋၎ᆌຕᄣԨدݓྫڦխჽ DCO tD (LTNCY[2:0])Ljܾഗॲాڦևჽă cyclesAVAIL ≥ cyclesINTERFACE + LTNCY[2:0] + 2 07852-118 FS ྺํ၄ڦࠀׯথ੨ยऺLjՂႷፁᅜူཉॲǖ DSC CMOSথ੨้Ⴞ 101. CMOS_DCOCMOS_FSჽ ړAD9789֑ᆩCMOSথ੨ದዃ้(CMOS_CTRL = CMOS_BUS 69. CMOS_DCOᇑCMOS_FSኮक़้ڦႾჽ = 3.3 V)Lj༵ࣷࠃᅃ߲CMOSຕ้ዓ႑ࡽDCOLjᅜ ൻۯઠጲຕᇸڦຕăړDCODIV = 1้Lj႑ࡽᅜ ࿒܈ DCO FSፌٷ ჽtD, MAX (ns) DCO FSፌၭ ჽtD, MIN (ns) ຕ୲(ڪᇀfDAC/16)߾ፕăጺ၍ฉCMOSຕ֑ڦᄣ −40°C +25°C +85°C −40°C+85°C 0.64 0.71 0.85 0.85 0.28 0.4 0.49 0.28 ሞాև֑ᄣ้ዓ(DSC)ڦฉืᄂႜă൩ጀᅪLjDCOೕ୲ ڪᇀDSCೕ୲LjDCOᇑDSCڦ၎࿋࠲ဣᆯDSCPHZ(स٪ഗ 0x23[7:4])ਦۨă Rev. 0 | Page 52 of 76 AD9789 LVDSথ੨้Ⴞ ሞᅃၵথ੨ఇ๕ዐLjႴᄲኪٗڢDCOฉืᄂڟFSฉืᄂڦ ړAD9789֑ᆩLVDSথ੨ದዃ้(CMOS_CTRL = CMOS_BUS ჽă71ྺփཞ࿒ُူ܈ჽࣹڦጺă = 0 V)Lj༵ࣷࠃᅃ߲LVDSຕ้ዓ႑ࡽDCOLjᅜൻ DCO ۯઠጲຕᇸڦຕăLVDSথ੨ᅜڇԠຕ୲ tD (SDR)ईມԠຕ୲(DDR)Ljਏ༹ൽਦᇀጺ၍܈ದዃă ሞSDRዐLjຕ֑ᄣৈሞాև֑ᄣ้ዓ(DSC)ူڦইᄂ FS ڪᇀDCOೕ୲ăDCOᇑDSCڦ၎࿋࠲ဣᆯDSCPHZ(स٪ഗ DSC 103. LVDS DCOFSჽ 0x23[7:4])ਦۨăሞDDRዐLjຕ֑ᄣሞDSCڦฉืᄂࢅူ ইᄂႜLjᅺُᆶၳຕ୲ڪᇀDCOೕ୲ڦଇԠăړጺ 71. LVDS DCOᇑFSኮक़้ڦႾჽ ၍ྺ܈32࿋้Ljথ੨ኻీDDRăړDCODIV = 1้Lj DCOೕ୲ڪᇀfDAC/16ă ܔᇀDSCۨߴڦ၎࿋Ljຕ้ڦႾᅜDCOྺ֖ăړ DCO_INV = 0(स٪ഗ0x20[4])ĂDSCPHZ = 0(स٪ഗ0x23 [7:4])ĂDCODIV = 1(स٪ഗ0x22[6:4])้Ljփཞ࿒ူ܈LVDS DCO FSፌٷ ჽtD, MAX (ns) DCO FSፌၭ ჽtD, MIN (ns) −40°C +25°C +85°C −40°C+85°C 0.37 0.35 0.32 0.37 0.21 0.16 0.12 0.12 AD9789ኧሞຕጺ၍ฉႜആ౾ၯᄓăᆶෙዖആ౾ 70. ၎ܔᇀDCOڦLVDSຕ้Ⴞ tSፌၭኵ(ns) 1.04 1.23 1.41 1.41 ࿒܈ ആ౾ၯᄓ ຕ้Ⴞස70๖ă ࿒܈ −40°C +25°C +85°C −40°C+85°C 07852-120 ႜă൩ጀᅪLjDCOೕ୲ڪᇀDSCೕ୲Ljᅺُᆶၳຕ୲ tHፌၭኵ(ns) 0.24 0.16 0.03 0.24 DVWፌၭኵ(ns) 1.28 1.39 1.44 1.65 ၯᄓఇ๕ǖ౾ၯᄓĂആၯᄓࢅIQആ౾ၯᄓăሞIQആ౾ၯᄓ ఇ๕ዐLj๔ዕྭIཚڢฉڦኵྺ0LjQཚڢฉڦኵྺ1ă൩ ጀᅪLjIQആ౾ၯᄓఇ๕ᅃӯৈᆩᇀLVDSথ੨ăኄၵఇ๕ ཚࡗस٪ഗ0x20[1:0]ႜ੦ă ሞDDRఇ๕ዐLjՂႷॽኄၵॺ૬ࢅԍ้क़ᆌᆩᇀDCOڦ 72. ആ౾ၯᄓఇ๕SPIยዃ ฉืᄂࢅူইᄂăሞSDRఇ๕ዐLjՂႷॽኄၵॺ૬ࢅԍ ആ౾ၯᄓఇ๕ ൽၩആ౾ၯᄓ IQആ౾ၯᄓ ౾ၯᄓ ആၯᄓ ้क़ᆌᆩᇀDCOူڦইᄂă සࡕDSCPHZٷᇀ0Ljሶॺ૬ࢅԍ้क़ӀtDCO/16ڦሺଉೋ ᅎLjഄዐtDCOྺຕ้ዓዜă स٪ഗ0x20[1:0] 00 01 10 11 සࡕ๑ᆩആ౾ၯᄓLjሶஃFSසࢆLjدAD9789ڦ߲ tS = 1.41 ns − ((tDCO/16) × DSCPHZ) ຕጴۼᆌӵໜᅃ߲ആ౾ၯᄓ࿋ă࣑ჾኮLjኍܔ߲DCO /16) × DSCPHZ) tHH = 0.24 ns + ((tDCO DCO ՉᄂLjആ౾ၯᄓՂႷᆶၳăആ౾ၯᄓ࿋ยዃᇀᆅগL4ࢅ SINGLE DATA RATE (SDR) M4ăړথ੨ᅜCMOSఇ๕߾ፕ้Ljആ౾ၯᄓ࿋ݴ՚ DCO ྺP1ࢅP0ăړথ੨ᅜLVDSఇ๕߾ፕ้Ljആ౾ၯᄓ࿋ tS tH ݴ՚ྺPARPࢅPARNă INPUT DATA සമຎLjLVDSথ੨ᅜڇԠຕ୲(SDR)ईມԠຕ ୲(DDR)Ljਏ༹ൽਦᇀጺ၍܈ದዃăړጺ၍ྺ܈ DSC 32࿋้Ljথ੨ኻీDDRă DOUBLE DATA RATE (DDR) DCO tS tH tS tH tS tH 07852-119 INPUT DATA DSC 102. LVDS้Ⴞ(SDRࢅDDR) Rev. 0 | Page 53 of 76 AD9789 ሞQDUCఇ๕ዐLjথ੨ࠦۨሞ32࿋ጺ၍܈Ljആ౾ၯᄓႜ සࡕ݀ิആ౾ၯᄓٱဃLjആ౾ၯᄓऺຕഗ(स٪ഗ0x02 ྺݥ࠵(९73)ă [7:0])৽ࣷڿሺăആ౾ၯᄓऺຕഗփેओLjڟԥൣ0ई 73. QDUCఇ๕ዐڦആ౾ၯᄓႜྺ ڟٳፌٷኵ255ăॽ1ႀस٪ഗ0x04[7]ᅜ๑ऺຕഗൣ থ੨ CMOS LVDS1 (DDR) 1 ጺ၍ ܈ 32࿋ 32࿋ ആ/౾ၯᄓ P1ၯᄓD[31:16] P0ၯᄓD[15:0] [PARP, PARN]ฉืၯᄓ D[15:0]P, D[15:0]Nฉื [PARP, PARN]ူইၯᄓ D[15:0]P, D[15:0]Nူই IQആ౾ၯᄓ P1 = 0 P0 = 1 PARPฉื = 0 PARNฉื = 1 PARPူই = 1 PARNူই = 0 “ฉื”ܔᆌሞDSCฉืᄂ֑ᄣڦຕǗ “ူই”ܔᆌሞDSCူইᄂ֑ᄣڦຕă 0ă ॽ1ႀस٪ഗ0x03[7]Ljᅜ๑ీᅃ߲IRQLjᅜՍ݀ิആ౾ ၯᄓٱဃ้݀ةăIRQڦጒༀᅜཚࡗस٪ഗ0x04[7]ई IRQᆅগ(ᆅগP2)֪ڥăසࡕ๑ᆩIRQᆅগLjժ๑ీ߲ܠ IRQLjሶ݀ิIRQ๚ॲ้LjᆩࢽՂႷॠֱस٪ഗ0x04Ljඓۨ IRQޏᆯആ౾ၯᄓٱဃᆅഐăॽ1ႀस٪ഗ0x04[7]ᄺ ᅜ๑IRQൣ0ă ሞཚڢስഗఇ๕ዐLjথ੨ದዃྺփཞڦጺ၍܈Ăຕ ఇె߾ፕఇ๕ ࢅ܈ຕ߭๕Ljആ౾࿋ၯᄓጺ၍ฉڦຕጴă AD9789֑ᆩ຺ਸ࠲ॐࠓLjᅜཚࡗزႜྔยথ੨ದዃྺෙ ૩සLj୯ཚڢስഗఇ๕ူڦኄᄣᅃዖದዃǖጺ၍܈ ዖ߾ፕఇ๕ǖཚఇ๕ĂRZఇ๕ࢅंೕఇ๕ă ྺ4Ljຕྺ܈8Ljຕ߭๕ྺํຕăُ้Ljྺକدپ ຺ਸ࠲ॐࠓೡԸدཥມਸ࠲DACዐ၄ڦஓ၎࠲றِă ຺߲ཚڦڢᆶհ༬୲ຕLjႴᄲ8้߲ዓዜăሞ౾ 104၂๖دཥDACࢅ຺ਸ࠲DACڦհႚăሞມਸ࠲ॐࠓ ၯᄓईആၯᄓఇ๕ዐLj้߲ዓዜฉ݀ໃ1߲ആ౾࿋ࢅ4 ዐLjړD1ࢅD2تᇀփཞጒༀ้Ljਸ࠲ገׂ࣑ࣷิறِă ߲ຕ࿋Ǘആ౾࿋ၯᄓ4߲ຕ࿋Ljᄓኤᆶຕᅙཚ ܸLjසࡕD1ࢅD2تᇀ၎ཞጒༀLjሶਸ࠲փࣷᆅഐற ࡗথ੨݀ໃă ِăኄዖஓ၎࠲றِࣷሺेDACڦ฿ኈଉăሞ຺ਸ࠲ॐࠓ 74ጺକଇ߲ആ౾ၯᄓᆅগڦႜྺतഄሞᆶথ੨ఇ๕ ዐLjஃ๊ஓLjଇ߲ਸ࠲๔ዕሞӷ้ዓዜتገ࣑Lj ዐසࢆᇑຕࢻۯă ᅺُփׂࣷิஓ၎࠲றِLjׂܸิ2 × fDAC࢛ۨڦறِă 74. ཚڢስഗఇ๕ዐڦആ౾ၯᄓႜྺ CMOS 8࿋ CMOS 16࿋ CMOS 32࿋ LVDS (SDR)1 LVDS (SDR)1 LVDS (SDR)1 LVDS (DDR)1 1 4࿋ 8࿋ 16࿋ 32࿋ ആ/౾ၯᄓ P1ࢮ P0ၯᄓD[3:0] P1ࢮ P0ၯᄓD[7:0] P1ࢮ P0ၯᄓD[15:0] P1ၯᄓD[31:16] P0ၯᄓD[15:0] [PARP, PARN]ူইၯᄓ D[3:0]P, D[3:0]Nူই [PARP, PARN]ူইၯᄓ D[7:0]P, D[7:0]Nူই [PARP, PARN]ူইၯᄓ D[15:0]P, D[15:0]Nူই [PARP, PARN]ฉืၯᄓ D[15:0]P, D[15:0]Nฉื [PARP, PARN]ူইၯᄓ D[15:0]P, D[15:0]Nူই “ฉื”ܔᆌሞDSCฉืᄂ֑ᄣڦຕǗ “ူই”ܔᆌሞDSCူইᄂ֑ᄣڦຕă! INPUT DATA D1 D2 D3 D4 D5 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D6 D7 D8 D9 D10 DACCLK IQആ౾ၯᄓ P1 = 0 P0 = 1 P1 = 0 P0 = 1 P1 = 0 P0 = 1 P1 = 0 P0 = 1 փኧ 2-SWITCH DAC OUTPUT 4-SWITCH DAC OUTPUT (NORMAL MODE) փኧ t D6 D1 D2 D3 D4 D7 D8 D9 D10 t D5 07852-072 থ੨ CMOS ጺ၍ ܈ 4࿋ 104. ມਸ࠲ࢅ຺ਸ࠲DACհႚ ຺ਸ࠲ॐࠓঢ়ࡗ०ڇದዃLj࣏ీኴႜఇెंೕईࡃଭ(RZ) փኧ ࠀీăሞंೕఇ๕ዐLjഗॲᅜDAC֑ᄣ୲ܔႜᆶ PARPฉื = 0 PARNฉื = 1 PARPူই = 1 PARNူই = 0 ၳၥհă RZఇ๕ᇑंೕఇ๕၎ຼLjփཞኮتሞᇀമኁڦዐक़ຕᄣ ԨᆯዐଉײኵൽپLjܸփᆯݒ၎ኵൽپă105၂๖ं ೕࢅRZଇዖఇ๕ڦDACհႚă Rev. 0 | Page 54 of 76 AD9789 INPUT DATA D1 D2 D3 D4 D5 D6 D7 D8 D9 ఇె੦स٪ഗ D10 AD9789ాዃᆩᇀᆫࣅఇెႠీڦस٪ഗLjԈઔᆩઠইگ DACCLK D3 D2 –D7 D4 D1 4-SWITCH DAC OUTPUT (fS MIX MODE) D5 –D9 –D10 –D6 ୁۉࡐইೕ୲੦ t –D1 –D5 D6 –D2 –D4 ཚࡗMSEL[1:0]࿋(स٪ഗ0x36[1:0])Ljᆩࢽᅜۙኝాևۉ D10 ୁڦሯำࠋ၅Ljᆫࣅ1/fሯำă107၂๖ॽ20 mAଉײ D9 D7 –D3 ୁۉൻۯ50 Ωۉፆ้MSELᇑ1/fሯำ࠲ڦဣă D8 –110 D6 D2 D3 D4 D8 D9 D10 t D5 105. ंೕఇ๕ࢅRZఇ๕ڦDACհႚ ሞఇెఇ๕ኮक़ႜൎ࣑ࣷዘኝDACࠦ܋ᆶڦsincࡐ ইăᆶෙ߲లઊຯ༬൶ᇘڦႠీࢅፌࣷۼ܈ޗٷ sincࡐইڦᆖၚLjਏ༹ൽਦᇀሜհڦ࿋ዃLjස106๖ă FIRST NYQUIST ZONE SECOND NYQUIST ZONE 0 –115 NOISE (dBm/Hz) D1 D7 07852-073 4-SWITCH DAC OUTPUT (RETURN-TOZERO MODE) ୁۉሯำࢅۙኝୁۉᇧଉڦस٪ഗă –D8 –120 MSEL = 11 –125 MSEL = 10 –130 MSEL = 00 THIRD NYQUIST ZONE –135 –140 1 10 FREQUENCY (kHz) 107. փཞMSEL࿋้ڦ1/fሯำ –10 –15 NORMAL MODE –20 –25 –35 0 0.5 1.0 1.5 2.0 FREQUENCY (Hz) 2.5 3.0 07852-074 –30 106. ߳ఇె߾ፕఇ๕ڦSincࡐই(fS = 2 × DACCLK) RZఇ๕ਏᆶডگĂೝ།ڦၚᆌLjܔᇀॠֱဣཥೕ୲ၚ ᆌ၎ړᆶᆩă Rev. 0 | Page 55 of 76 100 07852-083 MIX MODE –5 RZ MODE AMPLITUDE (dBm) MSEL = 01 AD9789 एጚۉუᇸ ՂႷᆩᅃ߲1 nFۉඹॽVREF(ᆅগC14)ಖୟںăُᆅগฉ AD9789ୁۉᆯຕጴ੦࿋ࢅI120एጚࠌୁۉཞยዃLj ٪ሞټဤۉუLjᅜ࣐؋ۉუᆩᇀྔևۉୟăۆ႙ ස108๖ă ፆੇሀྺ5 kΩăසࡕႴᄲLjᅜॽᅃ߲ྔևएጚᇸথڟ VREFᆅগLjᅜࡗሜాևएጚᇸă AD9789 FSC[9:0] VBG 1.2V VREF IPTAT(ᆅগD14)ᆩᇀ߾֪LjᅜԍޝăIPTAT DAC ᅃ߲ᇑਨܔ࿒ׯ܈Բ૩ڦୁۉă25°C้Ljୁۉ ሀྺ10 μALjၽ୲ሀྺ20 nA/°Că – I120 CURRENT SCALING + 1nF FULL-SCALE CURRENT ྺํ၄ፌॅDOCSIS 3.0 ACLRႠీLjॺᅱ๑ᆩ75๖ڦ 07852-084 10k I120 AVSS ଉײୁۉยዃă 75. փཞQAMཚڢຕ้ॺᅱڦଉୁۉײยዃ 108. एጚۉუᇸۉୟ ॽټဤۉუแेᇀI120(ᆅগB14)ᇑںኮक़ڦ10 kΩۉፆՍइ ڥएጚୁۉă1.2 VՔټဤۉუVREF(ᆅগC14)ሞ10 kΩۉ ፆዐׂิ120 μAएጚୁۉăُୁۉᆯFSC[7:0](स٪ഗ0x3C [7:0])ࢅFSC[9:8](स٪ഗ0x3D[1:0])ႜຕጴۙኝLjᅜՍย ዃଉୁۉײIFS(ڇ࿋mA)ă ॺᅱIFS(mA) 20 25 25 25 QAMཚڢຕ 1 2 3 4 FSC[9:0] 512 720 720 720 DACप IFS = 0.023 × FSC[9:0] + 8.58 ྺକሞํᄓኟඓೠࠚAD9789Lj๑ᆩକෙዖփཞڦ᳘ स٪ഗኵྺྷݔڦ0x0000x3FFLjᅺܸଉײݔୁۉ ྷሀྺ8.6 mA32.1 mAăఐණኵ0x200ׂิ20 mAଉۉײ ୁăۆ႙ྷݔස109๖ă ࢇۉୟă 110၂๖૧ᆩኟ၀հ֪ଉSFDRࢅIMDدڪཥDACႠీࡀ ้߭ڦፌॅྪஏă 35 IOUTP 30 90 70 IFS (mA) 07852-121 25 JTX-2-10T 90 IOUTN 110. ኍڇܔᅼ/ܠᅼ֪ଉॺڦᅱՎუഗप 20 111၂๖ሞंೕఇ๕ዐ֪ଉ႑ࡽ(ܾڼईڼෙలઊຯ༬ೕ 15 ୲൶ᇘ)้ڦፌॅྪஏăዐ႐؏ཀྵՎუഗټڦփፁᅜ 10 ኧंೕఇ๕Ljᅺܸፌॅݛӄᆩᅃ߲ټәă 5 200 400 600 800 DAC GAIN CODE 1000 109. ଉୁۉײᇑDACሺᅮஓ࠲ڦဣ IOUTP 70 IOUTN ခՂሞI120ᆅগᇑںኮक़থᅃ߲10 kΩۉፆLjժ૧ᆩຕጴ ੦ࠀీۙኝଉୁۉײăAD9789փᅃ߲݆ױDACLj փኧܔI120แेఇె႑ࡽă Rev. 0 | Page 56 of 76 MABACT0039 90 07852-122 0 07852-085 90 0 111. ኍंܔೕఇ๕ॺڦᅱՎუഗप AD9789 ፌࢫLj֪ړଉCMTSࢅഄຕጴۉᆌᆩڦႠీ้Ljডᆶ ଷᅃݛ௬Lj֑ᆩডۉگೝ႑ࡽLjසPCBฉీࣷᇜڦڟ ૧ڦፔ݆ሞDACᇑՎუഗኮक़֭ᅃ߲1 dBĂ1.2 GHzൎ CMLईປ३PECLڪ,ᄺඹᅟൻ࣐ۯ؋ഗăُ࣐؋ഗ࣏ Բდگސཚ୳հഗLjᅜՍ߸ࡻں੦DACాࢃڦፆੇăܔ ༵ࠃटڦگ100 fsेໜऐ۶ۯLjኄܔᇀAD9789ํ၄ፌॅ ᇀডߛೕ୲Ljኄᆶዺᇀইگች࣮ၿհăCMTS֪ଉڦ ୁႠీݥዘᄲă113๖ྺADCLK914ీࠀڦă ፌॅՎუഗJTX-2-10TLj֑ᆩހڇጎLjᆯәࢅዐ႐ 114၂๖ADCLK914/AD9789থ੨ॺڦᅱথă߸ܠ႑တ ؏ཀྵՎუഗፇׯă112၂๖କُपă ֖९ADCLK914ຕ֩ăኻᄲDACڦሯڹփీڟٳຕ ֩ዐڦႠీࡀ߭Lj৽ᆌॠֱ้ዓă 5.6nH VCC 70 90 JTX-2-10T 2.2pF 90 VREF ADCLK914 VT 5.6nH 50 07852-123 IOUTN 4.7pF 50 50 Q D 112. ኍܔCMTS֪ଉॺڦᅱՎუഗप 50 Q D 07852-124 4.7pF IOUTP ྺକՆ௨փՂᄲڦसิၳᆌLjٗDACڟՎუഗ߳ጽ၍ܔڦ VEE ںፆੇᆌྺ50 Ω(110ࢅ112)ࢅ25 Ω(111)ă 113. ADCLK914ࠀీ AD9789้ዓথ੨ ස๖LjADCLK914ాڦ܋և50 Ωۉፆీࠕሜઠጲ ྺ๑AD9789ాڦև้ዓথഗਏԢႴڦ႑ࡽӦޗLjᆶՂ PECLईCMLൻۯഗୁۉڦăVTᆅগᅜথڟVCC(PECL ᄲ૧ᆩྔև้ዓ࣐؋ഗႊೌൻۯCLKPࢅCLKNăኄၵ ୁۉဌ)܋ĂాևVREFईኁԍޝLjਏ༹ൽਦᇀ႑ࡽ ߛۉೝĂߛუӦ୲႑ࡽփᆌሞPCBฉႜୟᆯăࢇُᆌ ᇸăADCLK914ࠌڦఇྷݔփԈઔLVDSۉೝLjᅺُኄ ᆩॺڦᅱ้ዓ࣐؋ഗADCLK914ăኄ้גዓ࣐؋ഗ ዖ൧ူႴᄲୁ᳘ࢇă ీࠕٗ߳ࠃ༵܋1.9 VۉუLjൻ܋ۯথᇀVCC (3.3 V)ڦ50 Ω ሜLjܸٗइڥ3.8 VڦጺֶݴӦޗă 1 5 4 3 2C82 0.01μF GND R15 49.9 GND 1 2 3 4 R13 49.9 R14 49.9 U3 ADCLK914 D D NC NC 5 6 7 8 C99 2400pF C0803H50 CLKP VEE VCC GND VT VREF C81 0.01μF 16 15 14 13 VCC33 R17 100 R0402 C102 2400pF C0803H50 12 Q 11 Q NC 10 NC 9 CLKN ADCLK914 SUPPLY DECOUPLING NC NC VEE VCC J3 PSTRNKPE4117 VCC33 C83 0.01μF VCC33 VCC33 GND C31 0.1μF C0402 C32 0.01μF C0402 C33 0.1μF C0402 C34 0.01μF C0402 GND GND GND GND 114. ದࢇํᄓ݀ิഗ๑ᆩڦADCLK914/AD9789থ੨ۉୟ Rev. 0 | Page 57 of 76 07852-125 GND AD9789 ᆫࣅ้ዓࠌఇۉუ أକᆫࣅൎ้࣑ႾڦဣཥኮྔLj࣏ᆶᅃ߲ဣཥᅜยዃ้ ዓࠌڦఇۉუăُဣཥᅜ๑CLKPᇑCLKN႑ࡽڦ֮ۅ ኟඓܔጚLjඓԍ้ዓڦԲยዃኟඓă115၂๖සࢆ ยዃCLKPࢅCLKNࠌڦఇۉუăCLKP_CML࿋(स٪ഗ0x32 [4:1])ࢅCLKN_CML࿋(स٪ഗ0x31[7:4])੦ᆩᇀCLKPࢅ CLKN႑ࡽڦӗ߲ਸ࠲ăۙኝݛၠᆯPSIGNࢅNSIGN࿋(स ٪ഗ0x32ڦ࿋5ࢅ࿋0)ਦۨăසࡕPSIGNࢅNSIGNྺۉگ 76. 900 MHz้߳ዖ၎࿋ሯำ൸၍ူ຺ሜհ DOCSISాټڦACLRႠీ ೕ 750 kHz 6 MHz 6 MHz 12 MHz 12 MHz 18 MHz ൸၍1 −71 ၎࿋ሯำ(dBc) ൸၍2 ൸၍3 −67.2 −62.4 ൸၍4 −59.1 ࡀ߭ −60 −70.9 −70.3 −67 −63.8 −63 −71 −70.8 −70.8 −70.8 −65 ೝLjሶࠌఇۉუໜጣCLKP_CML/CLKN_CMLኵܸ३ၭă 77၂๖କփཞೋᅎ้߳ዖ൸၍ڦ၎࿋ሯำă(ᆶ၎࿋ሯ ස ࡕ PSIGNࢅ NSIGNྺ ߛ ۉೝ Lj ሶ ࠌ ఇ ۉუ ໜ ጣ ำኵۼᆩdBc/Hz๖ă) CLKP_CML/CLKN_CMLኵ ܸ ሺ ٷLj ස 116 ๖ ă ړ 77. ߳ዖ൸၍ڦ၎࿋ሯำࣹጺ CLKP_CMLࢅCLKN_CMLยྺ0้Ljݒઍୟ০೨๑ࠌఇ ۉუยዃྺሀ0.9 VăړCLKPࢅCLKNೋᅎ࿋ยྺ−15้Lj ୁႠీፌॅă CLKx_CML SIGN = 0 ၎࿋ሯำ(dBc/Hz) ೋᅎ1 2 kHz 20 kHz 200 kHz 2 MHz 20 MHz 1 ൸၍1 −114.8 −117.8 −128.3 −148.5 −152.5 ൸၍2 −112.8 −115.5 −118.9 −127.9 −149.9 ൸၍3 −111.7 −114.6 −118.3 −122.2 −148 ൸၍4 −111.2 −113.8 −116.8 −117.9 −145.7 ೋᅎၭᇀ500 kHz้Lj၎࿋ሯำႠీዷᄲൽਦᇀ֪ଉᅏഗă ྺକ຺ڟٳሜհDOCSISాټڦACLRᄲ൱Lj൸၍3ူڦ၎ CLKP/CLKN ࿋ሯำፌگᄲ൱ă CLKx_CML SIGN = 1 07852-081 MUჽ੦ഗ CVDD18 muჽۙኝຕጴఇᇑఇెఇኮक़้ڦႾămuჽ੦ ഗথຕጴఇᇘᇑఇెఇᇘኮक़ڦ၎࿋࠲ဣ႑တă 115. ้ዓࠌఇ੦ ੦ဣཥჄۙኝmuჽLj๑ຕጴևݴᇑఇెևݴԍ 1.10 CLKP Ⴔڦ၎࿋࠲ဣă117၂๖କDACాmuჽ֫ۥڦă CLKN 16-BIT DATA 1.00 16 DIGITAL CIRCUITRY 14 14-BIT 2.4GSPS DAC 0.95 DAC CLOCK 0.90 MU Φ DET MU DELAY MU Φ CONTROL 0.85 0.80 07852-077 COMMON-MODE VOLTAGE (V) 1.05 117. Muჽ੦ഗ 0.75 5 7 9 11 13 15 mu੦ഗᆶଇዖ߾ፕఇ๕ǖ؛๔၎࿋ࢅ၎࿋߶ጷăሞ 07852-082 0.70 –15 –13 –11 –9 –7 –5 –3 –1 1 3 OFFSET CODE ၎࿋ఇ๕ዐLj੦ഗლᄲ๑ᆩ؛๔muჽኵLjᅜՍ ߶ጷఇ๕ăሞ߶ጷఇ๕ዐLj੦ഗ؛ܔ๔muჽኵ 116. ࠌఇۉუᇑCLKP_CML/CLKN_CML ࢅPSIGN/NSIGN࠲ڦဣ ႜۙኝLj๑၎࿋ԍሞႴኵăᅺྺీᆶ߲ܠmuჽย ้ዓ၎࿋ሯำܔୁႠీڦᆖၚ ዃׂࣷิႴڦ၎࿋Ljڍժփᆶmuჽኵీۼ๑ഗॲ ൻ ۯADCLK914 ้ ڦዓ ᇸ ዊ ଉ ਦ ۨ AD9789 ీ ํ ၄ ڦ ኟ߾ፕLjᅜႴႜ؛๔၎࿋ă ACLRႠీă76ଚକ900 MHz้߳ዖ၎࿋ሯำ൸၍ူ຺ ሜհDOCSIS႑ࡽాټڦACLRă(ᆶACLRኵۼᆩdBc ๖ă) Rev. 0 | Page 58 of 76 AD9789 ሞጲۯఇ๕ူ๑ᆩMu੦ഗ සࡕmuჽٳڟዕۅLj฿Өăසࡕ੦ഗሞࡗײ mu੦ഗཚࡗस٪ഗ0x33[0]๑ీăᅃڋ๑ీmu੦ഗLj ዐுᆶቴڟႴ၎࿋LjTRACK_ERR࿋(स٪ഗ0x2F[5])ॽ ৽ࣷഔۯ၎࿋ఇ๕ă๑ీmu੦ഗኮമLjՂႷံਸഔ ਦ֑ۨൽࢆዖ֡ፕǖ t ीჄ(0)ǖीჄ(ፌॅยዃ) t ް࿋(1) ߾ፕ߾ాྷݔ܈ፕ߸࿘ۨămu੦ഗڦෙዖ߾ፕఇ๕ᆯ 18 स٪ഗ0x33[5:4]ڦMODE[1:0]࿋ยዃLjසူ๖ǖ ժ߶ጷ(00)(ፌॅยዃ) t ৈ߶ጷ(01) t ৈ(10) 14 MU PHASE t DESIRED PHASE AND SLOPE 16 ໙݆ٗMUDLY[8:0]࿋ยዃڦ༬ۨmuჽኵਸ๔ኴ GUARD BAND 12 GUARD BAND 10 8 ႜLjഄዐLSB࿋ᇀस٪ഗ0x39[7]LjMSB࿋ᇀस٪ഗ0x3A 6 [7:0]ăُჽ၍ኵᆶ9࿋ݴՐ୲LjڍፌٷඹႹmuჽ 4 ྺ431(ๆ)ăਸ๔ڦፌॅۅჽ၍ڦዐक़Ljሀྺ 2 216ă؛๔໙݆ࣷደ߲௮փཞڦmuჽኵLj֪ڟ SEARCH STARTING LOCATION 0 0 ڥႴڦ၎࿋Ǘ၎࿋ᆯस٪ഗ0x39[4:0]ዐڦMUPHZ[4:0] 40 80 120 160 200 240 280 MU DELAY 320 360 400 440 07852-078 ၎࿋Բডഗืუ(स٪ഗ0x3E[5])ࢅmu੦Բၯኟۉୟ (स٪ഗ0x30[7])ăኄଇ߲ࠀీ๑mu੦ഗሞഗॲڦኝ߲ ࿋ਦۨLjፌٷඹႹ၎࿋ྺ16ăසࡕሜٷᇀ16ڦኵLj੦ 118. 2.4 GSPS้ۆڦ႙Mu၎࿋༬Ⴀ ഗփࣷۨă֪Ⴔ၎࿋ࢫLjऺ໙၎࿋֪ଉڦၽ୲ժॽ ྺକඓۨޏሞኟඓڦၽ୲ฉLj੦ഗံڿሺmuჽ ഄᇑႴၽ୲(ᆯस٪ഗ0x33[6]ዐڦSLOPEኸۨ)၎Բডă ኵժ֪ଉၽ୲Ljࢫڿ३muჽኵժ֪ଉၽ୲Lj݀ڟ ྺํ၄ፌॅୁႠీLjڦፌॅยዃၽ୲ྺኟLjժ ิူଚඪᅃ๚ॲǖ ၎࿋ኵྺ14ăසࡕ၎࿋ࢅၽ୲ᇑದዃኵ၎ޙLjሶ໙݆ ຐăSEARCH_TOL࿋(स٪ഗ0x2F[7])ᅜᆩઠኸۨ ڦඓႠLjසူ๖ǖ t ၎࿋Վࣅྺ܈ޗ2ă t ၎࿋ڪᇀ16(ፌٷኵ)ă t ၎࿋ڪᇀ0(ፌၭኵ)ă t փඓ(0)ǖᅜቴڟႴ၎࿋ڦଇ߲ኵాڦᅃ߲၎࿋ t NVჽڪᇀ431(ፌٷኵ)ă t ඓ(1)ǖቴڟኸۨڦඓ၎࿋(ፌॅยዃ) t NVჽڪᇀ0(ፌၭኵ)ă 118၂๖2.4 GSPS้mu၎࿋ᇑmuჽ၍ኵۆڦ႙࠲ဣă ံڿሺምڿ३muჽኵࢫLjॽ֪ڦڥ၎࿋ኵႜԲডLjඓ ٗۨڦmuჽኵਸ๔Ljݛၠᅜཚࡗस٪ഗ ۨၽ୲ޏᇑႴၽ୲၎ޙăಒၽ୲ᆶၳڦՔጚኟၠ 0x39[6:5]ዐڦSEARCH_DIR[1:0]࿋ኸۨăݛၠᆶසူ ၎࿋ࢅၠ၎࿋ՂႷ࿋ᇀႴ၎࿋ڦ၎ݒଇ֨ă119ࢅ ෙ߲ስǖ 120ݴ՚၂๖ᆶၳࢅၳ၎࿋ስڦ๖૩ă t ৈၠူ(00) t ৈၠฉ(01) t ฉူ༺(10)(ፌॅยዃ) 15 9 14 8 13 7 12 ᅃ߲ݛၠٳڟՊࢺݞڦײೕ(ټᆯस٪ഗ0x2F[4:0]ዐڦ DESIRED GUARDBAND[4:0]࿋ኸۨ)ăࢺݞٳڟೕࢫټLjৈሞ DESIRED 11 5 ၎ݛݒၠीჄႜăሞݛ߲ܾڼၠࢺݞٳڟೕټኮമLjස ೕాټლቴă 4 10 ࡕுᆶቴڟႴ၎࿋LjॽՎ࣮༺ఇ๕LjीჄሞࢺݞ POSITIVE SLOPE NEGATIVE SLOPE 119. ᆶၳኟၽ୲၎࿋๖૩ Rev. 0 | Page 59 of 76 6 07852-079 සࡕݛၠྺ༺๕Ljॽሞଇ߲ݛၠႜLjڟሞ AD9789 14 DESIRED 13 78ଚକۨ੦ഗႴኴႜڦस٪ഗ܁ႀ֡ፕăײႾ 4 15 13 12 ्ย้ዓথഗᅙঢ়๑ీLjժ༵ࠃକᅃ߲߅৫้ڦዓă 3 3 14 2 1 mu੦ഗۆڦ႙้ۨक़ሀྺ180,000 DACዜ(2 GSPS้ 2 DESIRED 1 07852-080 15 ሀྺ75 μs)ă 78. AD9789 Muჽ੦ഗ߾ፕײႾ 120. ၳၽ୲၎࿋๖૩ ړ໙݆ቴ؛ڟ๔muჽኵ้Lj৽ࣷ๑ీ߶ጷఇ๕ăሞ ߶ጷఇ๕ዐLj૧ᆩ०ڦڇ੦࣍ୟڿሺ(ྺ܈ޗ1)Ăڿ३ (ྺ܈ޗ1)ईփ߀ՎmuჽኵLjਏ༹ൽਦᇀ၎࿋֪ଉ ࡕă੦࣍ୟ૧ᆩႴၽ୲ඓۨޏᆌڿሺईڿ३muჽ ں 0x30 0x31 ຕ 0x80 0xF0 ܁/ႀ ႀ ႀ 0x32 0x9E ႀ 0x3E 0x38 ႀ 0x24 0x24 0x2F 0x00 0x80 0xCE ႀ ႀ ႀ 0x33 0x39 0x42 0x4E ႀ ႀ 0x3A 0x6C ႀ 0x03 0x04 0x03 0x33 0x00 0xFE 0x0C 0x43 ႀ ႀ ႀ ႀ 0x33 0x33 0x04 0x4B 0x43 ႀ ႀ ܁ൽ Ljڍփࣷඁඓۨํाၽ୲ޏᅙ߀Վईධᆶၳă ଇ߲ጒༀ࿋LOCKACQ(स٪ഗ0x04[3])ࢅLOCKLOST(स٪ ഗ0x04[2])ᆩઠኸ๖੦࣍ୟޏኟ߾ፕăසࡕړമ၎ ࿋ਐႴ၎࿋5օᅜฉLjժLOCKACQ࿋ံമᅙዃ1Lj ሶLOCKACQ࿋ൣ0LjLOCKLOSTዐ࿋ዃ1ăُྔLjසࡕ ฿Lj੦ഗᅜीჄتᇀ߶ጷ࣍ୟዐLjᄺᅜް࿋ᅜም ْഔۯă ॽMUSAMP࿋(स٪ഗ0x33[3])ٗۉگೝยྺߛۉೝ้Ljᆩ ࢽᅜ܁ൽMUDLY࿋(स٪ഗ0x39[7]ࢅस٪ഗ0x3A[7:0])Lj ᅜ࣮܁੦ഗۨڦmuჽኵLjժ܁ൽMUPHZ[4:0] ࿋(स٪ഗ0x39[4:0])Ljᅜ࣮܁ۨڦ၎࿋ăኄၵ࿋փ ምݒᆙਸ๔้ڦኵईႴ၎࿋Ljܸݒᆙ੦ഗ ۨڦmuჽ၍ኵࢅ၎࿋ă 0x39 Rev. 0 | Page 60 of 76 ܁ൽ ௮ຎ ๑ీԲၯኟۉୟă ยዃCLKNࠌڦఇۉೝǖ CLKN_CML = 0xFă ยዃCLKPࠌڦఇۉೝǖ CLKP_CML = 0xFă ยዃCLKP_CMLࢅCLKN_CML ݛڦၠǖPSIGN = 0ǗNSIGN = 0ă ๑ీ้ዓথഗǖCLK_DIS = 1ă ยዃ၎࿋Բডഗืუ (AUTO_CALՂႷยྺఐණኵ1)ă ๑ీຕጴ้ዓă ٗዕۅਸ๔૧ᆩ98ஓڦ ࢺݞೕټඓ၎࿋ă ॽၽ୲ยྺኟኵă ॽ၎࿋ยྺ14Lj ฉူă ॽഐۅยྺmuჽ၍ ڦዐ(ۅஓ216)ă ্ᆩۨࢅ฿ኸ๖ഗă ൣأۨࢅ฿ኸ๖ഗă ๑ీۨࢅ฿ኸ๖ഗă ๑ీmuჽ੦ഗժ ഔۯ/߶ጷײႾă ॽmu၎࿋܁ൽ࿋ยྺߛۉೝă ॽmu၎࿋܁ൽ࿋ยྺۉگೝă ॠֱۨࢅ฿࿋ǖ LOCKACQᆌਸഔă LOCKLOSTᆌ࠲Կă ॠֱ၎࿋࣮܁ኵ (ᆌڪᇀ14)ă AD9789 ሞۯఇ๕ူ๑ᆩMu੦ഗ ዐ൩൱ ሞۯఇ๕ዐLjᆩࢽՂႷደ߲௮ᆶmuჽኵLjժස ᅜ૧ᆩူଚዐ(IRQ)൩൱इܠ߸ڥ႑တLjժᄓኤ߳ዖ 118 ๖ ऻ ߲ MUDLYኵ ܔᆌ ڦ၎ ࿋ ኵ ă ْ ੵ ࡗ ࠀీఇڦጒༀǖ MUDLYኵ้LjՂႷॽMUSAMP࿋ٗۉگೝገߛۉ t ೝLjᅜՍ܁ൽ༬ۨmuჽ၍ኵܔᆌڦ၎࿋ăԍۉߛೝ 1"3&33ړຕጺ၍ฉ݀ิᅃ߲ई߲ܠആ౾ၯᄓٱ ဃ้݀ة ժჄ࣮܁၎࿋ኵփీڦăᇑጲۯఇ๕ᅃᄣLjፌॅ t 1"3.4&5ړ1"3./&8ዃ1ժሞాևऻ้݀ة ୁႠీ၄ሞၽ୲ྺኟ၎࿋ྺ14้ăᅺُLjሞइྜڥኝ t 1"3.$-3ړ1"3./&8ൣ0ժሞాևऻ้݀ة ൸၍ࢫLjᆌൽᇑُཉॲ၎ܔᆌڦMUDLYኵLjժॽኵ t -0$,"$2ړmu੦ഗۨᆩࢽۨᅭڦ၎࿋้ة ႀMUDLY[8:0]࿋(स٪ഗ0x39[7]ࢅस٪ഗ0x3A)ă ݀ t ऺ໙Mu Delayჽ၍օٷၭ -0$,-045ړmu੦ഗ฿้(݀ةසࡕ-0$,"$2 ࿋ံമᅙዃ1) ደ߲௮ᆶmuჽ၍ኵժࣼmu၎࿋ᇑmuჽ࠲ဣ LjփৈీඟᆩࢽቴፌॅmuჽኵLjܸ࣏ీඟᆩࢽඓ t ۨmuჽ၍օٷၭăྺऺ໙օٷၭLjႷൽmu၎࿋൸ ߳IRQཚࡗዐ๑ీस٪ഗ0x03ዐڦ๑ీ࿋๑ీăIRQڦጒ ၍ڦᅃ߲ྜኝዜLjժॽDAC้ዓዜأᅜُՎࣅଉăٗ ༀᅜཚࡗᅜူ֪݆ݛଉǖዐጒༀ/ൣଭस٪ഗ(स٪ഗ 118ኪLjଇ߲ገ࣑ۅሀྺ56ࢅ270LjՎࣅଉሀྺ214օă 0x04)ዐڦSPI࿋Ljईኁ૧ᆩIRQᆅগ(ᆅগP2)ă ᅺُLjmuჽ၍օٷၭሀྺ2 ps/օLjऺ໙ࠅ๕සူǖ 1 ⎞ ⎛ ⎜ ⎟ 2 . 4 GHz ⎝ ⎠ = 1.95 ps 214 සࡕmu੦ഗᅙ๑ీLjሶᅜ૧ᆩُኵऺ໙փཞ࿒ူ܈ᆩ 4"5&33ิ݀ړᅃ߲ई߲ܠԏࢅٱဃ้݀ة සࡕཚࡗᆅগඓۨᅙ݀ิዐLjሶᆶՂᄲॠֱस٪ഗ 0x04LjᅜՍඓۨనᅃ࿋ᆅഐକዐ(ᆅগৈኸ๖ᅙ݀ิ ᅃ߲ዐ)ăැᄲൣأᅃ߲IRQLjՂႷॽ1ႀस٪ഗ0x04 ዐᇑዐܔᆌڦ࿋ă ࢽဣཥ၎ܔᇀDAC้ዓዜڦᅎଉ(ڇ࿋ps)ă Rev. 0 | Page 61 of 76 AD9789 ॺᅱഔ้ۯႾ 79ଚକᆫࣅഗॲႠీժׂิհႚႴڦօየă 79. ॺᅱဣཥഔ้ۯႾ օየ 0 0 1 1 2 3 4 4 4 4 5 6 7 8 9 9 9 9 9 9 9 10 11 12 13 14 15 1 ௮ຎ AD9789ฉۉă แे้ዓă ๑ీ้ዓথഗժยዃ้ዓCMLă ๑ీԲၯኟۉୟă ๑ీຕጴ้ዓă ยዃmu੦ഗă ยዃmu੦ഗă ൣأᆶዐă ๑ీmu੦ዐă ๑ీmuჽ੦ഗă ยዃຕጴຕୟ০ă ยዃ୲ገ࣑ഗă ยዃBPFዐ႐ೕ୲ă ยዃথ੨ă ยዃཚڢሺᅮă ยዃೕݒ၎ă ยዃଉୁۉײ ڟڪmuჽ੦ഗۨྺኹ(SPI܁ൽ)1 ߸ႎ୲ገ࣑ഗࢅBPFă ߸ႎথ੨้ዓă ๑ీཚڢă ๑ీႴڦഄዐă mu੦ഗۆڦ႙้ۨक़ሀྺ180,000 DACዜ(2 GSPS้ሀྺ75 μs)ă Rev. 0 | Page 62 of 76 स٪ഗ ຕ 0x32 0x30 0x24 0x24 0x2F 0x33 0x39 0x3A 0x03 0x04 0x03 0x33 0x06 to 0x15 0x16 to 0x1B 0x1C to 0x1D 0x20 to 0x23 0x25 to 0x28 0x29 0x3C to 0x3D 0x04 0x1E 0x24 0x24 0x05 0x03 0x9E 0x80 0x00 0x80 0xCE 0x42 0x4E 0x6C 0x00 0xFE 0x0C 0x43 0x08 0x80 0x00 0x80 AD9789 ۨBISTఇ๕ ૧ᆩాևPRN݀ิഗ֪QAMୁႠీ ഔۯPRN݀ิഗࢫLjኻᄲस٪ഗ0x40स٪ഗ0x55փՎLj AD9789ঢ়ࡗದዃᅜ๑ీೌా࿁ໜऐຕ(PRN)݀ิഗă ᆩࢽ৽ᅜጲᆯॽںຕୟ০ದዃྺႴ֪ڦದዃă PRNথڟຕୟ০ڦമ܋Ljժॽຕୟ০ᇑᆅ ැᄲ্ᆩPRN݀ิഗLj൩ॽ0x00ႀस٪ഗ0x40ă গਸăኄᄣLjPRN݀ิഗ৽ᅜᇑೌాQAMՊஓഗದࢇ ๑ᆩLjׂิQAMăዺPRN݀ิഗLjᆩࢽႴྔևຕ ᇸ৽ీ֪ଉDAC܋QAM႑ࡽڦୁႠీăᄲཚࡗ زႜ܋੨๑ీాևPRN݀ิഗLjႷኴႜᅜူօየǖ 1. ీঢ়ࡗದዃLjᅜ࠵ִຕጴຕᆅগ(L4L12ĂM4 M12ĂN5N12ࢅP5P12)ৢڦༀጒༀLjժཚࡗധఁस٪ ഗ(स٪ഗ0x50स٪ഗ0x55)ݒᆙኄၵᆅগڦጒༀăኄ ຕ 0x80 0xF0 0x32 0x9E ᄣLjᆩࢽ৽ీᄓኤຕጴຕথጒă ௮ຎ ๑ీԲၯኟۉୟă ยዃCLKNࠌڦఇۉೝǖ CLKN_CML = 0xFă ยዃCLKPࠌڦఇۉೝǖCLKP_CML = 0xFă ยዃPSIGN = 0ĂNSIGN = 0ă ๑ీ้ዓথഗ(CLK_DIS = 1)ă ॽ81ዐڦस٪ഗยዃྺዐ๖ڦኵLjದዃBIST ఇ๕LjᅜኧPRN݀ิࠀీLjժਸă 81. ದዃPRN݀ิࠀీڦस٪ഗยዃ स٪ഗ 0x42 0x43 0x44 0x45 0x46 0x47 0x49 0x4B 0x4C 0x4D 0x05 4. ׂิᅃ߲ധఁLjཚࡗزႜ܋੨ᅜ܁ൽധఁăُBISTࠀ ዓժॽ้ዓࠌఇۉೝยྺፌॅኵă स٪ഗ 0x30 0x31 3. AD9789Ԉઔᅃ߲ాዃጲ֪(BIST)ᆅLjتຕժ ॽ80ዐڦस٪ഗยዃྺዐ๖ڦኵLjඓԍ๑ీ้ 80. ದዃ้ዓڦस٪ഗยዃ 2. ૧ᆩాዃጲ֪(BIST)ࠀీ֪ຕጴຕথ ยዃ 0x10 0x00 0x10 0x00 0x00 0x10 0x16 0x17 0x4E 0x1F 0x0F LVDSথ੨ఇ๕ڦথ֪ ᄲሞLVDSথ੨ఇ๕ူ֪ຕጴຕᆅগڦথLjႷ ኴႜᅜူօየă 1. ॽ83ዐڦस٪ഗยዃྺዐ๖ڦኵLjඓԍ๑ీ้ ዓժॽ้ዓࠌఇۉೝยྺፌॅኵă 83. ದዃ้ዓڦस٪ഗยዃ स٪ഗ 0x30 0x31 ຕ 0x80 0xF0 0x32 0x9E 2. ௮ຎ ๑ీԲၯኟۉୟă ยዃCLKNࠌڦఇۉೝǖ CLKN_CML = 0xFă ยዃCLKPࠌڦఇۉೝǖCLKP_CML = 0xFă ยዃPSIGN = 0ĂNSIGN = 0ă ๑ీ้ዓথഗ(CLK_DIS = 1)ă ံॽस٪ഗ0x24ยྺ0x00Ljምॽഄยྺ0x80Ljთ࣍߀ ՎPARMNEW࿋ᅜඓԍຕጴ้ዓऄۯă 3. ॽ84ዐڦस٪ഗยዃྺዐ๖ڦኵLjॽLVDSথ ੨ದዃྺߛĂ16࿋ጺ၍܈Ă16࿋ຕ߾܈ፕݛ ๕ă ံॽस٪ഗ0x24ยྺ0x00Ljምॽഄยྺ0x80Ljთ࣍߀ 84. LVDSথ੨ڦस٪ഗยዃ ՎPARMNEW࿋ᅜඓԍຕጴ้ዓऄۯă स٪ഗ 0x20 0x21 0x22 0x23 ॽ82ዐڦस٪ഗยዃྺዐ๖ڦኵLjഔۯPRN݀ ิഗă 82. ഔۯPRN݀ิഗڦस٪ഗยዃ स٪ഗ 0x48 0x4A 0x40 ยዃ 0xAB 0xAB 0x56 Rev. 0 | Page 63 of 76 ยዃ 0x08 0x41 0x1F 0x87 AD9789 4. ॽ85ዐڦस٪ഗยዃྺዐ๖ڦኵLjದዃᆅগఇ 2. ံॽस٪ഗ0x24ยྺ0x00Ljምॽഄยྺ0x80Ljთ࣍߀Վ PARMNEW࿋ᅜඓԍຕጴ้ዓऄۯă ๕ă 3. ॽ89ዐڦस٪ഗยዃྺዐ๖ڦኵLjॽCMOSথ 85. ದዃᆅগఇ๕ڦस٪ഗยዃ स٪ഗ 0x42 0x43 0x44 0x45 0x46 0x47 0x49 0x4B 0x4C 0x4D 5. 6. 7. ੨ದዃྺߛĂ32࿋ጺ၍܈Ă16࿋ຕ߾܈ፕݛ ยዃ 0x00 0x08 0x00 0x08 0x00 0x10 0x1C 0x1C 0x00 0x00 ๕ă 89. CMOSথ੨ڦस٪ഗยዃ स٪ഗ 0x20 0x21 0x22 0x23 4. ๕ă 90. ದዃᆅগఇ๕ڦस٪ഗยዃ ՎPARMNEW࿋ᅜඓԍᅙ߸ႎথ੨ದዃă स٪ഗ 0x42 0x43 0x44 0x45 0x46 0x47 0x49 0x4B 0x4C 0x4D ॽৢༀLVDSຕแेڟ܋੨ă ॽ86ዐڦस٪ഗยዃྺዐ๖ڦኵLj๑ీBISTᆅ 86. BISTᆅগ֪ڦस٪ഗยዃ स٪ഗ 0x48 0x4A 0x40 ยዃ 0x80 0x80 0x55 ࣮܁ധఁस٪ഗ(स٪ഗ0x50स٪ഗ0x55)Ljඓۨᆅগ ጒༀ(९87)ă स٪ഗ 0x50 0x51 0x52 0x53 0x54 0x55 5. ยዃ 0x00 0x08 0x00 0x08 0x00 0x10 0x1C 0x1C 0x00 0x00 ံॽस٪ഗ0x24ยྺ0x00Ljምॽഄยྺ0x80Ljთ࣍߀ ՎPARMNEW࿋ᅜඓԍᅙ߸ႎথ੨ದዃă 87. ധఁस٪ഗยዃ 6. ၎࠲LVDSܔ ຕ࿋D[7:0] ຕ࿋D[15:8] ആ౾ၯᄓPAR ຕ࿋D[7:0](ዘް) ຕ࿋D[15:8](ዘް) ആ౾ၯᄓPAR(ዘް) 7. ॽৢༀCMOSຕแेڟ܋੨ă ॽ91ዐڦस٪ഗยዃྺዐ๖ڦኵLj๑ీBISTᆅ গă 91. BISTᆅগ֪ڦस٪ഗยዃ स٪ഗ 0x48 0x4A 0x40 CMOSথ੨ఇ๕ڦথ֪ ᄲሞCMOSথ੨ఇ๕ူ֪ຕጴຕᆅগڦথLjႷ ኴႜᅜူօየă 1. ॽ90ዐڦस٪ഗยዃྺዐ๖ڦኵLjದዃᆅগఇ ံॽस٪ഗ0x24ยྺ0x00Ljምॽഄยྺ0x80Ljთ࣍߀ গă 8. ยዃ 0x08 0x61 0x1F 0x87 8. ยዃ 0x80 0x80 0x55 ࣮܁ധఁस٪ഗ(स٪ഗ0x50स٪ഗ0x55)Ljඓۨᆅগ ጒༀ(९92)ă ॽ88ዐڦस٪ഗยዃྺዐ๖ڦኵLjඓԍ๑ీ้ 92. ധఁस٪ഗยዃ ዓժॽ้ዓࠌఇۉೝยྺፌॅኵă स٪ഗ 0x50 0x51 0x52 0x53 0x54 0x55 88. ದዃ้ዓڦस٪ഗยዃ स٪ഗ 0x30 0x31 ຕ 0x80 0xF0 0x32 0x9E ௮ຎ ๑ీԲၯኟۉୟă ยዃCLKNࠌڦఇۉೝǖ CLKN_CML = 0xFă ยዃCLKPࠌڦఇۉೝǖCLKP_CML = 0xFă ยዃPSIGN = 0ĂNSIGN = 0ă ๑ీ้ዓথഗ(CLK_DIS = 1)ă Rev. 0 | Page 64 of 76 ၎࠲CMOSܔ ຕ࿋D[23:16] ຕ࿋D[31:24] ആ౾ၯᄓP1 ຕ࿋D[7:0] ຕ࿋[D15:8] ആ౾ၯᄓP0 AD9789 QAM႓ፗ Q IKQK = 10 Q 1001 0010 0011 1010 1000 0000 0001 1101 1100 0100 0110 1111 1110 0101 0111 IKQK = 11 10011 00110 00010 10010 10101 10001 00100 00101 00111 10110 10100 10000 00000 00001 00011 I 11011 11001 11000 01000 01100 01110 IKQK = 01 11111 11101 11100 01001 01101 01010 IKQK ARE THE TWO MSBs IN EACH QUADRANT. 11010 11110 01011 01111 IKQK = 11 I IKQK = 01 07852-087 1011 IKQK = 00 10111 IKQK = 00 07852-086 IKQK = 10 IKQK ARE THE TWO MSBs IN EACH QUADRANT. 121. DVB 16-QAM႓ፗ 123. DVB 32-QAM႓ፗ 11 Q IKQK = 10 101100 101110 100110 100100 001000 001001 001101 001100 101101 101111 100111 100101 001010 001011 001111 001110 101001 101011 100011 100001 11010 11011 01011 01010 11000 11001 01001 01000 10000 10001 10101 10100 11100 11101 10010 10011 10111 10110 11110 11111 00010 00011 00111 00110 01110 01111 00000 00001 00101 00100 01100 01101 1 3 5 7 9 11 IKQK = 00 9 IKQK = 00 IKQK = 10 7 π/2 ROTATION 000010 000011 000111 000110 5 101000 101010 100010 100000 000000 000001 000101 000100 110100 110101 110001 110000 010000 010010 011010 011000 110110 110111 110011 110010 010001 010011 011011 011001 111110 111111 111011 111010 010101 010111 011111 011101 111100 111101 111001 111000 010100 010110 011110 011100 3 I 1 IKQK ARE THE TWO MSBs IN EACH QUADRANT. IKQK = 11 IKQK = 01 πROTATION 3π/2 ROTATION IKQK ARE THE TWO MSBs IN EACH QUADRANT. 124. DVB 128-QAM႓ፗ 122. DVB 64-QAM႓ፗ Rev. 0 | Page 65 of 76 07852-089 IKQK = 01 07852-088 IKQK = 11 AD9789 13 IKQK = 10 π/2 ROTATION 11 0000 0001 0101 0100 0100 0101 0001 0000 0010 0011 0111 0110 0110 0111 0011 0010 1011 1111 1110 1110 1111 1011 1010 1010 10 7 5 3 1 11 1101 1001 1000 1000 1001 1101 1100 1100 1101 1001 1000 1010 1011 1111 1110 1110 1111 1011 1010 0010 0011 0111 0110 0110 0111 0011 0010 0101 0001 0000 11 13 15 10 9 1000 1001 1101 1100 11 1100 00 00 IKQK = 00 01 0000 0001 0101 0100 01 0100 1 3 5 7 9 IKQK = 11 IKQK = 01 πROTATION 3π/2 ROTATION 07852-090 15 IKQK ARE THE TWO MSBs IN EACH QUADRANT. 125. DVB 256-QAM႓ፗ Q C5 C4 C3, C2 C1 C0 110,111 111,011 010,111 011,011 100,101 101,111 110,101 111,111 110,100 111,000 010,100 011,000 100,000 101,010 110,000 111,010 100,111 101,011 000,111 001,011 000,101 001,111 010,101 011,111 100,100 101,000 000,100 001,000 000,000 001,010 010,000 011,010 I 010,011 011,001 000,011 001,001 000,001 001,101 100,001 101,101 010,110 011,100 000,110 001,100 000,010 001,110 100,010 101,110 110,011 111,001 100,011 101,001 010,001 011,101 110,001 111,101 07852-091 110,110 111,100 100,110 101,100 010,010 011,110 110,010 111,110 126. DOCSIS 64-QAM႓ፗ Rev. 0 | Page 66 of 76 AD9789 Q C7 C6 C5 C4, C3 C2 C1 C0 1110, 1111, 1110, 1111, 1110, 1111, 1110, 1111, 0000, 0011, 0100, 0111, 1000, 1011, 1100, 1111, 1111 1101 1011 1001 0111 0101 0011 0001 1111 1111 1111 1111 1111 1111 1111 1111 1100, 1101, 1100, 1101, 1100, 1101, 1100, 1101, 0000, 0011, 0100, 0111, 1000, 1011, 1100, 1111, 1110 1100 1010 1000 0110 0100 0010 0000 1100 1100 1100 1100 1100 1100 1100 1100 1010, 1011, 1010, 1011, 1010, 1011, 1010, 1011, 0000, 0011, 0100, 0111, 1000, 1011, 1100, 1111, 1111 1101 1011 1001 0111 0101 0011 0001 1011 1011 1011 1011 1011 1011 1011 1011 1000, 1001, 1000, 1001, 1000, 1001, 1000, 1001, 0000, 0011, 0100, 0111, 1000, 1011, 1100, 1111, 1110 1100 1010 1000 0110 0100 0010 0000 1000 1000 1000 1000 1000 1000 1000 1000 0110, 0111, 0110, 0111, 0110, 0111, 0110, 0111, 0000, 0011, 0100, 0111, 1000, 1011, 1100, 1111, 1111 1101 1011 1001 0111 0101 0011 0001 0111 0111 0111 0111 0111 0111 0111 0111 0100, 0101, 0100, 0101, 0100, 0101, 0100, 0101, 0000, 0011, 0100, 0111, 1000, 1011, 1100, 1111, 1110 1100 1010 1000 0110 0100 0010 0000 0100 0100 0100 0100 0100 0100 0100 0100 0010, 0011, 0010, 0011, 0010, 0011, 0010, 0011, 0000, 0011, 0100, 0111, 1000, 1011, 1100, 1111, 1111 1101 1011 1001 0111 0101 0011 0001 0011 0011 0011 0011 0011 0011 0011 0011 0000, 0001, 0000, 0001, 0000, 0001, 0000, 0001, 0000, 0011, 0100, 0111, 1000, 1011, 1100, 1111, 1110 1100 1010 1000 0110 0100 0010 0000 0000 0000 0000 0000 0000 0000 0000 0000 1110, 1101, 1010, 1001, 0110, 0101, 0010, 0001, 0000, 0001, 0000, 0001, 0000, 0001, 0000, 0001, 0001 0001 0001 0001 0001 0001 0001 0001 0001 0011 0101 0111 1001 1011 1101 1111 I 1110, 1101, 1010, 1001, 0110, 0101, 0010, 0001, 0010, 0011, 0010, 0011, 0010, 0011, 0010, 0011, 0010 0010 0010 0010 0010 0010 0010 0010 0000 0010 0100 0110 1000 1010 1100 1110 1110, 1101, 1010, 1001, 0110, 0101, 0010, 0001, 0100, 0101, 0100, 0101, 0100, 0101, 0100, 0101, 0101 0101 0101 0101 0101 0101 0101 0101 0001 0011 0101 0111 1001 1011 1101 1111 1110, 1101, 1010, 1001, 0110, 0101, 0010, 0001, 0110, 0111, 0110, 0111, 0110, 0111, 0110, 0111, 0110 0110 0110 0110 0110 0110 0110 0110 0000 0010 0100 0110 1000 1010 1100 1110 1110, 1101, 1010, 1001, 0110, 0101, 0010, 0001, 1000, 1001, 1000, 1001, 1000, 1001, 1000, 1001, 1001 1001 1001 1001 1001 1001 1001 1001 0001 0011 0101 0111 1001 1011 1101 1111 1110, 1101, 1010, 1001, 0110, 0101, 0010, 0001, 1010, 1011, 1010, 1011, 1010, 1011, 1010, 1011, 1010 1010 1010 1010 1010 1010 1010 1010 0000 0010 0100 0110 1000 1010 1100 1110 1110, 1101, 1010, 1001, 0110, 0101, 0010, 0001, 1110, 1111, 1110, 1111, 1110, 1111, 1110, 1111, 1110 1110 1110 1110 1110 1110 1110 1110 0000 0010 0100 0110 1000 1010 1100 1110 127. DOCSIS 256-QAM႓ፗ Rev. 0 | Page 67 of 76 07852-126 1110, 1101, 1010, 1001, 0110, 0101, 0010, 0001, 1100, 1101, 1100, 1101, 1100, 1101, 1100, 1101, 1101 1101 1101 1101 1101 1101 1101 1101 0001 0011 0101 0111 1001 1011 1101 1111 AD9789 ᆩᇀCMOSࢅLVDSڦཚڢስഗఇ๕ᆅগᆙพ 1 93ଚକAD9789ሞཚڢስഗఇ๕ူຕದዃ֖ຕ ڦᆩፇࢇăഄዐڦႹܠದዃႴᄲ้߲ܠዓ֍ీेሜᆶ ཚڢă96ࢅ97ၘဦຫକᆶኄၵದዃă 2 3 4 7 8 69 10 5 11 12 13 14 A B C 94Ă95ᇑ128Ă129ࠌཞຫCMOSࢅLVDSຕ ᆅগᆙพăCMOSఇ๕๔ዕྺڇԠຕ୲LjժሞDSC D E F ฉืᄂ֑ᄣăLVDSఇ๕ሞጺ၍ྺ܈4࿋16࿋้ྺڇԠ G ຕ୲(SDR)Ljሞጺ၍ྺ܈32࿋้ྺມԠຕ୲ H J (DDR)ă K ጺ၍܈ 4 4 8 8 8 16 16 16 32 32 32 ຕ܈ 8 8 8 8 16 8 8 16 8 8 16 ຕ߭๕ ํຕ ްຕ ํຕ ްຕ ްຕ ํຕ ްຕ ްຕ ํຕ ްຕ ްຕ L P1 31 27 23 19 15 11 7 3 BU CMOS_BUS M P0 30 26 22 18 14 10 6 2 CT CMOS_CTRL N 29 25 21 17 13 9 5 1 FS CMOS_FS P 28 24 20 16 12 8 4 0 DC CMOS_DCO 07852-127 93. ཚڢስഗఇ๕ڦຕದዃ D[31:0] CMOS DATA INPUTS PARITY AND CONTROL INPUTS 128. CMOSຕᆅগᆙพ 1 2 3 4 7 8 69 10 5 11 12 13 14 A B C D E 94. ߳ዖথ੨ڦ܈CMOSᆅগݴದ ᆅগݴದ D[3:0] D[7:0] D[15:0] D[31:0] F BUSWDTH[1:0] 00 01 10 11 G H PARP J PARN K 95. ߳ዖথ੨ڦ܈LVDSᆅগݴದ থ੨܈ 4࿋ 8࿋ 16࿋ 32࿋ ᆅগݴದ D[3:0]P, D[3:0]N D[7:0]P, D[7:0]N D[15:0]P, D[15:0]N D[15:0]P、D[15:0]N ฉืᄂࢅူইᄂ BUSWDTH[1:0] 00 01 10 11 Rev. 0 | Page 68 of 76 FSP L P+ 15 13 11 9 7 5 3 1 FS FSN M P– 15 13 11 9 7 5 3 1 FS DCOP N 14 12 10 8 6 4 2 0 DC DCON P 14 12 10 8 6 4 2 0 DC 14 +LVDS 14 –LVDS 129. LVDSຕᆅগᆙพ 07852-128 থ੨܈ 4࿋ 8࿋ 16࿋ 32࿋ AD9789 ሞ96ዐLj“R”پሜߴۨཚํڦڢຕຕLj“I”پްຕຕڦཞ၎ၜLj“Q”پްຕຕڦኟၜă RĂIईQኮࢫڦຕጴ๖ཚࡽڢă 96. ཚڢስഗఇ๕ದዃࢅཚڢࠓǖCMOSথ੨Ljཚڢᆫံप = 1 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 4 8 ํຕ 1 2 3 4 5 6 7 8 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 4 8 ްຕ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 8 8 ํຕ 1 2 3 4 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 8 8 ްຕ 1 2 3 4 5 6 7 8 [D27:D24] CMOSᆅগᆙพ [D23:D20] [D19:D16] [D15:D12] [D11:D8] [D7:D4] [D3:D0] R0 R0 R1 R1 R2 R2 R3 R3 [D31:D28] [D27:D24] CMOSᆅগᆙพ [D23:D20] [D19:D16] [D15:D12] [D11:D8] [D7:D4] [D3:D0] I0 I0 Q0 Q0 I1 I1 Q1 Q1 I2 I2 Q2 Q2 I3 I3 Q3 Q3 [D31:D28] [D27:D24] CMOSᆅগᆙพ [D23:D20] [D19:D16] [D15:D12] [D11:D8] [D7:D4] [D31:D28] [D3:D0] R0 R1 R2 R3 [D31:D28] [D27:D24] CMOSᆅগᆙพ [D23:D20] [D19:D16] [D15:D12] [D11:D8] [D7:D4] [D3:D0] I0 Q0 I1 Q1 I2 Q2 I3 Q3 Rev. 0 | Page 69 of 76 AD9789 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 8 16 ްຕ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 16 8 ํຕ 1 2 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 16 8 ްຕ 1 2 3 4 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 16 16 ްຕ 1 2 3 4 5 6 7 8 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 32 8 ํຕ 1 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 32 8 ްຕ 1 2 ຕୟ০ದዃ ጺ၍ ܈ຕ߭ ܈๕ DCO 32 16 ްຕ 1 2 3 4 [D31:D28] [D27:D24] CMOSᆅগᆙพ [D23:D20] [D19:D16] [D15:D12] [D11:D8] [D7:D4] [D3:D0] I0 I0 Q0 Q0 I1 I1 Q1 Q1 I2 I2 Q2 Q2 I3 I3 Q3 Q3 [D31:D28] [D31:D28] [D31:D28] [D27:D24] [D27:D24] [D27:D24] CMOSᆅগᆙพ [D23:D20] [D19:D16] CMOSᆅগᆙพ [D23:D20] [D19:D16] CMOSᆅগᆙพ [D23:D20] [D19:D16] CMOSᆅগᆙพ [D23:D20] [D19:D16] R3 R2 CMOSᆅগᆙพ [D31:D28] [D27:D24] [D23:D20] [D19:D16] Q1 I1 Q3 I3 CMOSᆅগᆙพ [D31:D28] [D27:D24] [D23:D20] [D19:D16] Q0 Q1 Q2 Q3 [D31:D28] [D27:D24] Rev. 0 | Page 70 of 76 [D15:D12] [D11:D8] R1 R3 [D7:D4] [D15:D12] [D11:D8] Q0 Q1 Q2 Q3 [D7:D4] [D15:D12] [D3:D0] R0 R2 [D3:D0] I0 I1 I2 I3 [D11:D8] [D7:D4] I0 Q0 I1 Q1 I2 Q2 I3 Q3 [D15:D12] [D11:D8] R1 [D7:D4] [D15:D12] [D11:D8] Q0 Q2 [D7:D4] [D15:D12] [D7:D4] [D11:D8] I0 I1 I2 I3 [D3:D0] [D3:D0] R0 [D3:D0] I0 I2 [D3:D0] AD9789 ሞDDRఇ๕ዐLj“ฉื”ܔᆌሞDSCฉืᄂ֑ᄣڦຕǗ“ူই”ܔᆌሞDSCူইᄂ֑ᄣڦຕă 97. ཚڢስഗఇ๕ದዃࢅཚڢࠓǖLVDSথ੨Ljཚڢᆫံप = 1 ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 4 8 ߭๕ ํຕ DCO 1 2 3 4 5 6 7 8 [D15:D12] LVDSᆅগᆙพ [D11:D8] [D7:D4] [D3:D0] R0 R0 R1 R1 R2 R2 R3 R3 [D7:D4] [D3:D0] I0 I0 Q0 Q0 I1 I1 Q1 Q1 I2 I2 Q2 Q2 I3 I3 Q3 Q3 [D7:D4] ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 4 8 ߭๕ ްຕ DCO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 [D15:D12] LVDSᆅগᆙพ [D11:D8] ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 8 8 ߭๕ ํຕ DCO 1 2 3 4 [D15:D12] LVDSᆅগᆙพ [D11:D8] ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 8 8 ߭๕ ްຕ DCO 1 2 3 4 5 6 7 8 [D15:D12] [D3:D0] R0 R1 R2 R3 Rev. 0 | Page 71 of 76 LVDSᆅগᆙพ [D11:D8] [D7:D4] [D3:D0] I0 Q0 I1 Q1 I2 Q2 I3 Q3 AD9789 ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 8 16 ߭๕ ްຕ DCO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 [D15:D12] LVDSᆅগᆙพ [D11:D8] [D7:D4] ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 16 8 ߭๕ ํຕ DCO 1 2 [D15:D12] LVDSᆅগᆙพ [D11:D8] [D7:D4] R1 R3 ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 16 8 ߭๕ ްຕ DCO 1 2 3 4 [D15:D12] ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 16 16 ߭๕ ްຕ DCO 1 2 3 4 5 6 7 8 [D15:D12] [D3:D0] I0 I0 Q0 Q0 I1 I1 Q1 Q1 I2 I2 Q2 Q2 I3 I3 Q3 Q3 [D3:D0] R0 R2 LVDSᆅগᆙพ [D11:D8] [D7:D4] Q0 Q1 Q2 Q3 [D3:D0] I0 I1 I2 I3 LVDSᆅগᆙพ [D11:D8] [D7:D4] [D3:D0] I0 Q0 I1 Q1 I2 Q2 I3 Q3 ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 32 8 ߭๕ ํຕ DCO 1ฉื 1ူই [D15:D12] ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 32 8 ߭๕ ްຕ DCO 1ฉื 1ူই 2ฉื 2ူই [D15:D12] LVDSᆅগᆙพ [D11:D8] [D7:D4] R1 R3 LVDSᆅগᆙพ [D11:D8] Q0 Q1 Q2 Q3 Rev. 0 | Page 72 of 76 [D3:D0] R0 R2 [D7:D4] [D3:D0] I0 I1 I2 I3 AD9789 ຕୟ০ದዃ ጺ၍ ܈ຕ܈ 32 16 ߭๕ ްຕ DCO 1ฉื 1ူই 2ฉื 2ူই 3ฉื 3ူই 4ฉื 4ူই [D15:D12] LVDSᆅগᆙพ [D11:D8] [D7:D4] I0 Q0 I1 Q1 I2 Q2 I3 Q3 Rev. 0 | Page 73 of 76 [D3:D0] AD9789 ྔႚ٫ 12.00 BSC SQ A1 BALL CORNER 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E 10.40 BSC SQ F G H J 0.80 BSC K L M N P *1.30 1.22 1.14 0.80 REF BOTTOM VIEW DETAIL A 0.65 REF DETAIL A 0.38 0.33 0.28 0.24 REF SEATING PLANE 0.96 0.89 0.82 0.53 COPLANARITY 0.08 0.48 0.43 BALL DIAMETER *COMPLIANT TO JEDEC STANDARDS MO-219 WITH THE EXCEPTION TO PACKAGE HEIGHT. 111808-A TOP VIEW 130. 164ᆅগCSP_BGAހጎ(BC-164-1) ٫ڇ࿋ǖmm ۩ࠔኸళ ႙ࡽ AD9789BBCZ 1 AD9789BBCZRL1 AD9789BBC AD9789BBCRL AD9789-EBZ1 AD9789-MIX-EBZ1 1 ࿒ྷݔ܈ −40°C+85°C −40°C+85°C −40°C+85°C −40°C+85°C ހጎ௮ຎ 164ᆅগႊೌप൰ቆንଚ(CSP_BGA)ހጎ 164ᆅগႊೌप൰ቆንଚ(CSP_BGA)ހጎ 164ᆅগႊೌप൰ቆንଚ(CSP_BGA)ހጎ 164ᆅগႊೌप൰ቆንଚ(CSP_BGA)ހጎ CMTSࢅཚఇ๕ೠࠚᆩೠࠚӱ ंೕఇ๕ೠࠚᆩೠࠚӱ Z = ࢇޙRoHSՔጚڦग़ඹഗॲ Rev. 0 | Page 74 of 76 ހጎၜ BC-164-1 BC-164-1 BC-164-1 BC-164-1 AD9789 ጀ Rev. 0 | Page 75 of 76 AD9789 ጀ ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07852-0-4/09(0) Rev. 0 | Page 76 of 76