RT8010B 1.5MHz, 800mA, High Efficiency PWM Step-Down DC/DC Converter General Description The RT8010B is a high-efficiency Pulse-Width-Modulated (PWM) step-down DC/DC converter. Capable of delivering 800mA output current over a wide input voltage range from 2.5V to 4V, the RT8010B is ideally suited for portable electronic devices that are powered from 1-cell Li-ion battery or from other power sources such as cellular phones, PDAs and hand-held devices. Two operating modes are available including PWM/LowDropout autoswitch and shut-down modes. The internal synchronous rectifier with low RDS(ON) dramatically reduces conduction loss at PWM mode. No external Schottky diode is required in practical application. The RT8010B enters Low-Dropout mode when normal PWM can not provide regulated output voltage by continuously turning on the upper PMOS. The RT8010B enters shut-down mode and consumes less than 0.1μA when EN pin is pulled low. The switching ripple is easily smoothed-out by small package filtering elements due to a fixed operating frequency of 1.5MHz. This along with small WDFN-8L 2x2 package provides small PCB area application. Other features include soft start, lower internal reference voltage with 2% accuracy, over temperature protection, and over current protection. Ordering Information RT8010B Package Type QW : WDFN-8L 2x2 (W-Type) Features 2.5V to 4V Input Range Output Voltage (Adjustable Output From 0.6V to VIN) 800mA Output Current 95% Efficiency No Schottky Diode Required 1.5MHz Fixed Frequency PWM Operation Small 8-Lead WDFN Package RoHS Compliant and Halogen Free Applications Mobile Phones Personal Information Appliances Wireless and DSL Modems MP3 Players Portable Instruments Pin Configurations (TOP VIEW) EN FB VIN LX 1 2 3 4 8 9 7 6 5 PGND PGND PGND AGND WDFN-8L 2x2 Marking Information For marking information, contact our sales representative directly or through a Richtek distributor located in your area. Lead Plating System G : Green (Halogen Free and Pb Free) Note : Richtek products are : ` RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. DS8010B-04 March 2011 www.richtek.com 1 RT8010B Typical Application Circuit 3 VIN 2.5V to 4V VIN LX CIN RT8010B 4.7µF 1 6, 7, 8 VOUT = VREF x ⎛⎜ 1 + R1 ⎞⎟ ⎝ R2 ⎠ FB EN L 2.2µH 4 VOUT C1 2 IR2 PGND AGND R1 R2 COUT 10µF 5 with R2 = 75kΩ to 200kΩ, and (R1 x C1) should be in the range between 3x10-6 and 6x10-6 for component selection. Functional Pin Description Pin No. Pin Name Pin Function 1 EN Chip Enable (Active High). 2 FB Feedback Pin. 3 VIN Power Input. 4 LX Pin for Switching. 5 AGND Analog Ground. 6, 7, 8 PGND Power Ground. 9 (Exposed Pad) NC No Internal Connection. Function Block Diagram EN VIN RS1 OSC & Shutdown Control Current Limit Detector Slope Compensation Current Sense FB Error Amplifier Control Logic PWM Comparator www.richtek.com 2 LX RS2 RC COMP Driver UVLO & Power Good Detector PGND VREF AGND DS8010B-04 March 2011 RT8010B Absolute Maximum Ratings (Note 1) Supply Input Voltage -----------------------------------------------------------------------------------------------------EN, FB Pin Voltage ------------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C WDFN-8L 2x2 -------------------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) WDFN-8L 2x2, θJA --------------------------------------------------------------------------------------------------------WDFN-8L 2x2, θJC -------------------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Mode) ---------------------------------------------------------------------------------------------MM (Machine Mode) ------------------------------------------------------------------------------------------------------ Recommended Operating Conditions 6.5V −0.3V to VIN 0.606W 165°C/W 20°C/W 260°C −65°C to 150°C 150°C 2kV 200V (Note 4) Supply Input Voltage ------------------------------------------------------------------------------------------------------ 2.5V to 4V Junction Temperature Range -------------------------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range -------------------------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VIN = 3.6V, VOUT = 2.5V, VREF = 0.6V, L = 2.2μH, CIN = 4.7μF, COUT = 10μF, IMAX = 0.8A, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit 2.5 -- 4 V Input Voltage Range VIN Quiescent Current IQ IOUT = 0mA, V FB = VREF + 5% -- 50 70 μA Shutdown Current ISHDN EN = GND -- 0.1 1 μA Reference Voltage VREF For Adjustable Output Voltage 0.588 0.6 0.612 V Adjustable Output Range VOUT (Note 6) VREF -- V IN − 0.2V V Output Voltage Adjustable Accuracy ΔVOUT VIN = V OUT + ΔV to 4V 0A < IOUT < 0.8A −3 -- +3 % FB Input Current IFB VFB = VIN −50 -- 50 nA P-MOSFET RON RDS(ON)_P IOUT = 200mA VIN = 3.6V -- 0.28 -- Ω VIN = 2.5V -- 0.38 -- N-MOSFET RON RDS(ON)_N IOUT = 200mA VIN = 3.6V -- 0.25 -- VIN = 2.5V -- 0.35 -- P-Channel Current Limit ILIM_P VIN = 2.5V to 4V 1.2 1.5 -- A EN High-Level Input Voltage VEN_H VIN = 2.5V to 4V 1.5 -- -- V EN Low-Level Input Voltage VEN_L VIN = 2.5V to 4V -- -- 0.4 V -- 1.8 -- V -- 0.1 -- V Under Voltage Lockout Threshold Hysteresis UVLO (Note 5) Ω To be continued DS8010B-04 March 2011 www.richtek.com 3 RT8010B Parameter Symbol Oscillator Frequency fOSC Thermal Shutdown Temperature TSD Test Conditions Min Typ Max Unit VIN = 3.6V, I OUT = 100mA 1.2 1.5 1.8 MHz -- 160 -- °C 100 -- -- % −1 -- 1 μA Max. Duty Cycle LX Leakage Current VIN = 3.6V, VLX = 0V or VLX = 3.6V Note 1. Stresses listed as the above “Absolute Maximum Ratings” may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective four layers thermal conductivity test board of JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad of the package. Note 3 Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. ΔV = IOUT x PRDS(ON) Note 6. Guarantee by design. www.richtek.com 4 DS8010B-04 March 2011 RT8010B Typical Operating Characteristics Efficiency vs. Output Current Efficiency vs. Output Current 100 100 90 90 VIN = 3.3V 70 VIN = 2.5V Efficiency (%) Efficiency (%) VIN = 3.3V 80 80 60 50 40 30 VIN = 2.5V 70 60 50 40 30 20 20 10 10 VOUT = 1.2V, COUT = 4.7μF, L = 4.7μH VOUT = 1.2V, COUT = 10μF, L = 2.2μH 0 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 0.8 0.1 0.2 1.15 1.5 1.10 1.4 1.05 1.00 Rising 0.90 0.85 Falling 0.75 0.70 0.65 2.9 3.1 3.3 3.5 3.7 0.8 1.1 1.0 Rising 0.9 0.8 Falling 0.7 0.6 VIN = 3.6V, VOUT = 1.2V, IOUT = 0A 3.9 4.1 4.3 -40 -25 -10 4.5 5 20 35 50 65 80 95 110 125 Temperature (°C) Input Voltage (V) VREF vs. Temperature UVLO Threshold vs. Temperature 0.612 2.0 0.610 1.9 Rising 0.608 0.606 1.8 0.604 1.7 V REF (V) UVLO Threshold (V) 0.7 1.2 0.4 2.7 0.6 1.3 0.5 VOUT = 1.2V, IOUT = 0A 0.60 2.5 0.5 EN Pin Threshold vs. Temperature 1.6 EN Pin Threshold (V) EN Pin Threshold (V) EN Pin Threshold vs. Input Voltage 1.20 0.80 0.4 Output Current (A) Output Current (A) 0.95 0.3 1.6 Falling 1.5 0.602 0.600 0.598 0.596 0.594 1.4 0.592 1.3 VOUT = 1.2V, IOUT = 0A 1.2 -40 -25 -10 5 20 35 50 65 80 Temperature (°C) DS8010B-04 March 2011 95 110 125 0.590 0.588 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) www.richtek.com 5 RT8010B Output Voltage vs. Temperature 1.25 1.225 1.24 1.220 1.23 Output Voltage (V) Output Voltage (V) Output Voltage vs. Loading Current 1.230 1.215 1.210 1.205 1.200 1.195 1.190 1.185 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 1.21 1.20 1.19 1.18 1.17 1.16 VIN = 3.6V 1.180 1.22 VIN = 3.6V, IOUT = 0A 1.15 -40 -25 -10 0.8 5 1.55 1.55 1.50 1.50 Frequency (MHz) Frequency (MHz) 1.60 1.45 1.40 1.35 1.30 3.4 1.30 3.7 VIN = 3.6V, VOUT = 1.2V, IOUT = 300mA -40 -25 -10 4 5 2.3 2.3 2.2 2.2 Output Current limit (A) Output Current limit (A) 2.4 2.1 2.0 1.9 1.8 1.7 1.6 3 3.25 3.5 Input Voltage (V) www.richtek.com 6 50 65 80 95 110 125 3.75 2.1 VIN = 3.6V 2.0 1.9 VIN = 3.3V 1.8 1.7 1.6 VOUT = 1.2V @ TA = 25°C 2.75 35 Output Current Limit vs. Temperature Output Current Limit vs. Input Voltage 2.5 20 Temperature (°C) 2.4 1.4 95 110 125 1.35 Input Voltage (V) 1.5 80 1.40 1.20 1.20 3.1 65 1.45 1.25 VIN = 3.6V, VOUT = 1.2V, IOUT = 300mA 2.8 50 Frequency vs. Temperature Frequency vs. Input Voltage 1.60 2.5 35 Temperature (°C) Loading Current (A) 1.25 20 VOUT = 1.2V 1.5 4 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) DS8010B-04 March 2011 RT8010B Power On from EN Power On from EN VIN = 3.6V, VOUT = 1.2V, IOUT = 10mA VIN = 3.6V, VOUT = 1.2V, IOUT = 1A VEN (2V/Div) VEN (2V/Div) VOUT (1V/Div) VOUT (1V/Div) I IN (500mA/Div) I IN (500mA/Div) Time (100μs/Div) Time (100μs/Div) Load Transient Response Load Transient Response VIN = 3.6V, VOUT = 1.2V IOUT = 50mA to 1A VIN = 3.6V, VOUT = 1.2V IOUT = 50mA to 0.5A VOUT (50mV/Div) VOUT (50mV/Div) IOUT (500mA/Div) IOUT (500mA/Div) Time (50μs/Div) Time (50μs/Div) Output Ripple Voltage Output Ripple Voltage VIN = 3.6V, VOUT = 1.2V IOUT = 0A VIN = 3.6V, VOUT = 1.2V IOUT = 1A VOUT (10mV/Div) VOUT (10mV/Div) VLX (2V/Div) VLX (2V/Div) Time (500ns/Div) DS8010B-04 March 2011 Time (500ns/Div) www.richtek.com 7 RT8010B Applications Information The basic RT8010B application circuit is shown in Typical Application Circuit. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Inductor Selection Toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate energy but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/EMI requirements. For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. ⎡V ⎤ ⎡ V ⎤ ΔIL = ⎢ OUT ⎥ × ⎢1 − OUT ⎥ VIN ⎦ ⎣ f ×L ⎦ ⎣ Having a lower ripple current reduces the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor. A reasonable starting point for selecting the ripple current is ΔIL = 0.4(IMAX). The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : VOUT ⎤ ⎡ VOUT ⎤ ⎡ × ⎢1 − L=⎢ ⎥ ⎥ ⎣ f × ΔIL(MAX) ⎦ ⎣ VIN(MAX) ⎦ Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally can not afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or mollypermalloy cores. Actual core loss is independent of core size for a fixed inductor value but it is very dependent on the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Different core materials and shapes will change the size/ current and price/current relationship of an inductor. CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : IRMS = IOUT(MAX) VOUT VIN VIN −1 VOUT This formula has a maximum at VIN = 2VOUT, where I RMS = I OUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT, is determined by : ⎡ 1 ⎤ ΔVOUT ≤ ΔIL ⎢ESR + ⎥ 8fC OUT ⎦ ⎣ Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss reduction and saturation prevention. Ferrite core material saturates “hard”, which means that inductance collapses abruptly when the peak www.richtek.com 8 DS8010B-04 March 2011 RT8010B The output ripple is the highest at maximum input voltage since ΔIL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. For adjustable voltage mode, the output voltage is set by an external resistive divider according to the following equation : VOUT = VREF (1 + R1) R2 where VREF is the internal reference voltage (0.6V typ.) Using Ceramic Input and Output Capacitors The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence. Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Output Voltage Programming The resistive divider allows the FB pin to sense a fraction of the output voltage as shown in Figure 4. V OUT R1 FB RT8010B R2 GND Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as : Efficiency = 100% − (L1+ L2+ L3+ ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses : VIN quiescent current and I2R losses. 1. The VIN quiescent current appears due to two factors including : the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge ΔQ moves from VIN to ground. The resulting ΔQ/Δt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT+QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW and external inductor RL. Figure 4. Setting the Output Voltage DS8010B-04 March 2011 www.richtek.com 9 RT8010B For RT8010B packages, the Figure 5 of derating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed. 0.8 Maximum Power Dissipation (W) In continuous mode, the average output current flowing through inductor L is “chopped” between the main switch and the synchronous switch. Thus, the series resistance looking into the LX pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows : RSW = RDS(ON)TOP x DC + RDS(ON)BOT x (1−DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses generally account for less than 2% of the total loss. PD(MAX) = ( TJ(MAX) − TA ) / θJA Where T J(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of RT8010B, where T J(MAX) is the maximum junction temperature of the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance θJA is layout dependent. For WDFN-8L 2x2 packages, the thermal resistance θJA is 165°C/W on the standard JEDEC 51-7 four layers thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula : PD(MAX) = ( 125°C − 25°C ) / (165°C/W) = 0.606W for WDFN-8L 2x2 packages The maximum power dissipation depends on operating ambient temperature for fixed T J(MAX) and thermal resistance θJA. www.richtek.com 10 0.7 0.6 0.5 WDFN-8L 2x2 0.4 0.3 0.2 0.1 0 0 25 50 75 100 125 Ambient Temperature (°C) Thermal Considerations For continuous operation, do not exceed the maximum operation junction temperature 125°C. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : Four Layers PCB Figure 5. Derating Curves for RT8010B Package Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD (ESR), where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. Layout Considerations Follow the PCB layout guidelines for optimal performance of RT8010B. ` Put the input capacitor as close as possible to the device pins (VIN and GND). ` LX node is with high frequency voltage swing and should be kept small area. Keep analog components away from LX node to prevent stray capacitive noise pick-up. ` Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components near the RT8010B. ` Connect all analog grounds to a command node and then connect the command node to the power ground behind the output capacitors. DS8010B-04 March 2011 RT8010B The feedback resistor divider must be placed as close to the FB pin as possible. GND VOUT CIN R1 R2 CF Put CIN between VIN and GND and it should be closed to the IC. EN 1 8 PGND FB 2 7 PGND VIN 3 6 PGND LX 4 5 AGND L1 VOUT COUT The LX pin should be connected to Inductor by wide and short trace, keep sensitive components away from this trace Output capacitor must be closed to the IC. Figure 6 Table 1. Recommended Inductors Supplier Inductance Current Rating (mA) (uH) DCR (mΩ) Dimensions (mm) Series TAIYO YUDEN 2.2 1480 60 3.00 x 3.00 x 1.50 NR 3015 GOTREND 2.2 1500 58 3.85 x 3.85 x 1.80 GTSD32 Sumida 2.2 1500 75 4.50 x 3.20 x 1.55 CDRH2D14 Sumida 4.7 1000 135 4.50 x 3.20 x 1.55 CDRH2D14 TAIYO YUDEN 4.7 1020 120 3.00 x 3.00 x 1.50 NR 3015 GOTREND 4.7 1100 146 3.85 x 3.85 x 1.80 GTSD32 Table 2. Recommended Capacitors for CIN and COUT Capacitance Supplier Package (uF) Part Number TDK 4.7 603 C1608JB0J475M MURATA 4.7 603 GRM188R60J475KE19 TAIYO YUDEN 4.7 603 JMK107BJ475RA TAIYO YUDEN 10 603 JMK107BJ106MA TDK 10 805 C2012JB0J106M MURATA 10 805 GRM219R60J106ME19 MURATA 10 805 GRM219R60J106KE19 TAIYO YUDEN 10 805 JMK212BJ106RD DS8010B-04 March 2011 www.richtek.com 11 RT8010B Outline Dimension D2 D L E E2 1 e SEE DETAIL A b 2 1 2 1 A A1 A3 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min Max Min Max A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 1.950 2.050 0.077 0.081 D2 1.000 1.250 0.039 0.049 E 1.950 2.050 0.077 0.081 E2 0.400 0.650 0.016 0.026 e L 0.500 0.300 0.020 0.400 0.012 0.016 W-Type 8L DFN 2x2 Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 5F, No. 95, Minchiuan Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)86672399 Fax: (8862)86672377 Email: [email protected] Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek. www.richtek.com 12 DS8010B-04 March 2011