Data Sheet No. PD60299
IRS212(7, 71, 8, 81)(S)PbF
CURRENT SENSING SINGLE CHANNEL DRIVER
Features
• Floating channel designed for bootstrap operation
•
•
•
•
•
•
•
Fully operational to +600 V
Tolerant to negative transient voltage dV/dt immune
Application-specific gate drive range:
Motor Drive: 12 V to 20 V (IRS2127/IRS2128)
Automotive: 9 V to 20 V (IRS21271/IRS21281)
Undervoltage lockout
3.3 V, 5 V, and 15 V input logic compatible
FAULT lead indicates shutdown has occured
Output in phase with input (IRS2127/IRS21271)
Output out of phase with input (IRS2128/IRS21281)
RoHS compliant
Product Summary
VOFFSET
600 V max.
IO+/-
200 mA / 420 mA
VOUT
12 V - 20V
(IRS2127/IR2128)
9 V - 20 V
(IRS21271/IR21281)
VCSth
250 mV or 1.8 V
ton/off (typ.)
150 ns & 150 ns
Description
Packages
The IRS2127/IRS2128/IRS21271/IRS21281 are
high voltage, high speed power MOSFET and IGBT
drivers. Proprietary HVIC and latch immune CMOS
technologies enable ruggedized monolithic construction. The logic input is compatible with standard
CMOS or LSTTL outputs, down to 3.3 V. The protection circuity detects over-current in the driven power
transistor and terminates the gate drive voltage. An
8-Lead PDIP
8-Lead SOIC
open drain FAULT signal is provided to indicate that
an over-current shutdown has occurred. The output
driver features a high pulse current buffer stage designed for minimum cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side or low-side configuration which
operates up to 600 V.
Typical Connection
V CC
IN
FAULT
V CC
VB
IN
HO
FAULT
CS
COM
VS
IRS2127/IRS21271
V CC
IN
FAULT
(Refer to Lead Assignments for correct pin configuration).
These diagrams show electrical connections only. Please
refer to our Application Notes and DesignTips for proper
circuit board layout.
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V CC
VB
IN
HO
FAULT
CS
COM
VS
IRS2128/IRS21281
1
IRS212(7, 71, 8, 81)(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
VB
High-side floating supply voltage
-0.3
625
VS
High-side floating offset voltage
VB - 25
VB + 0.3
VHO
High-side floating output voltage
VS - 0.3
VB + 0.3
VCC
Logic supply voltage
-0.3
25
VIN
Logic input voltage
-0.3
VCC + 0.3
FAULT output voltage
-0.3
VCC + 0.3
Current sense voltage
VS - 0.3
VB + 0.3
—
50
VFLT
VCS
dVs/dt
PD
RthJA
Allowable offset supply voltage transient
Package power dissipation @ TA ≤ +25 °C
Thermal resistance, junction to ambient
8-Lead DIP
—
1.0
8-Lead SOIC
—
0.625
8-Lead DIP
—
125
8-Lead SOIC
—
200
TJ
Junction temperature
—
150
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
Units
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15 V differential.
Symbol
Definition
Min.
Max.
(IRS2127/IRS2128)
VS + 12
VS + 20
(IRS21271/IRS21281)
VS + 9
VS + 20
VB
High-side floating supply voltage
VS
High-side floating offset voltage
Note 1
600
VHO
High-side floating output voltage
VS
VB
VCC
Logic supply voltage
10
20
VIN
Logic input voltage
0
VCC
VFLT
FAULT output voltage
0
VCC
VCS
Current sense signal voltage
VS
VS + 5
Ambient temperature
-40
125
TA
Units
V
°C
Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
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2
IRS212(7, 71, 8, 81)(S)PbF
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25 °C unless otherwise specified. The dynamic electrical characteristics
are measured using the test circuit shown in Fig. 3.
Symbol
Definition
Min.
Typ. Max. Units Test Conditions
ton
Turn-on propagation delay
—
150
200
VS = 0 V
toff
Turn-off propagation delay
—
150
200
VS = 600 V
tr
Turn-on rise time
—
80
130
tf
Turn-off fall time
—
40
65
950
tbl
Start-up blanking time
550
750
tcs
CS shutdown propagation delay
—
65
360
tflt
CS to FAULT pull-up propagation delay
—
270
510
ns
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15 V and TA = 25 °C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to VS.
Symbol
VIH
VIL
VCSTH+
Definition
Min.
Logic “1” input voltage
(IRS2127/IRS21271)
Logic “0” input voltage
(IRS2128/IRS21281)
Logic “0” input voltage
(IRS2127/IRS21271)
Logic “1” input voltage
(IRS2128/IRS21281)
CS input positive
going threshold
Typ. Max. Units Test Conditions
2.5
—
—
—
—
0.8
(IRS2127/IRS2128)
180
250
320
(IRS21271/IRS21281)
1.5
1.8
2.1
V
VOH
High level output voltage, VBIAS - VO
—
0.05
0.2
VOL
Low level output voltage, VO
—
0.02
0.1
ILK
Offset supply leakage current
—
—
50
VCC = 10 V to 20 V
mV
V
IO = 2 mA
VB = VS = 600 V
IQBS
Quiescent VBS supply current
—
300
800
IQCC
—
60
120
IIN+
Quiescent VCC supply current
Logic “1” input bias current
—
7.0
15
IIN-
Logic “0” input bias current
—
—
5.0
VIN = 0 V
ICS+
“High” CS bias current
—
—
5.0
VCS = 3 V
ICS-
“High” CS bias current
VCS = 0 V
VBSUV+
VBSUV-
—
—
5.0
VBS supply undervoltage
positive going threshold
(IRS2127/IRS2128)
(IRS21271/IRS21281)
8.8
6.3
10.3
7.2
11.8
8.2
VBS supply undervoltage
(IRS2127/IRS2128)
negative going threshold
(IRS21271/IRS21281)
7.5
6.0
9.0
6.8
10.6
7.7
IO+
Output high short circuit pulsed current
200
290
—
IO-
Output low short circuit pulsed current
420
600
—
FAULT - low on resistance
—
125
—
VIN = 0 V or 5 V
µA
V
mA
Ron,FLT
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VIN = 5 V
VO = 0 V, VIN = 5 V
PW ≤ 10 µs
VO = 15 V, VIN = 0 V
PW ≤ 10 µs
Ω
3
IRS212(7, 71, 8, 81)(S)PbF
Functional Block Diagram IRS2127/IRS21271
VB
VCC
UV
DETECT
HV
LEVEL
SHIFT
UP
SHIFTERS
PULSE
FILTER
R
Q
BUFFER
R
S
HO
IN
PULSE
GEN
VB
VS
DELAY
PULSE
GEN
FAULT
Q
PULSE
FILTER
R
Q
DOWN
SHIFTER
R
S
+
CS
S
COM
Functional Block Diagram IRS2128/IRS21281
VB
V CC
UV
DETECT
5V
UP
SHIFTERS
HV
LEVEL
SHIFT
PULSE
FILTER
R
Q
BUFFER
R
S
HO
IN
PULSE
GEN
VB
VS
DELAY
PULSE
GEN
FAULT
Q
R
S
PULSE
FILTER
DOW N
SHIFTER
Q
R
S
+
CS
COM
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4
IRS212(7, 71, 8, 81)(S)PbF
Lead Definitions
Symbol
VCC
IN
FAULT
COM
VB
HO
VS
CS
Description
Logic and gate drive supply
Logic input for gate driver output (HO), in phase with HO (IRS2127/IRS21271)
out of phase with HO (IRS2128/IRS21281)
Indicates over-current shutdown has occurred, negative logic
Logic ground
High-side floating supply
High-side gate drive output
High-side floating supply return
Current sense input to current sense comparator
Lead Assignments
1
8
1
VCC
VB
8
7
2
IN
HO
7
2
IN
HO
3
FAULT
CS
6
3
FAULT
CS
6
COM
VS
5
4
COM
VS
5
4
1
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VB
VCC
8 Lead PDIP
8 Lead SOIC
IRS2127/IRS21271
IRS2127S/IRS21271S
VCC
VB
8
1
VB
8
IN
HO
7
6
5
VCC
2
IN
HO
3
FAULT
CS
6
3
FAULT
CS
4
COM
VS
5
4
COM
VS
7
2
8 Lead PDIP
8 Lead SOIC
IRS2128/IRS21281
IRS2128S/IRS21281S
5
IRS212(7, 71, 8, 81)(S)PbF
IN
(IRS2128/
IRS21281)
IN
(IRS2128/
IRS21281)
IN
(IRS2127/
IRS21271)
50%
50%
50%
CS
50%
IN
(IRS2127/ t
IRS21271) on
tr
toff
90%
FAULT
HO
tf
90%
10%
10%
Figure 2. Switching Time Waveform Definition
HO
Figure 1. Input/Output Timing Diagram
IN
(IRS2128/
IRS21281)
50%
50%
IN
(IRS2127/
IRS21271)
tbl
CS
90%
HO
FAULT
Figure 3. Start-Up Blanking Time Waveform
Definitions
VCSTH
VCSTH
CS
CS
tcs
HO
tflt
90%
Figure 4. CS Shutdown Waveform Definitions
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FAULT
90%
Figure 5. CS to FAULT Waveform Definitions
6
300
300
250
250
T ur n- On Delay Time ( ns )
T ur n- On Delay Time ( ns )
IRS212(7, 71, 8, 81)(S)PbF
200
Max
150
Typ
100
50
0
-50
Max
200
Typ
150
100
50
0
-25
0
25
50
75
100
125
10
12
Temperature (°C)
16
18
20
Supply Voltage (V)
Figure 6A. Turn-On Delay Time vs.
Temperature
Figure 6B. Tur n-On Delay Time vs. Voltage
250
Turn- Off Delay Time (ns)
300
Turn- Off Delay Time (ns)
14
250
200
Max
150
Typ
100
50
0
-50
Typ
150
100
50
0
-25
0
25
50
75
100
Temperature (°C)
Figure 7A. Turn-Off Delay Time vs.
Temperature
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Max
200
125
10
12
14
16
18
20
Supply Voltage (V)
Figure 7B. Turn-Off Delay Time vs. Voltage
7
180
180
160
160
T ur n- O n Ris e Time (ns)
T ur n- O n Ris e Time (ns)
IRS212(7, 71, 8, 81)(S)PbF
140
120
Max
100
80
Typ
60
40
20
Max
140
120
Typ
100
80
60
40
20
0
0
-50
-25
0
25
50
75
100
125
10
12
Temperature (°C)
70
Turn- Off Fall Time (n s)
Turn- Off Fall Time (n s)
80
80
70
Max
50
30
Typ
20
10
0
-50
18
20
Figure 8B. Turn-On Rise Time vs. Voltage
90
40
16
Supply Voltage (V)
Figure 8A. Turn-On Rise Time vs.
Temperature
Temperature
60
14
Max
60
50
Typ
40
30
20
10
0
-25
0
25
50
75
Temperature (°C)
Figure 9A. Turn-Off Fall Time vs.
Temperature
Temperature
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100
125
10
12
14
16
18
20
Supply Voltage (V)
Figure 9B. Turn-Off Fall Time vs. Voltage
8
IRS212(7, 71, 8, 81)(S)PbF
1200
Start- Up Blank ing Tim e ( ns )
Start- Up Blank ing Tim e ( ns )
1200
1000
Max
800
Typ
600
Min
400
200
0
-50
Max
1000
800
Typ
600
Min
400
200
0
-25
0
25
50
75
100
125
10
12
Temperature (°C)
CS Shutdown Prop. D elay (ns)
CS Shutdown Prop. D elay (ns)
400
Max
250
200
150
100
Typ
-25
0
25
50
75
100
Temperature (°C)
Figure 11A. CS Shutdow n Prop. Delay vs .
Temperature
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18
20
Figure 10B. Start-Up Blanking Time vs. Voltag e
500
450
400
50
0
-50
16
Supply Voltage (V)
Figure 10A. Start-Up Blanking Time vs.
Temperature
350
300
14
125
Max
350
300
250
200
150
100
Typ
50
0
10
12
14
16
18
20
Supply Voltage (V)
Figure 11B. CS Shutdow n Pr op. Delay vs.
Voltage
9
800
700
600
500
Max
400
300
Typ
200
100
0
-50
-25
0
25
50
75
100
125
CS to FAULT Pull-U p Prop. Delay (n s)
CS to FAULT Pull-U p Prop. Delay (n s)
IRS212(7, 71, 8, 81)(S)PbF
600
Max
500
400
300
Typ
200
100
0
10
12
Temperature (°C)
Min
2
1.5
1
0.5
-25
0
25
50
75
100
Temperature (°C)
Figure 13A. Logic "1" ("0" for 2128) VIH
Threshold vs. Temperature
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18
20
125
Figure 12B. CS to FAULT Pull-Up Prop. Delay
vs. Voltage
Logic "1" ( "0" for 212 8) VIH Threshold (V)
Logic " 1" ( "0" for 2128 ) VIH Threshold (V)
3
0
-50
16
Supply Voltage (V)
Figure 12A. CS to FAULT Pull-Up Prop. Delay
vs. Temperature
2.5
14
3
2.5
Min
2
1.5
1
0.5
0
10
12
14
16
18
20
Supply Voltage (V)
Figure 13B. L ogic "1" ("0" for 2128) VIH
Threshold vs. Voltage
10
0.9
0.8
Max
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-50
-25
0
25
50
75
100
125
Logic "0" ("1" for 2128) VIL Thre shold (V)
Logic "0" ("1" for 212 8) VIL Threshold (V)
IRS212(7, 71, 8, 81)(S)PbF
0.9
0.8
Max
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
10
12
Temperature (°C)
CS Input Positive Go ing Voltage (V)
CS Input Positive Go ing Voltage (V)
Max
Typ
0.2
Min
0.15
0.1
0.05
0
-50
-25
0
25
50
75
100
Temperature (°C)
Figure 15A. CS Input Positive Going Voltag e
vs. Temperature
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18
20
Figure 14B. Logic "0" ("1" f or 2128) V IL
Threshold vs. Voltage
0.35
0.25
16
Supply Voltage (V)
Figure 14A. Logic "0" ("1" for 2128) VIL
Threshold vs. Temperature
0.3
14
125
0.35
Max
0.3
0.25
Typ
0.2
Min
0.15
0.1
0.05
0
10
12
14
16
18
20
Supply Voltage (V)
Figu re 15B. CS Input Positive Going Voltage vs.
Voltage
11
0.3
High Level Output (I O = 2 m A) (V)
High Lev el O utput ( I O = 2 mA) (V)
IRS212(7, 71, 8, 81)(S)PbF
0.25
0.2
0.15
Max
0.1
0.05
Typ
0
-50
-25
0
25
50
75
100
125
0.25
0.2
Max
0.15
0.1
Typ
0.05
0
10
12
Temperature (°C)
Low L evel Output (I O = 2 m A) (V)
Low Level Output (I O = 2 m A) (V)
0.14
0.12
0.1
Max
0.06
0.04
Typ
0
-50
-25
0
25
50
75
100
Temperature (°C)
Figure 17A. L ow Level Output (I O = 2 mA)
vs. Temperature
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18
20
Figure 16B. High Level Output (IO = 2 mA) vs .
Voltage
0.16
0.02
16
Supply Voltage (V)
Figure 16A. High Level Output (IO = 2 mA)
vs. Temperature
0.08
14
125
0.12
0.1
Max
0.08
0.06
0.04
0.02
Typ
0
10
12
14
16
18
20
Supply Voltage (V)
Figure 17B. Low Level Output (I O = 2 mA) vs .
Voltage
12
60
100
90
80
V BS Supply Current (µA)
O ffse t Supply Leak a ge Curr ent (µA)
IRS212(7, 71, 8, 81)(S)PbF
70
60
50
40
30
20
Max
10
0
-50
50
Max
40
30
20
10
0
-25
0
25
50
75
100
125
0
100
200
Temperature (°C)
Figure 18A. Offset Supply Leakage
Current vs. Temperature
400
500
600
Figure 18B. High-Side Floating Well Off set
Supply Leakage vs. Voltage
700
600
Max
500
V BS Supp ly Current (µA)
V BS Supply Current (µA)
300
Supply Voltage (V)
400
300
Typ
200
100
0
-50
600
500
400
Max
300
200
Typ
100
0
-25
0
25
50
75
100
Temperature (°C)
Figure 19A. V BS Supply Current vs.
125
10
12
14
16
18
20
Supply Voltage (V)
Figure 19B. VBS Supply Current vs. Voltage
Temperature
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13
160
180
140
160
V CC Supp ly Current (µA)
V CC Supply Current (µA)
IRS212(7, 71, 8, 81)(S)PbF
120
Max
100
80
60
Typ
40
20
0
-50
140
120
100
Max
80
60
Typ
40
20
0
-25
0
25
50
75
100
125
10
12
Temperature (°C)
Logic "1" Input Bias C ur r ent ( µA)
Logic "1" Input Bias C urrent (µA)
2
0
-50
Max
Typ
-25
0
25
50
75
100
Temperature (°C)
Figure 21A. Lo gic "1" Input Bias Current vs.
Temperature
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18
20
Figure 20B. VCC Supply Curren t vs. Voltage
20
18
16
10
8
6
4
16
Supply Voltage (V)
Figure 20A. VCC Supply Current vs.
Temperature
14
12
14
125
16
Max
14
12
10
8
Typ
6
4
2
0
10
12
14
16
18
20
Supply Voltage (V)
Figure 21B. Log ic "1" Input Bias Current vs .
Voltage
14
6
6
5
Logic "0" Input Bias C urrent (µA)
Logic "0" Input Bias C urrent (µA)
IRS212(7, 71, 8, 81)(S)PbF
Max
4
3
2
1
0
-50
-25
0
25
50
75
100
5
Max
4
3
2
1
0
125
10
12
Temperature (°C)
18
20
Max
Figure 22B. Log ic "0" Input Bias Current vs .
Voltage
Logic "1" CS Bias Cu r r ent (µA)
Logic "1" CS Bias Current (µA)
16
Supply Voltage (V)
Figure 22A. Lo gic "0" Input Bias Current vs.
Temperature
6
14
5
4
3
2
1
0
6
5
Max
4
3
2
1
0
-50
-25
0
25
50
75
100
Temperature (°C)
Figure 23A. L ogic "1" CS Bias Current vs .
Temperature
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125
10
12
14
16
18
20
Supply Voltage (V)
Figure 23B. Lo gic "1" CS Bias Current vs.
Voltage
15
6
5
6
Logic "0" CS Bias Cu r r ent (µA)
Logic "0" CS Bias Current (µA)
IRS212(7, 71, 8, 81)(S)PbF
Max
4
3
2
1
5
Max
4
3
2
1
0
0
-50
-25
0
25
50
75
100
125
10
12
Temperature (°C)
16
18
20
Supply Voltage (V)
Figure 24A. L ogic "0" CS Bias Current vs .
Temperature
Figure 24B. Lo gic "0" CS Bias Current vs.
Voltage
14
12
Max
10
Typ
V BS UV T hreshold (+) (V)
14
V BS UV T hreshold (+) (V)
14
Min
8
6
4
2
0
-50
12
Max
10
Typ
Min
8
6
4
2
0
-25
0
25
50
75
100
Temperature (°C)
Figure 25A. VBS UV Thre shold (+) vs.
125
10
12
14
16
18
20
Supply Voltage (V)
Figure 25B. VBS UV Threshold (+) vs. Voltage
Temperature
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16
IRS212(7, 71, 8, 81)(S)PbF
12
Max
10
V BS UV T hreshold (-) (V)
V BS UV T hreshold (-) (V)
12
Typ
8
Min
6
4
2
0
-50
Max
10
Typ
8
Min
6
4
2
0
-25
0
25
50
75
100
125
10
12
Temperature (°C)
Figure 26A. VBS UV Thre shold (-) vs.
Temperature
Output Source Current (A)
Output Source Current(A)
Typ
0.3
0.25
Min
0.2
0.15
0.1
0.05
0
-50
-25
0
25
50
75
16
18
100
Temperature (°C)
125
0.5
0.45
0.4
0.35
0.3
0.25
0.2
0.15
0.1
0.05
0
Typ
Min
10
12
14
16
18
20
Supply Voltage (V)
Figure 27A. O utput Sour c e Current v s .
F igure 27B. O utput Source Current v s.
Temperature
Voltage
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20
Figure 26B. VBS UV Threshold (-) vs. Voltage
0.4
0.35
14
Supply Voltage (V)
17
IRS212(7, 71, 8, 81)(S)PbF
0.8
Typ
Output Sink Current ( A)
Ou tput Sink Current(A)
0.7
0.6
0.5
Min
0.4
0.3
0.2
0.1
0
-50
-25
0
25
50
75
100
Temperature (°C)
F igur e 28A . O utput Sink Curr ent vs .
125
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
Typ
Min
10
12
14
16
18
20
Supply Voltage (V)
Figu r e 28B. Outp ut Sink Cur re nt vs . Voltag e
Temperature
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18
IRS212(7, 71, 8, 81)(S)PbF
Case outlines
01-6014
01-3003 01 (MS-001AB)
8-Lead PDIP
D
DIM
B
5
A
FOOTPRINT
8
7
6
5
6
H
E
0.25 [.010]
1
2
3
A
4
6.46 [.255]
6X e
3X 1.27 [.050]
8X 1.78 [.070]
MILLIMETERS
MAX
MIN
.0532
.0688
1.35
1.75
A1 .0040
.0098
0.10
0.25
b
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
E
.1497
.1574
3.80
4.00
e
.050 BASIC
1.27 BASIC
e1
A
8X 0.72 [.028]
INCHES
MIN
MAX
.025 BASIC
0.635 BASIC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
K x 45°
e1
A
C
y
0.10 [.004]
8X b
0.25 [.010]
A1
8X L
8X c
7
C A B
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
2. CONTROLLING DIMENSION: MILLIMETER
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
8-Lead SOIC
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7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
19
IRS212(7, 71, 8, 81)(S)PbF
Tape & Reel
8-lead SOIC
LOAD ED TA PE FEED DIRECTION
A
B
H
D
F
C
N OT E : CO NTROLLING
D IM ENSION IN M M
E
G
C A R R I E R T A P E D IM E N S I O N F O R 8 S O I C N
M e tr ic
Im p e r ia l
Co d e
M in
M ax
M in
M ax
A
7 .9 0
8 .1 0
0. 31 1
0 .3 1 8
B
3 .9 0
4 .1 0
0. 15 3
0 .1 6 1
C
1 1 .7 0
1 2 . 30
0 .4 6
0 .4 8 4
D
5 .4 5
5 .5 5
0. 21 4
0 .2 1 8
E
6 .3 0
6 .5 0
0. 24 8
0 .2 5 5
F
5 .1 0
5 .3 0
0. 20 0
0 .2 0 8
G
1 .5 0
n/ a
0. 05 9
n/ a
H
1 .5 0
1 .6 0
0. 05 9
0 .0 6 2
F
D
C
B
A
E
G
H
R E E L D IM E N S I O N S F O R 8 S O IC N
M e tr ic
Im p e r ia l
Co d e
M in
M ax
M in
M ax
A
32 9.60
3 3 0 .2 5
1 2 .9 76
1 3 .0 0 1
B
2 0 .9 5
2 1 . 45
0. 82 4
0 .8 4 4
C
1 2 .8 0
1 3 . 20
0. 50 3
0 .5 1 9
D
1 .9 5
2 .4 5
0. 76 7
0 .0 9 6
E
9 8 .0 0
1 0 2 .0 0
3. 85 8
4 .0 1 5
F
n /a
1 8 . 40
n /a
0 .7 2 4
G
1 4 .5 0
1 7 . 10
0. 57 0
0 .6 7 3
H
1 2 .4 0
1 4 . 40
0. 48 8
0 .5 6 6
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20
IRS212(7, 71, 8, 81)(S)PbF
LEADFREE PART MARKING INFORMATION
IRxxxxxx
S
Part number
YWW?
Date code
Pin 1
Identifier
?
MARKING CODE
P
Lead Free Released
Non-Lead Free
Released
IR logo
?XXXX
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
8-Lead PDIP IRS2127PbF
8-Lead PDIP IRS21271PbF
8-Lead SOIC IRS2127SPbF
8-Lead SOIC IRS21271SPbF
8-Lead SOIC Tape & Reel IRS2127STRPbF
8-Lead SOIC Tape & Reel IRS21271STRPbF
8-Lead PDIP IRS2128PbF
8-Lead PDIP IRS21281PbF
8-Lead SOIC IRS2128SPbF
8-Lead SOIC IRS21281SPbF
8-Lead SOIC Tape & Reel IRS2128STRPbF
8-Lead SOIC Tape & Reel IRS21281STRPbF
The SOIC-8 is MSL2 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 6/27/2007
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21