IPDH4N03LA G OptiMOS®2 Power-Transistor IPSH4N03LA G Product Summary Features • Ideal for high-frequency dc/dc converters • Qualified according to JEDEC1) for target applications V DS 25 V R DS(on),max (SMD Version) 4.2 mΩ ID 90 A • N-channel, logic level • Excellent gate charge x R DS(on) product (FOM) • Superior thermal resistance • 175 °C operating temperature • Pb-free lead plating; RoHS compliant Type IPDH4N03LA G IPSH4N03LA G Package P-TO252-3-11 P-TO251-3-11 Ordering Code Q67042-S4250 Q67042-S4254 Marking H4N03LA H4N03LA Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current ID Value T C=25 °C2) 90 T C=100 °C 77 Pulsed drain current I D,pulse T C=25 °C3) 360 Avalanche energy, single pulse E AS I D=90 A, R GS=25 Ω 150 Reverse diode dv /dt dv /dt I D=90 A, V DS=20 V, di /dt =200 A/µs, T j,max=175 °C 6 Gate source voltage4) V GS Power dissipation P tot Operating and storage temperature T j, T stg T C=25 °C IEC climatic category; DIN IEC 68-1 Rev. 0.92 - target data sheet Unit A mJ kV/µs ±20 V 94 W -55 ... 175 °C 55/175/56 page 1 2004-10-27 IPDH4N03LA G Parameter IPSH4N03LA G Values Symbol Conditions Unit min. typ. max. - - 1.6 minimal footprint - - 75 6 cm2 cooling area5) - - 50 25 - - Thermal characteristics Thermal resistance, junction - case R thJC SMD version, device on PCB R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA Gate threshold voltage V GS(th) V DS=V GS, I D=40 µA 1.2 1.6 2 Zero gate voltage drain current I DSS V DS=25 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=25 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=50 A - 6.1 7.6 mΩ V GS=4.5 V, I D=50 A, SMD version - 5.9 7.4 V GS=10 V, I D=60 A - 3.7 4.4 V GS=10 V, I D=60 A, SMD version - 3.5 4.2 - 1.3 - Ω 45 90 - S Gate resistance RG Transconductance g fs |V DS|>2|I D|R DS(on)max, I D=60 A 1) J-STD20 and JESD22 1) Current is limited by bondwire; with an R thJC=1.6 K/W the chip is able to carry 109 A. 3) See figure 3 4) T j,max=150 °C and duty cycle D <0.25 for V GS<-5 V 5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Rev. 0.92 - target data sheet page 2 2004-10-27 IPDH4N03LA G Parameter IPSH4N03LA G Values Symbol Conditions Unit min. typ. max. - 2400 3200 - 920 1200 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance Crss - 110 160 Turn-on delay time t d(on) - 9 14 Rise time tr - 7 11 Turn-off delay time t d(off) - 29 44 Fall time tf - 4.6 7 Gate to source charge Q gs - 8 11 Gate charge at threshold Q g(th) - 3.9 5.1 Gate to drain charge Q gd - 5.6 8 Switching charge Q sw - 10 14 Gate charge total Qg - 19 26 Gate plateau voltage V plateau - 3.4 - Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 5 V - 17 23 Output charge Q oss V DD=15 V, V GS=0 V - 20 27 - - 78 - - 360 V GS=0 V, V DS=15 V, f =1 MHz V DD=15 V, V GS=10 V, I D=25 A, R G=2.7 Ω pF ns Gate Charge Characteristics 6) V DD=15 V, I D=45 A, V GS=0 to 5 V nC V nC Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=78 A, T j=25 °C - 0.93 1.2 V Reverse recovery charge Q rr V R=15 V, I F=I S, di F/dt =400 A/µs - - 15 nC 6) T C=25 °C A See figure 16 for gate charge parameter definition Rev. 0.92 - target data sheet page 3 2004-10-27 Rev. 0.92 - target data sheet page 4 2004-10-27 IPDH4N03LA G 1 Power dissipation 2 Drain current P tot=f(T C) I D=f(T C); V GS≥10 V 120 IPSH4N03LA G 100 100 80 80 I D [A] P tot [W] 60 60 40 40 20 20 0 0 0 50 100 150 200 0 50 100 T C [°C] 150 200 T C [°C] 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T C=25 °C; D =0 Z thJC=f(t p) parameter: t p parameter: D =t p/T 1000 10 limited by on-state resistance 1 µs 10 µs 100 µs 1 Z thJC [K/W] 100 I D [A] DC 1 ms 0.5 0.2 0.1 0.05 10 0.1 0.02 10 ms 0.01 1 single pulse 0.01 0.1 1 10 100 V DS [V] Rev. 0.92 - target data sheet 10-6 10-5 10-4 10-3 10-2 10-1 100 t p [s] page 5 2004-10-27 IPDH4N03LA G IPSH4N03LA G 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 16 100 4.5 V 90 4V 3V 10 V 3.2 V 3.4 V 3.7 V 4V 14 80 12 70 3.7 V R DS(on) [mΩ] I D [A] 60 50 40 3.4 V 30 3.2 V 10 8 4.5 V 6 4 10 V 20 3V 10 2 2.8 V 0 0 0 1 2 3 0 20 40 V DS [V] 60 80 100 80 100 I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 100 140 120 80 100 I D [A] g fs [S] 60 40 80 60 40 20 20 175 °C 25 °C 0 0 0 1 2 3 4 5 Rev. 0.92 - target data sheet 0 20 40 60 I D [A] V GS [V] page 6 2004-10-27 IPDH4N03LA G IPSH4N03LA G 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=60 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 8 2.5 7 2 6 98 % 4 V GS(th) [V] R DS(on) [mΩ] 400 µA 5 typ 3 1.5 40 µA 1 2 0.5 1 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 1000 25 °C, 98% Ciss Coss 103 100 25 °C 175 °C, 98% I F [A] C [pF] 175 °C Crss 102 10 101 1 0 10 20 30 Rev. 0.92 - target data sheet 0.0 0.5 1.0 1.5 2.0 V SD [V] V DS [V] page 7 2004-10-27 IPDH4N03LA G 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=45 A pulsed parameter: Tj(start) parameter: V DD 100 IPSH4N03LA G 12 25 °C 100 °C 150 °C 15 V 10 5V 20 V V GS [V] I AV [A] 8 10 6 4 2 1 0 1 10 100 1000 0 10 20 30 40 Q gate [nC] t AV [µs] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 29 V GS 28 Qg 27 V BR(DSS) [V] 26 25 24 V g s(th) 23 22 Q g(th) 21 Q sw Q gs 20 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [°C] Rev. 0.92 - target data sheet page 8 2004-10-27 IPDH4N03LA G IPSH4N03LA G Package Outline P-TO252-3-11: Outline Footprint: Packaging: Dimensions in mm Rev. 0.92 - target data sheet page 9 2004-10-27