IRF IRF9520NS

PD -91522A
IRF9520NS/L
HEXFET® Power MOSFET
Advanced Process Technology
Surface Mount (IRF9520S)
l Low-profile through-hole (IRF9520L)
l 175°C Operating Temperature
l Fast Switching
l P-Channel
l Fully Avalanche Rated
Description
l
D
l
VDSS = -100V
RDS(on) = 0.48Ω
G
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for
use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the highest
power capability and the lowest possible on-resistance in
any existing surface mount package. The D2Pak is suitable
for high current applications because of its low internal
connection resistance and can dissipate up to 2.0W in a
typical surface mount application.
The through-hole version (IRF9520L) is available for lowprofile applications.
ID = -6.8A
S
D 2 Pak
T O -26 2
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TA = 25°C
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ -10V…
Continuous Drain Current, VGS @ -10V…
Pulsed Drain Current …
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy‚…
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ…
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
-6.8
-4.8
-27
3.8
48
0.32
± 20
140
-4.0
4.8
-5.0
-55 to + 175
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
Max.
Units
–––
–––
3.1
40
°C/W
5/13/98
IRF9520NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
Gate Threshold Voltage
gfs
Forward Transconductance
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
-100
–––
–––
-2.0
1.4
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
LS
Internal Source Inductance
–––
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
V(BR)DSS
IDSS
IGSS
Drain-to-Source Leakage Current
Typ.
–––
-0.10
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
14
47
28
31
Max. Units
Conditions
–––
V
VGS = 0V, ID = -250µA
––– V/°C Reference to 25°C, ID = -1mA…
0.48
Ω
VGS = 10V, ID = -4.0A „
-4.0
V
VDS = VGS, ID = -250µA
–––
S
VDS = -50V, ID = -4.0A…
-25
VDS = -100V, VGS = 0V
µA
-250
VDS = -80V, VGS = 0V, T J = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
27
ID = -4.0A
5.0
nC
VDS = -80V
15
VGS = -10V, See Fig. 6 and 13 „…
–––
VDD = -50V
–––
ID = -4.0A
ns
–––
RG = 22Ω
–––
RD = 12Ω, See Fig. 10 „…
Between lead,
nH
7.5 –––
and center of die contact
350 –––
VGS = 0V
110 –––
pF
VDS = -25V
70 –––
ƒ = 1.0MHz, See Fig. 5…
Source-Drain Ratings and Characteristics
IS
ISM
V SD
t rr
Q rr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode) 
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery
Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– -6.8
showing the
A
G
integral reverse
––– ––– -27
p-n junction diode.
S
––– ––– -1.6
V
TJ = 25°C, IS = -4.0A, VGS = 0V „
––– 100 150
ns
TJ = 25°C, IF = -4.0A
___ 420 630
nC di/dt = -100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
„ Pulse width ≤ 300µs; duty cycle ≤ 2%
max. junction temperature. ( See fig. 11 )
‚ Starting TJ = 25°C, L = 18mH
… Uses IRF9520N data and test conditions
RG = 25Ω, IAS = -4.0A. (See Figure 12)
ƒ ISD ≤ -4.0A, di/dt ≤ -300A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
** When mounted on 1" square PCB (FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
IRF9520NS/L
100
100
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM -4.5V
10
1
-4.5V
10
1
-4.5V
20µs PULSE WIDTH
TJ = 25 °C
0.1
0.1
1
10
100
R DS(on) , Drain-to-Source On Resistance
(Normalized)
-I D , Drain-to-Source Current (A)
2.5
TJ = 175 ° C
10
TJ = 25 ° C
1
V DS = 10V
20µs PULSE WIDTH
6
7
8
9
-VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
10
100
Fig 2. Typical Output Characteristics,
100
5
1
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics,
0.1
20µs PULSE WIDTH
TJ = 175 °C
0.1
0.1
-VDS , Drain-to-Source Voltage (V)
4
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
BOTTOM -4.5V
TOP
-I D , Drain-to-Source Current (A)
-I D , Drain-to-Source Current (A)
TOP
10
ID = -6.7A
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
VGS = -10V
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRF9520NS/L
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Ciss
Coss
400
Crss
200
ID = -4.0 A
VDS =-80V
VDS =-50V
VDS =-20V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
1
10
0
100
5
10
15
20
25
QG , Total Gate Charge (nC)
-VDS , Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
10us
TJ = 175 ° C
-II D , Drain Current (A)
-ISD , Reverse Drain Current (A)
C, Capacitance (pF)
600
20
-VGS, Gate-to-Source Voltage (V)
800
10
TJ = 25 ° C
1
0.1
0.2
V GS = 0 V
0.8
1.4
2.0
-VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
2.6
10
100us
1ms
1
10ms
TC = 25 ° C
TJ = 175 ° C
Single Pulse
0.1
1
10
100
1000
-VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
IRF9520NS/L
RD
VDS
8.0
VGS
D.U.T.
-ID , Drain Current (A)
RG
+
6.0
V DD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
4.0
Fig 10a. Switching Time Test Circuit
2.0
td(on)
tr
t d(off)
tf
VGS
10%
0.0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
90%
VDS
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
1
0.20
0.10
0.05
0.1
0.01
0.00001
0.02
0.01
P DM
SINGLE PULSE
(THERMAL RESPONSE)
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1
IRF9520NS/L
400
D .U .T
RG
VD D
IA S
-2 0 V
tp
A
D R IV E R
0 .0 1Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
L
VD S
ID
-1.7A
-2.8A
BOTTOM -4.0A
TOP
300
200
100
0
25
IAS
50
75
100
125
150
Starting TJ , Junction Temperature ( ° C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V (BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.3µF
-10V
QGS
.2µF
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
175
IRF9520NS/L
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
‚
-
-
„
+

• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
D=
Period
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
[ ISD ]
IRF9520NS/L
D2Pak Package Outline
1 0.54 (.4 15)
1 0.29 (.4 05)
1.4 0 (.055 )
M AX.
-A-
1.3 2 (.05 2)
1.2 2 (.04 8)
2
1.7 8 (.07 0)
1.2 7 (.05 0)
1
1 0.16 (.4 00 )
RE F.
-B -
4.69 (.1 85)
4.20 (.1 65)
6.47 (.2 55 )
6.18 (.2 43 )
15 .4 9 (.6 10)
14 .7 3 (.5 80)
3
2.7 9 (.110 )
2.2 9 (.090 )
2.61 (.1 03 )
2.32 (.0 91 )
5 .28 (.20 8)
4 .78 (.18 8)
3X
1.40 (.0 55)
1.14 (.0 45)
3X
5 .08 (.20 0)
0.5 5 (.022 )
0.4 6 (.018 )
0 .93 (.03 7 )
0 .69 (.02 7 )
0 .25 (.01 0 )
M
8.8 9 (.3 50 )
R E F.
1.3 9 (.0 5 5)
1.1 4 (.0 4 5)
B A M
M IN IM U M R E CO M M E ND E D F O O TP R IN T
1 1.43 (.4 50 )
NO TE S:
1 D IM EN S IO N S A FTER SO L D ER D IP.
2 D IM EN S IO N IN G & TO LE RA N C IN G PE R A N S I Y1 4.5M , 198 2.
3 C O N TRO L LIN G D IM EN SIO N : IN C H .
4 H E ATSINK & L EA D D IM EN S IO N S D O N O T IN C LU D E B UR R S.
LE A D A SS IG N M E N TS
1 - G A TE
2 - D R AIN
3 - S O U RC E
8.89 (.3 50 )
17 .78 (.70 0)
3 .8 1 (.15 0)
2 .08 (.08 2)
2X
Part Marking Information
D2Pak
IN TE R N A TIO N A L
R E C T IF IE R
LO G O
A S S E M B LY
LO T C O D E
A
PART NUM BER
F530S
9 24 6
9B
1M
DATE CODE
(Y YW W )
YY = Y E A R
W W = W EEK
2.5 4 (.100 )
2X
IRF9520NS/L
Package Outline
TO-262 Outline
Part Marking Information
TO-262
IRF9520NS/L
Tape & Reel Information
D2Pak
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
4 .1 0 (.1 6 1 )
3 .9 0 (.1 5 3 )
F E E D D IRE CTIO N 1 .8 5 (.0 7 3 )
1 .6 5 (.0 6 5 )
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
1 1.6 0 (.4 57 )
1 1.4 0 (.4 49 )
0 .3 6 8 (.0 1 4 5 )
0 .3 4 2 (.0 1 3 5 )
1 5.4 2 (.6 0 9 )
1 5.2 2 (.6 0 1 )
2 4 .3 0 (.9 5 7 )
2 3 .9 0 (.9 4 1 )
TR L
1 0.9 0 (.4 2 9 )
1 0.7 0 (.4 2 1 )
1 .7 5 (.0 6 9 )
1 .2 5 (.0 4 9 )
4 .7 2 (.1 3 6)
4 .5 2 (.1 7 8)
1 6 .1 0 (.6 3 4 )
1 5 .9 0 (.6 2 6 )
F E E D D IRE CTIO N
13 .5 0 (.53 2)
12 .8 0 (.50 4)
27 .40 (1.0 79)
23 .90 (.94 1)
4
3 30 .0 0
(14.1 73)
MAX.
NO TES :
1. C O M F O R M S T O E IA-4 18.
2. C O N TR O LL IN G D IM E N S IO N : M IL LIM E T E R .
3. D IM E N S IO N M E A SU R E D @ H U B .
4. IN C LU D E S F L AN G E D IS T O R T IO N @ O U TE R E D G E.
60.00 (2.3 62)
M IN .
26 .40 (1 .03 9)
24 .40 (.9 61 )
3
30 .40 (1.19 7)
MAX.
4
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http://www.irf.com/
Data and specifications subject to change without notice.
5/98