PD - 95064A P-Channel Surface Mount (IRFR9310) l Straight Lead (IRFU9310) l Advanced Process Technology l Fast Switching l Fully Avalanche Rated l Lead-Free Description IRFR9310PbF IRFU9310PbF l HEXFET® Power MOSFET l D RDS(on) = 7.0Ω G ID = -1.8A S Third Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. VDSS = -400V D-Pak TO-252AA I-Pak TO-251AA Absolute Maximum Ratings ID @ TC = 25°C ID @ TC = 100°C IDM PD @TC = 25°C V GS EAS IAR EAR dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds -1.8 -1.1 -7.2 50 0.40 ± 20 92 -1.8 5.0 -24 -55 to + 150 Units A W W/°C V mJ A mJ V/ns 300 (1.6mm from case ) °C Thermal Resistance Parameter RθJC RθJA RθJA www.irf.com Junction-to-Case Junction-to-Ambient (PCB mount)** Junction-to-Ambient Typ. Max. Units 2.5 50 110 °C/W 1 1/10/05 IRFR/U9310PbF Electrical Characteristics @ TJ = 25°C (unless otherwise specified) RDS(on) VGS(th) gfs Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Qg Qgs Qgd td(on) tr td(off) tf Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Min. -400 -2.0 0.91 IDSS Drain-to-Source Leakage Current LD Internal Drain Inductance LS Internal Source Inductance Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance V(BR)DSS ∆V(BR)DSS/∆TJ IGSS Typ. -0.41 11 10 25 24 Max. Units Conditions V VGS = 0V, ID = -250µA V/°C Reference to 25°C, ID = -1mA 7.0 Ω VGS = -10V, ID = -1.1A -4.0 V VDS = VGS, ID = -250µA S VDS = -50V, ID = -1.1A -100 VDS = -400V, VGS = 0V µA -500 VDS = -320V, VGS = 0V, TJ = 125°C 100 VGS = 20V nA -100 VGS = -20V 13 ID = -1.1A 3.2 nC VDS = -320V 5.0 VGS = -10V, See Fig. 6 and 13 VDD = -200V ID = -1.1A ns RG = 21Ω RD = 180Ω, See Fig. 10 D Between lead, 4.5 6mm (0.25in.) nH G from package 7.5 and center of die contact S 270 VGS = 0V 50 pF VDS = -25V 8.0 = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Starting TJ = 25°C, L = 57mH RG = 25Ω, IAS = -1.8 A. (See Figure 12) ISD ≤ -1.1A, di/dt ≤ 450A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C Min. Typ. Max. Units Conditions D MOSFET symbol -1.9 showing the A G integral reverse -7.6 p-n junction diode. S -4.0 V TJ = 25°C, IS = -1.1A, V GS = 0V 170 260 ns TJ = 25°C, IF = -1.1A 640 960 nC di/dt = 100A/µs Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) Pulse width ≤ 300µs; duty cycle ≤ 2%. This is applied for I-PAK, LS of D-PAK is measured between lead and center of die contact ** When mounted on 1" square PCB (FR-4 or G-10 Material ) . For recommended footprint and soldering techniques refer to application note #AN-994 2 www.irf.com IRFR/U9310PbF 10 10 VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V -I D , Drain-to-Source Current (A) -I D , Drain-to-Source Current (A) 1 -4.5V 20µs PULSE WIDTH TJ = 25 °C 0.1 1 10 1 -4.5V 0.1 100 2.5 RDS(on) , Drain-to-Source On Resistance (Normalized) -I D , Drain-to-Source Current (A) 10 TJ = 25 ° C TJ = 150 ° C 1 V DS = -50V 20µs PULSE WIDTH 5 6 7 8 9 -VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 1 10 100 Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 0.1 20µs PULSE WIDTH TJ = 150 °C -VDS , Drain-to-Source Voltage (V) -VDS , Drain-to-Source Voltage (V) 4 VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V TOP TOP 10 ID = -1.8A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = -10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( °C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRFR/U9310PbF VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance (pF) 400 Ciss 300 200 Coss 100 Crss 20 -VGS , Gate-to-Source Voltage (V) 500 0 1 10 ID = -1.1A VDS =-320V VDS =-200V VDS =-80V 16 12 8 4 FOR TEST CIRCUIT SEE FIGURE 13 0 100 0 4 -VDS , Drain-to-Source Voltage (V) 8 12 16 QG , Total Gate Charge (nC) Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 10 -IID , Drain Current (A) -ISD , Reverse Drain Current (A) OPERATION IN THIS AREA LIMITED BY RDS(on) TJ = 150 ° C 1 TJ = 25 ° C 0.1 1.0 V GS = 0 V 2.0 3.0 4.0 -VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 10 100us 1 1ms 0.1 5.0 10us TC = 25 °C TJ = 150 °C Single Pulse 10 10ms 100 1000 -VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRFR/U9310PbF 2.0 VGS 1.6 -ID , Drain Current (A) RD VDS D.U.T. RG + VDD -10V 1.2 Pulse Width ≤ 1 µs Duty Factor ≤ 0.1 % 0.8 Fig 10a. Switching Time Test Circuit 0.4 td(on) tr t d(off) tf VGS 10% 0.0 25 50 75 100 125 150 TC , Case Temperature ( °C) 90% VDS Fig 9. Maximum Drain Current Vs. Case Temperature Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.00001 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRFR/U9310PbF D.U.T RG IAS -20V tp VDD A DRIVER 0.01Ω 15V Fig 12a. Unclamped Inductive Test Circuit I AS EAS , Single Pulse Avalanche Energy (mJ) L VDS 300 ID -0.49A -0.7A BOTTOM -1.1A TOP 250 200 150 100 50 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( °C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current tp V(BR)DSS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. 50KΩ QG 12V -10V .2µF .3µF QGS QGD D.U.T. +VDS VGS VG -3mA Charge Fig 13a. Basic Gate Charge Waveform 6 IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit www.irf.com IRFR/U9310PbF Peak Diode Recovery dv/dt Test Circuit + D.U.T* Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + - - + RG • dv/dt controlled by RG • ISD controlled by Duty Factor "D" • D.U.T. - Device Under Test VGS * + - VDD Reverse Polarity of D.U.T for P-Channel Driver Gate Drive P.W. Period D= P.W. Period [VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode [VDD] Forward Drop Inductor Curent Ripple ≤ 5% [ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 14. For P-Channel HEXFETS www.irf.com 7 IRFR/U9310PbF D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information EXAMPLE: THIS IS AN IRFR120 WITH ASS EMBLY LOT CODE 1234 ASS EMBLED ON WW 16, 1999 IN THE ASS EMBLY LINE "A" PART NUMBER INTERNATIONAL RECTIFIER LOGO Note: "P" in assembly line position indicates "Lead-Free" IRFU120 12 916A 34 AS SEMBLY LOT CODE DATE CODE YEAR 9 = 1999 WEEK 16 LINE A OR PART NUMBER INTERNATIONAL RECTIFIER LOGO IRFU120 12 AS SEMBLY LOT CODE 8 34 DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 9 = 1999 WEEK 16 A = AS SEMBLY SITE CODE www.irf.com IRFR/U9310PbF I-Pak (TO-251AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-251AA) Part Marking Information EXAMPLE: T HIS IS AN IRFU120 WIT H ASSEMBLY LOT CODE 5678 ASSE MBLE D ON WW 19, 1999 IN T HE ASSEMBLY LINE "A" PART NUMBER INTE RNAT IONAL RECT IF IER LOGO IRFU120 919A 56 78 ASSEMBLY LOT CODE Note: "P" in ass embly line pos ition indicates "Lead-Free" DAT E CODE YEAR 9 = 1999 WEEK 19 LINE A OR PART NUMBE R INT ERNAT IONAL RECTIF IER LOGO IRFU120 56 AS SEMBLY LOT CODE www.irf.com 78 DATE CODE P = DES IGNAT ES LEAD-F REE PRODUCT (OPTIONAL) YEAR 9 = 1999 WE EK 19 A = ASS EMBLY SIT E CODE 9 IRFR/U9310PbF D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR 16.3 ( .641 ) 15.7 ( .619 ) 12.1 ( .476 ) 11.9 ( .469 ) FEED DIRECTION TRL 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) FEED DIRECTION NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541. 13 INCH 16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481. Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.01/05 10 www.irf.com